Ermanno Brusadin / mbed

mbed library sources

Dependents:   FRDM-KL46Z_LCD_Test FRDM-KL46Z_LCD_Test FRDM-KL46Z_Plantilla FRDM-KL46Z_Plantilla ... more

targets/hal/TARGET_STM/TARGET_STM32F407VG/spi_api.c@0:6bc4ac881c8e, 2016-07-28 (annotated)

Committer:
ebrus
Date:
Thu Jul 28 15:56:34 2016 +0000
Revision:
0:6bc4ac881c8e
1;

Who changed what in which revision?

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ebrus 0:6bc4ac881c8e 1 /* mbed Microcontroller Library
ebrus 0:6bc4ac881c8e 2 *******************************************************************************
ebrus 0:6bc4ac881c8e 3 * Copyright (c) 2014, STMicroelectronics
ebrus 0:6bc4ac881c8e 4 * All rights reserved.
ebrus 0:6bc4ac881c8e 5 *
ebrus 0:6bc4ac881c8e 6 * Redistribution and use in source and binary forms, with or without
ebrus 0:6bc4ac881c8e 7 * modification, are permitted provided that the following conditions are met:
ebrus 0:6bc4ac881c8e 8 *
ebrus 0:6bc4ac881c8e 9 * 1. Redistributions of source code must retain the above copyright notice,
ebrus 0:6bc4ac881c8e 10 * this list of conditions and the following disclaimer.
ebrus 0:6bc4ac881c8e 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
ebrus 0:6bc4ac881c8e 12 * this list of conditions and the following disclaimer in the documentation
ebrus 0:6bc4ac881c8e 13 * and/or other materials provided with the distribution.
ebrus 0:6bc4ac881c8e 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ebrus 0:6bc4ac881c8e 15 * may be used to endorse or promote products derived from this software
ebrus 0:6bc4ac881c8e 16 * without specific prior written permission.
ebrus 0:6bc4ac881c8e 17 *
ebrus 0:6bc4ac881c8e 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ebrus 0:6bc4ac881c8e 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ebrus 0:6bc4ac881c8e 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ebrus 0:6bc4ac881c8e 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ebrus 0:6bc4ac881c8e 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ebrus 0:6bc4ac881c8e 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ebrus 0:6bc4ac881c8e 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ebrus 0:6bc4ac881c8e 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ebrus 0:6bc4ac881c8e 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ebrus 0:6bc4ac881c8e 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ebrus 0:6bc4ac881c8e 28 *******************************************************************************
ebrus 0:6bc4ac881c8e 29 */
ebrus 0:6bc4ac881c8e 30 #include "mbed_assert.h"
ebrus 0:6bc4ac881c8e 31 #include "spi_api.h"
ebrus 0:6bc4ac881c8e 32
ebrus 0:6bc4ac881c8e 33 #if DEVICE_SPI
ebrus 0:6bc4ac881c8e 34
ebrus 0:6bc4ac881c8e 35 #include <math.h>
ebrus 0:6bc4ac881c8e 36 #include "cmsis.h"
ebrus 0:6bc4ac881c8e 37 #include "pinmap.h"
ebrus 0:6bc4ac881c8e 38
ebrus 0:6bc4ac881c8e 39 static const PinMap PinMap_SPI_MOSI[] = {
ebrus 0:6bc4ac881c8e 40 {PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 41 {PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 42 // {PB_5, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
ebrus 0:6bc4ac881c8e 43 {PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
ebrus 0:6bc4ac881c8e 44 {PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
ebrus 0:6bc4ac881c8e 45 {PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
ebrus 0:6bc4ac881c8e 46 {NC, NC, 0}
ebrus 0:6bc4ac881c8e 47 };
ebrus 0:6bc4ac881c8e 48
ebrus 0:6bc4ac881c8e 49 static const PinMap PinMap_SPI_MISO[] = {
ebrus 0:6bc4ac881c8e 50 {PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 51 {PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 52 // {PB_4, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
ebrus 0:6bc4ac881c8e 53 {PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
ebrus 0:6bc4ac881c8e 54 {PC_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
ebrus 0:6bc4ac881c8e 55 {PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
ebrus 0:6bc4ac881c8e 56 {NC, NC, 0}
ebrus 0:6bc4ac881c8e 57 };
ebrus 0:6bc4ac881c8e 58
ebrus 0:6bc4ac881c8e 59 static const PinMap PinMap_SPI_SCLK[] = {
ebrus 0:6bc4ac881c8e 60 {PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 61 {PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 62 // {PB_3, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
ebrus 0:6bc4ac881c8e 63 {PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
ebrus 0:6bc4ac881c8e 64 {PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
ebrus 0:6bc4ac881c8e 65 {PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
ebrus 0:6bc4ac881c8e 66 {NC, NC, 0}
ebrus 0:6bc4ac881c8e 67 };
ebrus 0:6bc4ac881c8e 68
ebrus 0:6bc4ac881c8e 69 static const PinMap PinMap_SPI_SSEL[] = {
ebrus 0:6bc4ac881c8e 70 {PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 71 // {PA_4, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
ebrus 0:6bc4ac881c8e 72 {PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 73 // {PA_15, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
ebrus 0:6bc4ac881c8e 74 {PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
ebrus 0:6bc4ac881c8e 75 {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
ebrus 0:6bc4ac881c8e 76 {NC, NC, 0}
ebrus 0:6bc4ac881c8e 77 };
ebrus 0:6bc4ac881c8e 78
ebrus 0:6bc4ac881c8e 79 static SPI_HandleTypeDef SpiHandle;
ebrus 0:6bc4ac881c8e 80
ebrus 0:6bc4ac881c8e 81 static void init_spi(spi_t *obj) {
ebrus 0:6bc4ac881c8e 82 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 83
ebrus 0:6bc4ac881c8e 84 __HAL_SPI_DISABLE(&SpiHandle);
ebrus 0:6bc4ac881c8e 85
ebrus 0:6bc4ac881c8e 86 SpiHandle.Init.Mode = obj->mode;
ebrus 0:6bc4ac881c8e 87 SpiHandle.Init.BaudRatePrescaler = obj->br_presc;
ebrus 0:6bc4ac881c8e 88 SpiHandle.Init.Direction = SPI_DIRECTION_2LINES;
ebrus 0:6bc4ac881c8e 89 SpiHandle.Init.CLKPhase = obj->cpha;
ebrus 0:6bc4ac881c8e 90 SpiHandle.Init.CLKPolarity = obj->cpol;
ebrus 0:6bc4ac881c8e 91 SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
ebrus 0:6bc4ac881c8e 92 SpiHandle.Init.CRCPolynomial = 7;
ebrus 0:6bc4ac881c8e 93 SpiHandle.Init.DataSize = obj->bits;
ebrus 0:6bc4ac881c8e 94 SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB;
ebrus 0:6bc4ac881c8e 95 SpiHandle.Init.NSS = obj->nss;
ebrus 0:6bc4ac881c8e 96 SpiHandle.Init.TIMode = SPI_TIMODE_DISABLED;
ebrus 0:6bc4ac881c8e 97
ebrus 0:6bc4ac881c8e 98 HAL_SPI_Init(&SpiHandle);
ebrus 0:6bc4ac881c8e 99
ebrus 0:6bc4ac881c8e 100 __HAL_SPI_ENABLE(&SpiHandle);
ebrus 0:6bc4ac881c8e 101 }
ebrus 0:6bc4ac881c8e 102
ebrus 0:6bc4ac881c8e 103 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
ebrus 0:6bc4ac881c8e 104 // Determine the SPI to use
ebrus 0:6bc4ac881c8e 105 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
ebrus 0:6bc4ac881c8e 106 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
ebrus 0:6bc4ac881c8e 107 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
ebrus 0:6bc4ac881c8e 108 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
ebrus 0:6bc4ac881c8e 109
ebrus 0:6bc4ac881c8e 110 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
ebrus 0:6bc4ac881c8e 111 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
ebrus 0:6bc4ac881c8e 112
ebrus 0:6bc4ac881c8e 113 obj->spi = (SPIName)pinmap_merge(spi_data, spi_cntl);
ebrus 0:6bc4ac881c8e 114 MBED_ASSERT(obj->spi != (SPIName)NC);
ebrus 0:6bc4ac881c8e 115
ebrus 0:6bc4ac881c8e 116 // Enable SPI clock
ebrus 0:6bc4ac881c8e 117 if (obj->spi == SPI_1) {
ebrus 0:6bc4ac881c8e 118 __SPI1_CLK_ENABLE();
ebrus 0:6bc4ac881c8e 119 }
ebrus 0:6bc4ac881c8e 120 if (obj->spi == SPI_2) {
ebrus 0:6bc4ac881c8e 121 __SPI2_CLK_ENABLE();
ebrus 0:6bc4ac881c8e 122 }
ebrus 0:6bc4ac881c8e 123 if (obj->spi == SPI_3) {
ebrus 0:6bc4ac881c8e 124 __SPI3_CLK_ENABLE();
ebrus 0:6bc4ac881c8e 125 }
ebrus 0:6bc4ac881c8e 126
ebrus 0:6bc4ac881c8e 127 // Configure the SPI pins
ebrus 0:6bc4ac881c8e 128 pinmap_pinout(mosi, PinMap_SPI_MOSI);
ebrus 0:6bc4ac881c8e 129 pinmap_pinout(miso, PinMap_SPI_MISO);
ebrus 0:6bc4ac881c8e 130 pinmap_pinout(sclk, PinMap_SPI_SCLK);
ebrus 0:6bc4ac881c8e 131
ebrus 0:6bc4ac881c8e 132 // Save new values
ebrus 0:6bc4ac881c8e 133 obj->bits = SPI_DATASIZE_8BIT;
ebrus 0:6bc4ac881c8e 134 obj->cpol = SPI_POLARITY_LOW;
ebrus 0:6bc4ac881c8e 135 obj->cpha = SPI_PHASE_1EDGE;
ebrus 0:6bc4ac881c8e 136 obj->br_presc = SPI_BAUDRATEPRESCALER_256;
ebrus 0:6bc4ac881c8e 137
ebrus 0:6bc4ac881c8e 138 obj->pin_miso = miso;
ebrus 0:6bc4ac881c8e 139 obj->pin_mosi = mosi;
ebrus 0:6bc4ac881c8e 140 obj->pin_sclk = sclk;
ebrus 0:6bc4ac881c8e 141 obj->pin_ssel = ssel;
ebrus 0:6bc4ac881c8e 142
ebrus 0:6bc4ac881c8e 143 if (ssel == NC) { // SW NSS Master mode
ebrus 0:6bc4ac881c8e 144 obj->mode = SPI_MODE_MASTER;
ebrus 0:6bc4ac881c8e 145 obj->nss = SPI_NSS_SOFT;
ebrus 0:6bc4ac881c8e 146 } else { // Slave
ebrus 0:6bc4ac881c8e 147 pinmap_pinout(ssel, PinMap_SPI_SSEL);
ebrus 0:6bc4ac881c8e 148 obj->mode = SPI_MODE_SLAVE;
ebrus 0:6bc4ac881c8e 149 obj->nss = SPI_NSS_HARD_INPUT;
ebrus 0:6bc4ac881c8e 150 }
ebrus 0:6bc4ac881c8e 151
ebrus 0:6bc4ac881c8e 152 init_spi(obj);
ebrus 0:6bc4ac881c8e 153 }
ebrus 0:6bc4ac881c8e 154
ebrus 0:6bc4ac881c8e 155 void spi_free(spi_t *obj) {
ebrus 0:6bc4ac881c8e 156 // Reset SPI and disable clock
ebrus 0:6bc4ac881c8e 157 if (obj->spi == SPI_1) {
ebrus 0:6bc4ac881c8e 158 __SPI1_FORCE_RESET();
ebrus 0:6bc4ac881c8e 159 __SPI1_RELEASE_RESET();
ebrus 0:6bc4ac881c8e 160 __SPI1_CLK_DISABLE();
ebrus 0:6bc4ac881c8e 161 }
ebrus 0:6bc4ac881c8e 162
ebrus 0:6bc4ac881c8e 163 if (obj->spi == SPI_2) {
ebrus 0:6bc4ac881c8e 164 __SPI2_FORCE_RESET();
ebrus 0:6bc4ac881c8e 165 __SPI2_RELEASE_RESET();
ebrus 0:6bc4ac881c8e 166 __SPI2_CLK_DISABLE();
ebrus 0:6bc4ac881c8e 167 }
ebrus 0:6bc4ac881c8e 168
ebrus 0:6bc4ac881c8e 169 if (obj->spi == SPI_3) {
ebrus 0:6bc4ac881c8e 170 __SPI3_FORCE_RESET();
ebrus 0:6bc4ac881c8e 171 __SPI3_RELEASE_RESET();
ebrus 0:6bc4ac881c8e 172 __SPI3_CLK_DISABLE();
ebrus 0:6bc4ac881c8e 173 }
ebrus 0:6bc4ac881c8e 174
ebrus 0:6bc4ac881c8e 175 // Configure GPIOs
ebrus 0:6bc4ac881c8e 176 pin_function(obj->pin_miso, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
ebrus 0:6bc4ac881c8e 177 pin_function(obj->pin_mosi, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
ebrus 0:6bc4ac881c8e 178 pin_function(obj->pin_sclk, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
ebrus 0:6bc4ac881c8e 179 pin_function(obj->pin_ssel, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
ebrus 0:6bc4ac881c8e 180 }
ebrus 0:6bc4ac881c8e 181
ebrus 0:6bc4ac881c8e 182 void spi_format(spi_t *obj, int bits, int mode, int slave) {
ebrus 0:6bc4ac881c8e 183 // Save new values
ebrus 0:6bc4ac881c8e 184 if (bits == 16) {
ebrus 0:6bc4ac881c8e 185 obj->bits = SPI_DATASIZE_16BIT;
ebrus 0:6bc4ac881c8e 186 } else {
ebrus 0:6bc4ac881c8e 187 obj->bits = SPI_DATASIZE_8BIT;
ebrus 0:6bc4ac881c8e 188 }
ebrus 0:6bc4ac881c8e 189
ebrus 0:6bc4ac881c8e 190 switch (mode) {
ebrus 0:6bc4ac881c8e 191 case 0:
ebrus 0:6bc4ac881c8e 192 obj->cpol = SPI_POLARITY_LOW;
ebrus 0:6bc4ac881c8e 193 obj->cpha = SPI_PHASE_1EDGE;
ebrus 0:6bc4ac881c8e 194 break;
ebrus 0:6bc4ac881c8e 195 case 1:
ebrus 0:6bc4ac881c8e 196 obj->cpol = SPI_POLARITY_LOW;
ebrus 0:6bc4ac881c8e 197 obj->cpha = SPI_PHASE_2EDGE;
ebrus 0:6bc4ac881c8e 198 break;
ebrus 0:6bc4ac881c8e 199 case 2:
ebrus 0:6bc4ac881c8e 200 obj->cpol = SPI_POLARITY_HIGH;
ebrus 0:6bc4ac881c8e 201 obj->cpha = SPI_PHASE_1EDGE;
ebrus 0:6bc4ac881c8e 202 break;
ebrus 0:6bc4ac881c8e 203 default:
ebrus 0:6bc4ac881c8e 204 obj->cpol = SPI_POLARITY_HIGH;
ebrus 0:6bc4ac881c8e 205 obj->cpha = SPI_PHASE_2EDGE;
ebrus 0:6bc4ac881c8e 206 break;
ebrus 0:6bc4ac881c8e 207 }
ebrus 0:6bc4ac881c8e 208
ebrus 0:6bc4ac881c8e 209 if (slave == 0) {
ebrus 0:6bc4ac881c8e 210 obj->mode = SPI_MODE_MASTER;
ebrus 0:6bc4ac881c8e 211 obj->nss = SPI_NSS_SOFT;
ebrus 0:6bc4ac881c8e 212 } else {
ebrus 0:6bc4ac881c8e 213 obj->mode = SPI_MODE_SLAVE;
ebrus 0:6bc4ac881c8e 214 obj->nss = SPI_NSS_HARD_INPUT;
ebrus 0:6bc4ac881c8e 215 }
ebrus 0:6bc4ac881c8e 216
ebrus 0:6bc4ac881c8e 217 init_spi(obj);
ebrus 0:6bc4ac881c8e 218 }
ebrus 0:6bc4ac881c8e 219
ebrus 0:6bc4ac881c8e 220 void spi_frequency(spi_t *obj, int hz) {
ebrus 0:6bc4ac881c8e 221 // Note: The frequencies are obtained with SPI1 clock = 84 MHz (APB2 clock)
ebrus 0:6bc4ac881c8e 222 if (hz < 600000) {
ebrus 0:6bc4ac881c8e 223 obj->br_presc = SPI_BAUDRATEPRESCALER_256; // 330 kHz
ebrus 0:6bc4ac881c8e 224 } else if ((hz >= 600000) && (hz < 1000000)) {
ebrus 0:6bc4ac881c8e 225 obj->br_presc = SPI_BAUDRATEPRESCALER_128; // 656 kHz
ebrus 0:6bc4ac881c8e 226 } else if ((hz >= 1000000) && (hz < 2000000)) {
ebrus 0:6bc4ac881c8e 227 obj->br_presc = SPI_BAUDRATEPRESCALER_64; // 1.3 MHz
ebrus 0:6bc4ac881c8e 228 } else if ((hz >= 2000000) && (hz < 5000000)) {
ebrus 0:6bc4ac881c8e 229 obj->br_presc = SPI_BAUDRATEPRESCALER_32; // 2.6 MHz
ebrus 0:6bc4ac881c8e 230 } else if ((hz >= 5000000) && (hz < 10000000)) {
ebrus 0:6bc4ac881c8e 231 obj->br_presc = SPI_BAUDRATEPRESCALER_16; // 5.25 MHz
ebrus 0:6bc4ac881c8e 232 } else if ((hz >= 10000000) && (hz < 21000000)) {
ebrus 0:6bc4ac881c8e 233 obj->br_presc = SPI_BAUDRATEPRESCALER_8; // 10.5 MHz
ebrus 0:6bc4ac881c8e 234 } else if ((hz >= 21000000) && (hz < 42000000)) {
ebrus 0:6bc4ac881c8e 235 obj->br_presc = SPI_BAUDRATEPRESCALER_4; // 21 MHz
ebrus 0:6bc4ac881c8e 236 } else { // >= 42000000
ebrus 0:6bc4ac881c8e 237 obj->br_presc = SPI_BAUDRATEPRESCALER_2; // 42 MHz
ebrus 0:6bc4ac881c8e 238 }
ebrus 0:6bc4ac881c8e 239 init_spi(obj);
ebrus 0:6bc4ac881c8e 240 }
ebrus 0:6bc4ac881c8e 241
ebrus 0:6bc4ac881c8e 242 static inline int ssp_readable(spi_t *obj) {
ebrus 0:6bc4ac881c8e 243 int status;
ebrus 0:6bc4ac881c8e 244 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 245 // Check if data is received
ebrus 0:6bc4ac881c8e 246 status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_RXNE) != RESET) ? 1 : 0);
ebrus 0:6bc4ac881c8e 247 return status;
ebrus 0:6bc4ac881c8e 248 }
ebrus 0:6bc4ac881c8e 249
ebrus 0:6bc4ac881c8e 250 static inline int ssp_writeable(spi_t *obj) {
ebrus 0:6bc4ac881c8e 251 int status;
ebrus 0:6bc4ac881c8e 252 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 253 // Check if data is transmitted
ebrus 0:6bc4ac881c8e 254 status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_TXE) != RESET) ? 1 : 0);
ebrus 0:6bc4ac881c8e 255 return status;
ebrus 0:6bc4ac881c8e 256 }
ebrus 0:6bc4ac881c8e 257
ebrus 0:6bc4ac881c8e 258 static inline void ssp_write(spi_t *obj, int value) {
ebrus 0:6bc4ac881c8e 259 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 260 while (!ssp_writeable(obj));
ebrus 0:6bc4ac881c8e 261 spi->DR = (uint16_t)value;
ebrus 0:6bc4ac881c8e 262 }
ebrus 0:6bc4ac881c8e 263
ebrus 0:6bc4ac881c8e 264 static inline int ssp_read(spi_t *obj) {
ebrus 0:6bc4ac881c8e 265 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 266 while (!ssp_readable(obj));
ebrus 0:6bc4ac881c8e 267 return (int)spi->DR;
ebrus 0:6bc4ac881c8e 268 }
ebrus 0:6bc4ac881c8e 269
ebrus 0:6bc4ac881c8e 270 static inline int ssp_busy(spi_t *obj) {
ebrus 0:6bc4ac881c8e 271 int status;
ebrus 0:6bc4ac881c8e 272 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 273 status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_BSY) != RESET) ? 1 : 0);
ebrus 0:6bc4ac881c8e 274 return status;
ebrus 0:6bc4ac881c8e 275 }
ebrus 0:6bc4ac881c8e 276
ebrus 0:6bc4ac881c8e 277 int spi_master_write(spi_t *obj, int value) {
ebrus 0:6bc4ac881c8e 278 ssp_write(obj, value);
ebrus 0:6bc4ac881c8e 279 return ssp_read(obj);
ebrus 0:6bc4ac881c8e 280 }
ebrus 0:6bc4ac881c8e 281
ebrus 0:6bc4ac881c8e 282 int spi_slave_receive(spi_t *obj) {
ebrus 0:6bc4ac881c8e 283 return ((ssp_readable(obj) && !ssp_busy(obj)) ? 1 : 0);
ebrus 0:6bc4ac881c8e 284 };
ebrus 0:6bc4ac881c8e 285
ebrus 0:6bc4ac881c8e 286 int spi_slave_read(spi_t *obj) {
ebrus 0:6bc4ac881c8e 287 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 288 while (!ssp_readable(obj));
ebrus 0:6bc4ac881c8e 289 return (int)spi->DR;
ebrus 0:6bc4ac881c8e 290 }
ebrus 0:6bc4ac881c8e 291
ebrus 0:6bc4ac881c8e 292 void spi_slave_write(spi_t *obj, int value) {
ebrus 0:6bc4ac881c8e 293 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 294 while (!ssp_writeable(obj));
ebrus 0:6bc4ac881c8e 295 spi->DR = (uint16_t)value;
ebrus 0:6bc4ac881c8e 296 }
ebrus 0:6bc4ac881c8e 297
ebrus 0:6bc4ac881c8e 298 int spi_busy(spi_t *obj) {
ebrus 0:6bc4ac881c8e 299 return ssp_busy(obj);
ebrus 0:6bc4ac881c8e 300 }
ebrus 0:6bc4ac881c8e 301
ebrus 0:6bc4ac881c8e 302 #endif