Ermanno Brusadin / mbed

mbed library sources

Dependents:   FRDM-KL46Z_LCD_Test FRDM-KL46Z_LCD_Test FRDM-KL46Z_Plantilla FRDM-KL46Z_Plantilla ... more

targets/hal/TARGET_STM/TARGET_STM32F3XX/pwmout_api.c@0:6bc4ac881c8e, 2016-07-28 (annotated)

Committer:
ebrus
Date:
Thu Jul 28 15:56:34 2016 +0000
Revision:
0:6bc4ac881c8e
1;

Who changed what in which revision?

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ebrus 0:6bc4ac881c8e 1 /* mbed Microcontroller Library
ebrus 0:6bc4ac881c8e 2 *******************************************************************************
ebrus 0:6bc4ac881c8e 3 * Copyright (c) 2014, STMicroelectronics
ebrus 0:6bc4ac881c8e 4 * All rights reserved.
ebrus 0:6bc4ac881c8e 5 *
ebrus 0:6bc4ac881c8e 6 * Redistribution and use in source and binary forms, with or without
ebrus 0:6bc4ac881c8e 7 * modification, are permitted provided that the following conditions are met:
ebrus 0:6bc4ac881c8e 8 *
ebrus 0:6bc4ac881c8e 9 * 1. Redistributions of source code must retain the above copyright notice,
ebrus 0:6bc4ac881c8e 10 * this list of conditions and the following disclaimer.
ebrus 0:6bc4ac881c8e 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
ebrus 0:6bc4ac881c8e 12 * this list of conditions and the following disclaimer in the documentation
ebrus 0:6bc4ac881c8e 13 * and/or other materials provided with the distribution.
ebrus 0:6bc4ac881c8e 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ebrus 0:6bc4ac881c8e 15 * may be used to endorse or promote products derived from this software
ebrus 0:6bc4ac881c8e 16 * without specific prior written permission.
ebrus 0:6bc4ac881c8e 17 *
ebrus 0:6bc4ac881c8e 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ebrus 0:6bc4ac881c8e 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ebrus 0:6bc4ac881c8e 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ebrus 0:6bc4ac881c8e 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ebrus 0:6bc4ac881c8e 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ebrus 0:6bc4ac881c8e 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ebrus 0:6bc4ac881c8e 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ebrus 0:6bc4ac881c8e 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ebrus 0:6bc4ac881c8e 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ebrus 0:6bc4ac881c8e 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ebrus 0:6bc4ac881c8e 28 *******************************************************************************
ebrus 0:6bc4ac881c8e 29 */
ebrus 0:6bc4ac881c8e 30 #include "mbed_assert.h"
ebrus 0:6bc4ac881c8e 31 #include "pwmout_api.h"
ebrus 0:6bc4ac881c8e 32
ebrus 0:6bc4ac881c8e 33 #include "cmsis.h"
ebrus 0:6bc4ac881c8e 34 #include "pinmap.h"
ebrus 0:6bc4ac881c8e 35
ebrus 0:6bc4ac881c8e 36 // TIM2 cannot be used because already used by the us_ticker
ebrus 0:6bc4ac881c8e 37 static const PinMap PinMap_PWM[] = {
ebrus 0:6bc4ac881c8e 38 // {PA_0, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1
ebrus 0:6bc4ac881c8e 39 // {PA_1, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH2
ebrus 0:6bc4ac881c8e 40 {PA_1, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_9)}, // TIM15_CH1N
ebrus 0:6bc4ac881c8e 41 {PA_2, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_9)}, // TIM15_CH1
ebrus 0:6bc4ac881c8e 42 {PA_3, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_9)}, // TIM15_CH2
ebrus 0:6bc4ac881c8e 43 // {PA_5, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1
ebrus 0:6bc4ac881c8e 44 {PA_6, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1
ebrus 0:6bc4ac881c8e 45 {PA_7, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM17_CH1
ebrus 0:6bc4ac881c8e 46 // {PA_7, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N
ebrus 0:6bc4ac881c8e 47 {PA_8, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1
ebrus 0:6bc4ac881c8e 48 {PA_9, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2
ebrus 0:6bc4ac881c8e 49 // {PA_9, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM2_CH3
ebrus 0:6bc4ac881c8e 50 {PA_10, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH3
ebrus 0:6bc4ac881c8e 51 // {PA_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM2_CH4
ebrus 0:6bc4ac881c8e 52 {PA_11, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_11)}, // TIM1_CH4
ebrus 0:6bc4ac881c8e 53 // {PA_11, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N
ebrus 0:6bc4ac881c8e 54 {PA_12, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1
ebrus 0:6bc4ac881c8e 55 // {PA_12, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N
ebrus 0:6bc4ac881c8e 56 {PA_13, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1N
ebrus 0:6bc4ac881c8e 57 // {PA_15, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1
ebrus 0:6bc4ac881c8e 58
ebrus 0:6bc4ac881c8e 59 {PB_0, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N
ebrus 0:6bc4ac881c8e 60 {PB_1, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH3N
ebrus 0:6bc4ac881c8e 61 // {PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH2
ebrus 0:6bc4ac881c8e 62 {PB_4, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1
ebrus 0:6bc4ac881c8e 63 {PB_5, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM17_CH1
ebrus 0:6bc4ac881c8e 64 {PB_6, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1N
ebrus 0:6bc4ac881c8e 65 {PB_7, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM17_CH1N
ebrus 0:6bc4ac881c8e 66 {PB_8, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1
ebrus 0:6bc4ac881c8e 67 {PB_9, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM17_CH1
ebrus 0:6bc4ac881c8e 68 // {PB_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH3
ebrus 0:6bc4ac881c8e 69 // {PB_11, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH4
ebrus 0:6bc4ac881c8e 70 {PB_13, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N
ebrus 0:6bc4ac881c8e 71 {PB_14, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM15_CH1
ebrus 0:6bc4ac881c8e 72 // {PB_14, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N
ebrus 0:6bc4ac881c8e 73 {PB_15, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM15_CH2
ebrus 0:6bc4ac881c8e 74 // {PB_15, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM15_CH1N
ebrus 0:6bc4ac881c8e 75 // {PB_15, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_4)}, // TIM1_CH3N
ebrus 0:6bc4ac881c8e 76
ebrus 0:6bc4ac881c8e 77 {PC_0, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM1_CH1
ebrus 0:6bc4ac881c8e 78 {PC_1, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM1_CH2
ebrus 0:6bc4ac881c8e 79 {PC_2, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM1_CH3
ebrus 0:6bc4ac881c8e 80 {PC_3, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM1_CH4
ebrus 0:6bc4ac881c8e 81 {PC_13, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_4)}, // TIM1_CH1N
ebrus 0:6bc4ac881c8e 82
ebrus 0:6bc4ac881c8e 83 {PF_0, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH3N
ebrus 0:6bc4ac881c8e 84
ebrus 0:6bc4ac881c8e 85 {NC, NC, 0}
ebrus 0:6bc4ac881c8e 86 };
ebrus 0:6bc4ac881c8e 87
ebrus 0:6bc4ac881c8e 88 void pwmout_init(pwmout_t* obj, PinName pin) {
ebrus 0:6bc4ac881c8e 89 // Get the peripheral name from the pin and assign it to the object
ebrus 0:6bc4ac881c8e 90 obj->pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
ebrus 0:6bc4ac881c8e 91 MBED_ASSERT(obj->pwm == (PWMName)NC);
ebrus 0:6bc4ac881c8e 92
ebrus 0:6bc4ac881c8e 93 // Enable TIM clock
ebrus 0:6bc4ac881c8e 94 if (obj->pwm == PWM_1) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
ebrus 0:6bc4ac881c8e 95 if (obj->pwm == PWM_15) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM15, ENABLE);
ebrus 0:6bc4ac881c8e 96 if (obj->pwm == PWM_16) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM16, ENABLE);
ebrus 0:6bc4ac881c8e 97 if (obj->pwm == PWM_17) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM17, ENABLE);
ebrus 0:6bc4ac881c8e 98
ebrus 0:6bc4ac881c8e 99 // Configure GPIO
ebrus 0:6bc4ac881c8e 100 pinmap_pinout(pin, PinMap_PWM);
ebrus 0:6bc4ac881c8e 101
ebrus 0:6bc4ac881c8e 102 obj->pin = pin;
ebrus 0:6bc4ac881c8e 103 obj->period = 0;
ebrus 0:6bc4ac881c8e 104 obj->pulse = 0;
ebrus 0:6bc4ac881c8e 105
ebrus 0:6bc4ac881c8e 106 pwmout_period_us(obj, 20000); // 20 ms per default
ebrus 0:6bc4ac881c8e 107 }
ebrus 0:6bc4ac881c8e 108
ebrus 0:6bc4ac881c8e 109 void pwmout_free(pwmout_t* obj) {
ebrus 0:6bc4ac881c8e 110 TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
ebrus 0:6bc4ac881c8e 111 TIM_DeInit(tim);
ebrus 0:6bc4ac881c8e 112 }
ebrus 0:6bc4ac881c8e 113
ebrus 0:6bc4ac881c8e 114 void pwmout_write(pwmout_t* obj, float value) {
ebrus 0:6bc4ac881c8e 115 TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
ebrus 0:6bc4ac881c8e 116 TIM_OCInitTypeDef TIM_OCInitStructure;
ebrus 0:6bc4ac881c8e 117
ebrus 0:6bc4ac881c8e 118 if (value < (float)0.0) {
ebrus 0:6bc4ac881c8e 119 value = (float)0.0;
ebrus 0:6bc4ac881c8e 120 } else if (value > (float)1.0) {
ebrus 0:6bc4ac881c8e 121 value = (float)1.0;
ebrus 0:6bc4ac881c8e 122 }
ebrus 0:6bc4ac881c8e 123
ebrus 0:6bc4ac881c8e 124 obj->pulse = (uint32_t)((float)obj->period * value);
ebrus 0:6bc4ac881c8e 125
ebrus 0:6bc4ac881c8e 126 // Configure channels
ebrus 0:6bc4ac881c8e 127 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
ebrus 0:6bc4ac881c8e 128 TIM_OCInitStructure.TIM_Pulse = obj->pulse;
ebrus 0:6bc4ac881c8e 129 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
ebrus 0:6bc4ac881c8e 130 TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCPolarity_High;
ebrus 0:6bc4ac881c8e 131 TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;
ebrus 0:6bc4ac881c8e 132 TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Reset;
ebrus 0:6bc4ac881c8e 133
ebrus 0:6bc4ac881c8e 134 switch (obj->pin) {
ebrus 0:6bc4ac881c8e 135 // Channels 1
ebrus 0:6bc4ac881c8e 136 // case PA_0:
ebrus 0:6bc4ac881c8e 137 case PA_2:
ebrus 0:6bc4ac881c8e 138 // case PA_5:
ebrus 0:6bc4ac881c8e 139 case PA_6:
ebrus 0:6bc4ac881c8e 140 case PA_7:
ebrus 0:6bc4ac881c8e 141 case PA_8:
ebrus 0:6bc4ac881c8e 142 case PA_12:
ebrus 0:6bc4ac881c8e 143 // case PA_15:
ebrus 0:6bc4ac881c8e 144 case PB_4:
ebrus 0:6bc4ac881c8e 145 case PB_5:
ebrus 0:6bc4ac881c8e 146 case PB_8:
ebrus 0:6bc4ac881c8e 147 case PB_9:
ebrus 0:6bc4ac881c8e 148 case PB_14:
ebrus 0:6bc4ac881c8e 149 case PC_0:
ebrus 0:6bc4ac881c8e 150 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
ebrus 0:6bc4ac881c8e 151 TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable);
ebrus 0:6bc4ac881c8e 152 TIM_OC1Init(tim, &TIM_OCInitStructure);
ebrus 0:6bc4ac881c8e 153 break;
ebrus 0:6bc4ac881c8e 154 // Channels 1N
ebrus 0:6bc4ac881c8e 155 case PA_1:
ebrus 0:6bc4ac881c8e 156 // case PA_7:
ebrus 0:6bc4ac881c8e 157 // case PA_11:
ebrus 0:6bc4ac881c8e 158 case PA_13:
ebrus 0:6bc4ac881c8e 159 case PB_6:
ebrus 0:6bc4ac881c8e 160 case PB_7:
ebrus 0:6bc4ac881c8e 161 case PB_13:
ebrus 0:6bc4ac881c8e 162 // case PB_15:
ebrus 0:6bc4ac881c8e 163 case PC_13:
ebrus 0:6bc4ac881c8e 164 TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
ebrus 0:6bc4ac881c8e 165 TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable);
ebrus 0:6bc4ac881c8e 166 TIM_OC1Init(tim, &TIM_OCInitStructure);
ebrus 0:6bc4ac881c8e 167 break;
ebrus 0:6bc4ac881c8e 168 // Channels 2
ebrus 0:6bc4ac881c8e 169 // case PA_1:
ebrus 0:6bc4ac881c8e 170 case PA_3:
ebrus 0:6bc4ac881c8e 171 case PA_9:
ebrus 0:6bc4ac881c8e 172 // case PB_3:
ebrus 0:6bc4ac881c8e 173 case PB_15:
ebrus 0:6bc4ac881c8e 174 case PC_1:
ebrus 0:6bc4ac881c8e 175 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
ebrus 0:6bc4ac881c8e 176 TIM_OC2PreloadConfig(tim, TIM_OCPreload_Enable);
ebrus 0:6bc4ac881c8e 177 TIM_OC2Init(tim, &TIM_OCInitStructure);
ebrus 0:6bc4ac881c8e 178 break;
ebrus 0:6bc4ac881c8e 179 // Channels 2N
ebrus 0:6bc4ac881c8e 180 // case PA_12:
ebrus 0:6bc4ac881c8e 181 case PB_0:
ebrus 0:6bc4ac881c8e 182 // case PB_14:
ebrus 0:6bc4ac881c8e 183 TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
ebrus 0:6bc4ac881c8e 184 TIM_OC2PreloadConfig(tim, TIM_OCPreload_Enable);
ebrus 0:6bc4ac881c8e 185 TIM_OC2Init(tim, &TIM_OCInitStructure);
ebrus 0:6bc4ac881c8e 186 break;
ebrus 0:6bc4ac881c8e 187 // Channels 3
ebrus 0:6bc4ac881c8e 188 // case PA_9:
ebrus 0:6bc4ac881c8e 189 case PA_10:
ebrus 0:6bc4ac881c8e 190 // case PB_10:
ebrus 0:6bc4ac881c8e 191 case PC_2:
ebrus 0:6bc4ac881c8e 192 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
ebrus 0:6bc4ac881c8e 193 TIM_OC3PreloadConfig(tim, TIM_OCPreload_Enable);
ebrus 0:6bc4ac881c8e 194 TIM_OC3Init(tim, &TIM_OCInitStructure);
ebrus 0:6bc4ac881c8e 195 break;
ebrus 0:6bc4ac881c8e 196 // Channels 3N
ebrus 0:6bc4ac881c8e 197 case PB_1:
ebrus 0:6bc4ac881c8e 198 case PF_0:
ebrus 0:6bc4ac881c8e 199 // case PB_15:
ebrus 0:6bc4ac881c8e 200 TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
ebrus 0:6bc4ac881c8e 201 TIM_OC3PreloadConfig(tim, TIM_OCPreload_Enable);
ebrus 0:6bc4ac881c8e 202 TIM_OC3Init(tim, &TIM_OCInitStructure);
ebrus 0:6bc4ac881c8e 203 break;
ebrus 0:6bc4ac881c8e 204 // Channels 4
ebrus 0:6bc4ac881c8e 205 // case PA_10:
ebrus 0:6bc4ac881c8e 206 case PA_11:
ebrus 0:6bc4ac881c8e 207 // case PB_11:
ebrus 0:6bc4ac881c8e 208 case PC_3:
ebrus 0:6bc4ac881c8e 209 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
ebrus 0:6bc4ac881c8e 210 TIM_OC4PreloadConfig(tim, TIM_OCPreload_Enable);
ebrus 0:6bc4ac881c8e 211 TIM_OC4Init(tim, &TIM_OCInitStructure);
ebrus 0:6bc4ac881c8e 212 break;
ebrus 0:6bc4ac881c8e 213 default:
ebrus 0:6bc4ac881c8e 214 return;
ebrus 0:6bc4ac881c8e 215 }
ebrus 0:6bc4ac881c8e 216 }
ebrus 0:6bc4ac881c8e 217
ebrus 0:6bc4ac881c8e 218 float pwmout_read(pwmout_t* obj) {
ebrus 0:6bc4ac881c8e 219 float value = 0;
ebrus 0:6bc4ac881c8e 220 if (obj->period > 0) {
ebrus 0:6bc4ac881c8e 221 value = (float)(obj->pulse) / (float)(obj->period);
ebrus 0:6bc4ac881c8e 222 }
ebrus 0:6bc4ac881c8e 223 return ((value > (float)1.0) ? ((float)1.0) : (value));
ebrus 0:6bc4ac881c8e 224 }
ebrus 0:6bc4ac881c8e 225
ebrus 0:6bc4ac881c8e 226 void pwmout_period(pwmout_t* obj, float seconds) {
ebrus 0:6bc4ac881c8e 227 pwmout_period_us(obj, seconds * 1000000.0f);
ebrus 0:6bc4ac881c8e 228 }
ebrus 0:6bc4ac881c8e 229
ebrus 0:6bc4ac881c8e 230 void pwmout_period_ms(pwmout_t* obj, int ms) {
ebrus 0:6bc4ac881c8e 231 pwmout_period_us(obj, ms * 1000);
ebrus 0:6bc4ac881c8e 232 }
ebrus 0:6bc4ac881c8e 233
ebrus 0:6bc4ac881c8e 234 void pwmout_period_us(pwmout_t* obj, int us) {
ebrus 0:6bc4ac881c8e 235 TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
ebrus 0:6bc4ac881c8e 236 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
ebrus 0:6bc4ac881c8e 237 float dc = pwmout_read(obj);
ebrus 0:6bc4ac881c8e 238
ebrus 0:6bc4ac881c8e 239 TIM_Cmd(tim, DISABLE);
ebrus 0:6bc4ac881c8e 240
ebrus 0:6bc4ac881c8e 241 obj->period = us;
ebrus 0:6bc4ac881c8e 242
ebrus 0:6bc4ac881c8e 243 TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
ebrus 0:6bc4ac881c8e 244 TIM_TimeBaseStructure.TIM_Period = obj->period - 1;
ebrus 0:6bc4ac881c8e 245 TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
ebrus 0:6bc4ac881c8e 246 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
ebrus 0:6bc4ac881c8e 247 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
ebrus 0:6bc4ac881c8e 248 TIM_TimeBaseInit(tim, &TIM_TimeBaseStructure);
ebrus 0:6bc4ac881c8e 249
ebrus 0:6bc4ac881c8e 250 // Set duty cycle again
ebrus 0:6bc4ac881c8e 251 pwmout_write(obj, dc);
ebrus 0:6bc4ac881c8e 252
ebrus 0:6bc4ac881c8e 253 TIM_ARRPreloadConfig(tim, ENABLE);
ebrus 0:6bc4ac881c8e 254
ebrus 0:6bc4ac881c8e 255 // Warning: Main Output must be enabled on TIM1, TIM8, TIM5, TIM6 and TIM17
ebrus 0:6bc4ac881c8e 256 if ((obj->pwm == PWM_1) || (obj->pwm == PWM_15) || (obj->pwm == PWM_16) || (obj->pwm == PWM_17)) {
ebrus 0:6bc4ac881c8e 257 TIM_CtrlPWMOutputs(tim, ENABLE);
ebrus 0:6bc4ac881c8e 258 }
ebrus 0:6bc4ac881c8e 259
ebrus 0:6bc4ac881c8e 260 TIM_Cmd(tim, ENABLE);
ebrus 0:6bc4ac881c8e 261 }
ebrus 0:6bc4ac881c8e 262
ebrus 0:6bc4ac881c8e 263 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
ebrus 0:6bc4ac881c8e 264 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
ebrus 0:6bc4ac881c8e 265 }
ebrus 0:6bc4ac881c8e 266
ebrus 0:6bc4ac881c8e 267 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
ebrus 0:6bc4ac881c8e 268 pwmout_pulsewidth_us(obj, ms * 1000);
ebrus 0:6bc4ac881c8e 269 }
ebrus 0:6bc4ac881c8e 270
ebrus 0:6bc4ac881c8e 271 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
ebrus 0:6bc4ac881c8e 272 float value = (float)us / (float)obj->period;
ebrus 0:6bc4ac881c8e 273 pwmout_write(obj, value);
ebrus 0:6bc4ac881c8e 274 }