Ermanno Brusadin / mbed

mbed library sources

Dependents:   FRDM-KL46Z_LCD_Test FRDM-KL46Z_LCD_Test FRDM-KL46Z_Plantilla FRDM-KL46Z_Plantilla ... more

targets/hal/TARGET_STM/TARGET_STM32F3XX/pinmap.c@0:6bc4ac881c8e, 2016-07-28 (annotated)

Committer:
ebrus
Date:
Thu Jul 28 15:56:34 2016 +0000
Revision:
0:6bc4ac881c8e
1;

Who changed what in which revision?

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ebrus 0:6bc4ac881c8e 1 /* mbed Microcontroller Library
ebrus 0:6bc4ac881c8e 2 *******************************************************************************
ebrus 0:6bc4ac881c8e 3 * Copyright (c) 2014, STMicroelectronics
ebrus 0:6bc4ac881c8e 4 * All rights reserved.
ebrus 0:6bc4ac881c8e 5 *
ebrus 0:6bc4ac881c8e 6 * Redistribution and use in source and binary forms, with or without
ebrus 0:6bc4ac881c8e 7 * modification, are permitted provided that the following conditions are met:
ebrus 0:6bc4ac881c8e 8 *
ebrus 0:6bc4ac881c8e 9 * 1. Redistributions of source code must retain the above copyright notice,
ebrus 0:6bc4ac881c8e 10 * this list of conditions and the following disclaimer.
ebrus 0:6bc4ac881c8e 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
ebrus 0:6bc4ac881c8e 12 * this list of conditions and the following disclaimer in the documentation
ebrus 0:6bc4ac881c8e 13 * and/or other materials provided with the distribution.
ebrus 0:6bc4ac881c8e 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ebrus 0:6bc4ac881c8e 15 * may be used to endorse or promote products derived from this software
ebrus 0:6bc4ac881c8e 16 * without specific prior written permission.
ebrus 0:6bc4ac881c8e 17 *
ebrus 0:6bc4ac881c8e 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ebrus 0:6bc4ac881c8e 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ebrus 0:6bc4ac881c8e 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ebrus 0:6bc4ac881c8e 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ebrus 0:6bc4ac881c8e 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ebrus 0:6bc4ac881c8e 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ebrus 0:6bc4ac881c8e 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ebrus 0:6bc4ac881c8e 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ebrus 0:6bc4ac881c8e 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ebrus 0:6bc4ac881c8e 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ebrus 0:6bc4ac881c8e 28 *******************************************************************************
ebrus 0:6bc4ac881c8e 29 */
ebrus 0:6bc4ac881c8e 30 #include "mbed_assert.h"
ebrus 0:6bc4ac881c8e 31 #include "pinmap.h"
ebrus 0:6bc4ac881c8e 32 #include "PortNames.h"
ebrus 0:6bc4ac881c8e 33 #include "mbed_error.h"
ebrus 0:6bc4ac881c8e 34
ebrus 0:6bc4ac881c8e 35 // Enable GPIO clock and return GPIO base address
ebrus 0:6bc4ac881c8e 36 uint32_t Set_GPIO_Clock(uint32_t port_idx) {
ebrus 0:6bc4ac881c8e 37 uint32_t gpio_add;
ebrus 0:6bc4ac881c8e 38 switch (port_idx) {
ebrus 0:6bc4ac881c8e 39 case PortA:
ebrus 0:6bc4ac881c8e 40 gpio_add = GPIOA_BASE;
ebrus 0:6bc4ac881c8e 41 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
ebrus 0:6bc4ac881c8e 42 break;
ebrus 0:6bc4ac881c8e 43 case PortB:
ebrus 0:6bc4ac881c8e 44 gpio_add = GPIOB_BASE;
ebrus 0:6bc4ac881c8e 45 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
ebrus 0:6bc4ac881c8e 46 break;
ebrus 0:6bc4ac881c8e 47 case PortC:
ebrus 0:6bc4ac881c8e 48 gpio_add = GPIOC_BASE;
ebrus 0:6bc4ac881c8e 49 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC, ENABLE);
ebrus 0:6bc4ac881c8e 50 break;
ebrus 0:6bc4ac881c8e 51 case PortD:
ebrus 0:6bc4ac881c8e 52 gpio_add = GPIOD_BASE;
ebrus 0:6bc4ac881c8e 53 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOD, ENABLE);
ebrus 0:6bc4ac881c8e 54 break;
ebrus 0:6bc4ac881c8e 55 case PortE:
ebrus 0:6bc4ac881c8e 56 gpio_add = GPIOE_BASE;
ebrus 0:6bc4ac881c8e 57 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOE, ENABLE);
ebrus 0:6bc4ac881c8e 58 break;
ebrus 0:6bc4ac881c8e 59 case PortF:
ebrus 0:6bc4ac881c8e 60 gpio_add = GPIOF_BASE;
ebrus 0:6bc4ac881c8e 61 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOF, ENABLE);
ebrus 0:6bc4ac881c8e 62 break;
ebrus 0:6bc4ac881c8e 63 default:
ebrus 0:6bc4ac881c8e 64 gpio_add = 0;
ebrus 0:6bc4ac881c8e 65 error("Port number is not correct.");
ebrus 0:6bc4ac881c8e 66 break;
ebrus 0:6bc4ac881c8e 67 }
ebrus 0:6bc4ac881c8e 68 return gpio_add;
ebrus 0:6bc4ac881c8e 69 }
ebrus 0:6bc4ac881c8e 70
ebrus 0:6bc4ac881c8e 71 /**
ebrus 0:6bc4ac881c8e 72 * Configure pin (mode, speed, output type and pull-up/pull-down)
ebrus 0:6bc4ac881c8e 73 */
ebrus 0:6bc4ac881c8e 74 void pin_function(PinName pin, int data) {
ebrus 0:6bc4ac881c8e 75 MBED_ASSERT(pin != (PinName)NC);
ebrus 0:6bc4ac881c8e 76
ebrus 0:6bc4ac881c8e 77 // Get the pin informations
ebrus 0:6bc4ac881c8e 78 uint32_t mode = STM_PIN_MODE(data);
ebrus 0:6bc4ac881c8e 79 uint32_t otype = STM_PIN_OTYPE(data);
ebrus 0:6bc4ac881c8e 80 uint32_t pupd = STM_PIN_PUPD(data);
ebrus 0:6bc4ac881c8e 81 uint32_t afnum = STM_PIN_AFNUM(data);
ebrus 0:6bc4ac881c8e 82
ebrus 0:6bc4ac881c8e 83 uint32_t port_index = STM_PORT(pin);
ebrus 0:6bc4ac881c8e 84 uint32_t pin_index = STM_PIN(pin);
ebrus 0:6bc4ac881c8e 85
ebrus 0:6bc4ac881c8e 86 // Enable GPIO clock
ebrus 0:6bc4ac881c8e 87 uint32_t gpio_add = Set_GPIO_Clock(port_index);
ebrus 0:6bc4ac881c8e 88 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
ebrus 0:6bc4ac881c8e 89
ebrus 0:6bc4ac881c8e 90 // Configure Alternate Function
ebrus 0:6bc4ac881c8e 91 // Warning: Must be done before the GPIO is initialized
ebrus 0:6bc4ac881c8e 92 if (afnum != 0xFF) {
ebrus 0:6bc4ac881c8e 93 GPIO_PinAFConfig(gpio, (uint16_t)pin_index, afnum);
ebrus 0:6bc4ac881c8e 94 }
ebrus 0:6bc4ac881c8e 95
ebrus 0:6bc4ac881c8e 96 // Configure GPIO
ebrus 0:6bc4ac881c8e 97 GPIO_InitTypeDef GPIO_InitStructure;
ebrus 0:6bc4ac881c8e 98 GPIO_InitStructure.GPIO_Pin = (uint16_t)(1 << pin_index);
ebrus 0:6bc4ac881c8e 99 GPIO_InitStructure.GPIO_Mode = (GPIOMode_TypeDef)mode;
ebrus 0:6bc4ac881c8e 100 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_Level_3;
ebrus 0:6bc4ac881c8e 101 GPIO_InitStructure.GPIO_OType = (GPIOOType_TypeDef)otype;
ebrus 0:6bc4ac881c8e 102 GPIO_InitStructure.GPIO_PuPd = (GPIOPuPd_TypeDef)pupd;
ebrus 0:6bc4ac881c8e 103 GPIO_Init(gpio, &GPIO_InitStructure);
ebrus 0:6bc4ac881c8e 104
ebrus 0:6bc4ac881c8e 105 // [TODO] Disconnect JTAG-DP + SW-DP signals.
ebrus 0:6bc4ac881c8e 106 // Warning: Need to reconnect under reset
ebrus 0:6bc4ac881c8e 107 //if ((pin == PA_13) || (pin == PA_14)) {
ebrus 0:6bc4ac881c8e 108 //
ebrus 0:6bc4ac881c8e 109 //}
ebrus 0:6bc4ac881c8e 110 //if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
ebrus 0:6bc4ac881c8e 111 //
ebrus 0:6bc4ac881c8e 112 //}
ebrus 0:6bc4ac881c8e 113 }
ebrus 0:6bc4ac881c8e 114
ebrus 0:6bc4ac881c8e 115 /**
ebrus 0:6bc4ac881c8e 116 * Configure pin pull-up/pull-down
ebrus 0:6bc4ac881c8e 117 */
ebrus 0:6bc4ac881c8e 118 void pin_mode(PinName pin, PinMode mode) {
ebrus 0:6bc4ac881c8e 119 MBED_ASSERT(pin != (PinName)NC);
ebrus 0:6bc4ac881c8e 120
ebrus 0:6bc4ac881c8e 121 uint32_t port_index = STM_PORT(pin);
ebrus 0:6bc4ac881c8e 122 uint32_t pin_index = STM_PIN(pin);
ebrus 0:6bc4ac881c8e 123
ebrus 0:6bc4ac881c8e 124 // Enable GPIO clock
ebrus 0:6bc4ac881c8e 125 uint32_t gpio_add = Set_GPIO_Clock(port_index);
ebrus 0:6bc4ac881c8e 126 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
ebrus 0:6bc4ac881c8e 127
ebrus 0:6bc4ac881c8e 128 // Configure pull-up/pull-down resistors
ebrus 0:6bc4ac881c8e 129 uint32_t pupd = (uint32_t)mode;
ebrus 0:6bc4ac881c8e 130 if (pupd > 2)
ebrus 0:6bc4ac881c8e 131 pupd = 0; // Open-drain = No pull-up/No pull-down
ebrus 0:6bc4ac881c8e 132 gpio->PUPDR &= (uint32_t)(~(GPIO_PUPDR_PUPDR0 << (pin_index * 2)));
ebrus 0:6bc4ac881c8e 133 gpio->PUPDR |= (uint32_t)(pupd << (pin_index * 2));
ebrus 0:6bc4ac881c8e 134
ebrus 0:6bc4ac881c8e 135 }