Ermanno Brusadin / mbed

mbed library sources

Dependents:   FRDM-KL46Z_LCD_Test FRDM-KL46Z_LCD_Test FRDM-KL46Z_Plantilla FRDM-KL46Z_Plantilla ... more

targets/hal/TARGET_STM/TARGET_NUCLEO_L053R8/us_ticker.c@0:6bc4ac881c8e, 2016-07-28 (annotated)

Committer:
ebrus
Date:
Thu Jul 28 15:56:34 2016 +0000
Revision:
0:6bc4ac881c8e
1;

Who changed what in which revision?

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ebrus 0:6bc4ac881c8e 1 /* mbed Microcontroller Library
ebrus 0:6bc4ac881c8e 2 * Copyright (c) 2014, STMicroelectronics
ebrus 0:6bc4ac881c8e 3 * All rights reserved.
ebrus 0:6bc4ac881c8e 4 *
ebrus 0:6bc4ac881c8e 5 * Redistribution and use in source and binary forms, with or without
ebrus 0:6bc4ac881c8e 6 * modification, are permitted provided that the following conditions are met:
ebrus 0:6bc4ac881c8e 7 *
ebrus 0:6bc4ac881c8e 8 * 1. Redistributions of source code must retain the above copyright notice,
ebrus 0:6bc4ac881c8e 9 * this list of conditions and the following disclaimer.
ebrus 0:6bc4ac881c8e 10 * 2. Redistributions in binary form must reproduce the above copyright notice,
ebrus 0:6bc4ac881c8e 11 * this list of conditions and the following disclaimer in the documentation
ebrus 0:6bc4ac881c8e 12 * and/or other materials provided with the distribution.
ebrus 0:6bc4ac881c8e 13 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ebrus 0:6bc4ac881c8e 14 * may be used to endorse or promote products derived from this software
ebrus 0:6bc4ac881c8e 15 * without specific prior written permission.
ebrus 0:6bc4ac881c8e 16 *
ebrus 0:6bc4ac881c8e 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ebrus 0:6bc4ac881c8e 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ebrus 0:6bc4ac881c8e 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ebrus 0:6bc4ac881c8e 20 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ebrus 0:6bc4ac881c8e 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ebrus 0:6bc4ac881c8e 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ebrus 0:6bc4ac881c8e 23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ebrus 0:6bc4ac881c8e 24 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ebrus 0:6bc4ac881c8e 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ebrus 0:6bc4ac881c8e 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ebrus 0:6bc4ac881c8e 27 */
ebrus 0:6bc4ac881c8e 28 #include <stddef.h>
ebrus 0:6bc4ac881c8e 29 #include "us_ticker_api.h"
ebrus 0:6bc4ac881c8e 30 #include "PeripheralNames.h"
ebrus 0:6bc4ac881c8e 31
ebrus 0:6bc4ac881c8e 32 // Timer selection:
ebrus 0:6bc4ac881c8e 33 #define TIM_MST TIM21
ebrus 0:6bc4ac881c8e 34 #define TIM_MST_IRQ TIM21_IRQn
ebrus 0:6bc4ac881c8e 35 #define TIM_MST_RCC __TIM21_CLK_ENABLE()
ebrus 0:6bc4ac881c8e 36
ebrus 0:6bc4ac881c8e 37 static TIM_HandleTypeDef TimMasterHandle;
ebrus 0:6bc4ac881c8e 38
ebrus 0:6bc4ac881c8e 39 static int us_ticker_inited = 0;
ebrus 0:6bc4ac881c8e 40 static volatile uint32_t SlaveCounter = 0;
ebrus 0:6bc4ac881c8e 41 static volatile uint32_t oc_int_part = 0;
ebrus 0:6bc4ac881c8e 42 static volatile uint16_t oc_rem_part = 0;
ebrus 0:6bc4ac881c8e 43
ebrus 0:6bc4ac881c8e 44 void set_compare(uint16_t count) {
ebrus 0:6bc4ac881c8e 45 // Set new output compare value
ebrus 0:6bc4ac881c8e 46 __HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_1, count);
ebrus 0:6bc4ac881c8e 47 // Enable IT
ebrus 0:6bc4ac881c8e 48 __HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC1);
ebrus 0:6bc4ac881c8e 49 }
ebrus 0:6bc4ac881c8e 50
ebrus 0:6bc4ac881c8e 51 static void tim_irq_handler(void) {
ebrus 0:6bc4ac881c8e 52 uint16_t cval = TIM_MST->CNT;
ebrus 0:6bc4ac881c8e 53
ebrus 0:6bc4ac881c8e 54 // Clear Update interrupt flag
ebrus 0:6bc4ac881c8e 55 if (__HAL_TIM_GET_FLAG(&TimMasterHandle, TIM_FLAG_UPDATE) == SET) {
ebrus 0:6bc4ac881c8e 56 __HAL_TIM_CLEAR_FLAG(&TimMasterHandle, TIM_FLAG_UPDATE);
ebrus 0:6bc4ac881c8e 57 SlaveCounter++;
ebrus 0:6bc4ac881c8e 58 }
ebrus 0:6bc4ac881c8e 59
ebrus 0:6bc4ac881c8e 60 // Clear CC1 interrupt flag
ebrus 0:6bc4ac881c8e 61 if (__HAL_TIM_GET_FLAG(&TimMasterHandle, TIM_FLAG_CC1) == SET) {
ebrus 0:6bc4ac881c8e 62 __HAL_TIM_CLEAR_FLAG(&TimMasterHandle, TIM_FLAG_CC1);
ebrus 0:6bc4ac881c8e 63 if (oc_rem_part > 0) {
ebrus 0:6bc4ac881c8e 64 set_compare(oc_rem_part); // Finish the remaining time left
ebrus 0:6bc4ac881c8e 65 oc_rem_part = 0;
ebrus 0:6bc4ac881c8e 66 } else {
ebrus 0:6bc4ac881c8e 67 if (oc_int_part > 0) {
ebrus 0:6bc4ac881c8e 68 set_compare(0xFFFF);
ebrus 0:6bc4ac881c8e 69 oc_rem_part = cval; // To finish the counter loop the next time
ebrus 0:6bc4ac881c8e 70 oc_int_part--;
ebrus 0:6bc4ac881c8e 71 } else {
ebrus 0:6bc4ac881c8e 72 us_ticker_irq_handler();
ebrus 0:6bc4ac881c8e 73 }
ebrus 0:6bc4ac881c8e 74 }
ebrus 0:6bc4ac881c8e 75 }
ebrus 0:6bc4ac881c8e 76 }
ebrus 0:6bc4ac881c8e 77
ebrus 0:6bc4ac881c8e 78 void us_ticker_init(void) {
ebrus 0:6bc4ac881c8e 79 if (us_ticker_inited) return;
ebrus 0:6bc4ac881c8e 80 us_ticker_inited = 1;
ebrus 0:6bc4ac881c8e 81
ebrus 0:6bc4ac881c8e 82 // Enable timer clock
ebrus 0:6bc4ac881c8e 83 TIM_MST_RCC;
ebrus 0:6bc4ac881c8e 84
ebrus 0:6bc4ac881c8e 85 // Configure time base
ebrus 0:6bc4ac881c8e 86 TimMasterHandle.Instance = TIM_MST;
ebrus 0:6bc4ac881c8e 87 TimMasterHandle.Init.Period = 0xFFFF;
ebrus 0:6bc4ac881c8e 88 TimMasterHandle.Init.Prescaler = (uint32_t)(SystemCoreClock / 1000000) - 1; // 1 �s tick
ebrus 0:6bc4ac881c8e 89 TimMasterHandle.Init.ClockDivision = 0;
ebrus 0:6bc4ac881c8e 90 TimMasterHandle.Init.CounterMode = TIM_COUNTERMODE_UP;
ebrus 0:6bc4ac881c8e 91 HAL_TIM_Base_Init(&TimMasterHandle);
ebrus 0:6bc4ac881c8e 92
ebrus 0:6bc4ac881c8e 93 // Configure interrupts
ebrus 0:6bc4ac881c8e 94 __HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_UPDATE);
ebrus 0:6bc4ac881c8e 95
ebrus 0:6bc4ac881c8e 96 // Update interrupt used for 32-bit counter
ebrus 0:6bc4ac881c8e 97 // Output compare interrupt used for timeout feature
ebrus 0:6bc4ac881c8e 98 NVIC_SetVector(TIM_MST_IRQ, (uint32_t)tim_irq_handler);
ebrus 0:6bc4ac881c8e 99 NVIC_EnableIRQ(TIM_MST_IRQ);
ebrus 0:6bc4ac881c8e 100
ebrus 0:6bc4ac881c8e 101 // Enable timer
ebrus 0:6bc4ac881c8e 102 HAL_TIM_Base_Start(&TimMasterHandle);
ebrus 0:6bc4ac881c8e 103 }
ebrus 0:6bc4ac881c8e 104
ebrus 0:6bc4ac881c8e 105 uint32_t us_ticker_read() {
ebrus 0:6bc4ac881c8e 106 uint32_t counter, counter2;
ebrus 0:6bc4ac881c8e 107 if (!us_ticker_inited) us_ticker_init();
ebrus 0:6bc4ac881c8e 108 // A situation might appear when Master overflows right after Slave is read and before the
ebrus 0:6bc4ac881c8e 109 // new (overflowed) value of Master is read. Which would make the code below consider the
ebrus 0:6bc4ac881c8e 110 // previous (incorrect) value of Slave and the new value of Master, which would return a
ebrus 0:6bc4ac881c8e 111 // value in the past. Avoid this by computing consecutive values of the timer until they
ebrus 0:6bc4ac881c8e 112 // are properly ordered.
ebrus 0:6bc4ac881c8e 113 counter = (uint32_t)(SlaveCounter << 16);
ebrus 0:6bc4ac881c8e 114 counter += TIM_MST->CNT;
ebrus 0:6bc4ac881c8e 115 while (1) {
ebrus 0:6bc4ac881c8e 116 counter2 = (uint32_t)(SlaveCounter << 16);
ebrus 0:6bc4ac881c8e 117 counter2 += TIM_MST->CNT;
ebrus 0:6bc4ac881c8e 118 if (counter2 > counter) {
ebrus 0:6bc4ac881c8e 119 break;
ebrus 0:6bc4ac881c8e 120 }
ebrus 0:6bc4ac881c8e 121 counter = counter2;
ebrus 0:6bc4ac881c8e 122 }
ebrus 0:6bc4ac881c8e 123 return counter2;
ebrus 0:6bc4ac881c8e 124 }
ebrus 0:6bc4ac881c8e 125
ebrus 0:6bc4ac881c8e 126 void us_ticker_set_interrupt(timestamp_t timestamp) {
ebrus 0:6bc4ac881c8e 127 int delta = (int)((uint32_t)timestamp - us_ticker_read());
ebrus 0:6bc4ac881c8e 128 uint16_t cval = TIM_MST->CNT;
ebrus 0:6bc4ac881c8e 129
ebrus 0:6bc4ac881c8e 130 if (delta <= 0) { // This event was in the past
ebrus 0:6bc4ac881c8e 131 us_ticker_irq_handler();
ebrus 0:6bc4ac881c8e 132 } else {
ebrus 0:6bc4ac881c8e 133 oc_int_part = (uint32_t)(delta >> 16);
ebrus 0:6bc4ac881c8e 134 oc_rem_part = (uint16_t)(delta & 0xFFFF);
ebrus 0:6bc4ac881c8e 135 if (oc_rem_part <= (0xFFFF - cval)) {
ebrus 0:6bc4ac881c8e 136 set_compare(cval + oc_rem_part);
ebrus 0:6bc4ac881c8e 137 oc_rem_part = 0;
ebrus 0:6bc4ac881c8e 138 } else {
ebrus 0:6bc4ac881c8e 139 set_compare(0xFFFF);
ebrus 0:6bc4ac881c8e 140 oc_rem_part = oc_rem_part - (0xFFFF - cval);
ebrus 0:6bc4ac881c8e 141 }
ebrus 0:6bc4ac881c8e 142 }
ebrus 0:6bc4ac881c8e 143 }
ebrus 0:6bc4ac881c8e 144
ebrus 0:6bc4ac881c8e 145 void us_ticker_disable_interrupt(void) {
ebrus 0:6bc4ac881c8e 146 __HAL_TIM_DISABLE_IT(&TimMasterHandle, TIM_IT_CC1);
ebrus 0:6bc4ac881c8e 147 }
ebrus 0:6bc4ac881c8e 148
ebrus 0:6bc4ac881c8e 149 void us_ticker_clear_interrupt(void) {
ebrus 0:6bc4ac881c8e 150 __HAL_TIM_CLEAR_FLAG(&TimMasterHandle, TIM_FLAG_CC1);
ebrus 0:6bc4ac881c8e 151 }