Ermanno Brusadin / mbed

mbed library sources

Dependents:   FRDM-KL46Z_LCD_Test FRDM-KL46Z_LCD_Test FRDM-KL46Z_Plantilla FRDM-KL46Z_Plantilla ... more

targets/hal/TARGET_STM/TARGET_NUCLEO_F334R8/spi_api.c@0:6bc4ac881c8e, 2016-07-28 (annotated)

Committer:
ebrus
Date:
Thu Jul 28 15:56:34 2016 +0000
Revision:
0:6bc4ac881c8e
1;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ebrus 0:6bc4ac881c8e 1 /* mbed Microcontroller Library
ebrus 0:6bc4ac881c8e 2 *******************************************************************************
ebrus 0:6bc4ac881c8e 3 * Copyright (c) 2014, STMicroelectronics
ebrus 0:6bc4ac881c8e 4 * All rights reserved.
ebrus 0:6bc4ac881c8e 5 *
ebrus 0:6bc4ac881c8e 6 * Redistribution and use in source and binary forms, with or without
ebrus 0:6bc4ac881c8e 7 * modification, are permitted provided that the following conditions are met:
ebrus 0:6bc4ac881c8e 8 *
ebrus 0:6bc4ac881c8e 9 * 1. Redistributions of source code must retain the above copyright notice,
ebrus 0:6bc4ac881c8e 10 * this list of conditions and the following disclaimer.
ebrus 0:6bc4ac881c8e 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
ebrus 0:6bc4ac881c8e 12 * this list of conditions and the following disclaimer in the documentation
ebrus 0:6bc4ac881c8e 13 * and/or other materials provided with the distribution.
ebrus 0:6bc4ac881c8e 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ebrus 0:6bc4ac881c8e 15 * may be used to endorse or promote products derived from this software
ebrus 0:6bc4ac881c8e 16 * without specific prior written permission.
ebrus 0:6bc4ac881c8e 17 *
ebrus 0:6bc4ac881c8e 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ebrus 0:6bc4ac881c8e 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ebrus 0:6bc4ac881c8e 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ebrus 0:6bc4ac881c8e 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ebrus 0:6bc4ac881c8e 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ebrus 0:6bc4ac881c8e 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ebrus 0:6bc4ac881c8e 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ebrus 0:6bc4ac881c8e 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ebrus 0:6bc4ac881c8e 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ebrus 0:6bc4ac881c8e 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ebrus 0:6bc4ac881c8e 28 *******************************************************************************
ebrus 0:6bc4ac881c8e 29 */
ebrus 0:6bc4ac881c8e 30 #include "mbed_assert.h"
ebrus 0:6bc4ac881c8e 31 #include "spi_api.h"
ebrus 0:6bc4ac881c8e 32
ebrus 0:6bc4ac881c8e 33 #if DEVICE_SPI
ebrus 0:6bc4ac881c8e 34
ebrus 0:6bc4ac881c8e 35 #include <math.h>
ebrus 0:6bc4ac881c8e 36 #include "cmsis.h"
ebrus 0:6bc4ac881c8e 37 #include "pinmap.h"
ebrus 0:6bc4ac881c8e 38
ebrus 0:6bc4ac881c8e 39 static const PinMap PinMap_SPI_MOSI[] = {
ebrus 0:6bc4ac881c8e 40 {PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 41 {PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 42 {NC, NC, 0}
ebrus 0:6bc4ac881c8e 43 };
ebrus 0:6bc4ac881c8e 44
ebrus 0:6bc4ac881c8e 45 static const PinMap PinMap_SPI_MISO[] = {
ebrus 0:6bc4ac881c8e 46 {PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 47 {PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 48 {NC, NC, 0}
ebrus 0:6bc4ac881c8e 49 };
ebrus 0:6bc4ac881c8e 50
ebrus 0:6bc4ac881c8e 51 static const PinMap PinMap_SPI_SCLK[] = {
ebrus 0:6bc4ac881c8e 52 {PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 53 {PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 54 {NC, NC, 0}
ebrus 0:6bc4ac881c8e 55 };
ebrus 0:6bc4ac881c8e 56
ebrus 0:6bc4ac881c8e 57 static const PinMap PinMap_SPI_SSEL[] = {
ebrus 0:6bc4ac881c8e 58 {PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 59 {PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
ebrus 0:6bc4ac881c8e 60 {NC, NC, 0}
ebrus 0:6bc4ac881c8e 61 };
ebrus 0:6bc4ac881c8e 62
ebrus 0:6bc4ac881c8e 63 static SPI_HandleTypeDef SpiHandle;
ebrus 0:6bc4ac881c8e 64
ebrus 0:6bc4ac881c8e 65 static void init_spi(spi_t *obj)
ebrus 0:6bc4ac881c8e 66 {
ebrus 0:6bc4ac881c8e 67 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 68
ebrus 0:6bc4ac881c8e 69 __HAL_SPI_DISABLE(&SpiHandle);
ebrus 0:6bc4ac881c8e 70
ebrus 0:6bc4ac881c8e 71 SpiHandle.Init.Mode = obj->mode;
ebrus 0:6bc4ac881c8e 72 SpiHandle.Init.BaudRatePrescaler = obj->br_presc;
ebrus 0:6bc4ac881c8e 73 SpiHandle.Init.Direction = SPI_DIRECTION_2LINES;
ebrus 0:6bc4ac881c8e 74 SpiHandle.Init.CLKPhase = obj->cpha;
ebrus 0:6bc4ac881c8e 75 SpiHandle.Init.CLKPolarity = obj->cpol;
ebrus 0:6bc4ac881c8e 76 SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
ebrus 0:6bc4ac881c8e 77 SpiHandle.Init.CRCPolynomial = 7;
ebrus 0:6bc4ac881c8e 78 SpiHandle.Init.DataSize = obj->bits;
ebrus 0:6bc4ac881c8e 79 SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB;
ebrus 0:6bc4ac881c8e 80 SpiHandle.Init.NSS = obj->nss;
ebrus 0:6bc4ac881c8e 81 SpiHandle.Init.TIMode = SPI_TIMODE_DISABLED;
ebrus 0:6bc4ac881c8e 82
ebrus 0:6bc4ac881c8e 83 HAL_SPI_Init(&SpiHandle);
ebrus 0:6bc4ac881c8e 84
ebrus 0:6bc4ac881c8e 85 __HAL_SPI_ENABLE(&SpiHandle);
ebrus 0:6bc4ac881c8e 86 }
ebrus 0:6bc4ac881c8e 87
ebrus 0:6bc4ac881c8e 88 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
ebrus 0:6bc4ac881c8e 89 {
ebrus 0:6bc4ac881c8e 90 // Determine the SPI to use
ebrus 0:6bc4ac881c8e 91 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
ebrus 0:6bc4ac881c8e 92 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
ebrus 0:6bc4ac881c8e 93 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
ebrus 0:6bc4ac881c8e 94 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
ebrus 0:6bc4ac881c8e 95
ebrus 0:6bc4ac881c8e 96 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
ebrus 0:6bc4ac881c8e 97 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
ebrus 0:6bc4ac881c8e 98
ebrus 0:6bc4ac881c8e 99 obj->spi = (SPIName)pinmap_merge(spi_data, spi_cntl);
ebrus 0:6bc4ac881c8e 100 MBED_ASSERT(obj->spi != (SPIName)NC);
ebrus 0:6bc4ac881c8e 101
ebrus 0:6bc4ac881c8e 102 // Enable SPI clock
ebrus 0:6bc4ac881c8e 103 __SPI1_CLK_ENABLE();
ebrus 0:6bc4ac881c8e 104
ebrus 0:6bc4ac881c8e 105 // Configure the SPI pins
ebrus 0:6bc4ac881c8e 106 pinmap_pinout(mosi, PinMap_SPI_MOSI);
ebrus 0:6bc4ac881c8e 107 pinmap_pinout(miso, PinMap_SPI_MISO);
ebrus 0:6bc4ac881c8e 108 pinmap_pinout(sclk, PinMap_SPI_SCLK);
ebrus 0:6bc4ac881c8e 109
ebrus 0:6bc4ac881c8e 110 // Save new values
ebrus 0:6bc4ac881c8e 111 obj->bits = SPI_DATASIZE_8BIT;
ebrus 0:6bc4ac881c8e 112 obj->cpol = SPI_POLARITY_LOW;
ebrus 0:6bc4ac881c8e 113 obj->cpha = SPI_PHASE_1EDGE;
ebrus 0:6bc4ac881c8e 114 obj->br_presc = SPI_BAUDRATEPRESCALER_256;
ebrus 0:6bc4ac881c8e 115
ebrus 0:6bc4ac881c8e 116 obj->pin_miso = miso;
ebrus 0:6bc4ac881c8e 117 obj->pin_mosi = mosi;
ebrus 0:6bc4ac881c8e 118 obj->pin_sclk = sclk;
ebrus 0:6bc4ac881c8e 119 obj->pin_ssel = ssel;
ebrus 0:6bc4ac881c8e 120
ebrus 0:6bc4ac881c8e 121 if (ssel == NC) { // SW NSS Master mode
ebrus 0:6bc4ac881c8e 122 obj->mode = SPI_MODE_MASTER;
ebrus 0:6bc4ac881c8e 123 obj->nss = SPI_NSS_SOFT;
ebrus 0:6bc4ac881c8e 124 } else { // Slave
ebrus 0:6bc4ac881c8e 125 pinmap_pinout(ssel, PinMap_SPI_SSEL);
ebrus 0:6bc4ac881c8e 126 obj->mode = SPI_MODE_SLAVE;
ebrus 0:6bc4ac881c8e 127 obj->nss = SPI_NSS_HARD_INPUT;
ebrus 0:6bc4ac881c8e 128 }
ebrus 0:6bc4ac881c8e 129
ebrus 0:6bc4ac881c8e 130 init_spi(obj);
ebrus 0:6bc4ac881c8e 131 }
ebrus 0:6bc4ac881c8e 132
ebrus 0:6bc4ac881c8e 133 void spi_free(spi_t *obj)
ebrus 0:6bc4ac881c8e 134 {
ebrus 0:6bc4ac881c8e 135 // Reset SPI and disable clock
ebrus 0:6bc4ac881c8e 136 __SPI1_FORCE_RESET();
ebrus 0:6bc4ac881c8e 137 __SPI1_RELEASE_RESET();
ebrus 0:6bc4ac881c8e 138 __SPI1_CLK_DISABLE();
ebrus 0:6bc4ac881c8e 139
ebrus 0:6bc4ac881c8e 140 // Configure GPIOs
ebrus 0:6bc4ac881c8e 141 pin_function(obj->pin_miso, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
ebrus 0:6bc4ac881c8e 142 pin_function(obj->pin_mosi, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
ebrus 0:6bc4ac881c8e 143 pin_function(obj->pin_sclk, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
ebrus 0:6bc4ac881c8e 144 pin_function(obj->pin_ssel, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
ebrus 0:6bc4ac881c8e 145 }
ebrus 0:6bc4ac881c8e 146
ebrus 0:6bc4ac881c8e 147 void spi_format(spi_t *obj, int bits, int mode, int slave)
ebrus 0:6bc4ac881c8e 148 {
ebrus 0:6bc4ac881c8e 149 // Save new values
ebrus 0:6bc4ac881c8e 150 if (bits == 16) {
ebrus 0:6bc4ac881c8e 151 obj->bits = SPI_DATASIZE_16BIT;
ebrus 0:6bc4ac881c8e 152 } else {
ebrus 0:6bc4ac881c8e 153 obj->bits = SPI_DATASIZE_8BIT;
ebrus 0:6bc4ac881c8e 154 }
ebrus 0:6bc4ac881c8e 155
ebrus 0:6bc4ac881c8e 156 switch (mode) {
ebrus 0:6bc4ac881c8e 157 case 0:
ebrus 0:6bc4ac881c8e 158 obj->cpol = SPI_POLARITY_LOW;
ebrus 0:6bc4ac881c8e 159 obj->cpha = SPI_PHASE_1EDGE;
ebrus 0:6bc4ac881c8e 160 break;
ebrus 0:6bc4ac881c8e 161 case 1:
ebrus 0:6bc4ac881c8e 162 obj->cpol = SPI_POLARITY_LOW;
ebrus 0:6bc4ac881c8e 163 obj->cpha = SPI_PHASE_2EDGE;
ebrus 0:6bc4ac881c8e 164 break;
ebrus 0:6bc4ac881c8e 165 case 2:
ebrus 0:6bc4ac881c8e 166 obj->cpol = SPI_POLARITY_HIGH;
ebrus 0:6bc4ac881c8e 167 obj->cpha = SPI_PHASE_1EDGE;
ebrus 0:6bc4ac881c8e 168 break;
ebrus 0:6bc4ac881c8e 169 default:
ebrus 0:6bc4ac881c8e 170 obj->cpol = SPI_POLARITY_HIGH;
ebrus 0:6bc4ac881c8e 171 obj->cpha = SPI_PHASE_2EDGE;
ebrus 0:6bc4ac881c8e 172 break;
ebrus 0:6bc4ac881c8e 173 }
ebrus 0:6bc4ac881c8e 174
ebrus 0:6bc4ac881c8e 175 if (slave == 0) {
ebrus 0:6bc4ac881c8e 176 obj->mode = SPI_MODE_MASTER;
ebrus 0:6bc4ac881c8e 177 obj->nss = SPI_NSS_SOFT;
ebrus 0:6bc4ac881c8e 178 } else {
ebrus 0:6bc4ac881c8e 179 obj->mode = SPI_MODE_SLAVE;
ebrus 0:6bc4ac881c8e 180 obj->nss = SPI_NSS_HARD_INPUT;
ebrus 0:6bc4ac881c8e 181 }
ebrus 0:6bc4ac881c8e 182
ebrus 0:6bc4ac881c8e 183 init_spi(obj);
ebrus 0:6bc4ac881c8e 184 }
ebrus 0:6bc4ac881c8e 185
ebrus 0:6bc4ac881c8e 186 void spi_frequency(spi_t *obj, int hz)
ebrus 0:6bc4ac881c8e 187 {
ebrus 0:6bc4ac881c8e 188 // Values depend of APB2CLK : 64 MHz if HSI is used, 72 MHz if HSE is used
ebrus 0:6bc4ac881c8e 189 if (hz < 500000) {
ebrus 0:6bc4ac881c8e 190 obj->br_presc = SPI_BAUDRATEPRESCALER_256; // 250 kHz - 281 kHz
ebrus 0:6bc4ac881c8e 191 } else if ((hz >= 500000) && (hz < 1000000)) {
ebrus 0:6bc4ac881c8e 192 obj->br_presc = SPI_BAUDRATEPRESCALER_128; // 500 kHz - 563 kHz
ebrus 0:6bc4ac881c8e 193 } else if ((hz >= 1000000) && (hz < 2000000)) {
ebrus 0:6bc4ac881c8e 194 obj->br_presc = SPI_BAUDRATEPRESCALER_64; // 1 MHz - 1.13 MHz
ebrus 0:6bc4ac881c8e 195 } else if ((hz >= 2000000) && (hz < 4000000)) {
ebrus 0:6bc4ac881c8e 196 obj->br_presc = SPI_BAUDRATEPRESCALER_32; // 2 MHz - 2.25 MHz
ebrus 0:6bc4ac881c8e 197 } else if ((hz >= 4000000) && (hz < 8000000)) {
ebrus 0:6bc4ac881c8e 198 obj->br_presc = SPI_BAUDRATEPRESCALER_16; // 4 MHz - 4.5 MHz
ebrus 0:6bc4ac881c8e 199 } else if ((hz >= 8000000) && (hz < 16000000)) {
ebrus 0:6bc4ac881c8e 200 obj->br_presc = SPI_BAUDRATEPRESCALER_8; // 8 MHz - 9 MHz
ebrus 0:6bc4ac881c8e 201 } else if ((hz >= 16000000) && (hz < 32000000)) {
ebrus 0:6bc4ac881c8e 202 obj->br_presc = SPI_BAUDRATEPRESCALER_4; // 16 MHz - 18 MHz
ebrus 0:6bc4ac881c8e 203 } else { // >= 32000000
ebrus 0:6bc4ac881c8e 204 obj->br_presc = SPI_BAUDRATEPRESCALER_2; // 32 MHz - 36 MHz
ebrus 0:6bc4ac881c8e 205 }
ebrus 0:6bc4ac881c8e 206
ebrus 0:6bc4ac881c8e 207 init_spi(obj);
ebrus 0:6bc4ac881c8e 208 }
ebrus 0:6bc4ac881c8e 209
ebrus 0:6bc4ac881c8e 210 static inline int ssp_readable(spi_t *obj)
ebrus 0:6bc4ac881c8e 211 {
ebrus 0:6bc4ac881c8e 212 int status;
ebrus 0:6bc4ac881c8e 213 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 214 // Check if data is received
ebrus 0:6bc4ac881c8e 215 status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_RXNE) != RESET) ? 1 : 0);
ebrus 0:6bc4ac881c8e 216 return status;
ebrus 0:6bc4ac881c8e 217 }
ebrus 0:6bc4ac881c8e 218
ebrus 0:6bc4ac881c8e 219 static inline int ssp_writeable(spi_t *obj)
ebrus 0:6bc4ac881c8e 220 {
ebrus 0:6bc4ac881c8e 221 int status;
ebrus 0:6bc4ac881c8e 222 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 223 // Check if data is transmitted
ebrus 0:6bc4ac881c8e 224 status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_TXE) != RESET) ? 1 : 0);
ebrus 0:6bc4ac881c8e 225 return status;
ebrus 0:6bc4ac881c8e 226 }
ebrus 0:6bc4ac881c8e 227
ebrus 0:6bc4ac881c8e 228 static inline void ssp_write(spi_t *obj, int value)
ebrus 0:6bc4ac881c8e 229 {
ebrus 0:6bc4ac881c8e 230 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 231 while (!ssp_writeable(obj));
ebrus 0:6bc4ac881c8e 232 if (obj->bits == SPI_DATASIZE_8BIT) {
ebrus 0:6bc4ac881c8e 233 // Force 8-bit access to the data register
ebrus 0:6bc4ac881c8e 234 uint8_t *p_spi_dr = 0;
ebrus 0:6bc4ac881c8e 235 p_spi_dr = (uint8_t *) & (spi->DR);
ebrus 0:6bc4ac881c8e 236 *p_spi_dr = (uint8_t)value;
ebrus 0:6bc4ac881c8e 237 } else { // SPI_DATASIZE_16BIT
ebrus 0:6bc4ac881c8e 238 spi->DR = (uint16_t)value;
ebrus 0:6bc4ac881c8e 239 }
ebrus 0:6bc4ac881c8e 240 }
ebrus 0:6bc4ac881c8e 241
ebrus 0:6bc4ac881c8e 242 static inline int ssp_read(spi_t *obj)
ebrus 0:6bc4ac881c8e 243 {
ebrus 0:6bc4ac881c8e 244 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 245 while (!ssp_readable(obj));
ebrus 0:6bc4ac881c8e 246 if (obj->bits == SPI_DATASIZE_8BIT) {
ebrus 0:6bc4ac881c8e 247 // Force 8-bit access to the data register
ebrus 0:6bc4ac881c8e 248 uint8_t *p_spi_dr = 0;
ebrus 0:6bc4ac881c8e 249 p_spi_dr = (uint8_t *) & (spi->DR);
ebrus 0:6bc4ac881c8e 250 return (int)(*p_spi_dr);
ebrus 0:6bc4ac881c8e 251 } else {
ebrus 0:6bc4ac881c8e 252 return (int)spi->DR;
ebrus 0:6bc4ac881c8e 253 }
ebrus 0:6bc4ac881c8e 254 }
ebrus 0:6bc4ac881c8e 255
ebrus 0:6bc4ac881c8e 256 static inline int ssp_busy(spi_t *obj)
ebrus 0:6bc4ac881c8e 257 {
ebrus 0:6bc4ac881c8e 258 int status;
ebrus 0:6bc4ac881c8e 259 SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 260 status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_BSY) != RESET) ? 1 : 0);
ebrus 0:6bc4ac881c8e 261 return status;
ebrus 0:6bc4ac881c8e 262 }
ebrus 0:6bc4ac881c8e 263
ebrus 0:6bc4ac881c8e 264 int spi_master_write(spi_t *obj, int value)
ebrus 0:6bc4ac881c8e 265 {
ebrus 0:6bc4ac881c8e 266 ssp_write(obj, value);
ebrus 0:6bc4ac881c8e 267 return ssp_read(obj);
ebrus 0:6bc4ac881c8e 268 }
ebrus 0:6bc4ac881c8e 269
ebrus 0:6bc4ac881c8e 270 int spi_slave_receive(spi_t *obj)
ebrus 0:6bc4ac881c8e 271 {
ebrus 0:6bc4ac881c8e 272 return ((ssp_readable(obj) && !ssp_busy(obj)) ? 1 : 0);
ebrus 0:6bc4ac881c8e 273 };
ebrus 0:6bc4ac881c8e 274
ebrus 0:6bc4ac881c8e 275 int spi_slave_read(spi_t *obj)
ebrus 0:6bc4ac881c8e 276 {
ebrus 0:6bc4ac881c8e 277 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 278 while (!ssp_readable(obj));
ebrus 0:6bc4ac881c8e 279 if (obj->bits == SPI_DATASIZE_8BIT) {
ebrus 0:6bc4ac881c8e 280 // Force 8-bit access to the data register
ebrus 0:6bc4ac881c8e 281 uint8_t *p_spi_dr = 0;
ebrus 0:6bc4ac881c8e 282 p_spi_dr = (uint8_t *) & (spi->DR);
ebrus 0:6bc4ac881c8e 283 return (int)(*p_spi_dr);
ebrus 0:6bc4ac881c8e 284 } else {
ebrus 0:6bc4ac881c8e 285 return (int)spi->DR;
ebrus 0:6bc4ac881c8e 286 }
ebrus 0:6bc4ac881c8e 287 }
ebrus 0:6bc4ac881c8e 288
ebrus 0:6bc4ac881c8e 289 void spi_slave_write(spi_t *obj, int value)
ebrus 0:6bc4ac881c8e 290 {
ebrus 0:6bc4ac881c8e 291 SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
ebrus 0:6bc4ac881c8e 292 while (!ssp_writeable(obj));
ebrus 0:6bc4ac881c8e 293 if (obj->bits == SPI_DATASIZE_8BIT) {
ebrus 0:6bc4ac881c8e 294 // Force 8-bit access to the data register
ebrus 0:6bc4ac881c8e 295 uint8_t *p_spi_dr = 0;
ebrus 0:6bc4ac881c8e 296 p_spi_dr = (uint8_t *) & (spi->DR);
ebrus 0:6bc4ac881c8e 297 *p_spi_dr = (uint8_t)value;
ebrus 0:6bc4ac881c8e 298 } else { // SPI_DATASIZE_16BIT
ebrus 0:6bc4ac881c8e 299 spi->DR = (uint16_t)value;
ebrus 0:6bc4ac881c8e 300 }
ebrus 0:6bc4ac881c8e 301 }
ebrus 0:6bc4ac881c8e 302
ebrus 0:6bc4ac881c8e 303 int spi_busy(spi_t *obj)
ebrus 0:6bc4ac881c8e 304 {
ebrus 0:6bc4ac881c8e 305 return ssp_busy(obj);
ebrus 0:6bc4ac881c8e 306 }
ebrus 0:6bc4ac881c8e 307
ebrus 0:6bc4ac881c8e 308 #endif