Ermanno Brusadin / mbed

mbed library sources

Dependents:   FRDM-KL46Z_LCD_Test FRDM-KL46Z_LCD_Test FRDM-KL46Z_Plantilla FRDM-KL46Z_Plantilla ... more

targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/gpio_irq_api.c@0:6bc4ac881c8e, 2016-07-28 (annotated)

Committer:
ebrus
Date:
Thu Jul 28 15:56:34 2016 +0000
Revision:
0:6bc4ac881c8e
1;

Who changed what in which revision?

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ebrus 0:6bc4ac881c8e 1 /* mbed Microcontroller Library
ebrus 0:6bc4ac881c8e 2 *******************************************************************************
ebrus 0:6bc4ac881c8e 3 * Copyright (c) 2014, STMicroelectronics
ebrus 0:6bc4ac881c8e 4 * All rights reserved.
ebrus 0:6bc4ac881c8e 5 *
ebrus 0:6bc4ac881c8e 6 * Redistribution and use in source and binary forms, with or without
ebrus 0:6bc4ac881c8e 7 * modification, are permitted provided that the following conditions are met:
ebrus 0:6bc4ac881c8e 8 *
ebrus 0:6bc4ac881c8e 9 * 1. Redistributions of source code must retain the above copyright notice,
ebrus 0:6bc4ac881c8e 10 * this list of conditions and the following disclaimer.
ebrus 0:6bc4ac881c8e 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
ebrus 0:6bc4ac881c8e 12 * this list of conditions and the following disclaimer in the documentation
ebrus 0:6bc4ac881c8e 13 * and/or other materials provided with the distribution.
ebrus 0:6bc4ac881c8e 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ebrus 0:6bc4ac881c8e 15 * may be used to endorse or promote products derived from this software
ebrus 0:6bc4ac881c8e 16 * without specific prior written permission.
ebrus 0:6bc4ac881c8e 17 *
ebrus 0:6bc4ac881c8e 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ebrus 0:6bc4ac881c8e 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ebrus 0:6bc4ac881c8e 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ebrus 0:6bc4ac881c8e 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ebrus 0:6bc4ac881c8e 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ebrus 0:6bc4ac881c8e 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ebrus 0:6bc4ac881c8e 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ebrus 0:6bc4ac881c8e 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ebrus 0:6bc4ac881c8e 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ebrus 0:6bc4ac881c8e 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ebrus 0:6bc4ac881c8e 28 *******************************************************************************
ebrus 0:6bc4ac881c8e 29 */
ebrus 0:6bc4ac881c8e 30 #include <stddef.h>
ebrus 0:6bc4ac881c8e 31 #include "cmsis.h"
ebrus 0:6bc4ac881c8e 32
ebrus 0:6bc4ac881c8e 33 #include "gpio_irq_api.h"
ebrus 0:6bc4ac881c8e 34 #include "pinmap.h"
ebrus 0:6bc4ac881c8e 35 #include "mbed_error.h"
ebrus 0:6bc4ac881c8e 36
ebrus 0:6bc4ac881c8e 37 #define EDGE_NONE (0)
ebrus 0:6bc4ac881c8e 38 #define EDGE_RISE (1)
ebrus 0:6bc4ac881c8e 39 #define EDGE_FALL (2)
ebrus 0:6bc4ac881c8e 40 #define EDGE_BOTH (3)
ebrus 0:6bc4ac881c8e 41
ebrus 0:6bc4ac881c8e 42 #define CHANNEL_NUM (3)
ebrus 0:6bc4ac881c8e 43
ebrus 0:6bc4ac881c8e 44 static uint32_t channel_ids[CHANNEL_NUM] = {0, 0, 0};
ebrus 0:6bc4ac881c8e 45 static uint32_t channel_gpio[CHANNEL_NUM] = {0, 0, 0};
ebrus 0:6bc4ac881c8e 46 static uint32_t channel_pin[CHANNEL_NUM] = {0, 0, 0};
ebrus 0:6bc4ac881c8e 47
ebrus 0:6bc4ac881c8e 48 static gpio_irq_handler irq_handler;
ebrus 0:6bc4ac881c8e 49
ebrus 0:6bc4ac881c8e 50 static void handle_interrupt_in(uint32_t irq_index) {
ebrus 0:6bc4ac881c8e 51 // Retrieve the gpio and pin that generate the irq
ebrus 0:6bc4ac881c8e 52 GPIO_TypeDef *gpio = (GPIO_TypeDef *)(channel_gpio[irq_index]);
ebrus 0:6bc4ac881c8e 53 uint32_t pin = (uint32_t)(1 << channel_pin[irq_index]);
ebrus 0:6bc4ac881c8e 54
ebrus 0:6bc4ac881c8e 55 // Clear interrupt flag
ebrus 0:6bc4ac881c8e 56 if (EXTI_GetITStatus(pin) != RESET) {
ebrus 0:6bc4ac881c8e 57 EXTI_ClearITPendingBit(pin);
ebrus 0:6bc4ac881c8e 58 }
ebrus 0:6bc4ac881c8e 59
ebrus 0:6bc4ac881c8e 60 if (channel_ids[irq_index] == 0) return;
ebrus 0:6bc4ac881c8e 61
ebrus 0:6bc4ac881c8e 62 // Check which edge has generated the irq
ebrus 0:6bc4ac881c8e 63 if ((gpio->IDR & pin) == 0) {
ebrus 0:6bc4ac881c8e 64 irq_handler(channel_ids[irq_index], IRQ_FALL);
ebrus 0:6bc4ac881c8e 65 } else {
ebrus 0:6bc4ac881c8e 66 irq_handler(channel_ids[irq_index], IRQ_RISE);
ebrus 0:6bc4ac881c8e 67 }
ebrus 0:6bc4ac881c8e 68 }
ebrus 0:6bc4ac881c8e 69
ebrus 0:6bc4ac881c8e 70 // The irq_index is passed to the function
ebrus 0:6bc4ac881c8e 71 static void gpio_irq0(void) {
ebrus 0:6bc4ac881c8e 72 handle_interrupt_in(0);
ebrus 0:6bc4ac881c8e 73 }
ebrus 0:6bc4ac881c8e 74 static void gpio_irq1(void) {
ebrus 0:6bc4ac881c8e 75 handle_interrupt_in(1);
ebrus 0:6bc4ac881c8e 76 }
ebrus 0:6bc4ac881c8e 77 static void gpio_irq2(void) {
ebrus 0:6bc4ac881c8e 78 handle_interrupt_in(2);
ebrus 0:6bc4ac881c8e 79 }
ebrus 0:6bc4ac881c8e 80
ebrus 0:6bc4ac881c8e 81 extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
ebrus 0:6bc4ac881c8e 82
ebrus 0:6bc4ac881c8e 83 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
ebrus 0:6bc4ac881c8e 84 IRQn_Type irq_n = (IRQn_Type)0;
ebrus 0:6bc4ac881c8e 85 uint32_t vector = 0;
ebrus 0:6bc4ac881c8e 86 uint32_t irq_index;
ebrus 0:6bc4ac881c8e 87
ebrus 0:6bc4ac881c8e 88 if (pin == NC) return -1;
ebrus 0:6bc4ac881c8e 89
ebrus 0:6bc4ac881c8e 90 uint32_t port_index = STM_PORT(pin);
ebrus 0:6bc4ac881c8e 91 uint32_t pin_index = STM_PIN(pin);
ebrus 0:6bc4ac881c8e 92
ebrus 0:6bc4ac881c8e 93 // Select irq number and interrupt routine
ebrus 0:6bc4ac881c8e 94 if ((pin_index == 0) || (pin_index == 1)) {
ebrus 0:6bc4ac881c8e 95 irq_n = EXTI0_1_IRQn;
ebrus 0:6bc4ac881c8e 96 vector = (uint32_t)&gpio_irq0;
ebrus 0:6bc4ac881c8e 97 irq_index = 0;
ebrus 0:6bc4ac881c8e 98 } else if ((pin_index == 2) || (pin_index == 3)) {
ebrus 0:6bc4ac881c8e 99 irq_n = EXTI2_3_IRQn;
ebrus 0:6bc4ac881c8e 100 vector = (uint32_t)&gpio_irq1;
ebrus 0:6bc4ac881c8e 101 irq_index = 1;
ebrus 0:6bc4ac881c8e 102 } else if ((pin_index > 3) && (pin_index < 16)) {
ebrus 0:6bc4ac881c8e 103 irq_n = EXTI4_15_IRQn;
ebrus 0:6bc4ac881c8e 104 vector = (uint32_t)&gpio_irq2;
ebrus 0:6bc4ac881c8e 105 irq_index = 2;
ebrus 0:6bc4ac881c8e 106 } else {
ebrus 0:6bc4ac881c8e 107 error("InterruptIn error: pin not supported.\n");
ebrus 0:6bc4ac881c8e 108 return -1;
ebrus 0:6bc4ac881c8e 109 }
ebrus 0:6bc4ac881c8e 110
ebrus 0:6bc4ac881c8e 111 // Enable GPIO clock
ebrus 0:6bc4ac881c8e 112 uint32_t gpio_add = Set_GPIO_Clock(port_index);
ebrus 0:6bc4ac881c8e 113
ebrus 0:6bc4ac881c8e 114 // Enable SYSCFG clock
ebrus 0:6bc4ac881c8e 115 RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
ebrus 0:6bc4ac881c8e 116
ebrus 0:6bc4ac881c8e 117 // Connect EXTI line to pin
ebrus 0:6bc4ac881c8e 118 SYSCFG_EXTILineConfig(port_index, pin_index);
ebrus 0:6bc4ac881c8e 119
ebrus 0:6bc4ac881c8e 120 // Configure EXTI line
ebrus 0:6bc4ac881c8e 121 EXTI_InitTypeDef EXTI_InitStructure;
ebrus 0:6bc4ac881c8e 122 EXTI_InitStructure.EXTI_Line = (uint32_t)(1 << pin_index);
ebrus 0:6bc4ac881c8e 123 EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
ebrus 0:6bc4ac881c8e 124 EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
ebrus 0:6bc4ac881c8e 125 EXTI_InitStructure.EXTI_LineCmd = ENABLE;
ebrus 0:6bc4ac881c8e 126 EXTI_Init(&EXTI_InitStructure);
ebrus 0:6bc4ac881c8e 127
ebrus 0:6bc4ac881c8e 128 // Enable and set EXTI interrupt to the lowest priority
ebrus 0:6bc4ac881c8e 129 NVIC_InitTypeDef NVIC_InitStructure;
ebrus 0:6bc4ac881c8e 130 NVIC_InitStructure.NVIC_IRQChannel = irq_n;
ebrus 0:6bc4ac881c8e 131 NVIC_InitStructure.NVIC_IRQChannelPriority = 0;
ebrus 0:6bc4ac881c8e 132 NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
ebrus 0:6bc4ac881c8e 133 NVIC_Init(&NVIC_InitStructure);
ebrus 0:6bc4ac881c8e 134
ebrus 0:6bc4ac881c8e 135 NVIC_SetVector(irq_n, vector);
ebrus 0:6bc4ac881c8e 136 NVIC_EnableIRQ(irq_n);
ebrus 0:6bc4ac881c8e 137
ebrus 0:6bc4ac881c8e 138 // Save informations for future use
ebrus 0:6bc4ac881c8e 139 obj->irq_n = irq_n;
ebrus 0:6bc4ac881c8e 140 obj->irq_index = irq_index;
ebrus 0:6bc4ac881c8e 141 obj->event = EDGE_NONE;
ebrus 0:6bc4ac881c8e 142 channel_ids[irq_index] = id;
ebrus 0:6bc4ac881c8e 143 channel_gpio[irq_index] = gpio_add;
ebrus 0:6bc4ac881c8e 144 channel_pin[irq_index] = pin_index;
ebrus 0:6bc4ac881c8e 145
ebrus 0:6bc4ac881c8e 146 irq_handler = handler;
ebrus 0:6bc4ac881c8e 147
ebrus 0:6bc4ac881c8e 148 return 0;
ebrus 0:6bc4ac881c8e 149 }
ebrus 0:6bc4ac881c8e 150
ebrus 0:6bc4ac881c8e 151 void gpio_irq_free(gpio_irq_t *obj) {
ebrus 0:6bc4ac881c8e 152 channel_ids[obj->irq_index] = 0;
ebrus 0:6bc4ac881c8e 153 channel_gpio[obj->irq_index] = 0;
ebrus 0:6bc4ac881c8e 154 channel_pin[obj->irq_index] = 0;
ebrus 0:6bc4ac881c8e 155 // Disable EXTI line
ebrus 0:6bc4ac881c8e 156 EXTI_InitTypeDef EXTI_InitStructure;
ebrus 0:6bc4ac881c8e 157 EXTI_StructInit(&EXTI_InitStructure);
ebrus 0:6bc4ac881c8e 158 EXTI_Init(&EXTI_InitStructure);
ebrus 0:6bc4ac881c8e 159 obj->event = EDGE_NONE;
ebrus 0:6bc4ac881c8e 160 }
ebrus 0:6bc4ac881c8e 161
ebrus 0:6bc4ac881c8e 162 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
ebrus 0:6bc4ac881c8e 163 EXTI_InitTypeDef EXTI_InitStructure;
ebrus 0:6bc4ac881c8e 164
ebrus 0:6bc4ac881c8e 165 uint32_t pin_index = channel_pin[obj->irq_index];
ebrus 0:6bc4ac881c8e 166
ebrus 0:6bc4ac881c8e 167 EXTI_InitStructure.EXTI_Line = (uint32_t)(1 << pin_index);
ebrus 0:6bc4ac881c8e 168 EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
ebrus 0:6bc4ac881c8e 169 EXTI_InitStructure.EXTI_LineCmd = DISABLE; // Default
ebrus 0:6bc4ac881c8e 170
ebrus 0:6bc4ac881c8e 171 if (enable) {
ebrus 0:6bc4ac881c8e 172 if (event == IRQ_RISE) {
ebrus 0:6bc4ac881c8e 173 EXTI_InitStructure.EXTI_LineCmd = ENABLE;
ebrus 0:6bc4ac881c8e 174 if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
ebrus 0:6bc4ac881c8e 175 EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
ebrus 0:6bc4ac881c8e 176 obj->event = EDGE_BOTH;
ebrus 0:6bc4ac881c8e 177 } else { // NONE or RISE
ebrus 0:6bc4ac881c8e 178 EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
ebrus 0:6bc4ac881c8e 179 obj->event = EDGE_RISE;
ebrus 0:6bc4ac881c8e 180 }
ebrus 0:6bc4ac881c8e 181 }
ebrus 0:6bc4ac881c8e 182 if (event == IRQ_FALL) {
ebrus 0:6bc4ac881c8e 183 EXTI_InitStructure.EXTI_LineCmd = ENABLE;
ebrus 0:6bc4ac881c8e 184 if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
ebrus 0:6bc4ac881c8e 185 EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
ebrus 0:6bc4ac881c8e 186 obj->event = EDGE_BOTH;
ebrus 0:6bc4ac881c8e 187 } else { // NONE or FALL
ebrus 0:6bc4ac881c8e 188 EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
ebrus 0:6bc4ac881c8e 189 obj->event = EDGE_FALL;
ebrus 0:6bc4ac881c8e 190 }
ebrus 0:6bc4ac881c8e 191 }
ebrus 0:6bc4ac881c8e 192 }
ebrus 0:6bc4ac881c8e 193 else { // Disable
ebrus 0:6bc4ac881c8e 194 if (event == IRQ_RISE) {
ebrus 0:6bc4ac881c8e 195 if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
ebrus 0:6bc4ac881c8e 196 EXTI_InitStructure.EXTI_LineCmd = ENABLE;
ebrus 0:6bc4ac881c8e 197 EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
ebrus 0:6bc4ac881c8e 198 obj->event = EDGE_FALL;
ebrus 0:6bc4ac881c8e 199 } else { // NONE or RISE
ebrus 0:6bc4ac881c8e 200 EXTI_InitStructure.EXTI_LineCmd = DISABLE;
ebrus 0:6bc4ac881c8e 201 obj->event = EDGE_NONE;
ebrus 0:6bc4ac881c8e 202 }
ebrus 0:6bc4ac881c8e 203 }
ebrus 0:6bc4ac881c8e 204 if (event == IRQ_FALL) {
ebrus 0:6bc4ac881c8e 205 if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
ebrus 0:6bc4ac881c8e 206 EXTI_InitStructure.EXTI_LineCmd = ENABLE;
ebrus 0:6bc4ac881c8e 207 EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
ebrus 0:6bc4ac881c8e 208 obj->event = EDGE_RISE;
ebrus 0:6bc4ac881c8e 209 } else { // NONE or FALL
ebrus 0:6bc4ac881c8e 210 EXTI_InitStructure.EXTI_LineCmd = DISABLE;
ebrus 0:6bc4ac881c8e 211 obj->event = EDGE_NONE;
ebrus 0:6bc4ac881c8e 212 }
ebrus 0:6bc4ac881c8e 213 }
ebrus 0:6bc4ac881c8e 214 }
ebrus 0:6bc4ac881c8e 215
ebrus 0:6bc4ac881c8e 216 EXTI_Init(&EXTI_InitStructure);
ebrus 0:6bc4ac881c8e 217 }
ebrus 0:6bc4ac881c8e 218
ebrus 0:6bc4ac881c8e 219 void gpio_irq_enable(gpio_irq_t *obj) {
ebrus 0:6bc4ac881c8e 220 NVIC_EnableIRQ(obj->irq_n);
ebrus 0:6bc4ac881c8e 221 }
ebrus 0:6bc4ac881c8e 222
ebrus 0:6bc4ac881c8e 223 void gpio_irq_disable(gpio_irq_t *obj) {
ebrus 0:6bc4ac881c8e 224 NVIC_DisableIRQ(obj->irq_n);
ebrus 0:6bc4ac881c8e 225 obj->event = EDGE_NONE;
ebrus 0:6bc4ac881c8e 226 }