Ermanno Brusadin / mbed

mbed library sources

Dependents:   FRDM-KL46Z_LCD_Test FRDM-KL46Z_LCD_Test FRDM-KL46Z_Plantilla FRDM-KL46Z_Plantilla ... more

targets/hal/TARGET_Freescale/TARGET_K20D50M/clk_freqs.h@0:6bc4ac881c8e, 2016-07-28 (annotated)

Committer:
ebrus
Date:
Thu Jul 28 15:56:34 2016 +0000
Revision:
0:6bc4ac881c8e
1;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ebrus 0:6bc4ac881c8e 1 /* mbed Microcontroller Library
ebrus 0:6bc4ac881c8e 2 * Copyright (c) 2006-2013 ARM Limited
ebrus 0:6bc4ac881c8e 3 *
ebrus 0:6bc4ac881c8e 4 * Licensed under the Apache License, Version 2.0 (the "License");
ebrus 0:6bc4ac881c8e 5 * you may not use this file except in compliance with the License.
ebrus 0:6bc4ac881c8e 6 * You may obtain a copy of the License at
ebrus 0:6bc4ac881c8e 7 *
ebrus 0:6bc4ac881c8e 8 * http://www.apache.org/licenses/LICENSE-2.0
ebrus 0:6bc4ac881c8e 9 *
ebrus 0:6bc4ac881c8e 10 * Unless required by applicable law or agreed to in writing, software
ebrus 0:6bc4ac881c8e 11 * distributed under the License is distributed on an "AS IS" BASIS,
ebrus 0:6bc4ac881c8e 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ebrus 0:6bc4ac881c8e 13 * See the License for the specific language governing permissions and
ebrus 0:6bc4ac881c8e 14 * limitations under the License.
ebrus 0:6bc4ac881c8e 15 */
ebrus 0:6bc4ac881c8e 16 #ifndef CLK_FREQS_H
ebrus 0:6bc4ac881c8e 17 #define CLK_FREQS_H
ebrus 0:6bc4ac881c8e 18
ebrus 0:6bc4ac881c8e 19 #ifdef __cplusplus
ebrus 0:6bc4ac881c8e 20 extern "C" {
ebrus 0:6bc4ac881c8e 21 #endif
ebrus 0:6bc4ac881c8e 22
ebrus 0:6bc4ac881c8e 23 /*!
ebrus 0:6bc4ac881c8e 24 * \brief Get the peripheral bus clock frequency
ebrus 0:6bc4ac881c8e 25 * \return Bus frequency
ebrus 0:6bc4ac881c8e 26 */
ebrus 0:6bc4ac881c8e 27 static inline uint32_t bus_frequency(void) {
ebrus 0:6bc4ac881c8e 28 return SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV2_MASK) >> SIM_CLKDIV1_OUTDIV2_SHIFT) + 1);
ebrus 0:6bc4ac881c8e 29 }
ebrus 0:6bc4ac881c8e 30
ebrus 0:6bc4ac881c8e 31 /*!
ebrus 0:6bc4ac881c8e 32 * \brief Get external oscillator (crystal) frequency
ebrus 0:6bc4ac881c8e 33 * \return External osc frequency
ebrus 0:6bc4ac881c8e 34 */
ebrus 0:6bc4ac881c8e 35 static uint32_t extosc_frequency(void) {
ebrus 0:6bc4ac881c8e 36 uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT));
ebrus 0:6bc4ac881c8e 37
ebrus 0:6bc4ac881c8e 38 if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(2)) //MCG clock = external reference clock
ebrus 0:6bc4ac881c8e 39 return MCGClock;
ebrus 0:6bc4ac881c8e 40
ebrus 0:6bc4ac881c8e 41 if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0)) { //PLL/FLL is selected
ebrus 0:6bc4ac881c8e 42 uint32_t divider, multiplier;
ebrus 0:6bc4ac881c8e 43 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) { //FLL is selected
ebrus 0:6bc4ac881c8e 44 if ((MCG->S & MCG_S_IREFST_MASK) == 0x0u) { //FLL uses external reference
ebrus 0:6bc4ac881c8e 45 divider = (uint8_t)(1u << ((MCG->C1 & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT));
ebrus 0:6bc4ac881c8e 46 if ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u)
ebrus 0:6bc4ac881c8e 47 divider <<= 5u;
ebrus 0:6bc4ac881c8e 48 /* Select correct multiplier to calculate the MCG output clock */
ebrus 0:6bc4ac881c8e 49 switch (MCG->C4 & (MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS_MASK)) {
ebrus 0:6bc4ac881c8e 50 case 0x0u:
ebrus 0:6bc4ac881c8e 51 multiplier = 640u;
ebrus 0:6bc4ac881c8e 52 break;
ebrus 0:6bc4ac881c8e 53 case 0x20u:
ebrus 0:6bc4ac881c8e 54 multiplier = 1280u;
ebrus 0:6bc4ac881c8e 55 break;
ebrus 0:6bc4ac881c8e 56 case 0x40u:
ebrus 0:6bc4ac881c8e 57 multiplier = 1920u;
ebrus 0:6bc4ac881c8e 58 break;
ebrus 0:6bc4ac881c8e 59 case 0x60u:
ebrus 0:6bc4ac881c8e 60 multiplier = 2560u;
ebrus 0:6bc4ac881c8e 61 break;
ebrus 0:6bc4ac881c8e 62 case 0x80u:
ebrus 0:6bc4ac881c8e 63 multiplier = 732u;
ebrus 0:6bc4ac881c8e 64 break;
ebrus 0:6bc4ac881c8e 65 case 0xA0u:
ebrus 0:6bc4ac881c8e 66 multiplier = 1464u;
ebrus 0:6bc4ac881c8e 67 break;
ebrus 0:6bc4ac881c8e 68 case 0xC0u:
ebrus 0:6bc4ac881c8e 69 multiplier = 2197u;
ebrus 0:6bc4ac881c8e 70 break;
ebrus 0:6bc4ac881c8e 71 case 0xE0u:
ebrus 0:6bc4ac881c8e 72 default:
ebrus 0:6bc4ac881c8e 73 multiplier = 2929u;
ebrus 0:6bc4ac881c8e 74 break;
ebrus 0:6bc4ac881c8e 75 }
ebrus 0:6bc4ac881c8e 76
ebrus 0:6bc4ac881c8e 77 return MCGClock * divider / multiplier;
ebrus 0:6bc4ac881c8e 78 }
ebrus 0:6bc4ac881c8e 79 } else { //PLL is selected
ebrus 0:6bc4ac881c8e 80 divider = (1u + (MCG->C5 & MCG_C5_PRDIV0_MASK));
ebrus 0:6bc4ac881c8e 81 multiplier = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 24u);
ebrus 0:6bc4ac881c8e 82 return MCGClock * divider / multiplier;
ebrus 0:6bc4ac881c8e 83 }
ebrus 0:6bc4ac881c8e 84 }
ebrus 0:6bc4ac881c8e 85
ebrus 0:6bc4ac881c8e 86 //In all other cases either there is no crystal or we cannot determine it
ebrus 0:6bc4ac881c8e 87 //For example when the FLL is running on the internal reference, and there is also an
ebrus 0:6bc4ac881c8e 88 //external crystal. However these are unlikely situations
ebrus 0:6bc4ac881c8e 89 return 0;
ebrus 0:6bc4ac881c8e 90 }
ebrus 0:6bc4ac881c8e 91
ebrus 0:6bc4ac881c8e 92
ebrus 0:6bc4ac881c8e 93 #ifdef __cplusplus
ebrus 0:6bc4ac881c8e 94 }
ebrus 0:6bc4ac881c8e 95 #endif
ebrus 0:6bc4ac881c8e 96
ebrus 0:6bc4ac881c8e 97 #endif