Ermanno Brusadin / mbed-src

mbed library sources

targets/hal/TARGET_NXP/TARGET_LPC11U6X/PeripheralNames.h@0:0a673c671a56, 2016-07-27 (annotated)

Committer:
ebrus
Date:
Wed Jul 27 18:35:32 2016 +0000
Revision:
0:0a673c671a56
4

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ebrus 0:0a673c671a56 1 /* mbed Microcontroller Library
ebrus 0:0a673c671a56 2 * Copyright (c) 2006-2013 ARM Limited
ebrus 0:0a673c671a56 3 *
ebrus 0:0a673c671a56 4 * Licensed under the Apache License, Version 2.0 (the "License");
ebrus 0:0a673c671a56 5 * you may not use this file except in compliance with the License.
ebrus 0:0a673c671a56 6 * You may obtain a copy of the License at
ebrus 0:0a673c671a56 7 *
ebrus 0:0a673c671a56 8 * http://www.apache.org/licenses/LICENSE-2.0
ebrus 0:0a673c671a56 9 *
ebrus 0:0a673c671a56 10 * Unless required by applicable law or agreed to in writing, software
ebrus 0:0a673c671a56 11 * distributed under the License is distributed on an "AS IS" BASIS,
ebrus 0:0a673c671a56 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ebrus 0:0a673c671a56 13 * See the License for the specific language governing permissions and
ebrus 0:0a673c671a56 14 * limitations under the License.
ebrus 0:0a673c671a56 15 */
ebrus 0:0a673c671a56 16 #ifndef MBED_PERIPHERALNAMES_H
ebrus 0:0a673c671a56 17 #define MBED_PERIPHERALNAMES_H
ebrus 0:0a673c671a56 18
ebrus 0:0a673c671a56 19 #include "cmsis.h"
ebrus 0:0a673c671a56 20
ebrus 0:0a673c671a56 21 #ifdef __cplusplus
ebrus 0:0a673c671a56 22 extern "C" {
ebrus 0:0a673c671a56 23 #endif
ebrus 0:0a673c671a56 24
ebrus 0:0a673c671a56 25 typedef enum {
ebrus 0:0a673c671a56 26 UART_0 = (int)LPC_USART0_BASE,
ebrus 0:0a673c671a56 27 UART_1 = (int)LPC_USART1_BASE,
ebrus 0:0a673c671a56 28 UART_2 = (int)LPC_USART2_BASE,
ebrus 0:0a673c671a56 29 UART_3 = (int)LPC_USART3_BASE,
ebrus 0:0a673c671a56 30 UART_4 = (int)LPC_USART4_BASE,
ebrus 0:0a673c671a56 31 } UARTName;
ebrus 0:0a673c671a56 32
ebrus 0:0a673c671a56 33 typedef enum {
ebrus 0:0a673c671a56 34 ADC_0 = 0,
ebrus 0:0a673c671a56 35 ADC_1,
ebrus 0:0a673c671a56 36 ADC_2,
ebrus 0:0a673c671a56 37 ADC_3,
ebrus 0:0a673c671a56 38 ADC_4,
ebrus 0:0a673c671a56 39 ADC_5,
ebrus 0:0a673c671a56 40 ADC_6,
ebrus 0:0a673c671a56 41 ADC_7,
ebrus 0:0a673c671a56 42 ADC_8,
ebrus 0:0a673c671a56 43 ADC_9,
ebrus 0:0a673c671a56 44 ADC_10,
ebrus 0:0a673c671a56 45 ADC_11,
ebrus 0:0a673c671a56 46 } ADCName;
ebrus 0:0a673c671a56 47
ebrus 0:0a673c671a56 48 typedef enum {
ebrus 0:0a673c671a56 49 SPI_0 = (int)LPC_SSP0_BASE,
ebrus 0:0a673c671a56 50 SPI_1 = (int)LPC_SSP1_BASE
ebrus 0:0a673c671a56 51 } SPIName;
ebrus 0:0a673c671a56 52
ebrus 0:0a673c671a56 53 typedef enum {
ebrus 0:0a673c671a56 54 I2C_0 = (int)LPC_I2C0_BASE,
ebrus 0:0a673c671a56 55 I2C_1 = (int)LPC_I2C1_BASE
ebrus 0:0a673c671a56 56 } I2CName;
ebrus 0:0a673c671a56 57
ebrus 0:0a673c671a56 58 typedef enum {
ebrus 0:0a673c671a56 59 SCT0_0 = 0,
ebrus 0:0a673c671a56 60 SCT0_1,
ebrus 0:0a673c671a56 61 SCT0_2,
ebrus 0:0a673c671a56 62 SCT0_3,
ebrus 0:0a673c671a56 63 SCT1_0,
ebrus 0:0a673c671a56 64 SCT1_1,
ebrus 0:0a673c671a56 65 SCT1_2,
ebrus 0:0a673c671a56 66 SCT1_3,
ebrus 0:0a673c671a56 67 } PWMName;
ebrus 0:0a673c671a56 68
ebrus 0:0a673c671a56 69 #ifdef __cplusplus
ebrus 0:0a673c671a56 70 }
ebrus 0:0a673c671a56 71 #endif
ebrus 0:0a673c671a56 72
ebrus 0:0a673c671a56 73 #endif