mbed library sources
targets/hal/TARGET_STM/TARGET_STM32F4XX/pinmap.c@0:0a673c671a56, 2016-07-27 (annotated)
- Committer:
- ebrus
- Date:
- Wed Jul 27 18:35:32 2016 +0000
- Revision:
- 0:0a673c671a56
4
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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ebrus | 0:0a673c671a56 | 1 | /* mbed Microcontroller Library |
ebrus | 0:0a673c671a56 | 2 | * Copyright (c) 2006-2013 ARM Limited |
ebrus | 0:0a673c671a56 | 3 | * |
ebrus | 0:0a673c671a56 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
ebrus | 0:0a673c671a56 | 5 | * you may not use this file except in compliance with the License. |
ebrus | 0:0a673c671a56 | 6 | * You may obtain a copy of the License at |
ebrus | 0:0a673c671a56 | 7 | * |
ebrus | 0:0a673c671a56 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
ebrus | 0:0a673c671a56 | 9 | * |
ebrus | 0:0a673c671a56 | 10 | * Unless required by applicable law or agreed to in writing, software |
ebrus | 0:0a673c671a56 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
ebrus | 0:0a673c671a56 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
ebrus | 0:0a673c671a56 | 13 | * See the License for the specific language governing permissions and |
ebrus | 0:0a673c671a56 | 14 | * limitations under the License. |
ebrus | 0:0a673c671a56 | 15 | */ |
ebrus | 0:0a673c671a56 | 16 | #include "mbed_assert.h" |
ebrus | 0:0a673c671a56 | 17 | #include "pinmap.h" |
ebrus | 0:0a673c671a56 | 18 | #include "mbed_error.h" |
ebrus | 0:0a673c671a56 | 19 | |
ebrus | 0:0a673c671a56 | 20 | /** |
ebrus | 0:0a673c671a56 | 21 | * Set the pin into input, output, alternate function or analog mode |
ebrus | 0:0a673c671a56 | 22 | */ |
ebrus | 0:0a673c671a56 | 23 | void pin_function(PinName pin, int data) { |
ebrus | 0:0a673c671a56 | 24 | MBED_ASSERT(pin != (PinName)NC); |
ebrus | 0:0a673c671a56 | 25 | |
ebrus | 0:0a673c671a56 | 26 | int mode = STM_PIN_MODE(data); |
ebrus | 0:0a673c671a56 | 27 | int func = STM_PIN_FUNC(data); |
ebrus | 0:0a673c671a56 | 28 | |
ebrus | 0:0a673c671a56 | 29 | uint32_t pin_number = (uint32_t)pin; |
ebrus | 0:0a673c671a56 | 30 | int port_index = pin_number >> 4; |
ebrus | 0:0a673c671a56 | 31 | int pin_index = (pin_number & 0xF); |
ebrus | 0:0a673c671a56 | 32 | GPIO_TypeDef * gpio = ((GPIO_TypeDef *) (GPIOA_BASE + (port_index << 10))); |
ebrus | 0:0a673c671a56 | 33 | |
ebrus | 0:0a673c671a56 | 34 | // MODE |
ebrus | 0:0a673c671a56 | 35 | int offset = pin_index << 1; |
ebrus | 0:0a673c671a56 | 36 | gpio->MODER &= ~(0x3 << offset); |
ebrus | 0:0a673c671a56 | 37 | gpio->MODER |= mode << offset; |
ebrus | 0:0a673c671a56 | 38 | |
ebrus | 0:0a673c671a56 | 39 | // Set high-speed mode |
ebrus | 0:0a673c671a56 | 40 | gpio->OSPEEDR &= ~(0x3 << offset); |
ebrus | 0:0a673c671a56 | 41 | gpio->OSPEEDR |= (0x2 << offset); |
ebrus | 0:0a673c671a56 | 42 | |
ebrus | 0:0a673c671a56 | 43 | // FUNCTION |
ebrus | 0:0a673c671a56 | 44 | // Bottom seven pins are in AFR[0], top seven in AFR[1] |
ebrus | 0:0a673c671a56 | 45 | offset = (pin_index & 0x7) << 2; |
ebrus | 0:0a673c671a56 | 46 | if (pin_index <= 0x7) { |
ebrus | 0:0a673c671a56 | 47 | gpio->AFR[0] &= ~(0xF << offset); |
ebrus | 0:0a673c671a56 | 48 | gpio->AFR[0] |= func << offset; |
ebrus | 0:0a673c671a56 | 49 | } |
ebrus | 0:0a673c671a56 | 50 | else { |
ebrus | 0:0a673c671a56 | 51 | gpio->AFR[1] &= ~(0xF << offset); |
ebrus | 0:0a673c671a56 | 52 | gpio->AFR[1] |= func << offset; |
ebrus | 0:0a673c671a56 | 53 | } |
ebrus | 0:0a673c671a56 | 54 | } |
ebrus | 0:0a673c671a56 | 55 | |
ebrus | 0:0a673c671a56 | 56 | void pin_mode(PinName pin, PinMode mode) { |
ebrus | 0:0a673c671a56 | 57 | MBED_ASSERT(pin != (PinName)NC); |
ebrus | 0:0a673c671a56 | 58 | |
ebrus | 0:0a673c671a56 | 59 | uint32_t pin_number = (uint32_t)pin; |
ebrus | 0:0a673c671a56 | 60 | int port_index = pin_number >> 4; |
ebrus | 0:0a673c671a56 | 61 | int pin_index = (pin_number & 0xF); |
ebrus | 0:0a673c671a56 | 62 | int offset = pin_index << 1; |
ebrus | 0:0a673c671a56 | 63 | |
ebrus | 0:0a673c671a56 | 64 | GPIO_TypeDef * gpio = ((GPIO_TypeDef *) (GPIOA_BASE + (port_index << 10))); |
ebrus | 0:0a673c671a56 | 65 | if (mode == OpenDrain) { |
ebrus | 0:0a673c671a56 | 66 | gpio->OTYPER |= 1 << pin_index; |
ebrus | 0:0a673c671a56 | 67 | } |
ebrus | 0:0a673c671a56 | 68 | else { |
ebrus | 0:0a673c671a56 | 69 | gpio->OTYPER &= ~(1 << pin_index); |
ebrus | 0:0a673c671a56 | 70 | gpio->PUPDR &= ~(0x3 << offset); |
ebrus | 0:0a673c671a56 | 71 | gpio->PUPDR |= mode << offset; |
ebrus | 0:0a673c671a56 | 72 | } |
ebrus | 0:0a673c671a56 | 73 | } |
ebrus | 0:0a673c671a56 | 74 |