Ermanno Brusadin / mbed-src

mbed library sources

targets/hal/TARGET_STM/TARGET_STM32F407VG/PeripheralNames.h@0:0a673c671a56, 2016-07-27 (annotated)

Committer:
ebrus
Date:
Wed Jul 27 18:35:32 2016 +0000
Revision:
0:0a673c671a56
4

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ebrus 0:0a673c671a56 1 /* mbed Microcontroller Library
ebrus 0:0a673c671a56 2 *******************************************************************************
ebrus 0:0a673c671a56 3 * Copyright (c) 2014, STMicroelectronics
ebrus 0:0a673c671a56 4 * All rights reserved.
ebrus 0:0a673c671a56 5 *
ebrus 0:0a673c671a56 6 * Redistribution and use in source and binary forms, with or without
ebrus 0:0a673c671a56 7 * modification, are permitted provided that the following conditions are met:
ebrus 0:0a673c671a56 8 *
ebrus 0:0a673c671a56 9 * 1. Redistributions of source code must retain the above copyright notice,
ebrus 0:0a673c671a56 10 * this list of conditions and the following disclaimer.
ebrus 0:0a673c671a56 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
ebrus 0:0a673c671a56 12 * this list of conditions and the following disclaimer in the documentation
ebrus 0:0a673c671a56 13 * and/or other materials provided with the distribution.
ebrus 0:0a673c671a56 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ebrus 0:0a673c671a56 15 * may be used to endorse or promote products derived from this software
ebrus 0:0a673c671a56 16 * without specific prior written permission.
ebrus 0:0a673c671a56 17 *
ebrus 0:0a673c671a56 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ebrus 0:0a673c671a56 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ebrus 0:0a673c671a56 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ebrus 0:0a673c671a56 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ebrus 0:0a673c671a56 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ebrus 0:0a673c671a56 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ebrus 0:0a673c671a56 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ebrus 0:0a673c671a56 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ebrus 0:0a673c671a56 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ebrus 0:0a673c671a56 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ebrus 0:0a673c671a56 28 *******************************************************************************
ebrus 0:0a673c671a56 29 */
ebrus 0:0a673c671a56 30 #ifndef MBED_PERIPHERALNAMES_H
ebrus 0:0a673c671a56 31 #define MBED_PERIPHERALNAMES_H
ebrus 0:0a673c671a56 32
ebrus 0:0a673c671a56 33 #include "cmsis.h"
ebrus 0:0a673c671a56 34
ebrus 0:0a673c671a56 35 #ifdef __cplusplus
ebrus 0:0a673c671a56 36 extern "C" {
ebrus 0:0a673c671a56 37 #endif
ebrus 0:0a673c671a56 38
ebrus 0:0a673c671a56 39 typedef enum {
ebrus 0:0a673c671a56 40 ADC_1 = (int)ADC1_BASE
ebrus 0:0a673c671a56 41 } ADCName;
ebrus 0:0a673c671a56 42
ebrus 0:0a673c671a56 43 typedef enum {
ebrus 0:0a673c671a56 44 DAC_0 = 0,
ebrus 0:0a673c671a56 45 DAC_1
ebrus 0:0a673c671a56 46 } DACName;
ebrus 0:0a673c671a56 47
ebrus 0:0a673c671a56 48 typedef enum {
ebrus 0:0a673c671a56 49 UART_1 = (int)USART1_BASE,
ebrus 0:0a673c671a56 50 UART_2 = (int)USART2_BASE,
ebrus 0:0a673c671a56 51 UART_6 = (int)USART6_BASE
ebrus 0:0a673c671a56 52 } UARTName;
ebrus 0:0a673c671a56 53
ebrus 0:0a673c671a56 54 #define STDIO_UART_TX PA_2
ebrus 0:0a673c671a56 55 #define STDIO_UART_RX PA_3
ebrus 0:0a673c671a56 56 #define STDIO_UART UART_2
ebrus 0:0a673c671a56 57
ebrus 0:0a673c671a56 58 typedef enum {
ebrus 0:0a673c671a56 59 SPI_1 = (int)SPI1_BASE,
ebrus 0:0a673c671a56 60 SPI_2 = (int)SPI2_BASE,
ebrus 0:0a673c671a56 61 SPI_3 = (int)SPI3_BASE
ebrus 0:0a673c671a56 62 } SPIName;
ebrus 0:0a673c671a56 63
ebrus 0:0a673c671a56 64 typedef enum {
ebrus 0:0a673c671a56 65 I2C_1 = (int)I2C1_BASE,
ebrus 0:0a673c671a56 66 I2C_2 = (int)I2C2_BASE,
ebrus 0:0a673c671a56 67 I2C_3 = (int)I2C3_BASE
ebrus 0:0a673c671a56 68 } I2CName;
ebrus 0:0a673c671a56 69
ebrus 0:0a673c671a56 70 typedef enum {
ebrus 0:0a673c671a56 71 PWM_1 = (int)TIM1_BASE,
ebrus 0:0a673c671a56 72 PWM_2 = (int)TIM2_BASE,
ebrus 0:0a673c671a56 73 PWM_3 = (int)TIM3_BASE,
ebrus 0:0a673c671a56 74 PWM_4 = (int)TIM4_BASE,
ebrus 0:0a673c671a56 75 PWM_5 = (int)TIM5_BASE,
ebrus 0:0a673c671a56 76 PWM_9 = (int)TIM9_BASE,
ebrus 0:0a673c671a56 77 PWM_10 = (int)TIM10_BASE,
ebrus 0:0a673c671a56 78 PWM_11 = (int)TIM11_BASE
ebrus 0:0a673c671a56 79 } PWMName;
ebrus 0:0a673c671a56 80
ebrus 0:0a673c671a56 81 #ifdef __cplusplus
ebrus 0:0a673c671a56 82 }
ebrus 0:0a673c671a56 83 #endif
ebrus 0:0a673c671a56 84
ebrus 0:0a673c671a56 85 #endif