Ermanno Brusadin / mbed-src

mbed library sources

targets/cmsis/TARGET_STM/TARGET_STM32F407VG/stm32f4xx.h@0:0a673c671a56, 2016-07-27 (annotated)

Committer:
ebrus
Date:
Wed Jul 27 18:35:32 2016 +0000
Revision:
0:0a673c671a56
4

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ebrus 0:0a673c671a56 1 /**
ebrus 0:0a673c671a56 2 ******************************************************************************
ebrus 0:0a673c671a56 3 * @file stm32f4xx.h
ebrus 0:0a673c671a56 4 * @author MCD Application Team
ebrus 0:0a673c671a56 5 * @version V2.1.0RC2
ebrus 0:0a673c671a56 6 * @date 14-May-2014
ebrus 0:0a673c671a56 7 * @brief CMSIS STM32F4xx Device Peripheral Access Layer Header File.
ebrus 0:0a673c671a56 8 *
ebrus 0:0a673c671a56 9 * The file is the unique include file that the application programmer
ebrus 0:0a673c671a56 10 * is using in the C source code, usually in main.c. This file contains:
ebrus 0:0a673c671a56 11 * - Configuration section that allows to select:
ebrus 0:0a673c671a56 12 * - The STM32F4xx device used in the target application
ebrus 0:0a673c671a56 13 * - To use or not the peripheral’s drivers in application code(i.e.
ebrus 0:0a673c671a56 14 * code will be based on direct access to peripheral’s registers
ebrus 0:0a673c671a56 15 * rather than drivers API), this option is controlled by
ebrus 0:0a673c671a56 16 * "#define USE_HAL_DRIVER"
ebrus 0:0a673c671a56 17 *
ebrus 0:0a673c671a56 18 ******************************************************************************
ebrus 0:0a673c671a56 19 * @attention
ebrus 0:0a673c671a56 20 *
ebrus 0:0a673c671a56 21 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
ebrus 0:0a673c671a56 22 *
ebrus 0:0a673c671a56 23 * Redistribution and use in source and binary forms, with or without modification,
ebrus 0:0a673c671a56 24 * are permitted provided that the following conditions are met:
ebrus 0:0a673c671a56 25 * 1. Redistributions of source code must retain the above copyright notice,
ebrus 0:0a673c671a56 26 * this list of conditions and the following disclaimer.
ebrus 0:0a673c671a56 27 * 2. Redistributions in binary form must reproduce the above copyright notice,
ebrus 0:0a673c671a56 28 * this list of conditions and the following disclaimer in the documentation
ebrus 0:0a673c671a56 29 * and/or other materials provided with the distribution.
ebrus 0:0a673c671a56 30 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ebrus 0:0a673c671a56 31 * may be used to endorse or promote products derived from this software
ebrus 0:0a673c671a56 32 * without specific prior written permission.
ebrus 0:0a673c671a56 33 *
ebrus 0:0a673c671a56 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ebrus 0:0a673c671a56 35 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ebrus 0:0a673c671a56 36 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ebrus 0:0a673c671a56 37 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ebrus 0:0a673c671a56 38 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ebrus 0:0a673c671a56 39 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ebrus 0:0a673c671a56 40 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ebrus 0:0a673c671a56 41 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ebrus 0:0a673c671a56 42 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ebrus 0:0a673c671a56 43 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ebrus 0:0a673c671a56 44 *
ebrus 0:0a673c671a56 45 ******************************************************************************
ebrus 0:0a673c671a56 46 */
ebrus 0:0a673c671a56 47
ebrus 0:0a673c671a56 48 /** @addtogroup CMSIS
ebrus 0:0a673c671a56 49 * @{
ebrus 0:0a673c671a56 50 */
ebrus 0:0a673c671a56 51
ebrus 0:0a673c671a56 52 /** @addtogroup stm32f4xx
ebrus 0:0a673c671a56 53 * @{
ebrus 0:0a673c671a56 54 */
ebrus 0:0a673c671a56 55
ebrus 0:0a673c671a56 56 #ifndef __STM32F4xx_H
ebrus 0:0a673c671a56 57 #define __STM32F4xx_H
ebrus 0:0a673c671a56 58
ebrus 0:0a673c671a56 59 #ifdef __cplusplus
ebrus 0:0a673c671a56 60 extern "C" {
ebrus 0:0a673c671a56 61 #endif /* __cplusplus */
ebrus 0:0a673c671a56 62
ebrus 0:0a673c671a56 63 /** @addtogroup Library_configuration_section
ebrus 0:0a673c671a56 64 * @{
ebrus 0:0a673c671a56 65 */
ebrus 0:0a673c671a56 66
ebrus 0:0a673c671a56 67 /* Uncomment the line below according to the target STM32 device used in your
ebrus 0:0a673c671a56 68 application
ebrus 0:0a673c671a56 69 */
ebrus 0:0a673c671a56 70
ebrus 0:0a673c671a56 71 #if !defined (STM32F405xx) && !defined (STM32F415xx) && !defined (STM32F407xx) && !defined (STM32F417xx) && \
ebrus 0:0a673c671a56 72 !defined (STM32F427xx) && !defined (STM32F437xx) && !defined (STM32F429xx) && !defined (STM32F439xx) && \
ebrus 0:0a673c671a56 73 !defined (STM32F401xC) && !defined (STM32F401xE) && !defined (STM32F411xE)
ebrus 0:0a673c671a56 74 /* #define STM32F405xx */ /*!< STM32F405RG, STM32F405VG and STM32F405ZG Devices */
ebrus 0:0a673c671a56 75 /* #define STM32F415xx */ /*!< STM32F415RG, STM32F415VG and STM32F415ZG Devices */
ebrus 0:0a673c671a56 76 #define STM32F407xx /*!< STM32F407VG, STM32F407VE, STM32F407ZG, STM32F407ZE, STM32F407IG and STM32F407IE Devices */
ebrus 0:0a673c671a56 77 /* #define STM32F417xx */ /*!< STM32F417VG, STM32F417VE, STM32F417ZG, STM32F417ZE, STM32F417IG and STM32F417IE Devices */
ebrus 0:0a673c671a56 78 /* #define STM32F427xx */ /*!< STM32F427VG, STM32F427VI, STM32F427ZG, STM32F427ZI, STM32F427IG and STM32F427II Devices */
ebrus 0:0a673c671a56 79 /* #define STM32F437xx */ /*!< STM32F437VG, STM32F437VI, STM32F437ZG, STM32F437ZI, STM32F437IG and STM32F437II Devices */
ebrus 0:0a673c671a56 80 /* #define STM32F429xx */ /*!< STM32F429VG, STM32F429VI, STM32F429ZG, STM32F429ZI, STM32F429BG, STM32F429BI, STM32F429NG,
ebrus 0:0a673c671a56 81 STM32F439NI, STM32F429IG and STM32F429II Devices */
ebrus 0:0a673c671a56 82 /* #define STM32F439xx */ /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG,
ebrus 0:0a673c671a56 83 STM32F439NI, STM32F439IG and STM32F439II Devices */
ebrus 0:0a673c671a56 84 /* #define STM32F401xC */ /*!< STM32F401CB, STM32F401CC, STM32F401RB, STM32F401RC, STM32F401VB and STM32F401VC Devices */
ebrus 0:0a673c671a56 85 /* #define STM32F401xE */ /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */
ebrus 0:0a673c671a56 86 /* #define STM32F411xE */ /*!< STM32F411CD, STM32F411RD, STM32F411VD, STM32F411CE, STM32F411RE and STM32F411VE Devices */
ebrus 0:0a673c671a56 87 #endif
ebrus 0:0a673c671a56 88
ebrus 0:0a673c671a56 89 /* Tip: To avoid modifying this file each time you need to switch between these
ebrus 0:0a673c671a56 90 devices, you can define the device in your toolchain compiler preprocessor.
ebrus 0:0a673c671a56 91 */
ebrus 0:0a673c671a56 92 #if !defined (USE_HAL_DRIVER)
ebrus 0:0a673c671a56 93 /**
ebrus 0:0a673c671a56 94 * @brief Comment the line below if you will not use the peripherals drivers.
ebrus 0:0a673c671a56 95 In this case, these drivers will not be included and the application code will
ebrus 0:0a673c671a56 96 be based on direct access to peripherals registers
ebrus 0:0a673c671a56 97 */
ebrus 0:0a673c671a56 98 #define USE_HAL_DRIVER
ebrus 0:0a673c671a56 99 #endif /* USE_HAL_DRIVER */
ebrus 0:0a673c671a56 100
ebrus 0:0a673c671a56 101 /**
ebrus 0:0a673c671a56 102 * @brief CMSIS Device version number V2.1.0RC2
ebrus 0:0a673c671a56 103 */
ebrus 0:0a673c671a56 104 #define __STM32F4xx_CMSIS_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
ebrus 0:0a673c671a56 105 #define __STM32F4xx_CMSIS_DEVICE_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
ebrus 0:0a673c671a56 106 #define __STM32F4xx_CMSIS_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
ebrus 0:0a673c671a56 107 #define __STM32F4xx_CMSIS_DEVICE_VERSION_RC (0x02) /*!< [7:0] release candidate */
ebrus 0:0a673c671a56 108 #define __STM32F4xx_CMSIS_DEVICE_VERSION ((__CMSIS_DEVICE_VERSION_MAIN << 24)\
ebrus 0:0a673c671a56 109 |(__CMSIS_DEVICE_HAL_VERSION_SUB1 << 16)\
ebrus 0:0a673c671a56 110 |(__CMSIS_DEVICE_HAL_VERSION_SUB2 << 8 )\
ebrus 0:0a673c671a56 111 |(__CMSIS_DEVICE_HAL_VERSION_RC))
ebrus 0:0a673c671a56 112
ebrus 0:0a673c671a56 113 /**
ebrus 0:0a673c671a56 114 * @}
ebrus 0:0a673c671a56 115 */
ebrus 0:0a673c671a56 116
ebrus 0:0a673c671a56 117 /** @addtogroup Device_Included
ebrus 0:0a673c671a56 118 * @{
ebrus 0:0a673c671a56 119 */
ebrus 0:0a673c671a56 120
ebrus 0:0a673c671a56 121 #if defined(STM32F405xx)
ebrus 0:0a673c671a56 122 #include "stm32f405xx.h"
ebrus 0:0a673c671a56 123 #elif defined(STM32F415xx)
ebrus 0:0a673c671a56 124 #include "stm32f415xx.h"
ebrus 0:0a673c671a56 125 #elif defined(STM32F407xx)
ebrus 0:0a673c671a56 126 #include "stm32f407xx.h"
ebrus 0:0a673c671a56 127 #elif defined(STM32F417xx)
ebrus 0:0a673c671a56 128 #include "stm32f417xx.h"
ebrus 0:0a673c671a56 129 #elif defined(STM32F427xx)
ebrus 0:0a673c671a56 130 #include "stm32f427xx.h"
ebrus 0:0a673c671a56 131 #elif defined(STM32F437xx)
ebrus 0:0a673c671a56 132 #include "stm32f437xx.h"
ebrus 0:0a673c671a56 133 #elif defined(STM32F429xx)
ebrus 0:0a673c671a56 134 #include "stm32f429xx.h"
ebrus 0:0a673c671a56 135 #elif defined(STM32F439xx)
ebrus 0:0a673c671a56 136 #include "stm32f439xx.h"
ebrus 0:0a673c671a56 137 #elif defined(STM32F401xC)
ebrus 0:0a673c671a56 138 #include "stm32f401xc.h"
ebrus 0:0a673c671a56 139 #elif defined(STM32F401xE)
ebrus 0:0a673c671a56 140 #include "stm32f401xe.h"
ebrus 0:0a673c671a56 141 #elif defined(STM32F411xE)
ebrus 0:0a673c671a56 142 #include "stm32f411xe.h"
ebrus 0:0a673c671a56 143 #else
ebrus 0:0a673c671a56 144 #error "Please select first the target STM32F4xx device used in your application (in stm32f4xx.h file)"
ebrus 0:0a673c671a56 145 #endif
ebrus 0:0a673c671a56 146
ebrus 0:0a673c671a56 147 /**
ebrus 0:0a673c671a56 148 * @}
ebrus 0:0a673c671a56 149 */
ebrus 0:0a673c671a56 150
ebrus 0:0a673c671a56 151 /** @addtogroup Exported_types
ebrus 0:0a673c671a56 152 * @{
ebrus 0:0a673c671a56 153 */
ebrus 0:0a673c671a56 154 typedef enum
ebrus 0:0a673c671a56 155 {
ebrus 0:0a673c671a56 156 RESET = 0,
ebrus 0:0a673c671a56 157 SET = !RESET
ebrus 0:0a673c671a56 158 } FlagStatus, ITStatus;
ebrus 0:0a673c671a56 159
ebrus 0:0a673c671a56 160 typedef enum
ebrus 0:0a673c671a56 161 {
ebrus 0:0a673c671a56 162 DISABLE = 0,
ebrus 0:0a673c671a56 163 ENABLE = !DISABLE
ebrus 0:0a673c671a56 164 } FunctionalState;
ebrus 0:0a673c671a56 165 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
ebrus 0:0a673c671a56 166
ebrus 0:0a673c671a56 167 typedef enum
ebrus 0:0a673c671a56 168 {
ebrus 0:0a673c671a56 169 ERROR = 0,
ebrus 0:0a673c671a56 170 SUCCESS = !ERROR
ebrus 0:0a673c671a56 171 } ErrorStatus;
ebrus 0:0a673c671a56 172
ebrus 0:0a673c671a56 173 /**
ebrus 0:0a673c671a56 174 * @}
ebrus 0:0a673c671a56 175 */
ebrus 0:0a673c671a56 176
ebrus 0:0a673c671a56 177
ebrus 0:0a673c671a56 178 /** @addtogroup Exported_macro
ebrus 0:0a673c671a56 179 * @{
ebrus 0:0a673c671a56 180 */
ebrus 0:0a673c671a56 181 #define SET_BIT(REG, BIT) ((REG) |= (BIT))
ebrus 0:0a673c671a56 182
ebrus 0:0a673c671a56 183 #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
ebrus 0:0a673c671a56 184
ebrus 0:0a673c671a56 185 #define READ_BIT(REG, BIT) ((REG) & (BIT))
ebrus 0:0a673c671a56 186
ebrus 0:0a673c671a56 187 #define CLEAR_REG(REG) ((REG) = (0x0))
ebrus 0:0a673c671a56 188
ebrus 0:0a673c671a56 189 #define WRITE_REG(REG, VAL) ((REG) = (VAL))
ebrus 0:0a673c671a56 190
ebrus 0:0a673c671a56 191 #define READ_REG(REG) ((REG))
ebrus 0:0a673c671a56 192
ebrus 0:0a673c671a56 193 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
ebrus 0:0a673c671a56 194
ebrus 0:0a673c671a56 195 #define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
ebrus 0:0a673c671a56 196
ebrus 0:0a673c671a56 197
ebrus 0:0a673c671a56 198 /**
ebrus 0:0a673c671a56 199 * @}
ebrus 0:0a673c671a56 200 */
ebrus 0:0a673c671a56 201
ebrus 0:0a673c671a56 202 #if defined (USE_HAL_DRIVER)
ebrus 0:0a673c671a56 203 #include "stm32f4xx_hal.h"
ebrus 0:0a673c671a56 204 #endif /* USE_HAL_DRIVER */
ebrus 0:0a673c671a56 205
ebrus 0:0a673c671a56 206 #ifdef __cplusplus
ebrus 0:0a673c671a56 207 }
ebrus 0:0a673c671a56 208 #endif /* __cplusplus */
ebrus 0:0a673c671a56 209
ebrus 0:0a673c671a56 210 #endif /* __STM32F4xx_H */
ebrus 0:0a673c671a56 211 /**
ebrus 0:0a673c671a56 212 * @}
ebrus 0:0a673c671a56 213 */
ebrus 0:0a673c671a56 214
ebrus 0:0a673c671a56 215 /**
ebrus 0:0a673c671a56 216 * @}
ebrus 0:0a673c671a56 217 */
ebrus 0:0a673c671a56 218
ebrus 0:0a673c671a56 219
ebrus 0:0a673c671a56 220
ebrus 0:0a673c671a56 221
ebrus 0:0a673c671a56 222 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/