Diff: sx12xx.h

Revision:

10:8905722dd5e6

Parent:

9:34f1f2bbe7b3

Child:

11:1cd95e76519a

--- a/sx12xx.h	Sun Nov 25 15:06:59 2018 -0800
+++ b/sx12xx.h	Tue Oct 15 16:01:02 2019 -0700
@@ -13,11 +13,13 @@
 #define HZ_TO_FRF               1.048576 // = (1<<25) / Fxtal_Hz
 
 /***************************************************************/
+#define OPCODE_RESET_STATS              0x00
 #define OPCODE_CLEAR_IRQ_STATUS         0x02
 #define OPCODE_CLEAR_DEVICE_ERRORS      0x07
 #define OPCODE_SET_DIO_IRQ_PARAMS       0x08
 #define OPCODE_WRITE_REGISTER           0x0d
 #define OPCODE_WRITE_BUFFER             0x0e
+#define OPCODE_GET_STATS                0x10
 #define OPCODE_GET_PACKET_TYPE          0x11
 #define OPCODE_GET_IRQ_STATUS           0x12
 #define OPCODE_GET_RX_BUFFER_STATUS     0x13
@@ -38,10 +40,14 @@
 #define OPCODE_SET_PACKET_PARAMS        0x8c
 #define OPCODE_SET_TX_PARAMS            0x8e
 #define OPCODE_SET_BUFFER_BASE_ADDR     0x8f
+#define OPCODE_SET_FALLBACK_MODE        0x93
+#define OPCODE_SET_RX_DUTY_CYCLE        0x94
 #define OPCODE_SET_PA_CONFIG            0x95
 #define OPCODE_SET_REGULATOR_MODE       0x96
 #define OPCODE_SET_DIO3_AS_TCXO_CTRL    0x97
+#define OPCODE_CALIBRATE_IMAGE          0x98
 #define OPCODE_SET_DIO2_AS_RFSWITCH     0x9d
+#define OPCODE_STOP_TIMER_ON_PREAMBLE   0x9f
 #define OPCODE_SET_LORA_SYMBOL_TIMEOUT  0xa0
 #define OPCODE_GET_STATUS               0xc0
 #define OPCODE_SET_FS                   0xc1
@@ -538,6 +544,7 @@
         void (*rxDone)(uint8_t size, float rssi, float snr); // user context
         void (*timeout)(bool tx); // user context
         void (*cadDone)(bool detected); // user context
+        void (*preambleDetected)(void); // user context
 
         //! RF transmit packet buffer
         uint8_t tx_buf[256];    // lora fifo size