Diff: sx12xx.h

Revision:

11:1cd95e76519a

Parent:

10:8905722dd5e6

Child:

12:7a3ec8bb8407

--- a/sx12xx.h	Tue Oct 15 16:01:02 2019 -0700
+++ b/sx12xx.h	Wed Mar 04 19:59:06 2020 +0000
@@ -110,6 +110,7 @@
 #define REG_ADDR_PWR_CTRL              0x883 // 8bits
 #define REG_ADDR_I_GAIN                0x884 // 8bits  integral gain in pi filter
 #define REG_ADDR_P_GAIN                0x885 // 8bits  proportional gain in pi filter
+#define REG_ADDR_SDCFG0                0x889 // 
 #define REG_ADDR_RFFREQ                0x88b // 31bits
 #define REG_ADDR_FREQ_OFFSET           0x88f // 19bits
 #define REG_ADDR_ANACTRL6              0x8d7 // 6bits
@@ -169,6 +170,16 @@
     uint8_t buf[9];
 } PacketParams_t;
 
+typedef union {
+    struct {
+        uint8_t phase_step:     2; // 0,1
+        uint8_t sd_mode:        1; // 2
+        uint8_t sd_en:          1; // 3
+        uint8_t div_ratio_edge: 1; // 4
+        uint8_t reserved:       3; // 5,6,7
+    } bits;
+    uint8_t octet;
+} sdCfg0_t;  // at 0x889
 
 #define LORA_BW_7           0x00 // 7.81 kHz real
 #define LORA_BW_10          0x08 // 10.42 kHz real