cervin sx1265 operating with transceiver firmware
Dependents: lr1110_wifi_geolocation_device lr1110_wifi_geolocation_gateway
To use this driver, your LR1110 must be programmed as transceiver (not modem, which is LoRaWAN only).
Visit https://github.com/Lora-net/lr1110_updater_tool to update your LR1110, or change it from modem to transceiver if necessary.
sx12xx.h@1:29294cae9f9a, 2021-02-05 (annotated)
- Committer:
- Wayne Roberts
- Date:
- Fri Feb 05 16:33:27 2021 -0800
- Revision:
- 1:29294cae9f9a
- Parent:
- 0:987d9022c152
remove busy check from service
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Wayne Roberts |
0:987d9022c152 | 1 | #include "mbed.h" |
Wayne Roberts |
0:987d9022c152 | 2 | #ifndef SX1265_H |
Wayne Roberts |
0:987d9022c152 | 3 | #define SX1265_H |
Wayne Roberts |
0:987d9022c152 | 4 | |
Wayne Roberts |
0:987d9022c152 | 5 | #define XTAL_FREQ_HZ 32000000 |
Wayne Roberts |
0:987d9022c152 | 6 | #define FREQ_STEP 0.95367431640625 // ( ( double )( XTAL_FREQ / ( double )FREQ_DIV ) ) |
Wayne Roberts |
0:987d9022c152 | 7 | #define GFSK_BITRATE_NUMERATOR 1024000000 |
Wayne Roberts |
0:987d9022c152 | 8 | |
Wayne Roberts |
0:987d9022c152 | 9 | |
Wayne Roberts |
0:987d9022c152 | 10 | #define OPCODE_GET_STATUS 0x0100 |
Wayne Roberts |
0:987d9022c152 | 11 | #define OPCODE_GET_VERSION 0x0101 |
Wayne Roberts |
0:987d9022c152 | 12 | #define OPCODE_WRITEREGMEM32 0x0105 |
Wayne Roberts |
0:987d9022c152 | 13 | #define OPCODE_READREGMEM32 0x0106 |
Wayne Roberts |
0:987d9022c152 | 14 | #define OPCODE_CLEAR_RX_BUFFER 0x010b |
Wayne Roberts |
0:987d9022c152 | 15 | #define OPCODE_WRITE_BUFFER8 0x0109 |
Wayne Roberts |
0:987d9022c152 | 16 | #define OPCODE_READ_BUFFER8 0x010a |
Wayne Roberts |
0:987d9022c152 | 17 | #define OPCODE_GET_ERRORS 0x010d |
Wayne Roberts |
0:987d9022c152 | 18 | #define OPCODE_CLEAR_ERRORS 0x010e |
Wayne Roberts |
0:987d9022c152 | 19 | #define OPCODE_CALIBRATE 0x010f |
Wayne Roberts |
0:987d9022c152 | 20 | #define OPCODE_SET_REGULATOR_MODE 0x0110 |
Wayne Roberts |
0:987d9022c152 | 21 | #define OPCODE_CALIBRATE_IMAGE 0x0111 // operating band change |
Wayne Roberts |
0:987d9022c152 | 22 | #define OPCODE_SET_DIO_AS_RFSWITCH 0x0112 |
Wayne Roberts |
0:987d9022c152 | 23 | #define OPCODE_CLEAR_IRQ 0x0114 |
Wayne Roberts |
0:987d9022c152 | 24 | #define OPCODE_SET_SLEEP 0x011b |
Wayne Roberts |
0:987d9022c152 | 25 | #define OPCODE_SET_STANDBY 0x011c |
Wayne Roberts |
0:987d9022c152 | 26 | #define OPCODE_SET_FS 0x011d |
Wayne Roberts |
0:987d9022c152 | 27 | #define OPCODE_SET_DIOIRQPARAMS 0x0113 |
Wayne Roberts |
0:987d9022c152 | 28 | #define OPCODE_SET_TCXO_MODE 0x0117 |
Wayne Roberts |
0:987d9022c152 | 29 | #define OPCODE_GET_DEVEUI 0x0125 |
Wayne Roberts |
0:987d9022c152 | 30 | #define OPCODE_GET_JOINEUI 0x0126 |
Wayne Roberts |
0:987d9022c152 | 31 | #define OPCODE_GET_DEVICE_PIN 0x0127 |
Wayne Roberts |
0:987d9022c152 | 32 | #define OPCODE_RESET_STATS 0x0200 |
Wayne Roberts |
0:987d9022c152 | 33 | #define OPCODE_GET_STATS 0x0201 |
Wayne Roberts |
0:987d9022c152 | 34 | #define OPCODE_GET_PACKET_TYPE 0x0202 |
Wayne Roberts |
0:987d9022c152 | 35 | #define OPCODE_GET_RX_BUFFER_STATUS 0x0203 |
Wayne Roberts |
0:987d9022c152 | 36 | #define OPCODE_GET_PKT_STATUS 0x0204 |
Wayne Roberts |
0:987d9022c152 | 37 | #define OPCODE_GET_RSSI_INST 0x0205 |
Wayne Roberts |
0:987d9022c152 | 38 | #define OPCODE_SET_GFSK_SYNC_WORD 0x0206 |
Wayne Roberts |
0:987d9022c152 | 39 | #define OPCODE_SET_LORA_PUBLIC_NETWORK 0x0208 |
Wayne Roberts |
0:987d9022c152 | 40 | #define OPCODE_SET_RX 0x0209 |
Wayne Roberts |
0:987d9022c152 | 41 | #define OPCODE_SET_RF_FREQ_HZ 0x020b // 0x00f30058 |
Wayne Roberts |
0:987d9022c152 | 42 | #define OPCODE_SET_TX 0x020a |
Wayne Roberts |
0:987d9022c152 | 43 | #define OPCODE_AUTO_TX_RX 0x020c |
Wayne Roberts |
0:987d9022c152 | 44 | #define OPCODE_SET_CAD_PARAMS 0x020d |
Wayne Roberts |
0:987d9022c152 | 45 | #define OPCODE_SET_PACKET_TYPE 0x020e |
Wayne Roberts |
0:987d9022c152 | 46 | #define OPCODE_SET_MODULATION 0x020f |
Wayne Roberts |
0:987d9022c152 | 47 | #define OPCODE_SET_PACKET_PARAM 0x0210 |
Wayne Roberts |
0:987d9022c152 | 48 | #define OPCODE_SET_TXPARAMS 0x0211 |
Wayne Roberts |
0:987d9022c152 | 49 | #define OPCODE_SET_GFSK_PKT_ADDRESS 0x0212 |
Wayne Roberts |
0:987d9022c152 | 50 | #define OPCODE_SET_RXTX_FALLBACK_MODE 0x0213 |
Wayne Roberts |
0:987d9022c152 | 51 | #define OPCODE_SET_RX_DUTYCYCLE 0x0214 |
Wayne Roberts |
0:987d9022c152 | 52 | #define OPCODE_SET_PA_CONFIG 0x0215 |
Wayne Roberts |
0:987d9022c152 | 53 | #define OPCODE_STOP_TIMEOUT_ON_PREAMBLE 0x0217 |
Wayne Roberts |
0:987d9022c152 | 54 | #define OPCODE_SET_CAD 0x0218 |
Wayne Roberts |
0:987d9022c152 | 55 | #define OPCODE_SET_TXCW 0x0219 |
Wayne Roberts |
0:987d9022c152 | 56 | #define OPCODE_SET_TX_PREAMBLE 0x021a |
Wayne Roberts |
0:987d9022c152 | 57 | #define OPCODE_SET_LORA_SYNC_TIMEOUT 0x021b |
Wayne Roberts |
0:987d9022c152 | 58 | #define OPCODE_SET_GFSK_CRC_PARAMS 0x0224 |
Wayne Roberts |
0:987d9022c152 | 59 | #define OPCODE_SET_GFSK_WHITENING 0x0225 |
Wayne Roberts |
0:987d9022c152 | 60 | #define OPCODE_SET_RX_BOSSTED 0x0227 |
Wayne Roberts |
0:987d9022c152 | 61 | |
Wayne Roberts |
0:987d9022c152 | 62 | #define OPCODE_WIFI_SCAN 0x0300 |
Wayne Roberts |
0:987d9022c152 | 63 | #define OPCODE_GET_WIFI_NB_RESULTS 0x0305 |
Wayne Roberts |
0:987d9022c152 | 64 | #define OPCODE_WIFI_READ_RESULTS 0x0306 |
Wayne Roberts |
0:987d9022c152 | 65 | #define OPCODE_WIFI_RESET_CT 0x0307 |
Wayne Roberts |
0:987d9022c152 | 66 | #define OPCODE_WIFI_READ_CT 0x0308 |
Wayne Roberts |
0:987d9022c152 | 67 | |
Wayne Roberts |
0:987d9022c152 | 68 | #define OPCODE_GNSS_SET_CONSTELLATION 0x0400 |
Wayne Roberts |
0:987d9022c152 | 69 | #define OPCODE_GNSS_SET_MODE 0x0408 |
Wayne Roberts |
0:987d9022c152 | 70 | #define OPCODE_GNSS_AUTONOMOUS 0x0409 |
Wayne Roberts |
0:987d9022c152 | 71 | #define OPCODE_GNSS_ASSISTED 0x040a |
Wayne Roberts |
0:987d9022c152 | 72 | #define OPCODE_GNSS_GET_RESULT_SIZE 0x040c |
Wayne Roberts |
0:987d9022c152 | 73 | #define OPCODE_GNSS_READ_RESULTS 0x040d |
Wayne Roberts |
0:987d9022c152 | 74 | #define OPCODE_GNSS_ALMANAC_FULL_UPDATE 0x040e |
Wayne Roberts |
0:987d9022c152 | 75 | #define OPCODE_GNSS_SET_ASSISTED_POS 0x0410 |
Wayne Roberts |
0:987d9022c152 | 76 | #define OPCODE_GNSS_GET_NBSVDET 0x0417 |
Wayne Roberts |
0:987d9022c152 | 77 | #define OPCODE_GNSS_GET_SVDET 0x0418 |
Wayne Roberts |
0:987d9022c152 | 78 | |
Wayne Roberts |
0:987d9022c152 | 79 | #define OPCODE_CRYPTO_SET_KEY 0x0502 |
Wayne Roberts |
0:987d9022c152 | 80 | #define OPCODE_CRYPTO_DIRIVE_STORE_KEY 0x0503 |
Wayne Roberts |
0:987d9022c152 | 81 | #define OPCODE_CRYPTO_PROCESS_JOIN_ACC 0x0504 |
Wayne Roberts |
0:987d9022c152 | 82 | #define OPCODE_CRYPTO_COMPUTE_AES_CMAC 0x0505 |
Wayne Roberts |
0:987d9022c152 | 83 | #define OPCODE_CRYPTO_VERIFY_AES_CMAC 0x0506 |
Wayne Roberts |
0:987d9022c152 | 84 | #define OPCODE_CRYPTO_AES_ENCRYPT01 0x0507 |
Wayne Roberts |
0:987d9022c152 | 85 | #define OPCODE_CRYPTO_AES_ENCRYPT 0x0508 |
Wayne Roberts |
0:987d9022c152 | 86 | #define OPCODE_CRYPTO_AES_DECRYPT 0x0509 |
Wayne Roberts |
0:987d9022c152 | 87 | #define OPCODE_CRYPTO_STORE_TO_FLASH 0x050a |
Wayne Roberts |
0:987d9022c152 | 88 | #define OPCODE_CRYPTO_RESTORE_FROM_FLASH 0x050b |
Wayne Roberts |
0:987d9022c152 | 89 | #define OPCODE_CRYPTO_SET_PARAM 0x050d |
Wayne Roberts |
0:987d9022c152 | 90 | #define OPCODE_CRYPTO_GET_PARAM 0x050e |
Wayne Roberts |
0:987d9022c152 | 91 | |
Wayne Roberts |
0:987d9022c152 | 92 | /* for 0x0112 command: */ |
Wayne Roberts |
0:987d9022c152 | 93 | #define DIO_en_IDX 0 |
Wayne Roberts |
0:987d9022c152 | 94 | #define DIO_stby_IDX 1 |
Wayne Roberts |
0:987d9022c152 | 95 | #define DIO_rx_IDX 2 |
Wayne Roberts |
0:987d9022c152 | 96 | #define DIO_tx_IDX 3 |
Wayne Roberts |
0:987d9022c152 | 97 | #define DIO_txhp_IDX 4 |
Wayne Roberts |
0:987d9022c152 | 98 | #define DIO_gnss_IDX 6 |
Wayne Roberts |
0:987d9022c152 | 99 | #define DIO_wifi_IDX 7 |
Wayne Roberts |
0:987d9022c152 | 100 | |
Wayne Roberts |
0:987d9022c152 | 101 | #define DIO5_BIT 0x01 |
Wayne Roberts |
0:987d9022c152 | 102 | #define DIO6_BIT 0x02 |
Wayne Roberts |
0:987d9022c152 | 103 | #define DIO7_BIT 0x04 |
Wayne Roberts |
0:987d9022c152 | 104 | #define DIO8_BIT 0x08 |
Wayne Roberts |
0:987d9022c152 | 105 | #define DIO10_BIT 0x10 |
Wayne Roberts |
0:987d9022c152 | 106 | |
Wayne Roberts |
0:987d9022c152 | 107 | enum { |
Wayne Roberts |
0:987d9022c152 | 108 | /* 0x00 */ TCXO_VOLTS_1v6 = 0, |
Wayne Roberts |
0:987d9022c152 | 109 | /* 0x01 */ TCXO_VOLTS_1v8, |
Wayne Roberts |
0:987d9022c152 | 110 | /* 0x02 */ TCXO_VOLTS_1V8, |
Wayne Roberts |
0:987d9022c152 | 111 | /* 0x03 */ TCXO_VOLTS_2v2, |
Wayne Roberts |
0:987d9022c152 | 112 | /* 0x04 */ TCXO_VOLTS_2v4, |
Wayne Roberts |
0:987d9022c152 | 113 | /* 0x05 */ TCXO_VOLTS_2v7, |
Wayne Roberts |
0:987d9022c152 | 114 | /* 0x06 */ TCXO_VOLTS_3v0, |
Wayne Roberts |
0:987d9022c152 | 115 | /* 0x07 */ TCXO_VOLTS_3v3, |
Wayne Roberts |
0:987d9022c152 | 116 | }; |
Wayne Roberts |
0:987d9022c152 | 117 | |
Wayne Roberts |
0:987d9022c152 | 118 | /* valid memory ranges: |
Wayne Roberts |
0:987d9022c152 | 119 | * 000c1000 - 000c2000 1024 dwords |
Wayne Roberts |
0:987d9022c152 | 120 | * 00800000 - 00810000 16384 dwords |
Wayne Roberts |
0:987d9022c152 | 121 | * |
Wayne Roberts |
0:987d9022c152 | 122 | * 00f00000 - 00f00050 20 dwords |
Wayne Roberts |
0:987d9022c152 | 123 | * 00f01000 - 00f01048 18 dwords |
Wayne Roberts |
0:987d9022c152 | 124 | * 00f02000 - 00f02014 5 dwords |
Wayne Roberts |
0:987d9022c152 | 125 | * 00f02018 - 00f02024 3 dwords |
Wayne Roberts |
0:987d9022c152 | 126 | * 00f03000 - 00f03034 13 dwords |
Wayne Roberts |
0:987d9022c152 | 127 | * 00f04000 - 00f04018 6 dwords |
Wayne Roberts |
0:987d9022c152 | 128 | * 00f04020 - 00f04040 8 dwords |
Wayne Roberts |
0:987d9022c152 | 129 | * 00f0f000 - 00f0f004 1 dwords |
Wayne Roberts |
0:987d9022c152 | 130 | * 00f0f008 - 00f0f010 2 dwords |
Wayne Roberts |
0:987d9022c152 | 131 | * 00f10000 - 00f11ffc (lockup) |
Wayne Roberts |
0:987d9022c152 | 132 | * 00f11000 - 00f11058 22 dwords |
Wayne Roberts |
0:987d9022c152 | 133 | * 00f12000 - 00f1200c 3 dwords |
Wayne Roberts |
0:987d9022c152 | 134 | * 00f12010 - 00f12040 12 dwords |
Wayne Roberts |
0:987d9022c152 | 135 | * 00f13000 - 00f15034 2061 dwords |
Wayne Roberts |
0:987d9022c152 | 136 | * 00f16000 - 00f16014 5 dwords |
Wayne Roberts |
0:987d9022c152 | 137 | * 00f17000 - 00f17058 22 dwords |
Wayne Roberts |
0:987d9022c152 | 138 | * 00f18000 - 00f18020 8 dwords |
Wayne Roberts |
0:987d9022c152 | 139 | * 00f19000 - 00f190a4 41 dwords |
Wayne Roberts |
0:987d9022c152 | 140 | * 00f1a000 - 00f1a034 13 dwords |
Wayne Roberts |
0:987d9022c152 | 141 | * 00f1f000 - 00f1f004 1 dwords |
Wayne Roberts |
0:987d9022c152 | 142 | * 00f1f00c - 00f1f014 2 dwords |
Wayne Roberts |
0:987d9022c152 | 143 | * 00f20000 - 00f20020 8 dwords |
Wayne Roberts |
0:987d9022c152 | 144 | * 00f20100 - 00f2013c 15 dwords |
Wayne Roberts |
0:987d9022c152 | 145 | * 00f20200 - 00f20250 20 dwords |
Wayne Roberts |
0:987d9022c152 | 146 | * 00f20300 - 00f20390 36 dwords |
Wayne Roberts |
0:987d9022c152 | 147 | * 00f20400 - 00f204c0 48 dwords |
Wayne Roberts |
0:987d9022c152 | 148 | * 00f20500 - 00f2050c 3 dwords |
Wayne Roberts |
0:987d9022c152 | 149 | * 00f20540 - 00f20598 22 dwords |
Wayne Roberts |
0:987d9022c152 | 150 | * 00f30000 - 00f300cc 51 dwords |
Wayne Roberts |
0:987d9022c152 | 151 | */ |
Wayne Roberts |
0:987d9022c152 | 152 | |
Wayne Roberts |
0:987d9022c152 | 153 | /* 800000->8000xx: cmd buffer |
Wayne Roberts |
0:987d9022c152 | 154 | */ |
Wayne Roberts |
0:987d9022c152 | 155 | #define REG_ADDR_REGULATOR_MODE 0x0080036c |
Wayne Roberts |
0:987d9022c152 | 156 | #define REG_ADDR_GNSS_CONST 0x008003b8 |
Wayne Roberts |
0:987d9022c152 | 157 | #define REG_ADDR_GNSS_MODE 0x008004b4 |
Wayne Roberts |
0:987d9022c152 | 158 | #define REG_ADDR_GNSS_ASSIST_LAT 0x008008ec |
Wayne Roberts |
0:987d9022c152 | 159 | #define REG_ADDR_GNSS_ASSIST_LON 0x008008f0 |
Wayne Roberts |
0:987d9022c152 | 160 | #define REG_ADDR_TCXO 0x00f0003c |
Wayne Roberts |
0:987d9022c152 | 161 | #define REG_ADDR_DIO5 0x00f03018 |
Wayne Roberts |
0:987d9022c152 | 162 | #define REG_ADDR_DIO6 0x00f0301c |
Wayne Roberts |
0:987d9022c152 | 163 | #define REG_ADDR_DIO7 0x00f03020 |
Wayne Roberts |
0:987d9022c152 | 164 | #define REG_ADDR_DIO8 0x00f03024 |
Wayne Roberts |
0:987d9022c152 | 165 | #define REG_ADDR_DIO10 0x00f0302c |
Wayne Roberts |
0:987d9022c152 | 166 | #define REG_ADDR_COUNTER 0x00f04014 |
Wayne Roberts |
0:987d9022c152 | 167 | #define REG_ADDR_GFSK_BWF 0x00f20124 |
Wayne Roberts |
0:987d9022c152 | 168 | #define REG_ADDR_GFSK_CFG0 0x00f20314 |
Wayne Roberts |
0:987d9022c152 | 169 | #define REG_ADDR_GFSK_BITRATE 0x00f20338 |
Wayne Roberts |
0:987d9022c152 | 170 | #define REG_ADDR_GFSK_FDEV 0x00f2033c |
Wayne Roberts |
0:987d9022c152 | 171 | #define REG_ADDR_GFSK_CFG1 0x00f2034c // gfsk preambleDetect, gfsk preambleLength |
Wayne Roberts |
0:987d9022c152 | 172 | #define REG_ADDR_GFSK_CFG2 0x00f20350 // gfsk sync word length (in bits) |
Wayne Roberts |
0:987d9022c152 | 173 | #define REG_ADDR_GFSK_SYNC_LO 0x00f20354 // gfsk sync word lo |
Wayne Roberts |
0:987d9022c152 | 174 | #define REG_ADDR_GFSK_SYNC_HI 0x00f20358 // gfsk sync word hi |
Wayne Roberts |
0:987d9022c152 | 175 | #define REG_ADDR_GFSK_CFG3 0x00f2035c // gfsk fixlen/varlen |
Wayne Roberts |
0:987d9022c152 | 176 | #define REG_ADDR_GFSK_PAYLOAD_LENGTH_A 0x00f20360 // lowest 8bits todo:tx-or-rx? |
Wayne Roberts |
0:987d9022c152 | 177 | #define REG_ADDR_GFSK_PAYLOAD_LENGTH_B 0x00f20368 // payload-length-bits[27:20], addrComp:[17:16] |
Wayne Roberts |
0:987d9022c152 | 178 | #define REG_ADDR_GFSK_CFG5 0x00f20370 // gfsk whitening, crcType |
Wayne Roberts |
0:987d9022c152 | 179 | #define REG_ADDR_GFSK_CRC_POLY 0x00f20374 |
Wayne Roberts |
0:987d9022c152 | 180 | #define REG_ADDR_GFSK_CRC_INIT 0x00f20378 |
Wayne Roberts |
0:987d9022c152 | 181 | #define REG_ADDR_LORA_CONFIG0 0x00f20414 |
Wayne Roberts |
0:987d9022c152 | 182 | #define REG_ADDR_LORA_CONFIGC 0x00f2041c |
Wayne Roberts |
0:987d9022c152 | 183 | #define REG_ADDR_LORA_CONFIGA 0x00f20420 |
Wayne Roberts |
0:987d9022c152 | 184 | #define REG_ADDR_LORA_CONFIGB 0x00f20428 |
Wayne Roberts |
0:987d9022c152 | 185 | #define REG_ADDR_LORA_SYNC 0x00f20460 |
Wayne Roberts |
0:987d9022c152 | 186 | #define REG_ADDR_RFFREQ 0x00f30058 |
Wayne Roberts |
0:987d9022c152 | 187 | #define REG_ADDR_TX_PARAMS_A 0x00f30074 |
Wayne Roberts |
0:987d9022c152 | 188 | #define REG_ADDR_TX_PARAMS_B 0x00f30078 |
Wayne Roberts |
0:987d9022c152 | 189 | #define REG_ADDR_TX_PARAMS_C 0x00f30080 |
Wayne Roberts |
0:987d9022c152 | 190 | #define REG_ADDR_TX_PARAMS_D 0x00f30088 |
Wayne Roberts |
0:987d9022c152 | 191 | //#define REG_ADDR_ 0x |
Wayne Roberts |
0:987d9022c152 | 192 | // |
Wayne Roberts |
0:987d9022c152 | 193 | |
Wayne Roberts |
0:987d9022c152 | 194 | #define GFSK_CRC_OFF 0x01 |
Wayne Roberts |
0:987d9022c152 | 195 | #define GFSK_CRC_1_BYTE 0x00 |
Wayne Roberts |
0:987d9022c152 | 196 | #define GFSK_CRC_2_BYTE 0x02 |
Wayne Roberts |
0:987d9022c152 | 197 | #define GFSK_CRC_1_BYTE_INV 0x04 |
Wayne Roberts |
0:987d9022c152 | 198 | #define GFSK_CRC_2_BYTE_INV 0x06 |
Wayne Roberts |
0:987d9022c152 | 199 | |
Wayne Roberts |
0:987d9022c152 | 200 | #define GFSK_BT_OFF 0x00 |
Wayne Roberts |
0:987d9022c152 | 201 | #define GFSK_BT_0_3 0x08 |
Wayne Roberts |
0:987d9022c152 | 202 | #define GFSK_BT_0_5 0x09 |
Wayne Roberts |
0:987d9022c152 | 203 | #define GFSK_BT_0_7 0x0a |
Wayne Roberts |
0:987d9022c152 | 204 | #define GFSK_BT_1_0 0x0b |
Wayne Roberts |
0:987d9022c152 | 205 | |
Wayne Roberts |
0:987d9022c152 | 206 | #define GFSK_RX_BW_4800 0x1f |
Wayne Roberts |
0:987d9022c152 | 207 | #define GFSK_RX_BW_5800 0x17 |
Wayne Roberts |
0:987d9022c152 | 208 | #define GFSK_RX_BW_7300 0x0f |
Wayne Roberts |
0:987d9022c152 | 209 | #define GFSK_RX_BW_9700 0x1e |
Wayne Roberts |
0:987d9022c152 | 210 | #define GFSK_RX_BW_11700 0x16 |
Wayne Roberts |
0:987d9022c152 | 211 | #define GFSK_RX_BW_14600 0x0e |
Wayne Roberts |
0:987d9022c152 | 212 | #define GFSK_RX_BW_19500 0x1d |
Wayne Roberts |
0:987d9022c152 | 213 | #define GFSK_RX_BW_23400 0x15 |
Wayne Roberts |
0:987d9022c152 | 214 | #define GFSK_RX_BW_29300 0x0d |
Wayne Roberts |
0:987d9022c152 | 215 | #define GFSK_RX_BW_39000 0x1c |
Wayne Roberts |
0:987d9022c152 | 216 | #define GFSK_RX_BW_46900 0x14 |
Wayne Roberts |
0:987d9022c152 | 217 | #define GFSK_RX_BW_58600 0x0c |
Wayne Roberts |
0:987d9022c152 | 218 | #define GFSK_RX_BW_78200 0x1b |
Wayne Roberts |
0:987d9022c152 | 219 | #define GFSK_RX_BW_93800 0x13 |
Wayne Roberts |
0:987d9022c152 | 220 | #define GFSK_RX_BW_117300 0x0b |
Wayne Roberts |
0:987d9022c152 | 221 | #define GFSK_RX_BW_156200 0x1a |
Wayne Roberts |
0:987d9022c152 | 222 | #define GFSK_RX_BW_187200 0x12 |
Wayne Roberts |
0:987d9022c152 | 223 | #define GFSK_RX_BW_234300 0x0a |
Wayne Roberts |
0:987d9022c152 | 224 | #define GFSK_RX_BW_312000 0x19 |
Wayne Roberts |
0:987d9022c152 | 225 | #define GFSK_RX_BW_373600 0x11 |
Wayne Roberts |
0:987d9022c152 | 226 | #define GFSK_RX_BW_467000 0x09 |
Wayne Roberts |
0:987d9022c152 | 227 | |
Wayne Roberts |
0:987d9022c152 | 228 | #define GFSK_PBLDET_LENGTH_OFF 0x00 |
Wayne Roberts |
0:987d9022c152 | 229 | #define GFSK_PBLDET_LENGTH_8 0x04 |
Wayne Roberts |
0:987d9022c152 | 230 | #define GFSK_PBLDET_LENGTH_16 0x05 |
Wayne Roberts |
0:987d9022c152 | 231 | #define GFSK_PBLDET_LENGTH_24 0x06 |
Wayne Roberts |
0:987d9022c152 | 232 | #define GFSK_PBLDET_LENGTH_32 0x07 |
Wayne Roberts |
0:987d9022c152 | 233 | |
Wayne Roberts |
0:987d9022c152 | 234 | enum { |
Wayne Roberts |
0:987d9022c152 | 235 | /* 0 */ LORA_BW_7_8KHz = 0, |
Wayne Roberts |
0:987d9022c152 | 236 | /* 1 */ LORA_BW_15_6KHz, |
Wayne Roberts |
0:987d9022c152 | 237 | /* 2 */ LORA_BW_31_25KHz, |
Wayne Roberts |
0:987d9022c152 | 238 | /* 3 */ LORA_BW_62_5KHz, |
Wayne Roberts |
0:987d9022c152 | 239 | /* 4 */ LORA_BW_125KHz, |
Wayne Roberts |
0:987d9022c152 | 240 | /* 5 */ LORA_BW_250KHz, |
Wayne Roberts |
0:987d9022c152 | 241 | /* 6 */ LORA_BW_500KHz, |
Wayne Roberts |
0:987d9022c152 | 242 | /* 7 */ LORA_BW_1000KHz, |
Wayne Roberts |
0:987d9022c152 | 243 | }; |
Wayne Roberts |
0:987d9022c152 | 244 | |
Wayne Roberts |
0:987d9022c152 | 245 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 246 | struct { |
Wayne Roberts |
0:987d9022c152 | 247 | uint8_t lf_rc : 1; // 0 |
Wayne Roberts |
0:987d9022c152 | 248 | uint8_t hf_rc : 1; // 1 |
Wayne Roberts |
0:987d9022c152 | 249 | uint8_t pll : 1; // 2 |
Wayne Roberts |
0:987d9022c152 | 250 | uint8_t adc : 1; // 3 |
Wayne Roberts |
0:987d9022c152 | 251 | uint8_t img : 1; // 4 |
Wayne Roberts |
0:987d9022c152 | 252 | uint8_t pll_tx : 1; // 5 |
Wayne Roberts |
0:987d9022c152 | 253 | uint8_t rfu : 2; // 6,7 |
Wayne Roberts |
0:987d9022c152 | 254 | } bits; |
Wayne Roberts |
0:987d9022c152 | 255 | uint8_t octet; |
Wayne Roberts |
0:987d9022c152 | 256 | } calibParams_t; // for opcode 0x010f |
Wayne Roberts |
0:987d9022c152 | 257 | |
Wayne Roberts |
0:987d9022c152 | 258 | |
Wayne Roberts |
0:987d9022c152 | 259 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 260 | struct __attribute__((packed)) { |
Wayne Roberts |
0:987d9022c152 | 261 | uint8_t dcdc_en : 1; // 0 |
Wayne Roberts |
0:987d9022c152 | 262 | uint32_t _todo_ :31; // 1 -> 31 |
Wayne Roberts |
0:987d9022c152 | 263 | } bits; |
Wayne Roberts |
0:987d9022c152 | 264 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 265 | } regulatorMode_t; // 0x0080036c |
Wayne Roberts |
0:987d9022c152 | 266 | |
Wayne Roberts |
0:987d9022c152 | 267 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 268 | struct __attribute__((packed)) { |
Wayne Roberts |
0:987d9022c152 | 269 | uint8_t gps : 1; // 0 |
Wayne Roberts |
0:987d9022c152 | 270 | uint8_t beidou : 1; // 1 |
Wayne Roberts |
0:987d9022c152 | 271 | uint32_t _todo_ :30; // 2 -> 31 |
Wayne Roberts |
0:987d9022c152 | 272 | } bits; |
Wayne Roberts |
0:987d9022c152 | 273 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 274 | } gnssConstellation_t; // 0x008003b8 |
Wayne Roberts |
0:987d9022c152 | 275 | |
Wayne Roberts |
0:987d9022c152 | 276 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 277 | struct __attribute__((packed)) { |
Wayne Roberts |
0:987d9022c152 | 278 | uint8_t todo : 1; // 0 |
Wayne Roberts |
0:987d9022c152 | 279 | uint8_t gnss_scan_single : 1; // 1 0=dual-scanning |
Wayne Roberts |
0:987d9022c152 | 280 | uint32_t _todo_ :30; // 2 -> 31 |
Wayne Roberts |
0:987d9022c152 | 281 | } bits; |
Wayne Roberts |
0:987d9022c152 | 282 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 283 | } gnssMode_t; // 0x008004b4 |
Wayne Roberts |
0:987d9022c152 | 284 | |
Wayne Roberts |
0:987d9022c152 | 285 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 286 | struct __attribute__((packed)) { |
Wayne Roberts |
0:987d9022c152 | 287 | uint16_t todo :16; // 0 -> 15 |
Wayne Roberts |
0:987d9022c152 | 288 | uint8_t volts : 3; // 16,17,18 |
Wayne Roberts |
0:987d9022c152 | 289 | uint32_t _todo_ :13; // 19 -> 31 |
Wayne Roberts |
0:987d9022c152 | 290 | } bits; |
Wayne Roberts |
0:987d9022c152 | 291 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 292 | } tcxo_t; // 0x00f0003c |
Wayne Roberts |
0:987d9022c152 | 293 | |
Wayne Roberts |
0:987d9022c152 | 294 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 295 | struct __attribute__((packed)) { |
Wayne Roberts |
0:987d9022c152 | 296 | uint8_t todo : 1; // 0 |
Wayne Roberts |
0:987d9022c152 | 297 | uint8_t enable : 1; // 1 |
Wayne Roberts |
0:987d9022c152 | 298 | uint32_t _todo_ :30; // 2 -> 31 |
Wayne Roberts |
0:987d9022c152 | 299 | } bits; |
Wayne Roberts |
0:987d9022c152 | 300 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 301 | } dioEnable_t; // 0x00f030xx |
Wayne Roberts |
0:987d9022c152 | 302 | |
Wayne Roberts |
0:987d9022c152 | 303 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 304 | struct __attribute__((packed)) { |
Wayne Roberts |
0:987d9022c152 | 305 | uint32_t todo : 20; // 0 -> 19 |
Wayne Roberts |
0:987d9022c152 | 306 | uint8_t bwf_lo : 3; // 20,21,22 /* ? receiver bandwidth exponent ? */ |
Wayne Roberts |
0:987d9022c152 | 307 | uint8_t _todo_ : 1; // 23 |
Wayne Roberts |
0:987d9022c152 | 308 | uint8_t bwf_hi : 2; // 24,25 /* ? receiver bandwidth mantissa ? */ |
Wayne Roberts |
0:987d9022c152 | 309 | uint8_t todo_ : 6; // 26,27,28,29,30,31 |
Wayne Roberts |
0:987d9022c152 | 310 | } bits; |
Wayne Roberts |
0:987d9022c152 | 311 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 312 | } gfskBW_t; // 0x00f20124 |
Wayne Roberts |
0:987d9022c152 | 313 | |
Wayne Roberts |
0:987d9022c152 | 314 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 315 | struct __attribute__((packed)) { |
Wayne Roberts |
0:987d9022c152 | 316 | uint8_t modem_sf : 4; // 0,1,2,3 |
Wayne Roberts |
0:987d9022c152 | 317 | uint8_t modem_bw : 4; // 4,5,6,7 |
Wayne Roberts |
0:987d9022c152 | 318 | uint8_t coding_rate : 4; // 8,9,10,11 TODO:not all 4 bits |
Wayne Roberts |
0:987d9022c152 | 319 | uint8_t ppm_offset : 1; // 12 LowDatarateOptimize |
Wayne Roberts |
0:987d9022c152 | 320 | uint8_t todo_a : 3; // 13,14,15 |
Wayne Roberts |
0:987d9022c152 | 321 | uint8_t crc_on : 1; // 16 |
Wayne Roberts |
0:987d9022c152 | 322 | uint8_t implicit_header : 1; // 17 |
Wayne Roberts |
0:987d9022c152 | 323 | uint8_t todo_b : 6; // 18,19,20,21,22,23 |
Wayne Roberts |
0:987d9022c152 | 324 | uint8_t payload_length : 8; // 24,25,26,27,28,29,30,31 |
Wayne Roberts |
0:987d9022c152 | 325 | } bits; |
Wayne Roberts |
0:987d9022c152 | 326 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 327 | } loraConfig0_t; // at 0x00f20414 |
Wayne Roberts |
0:987d9022c152 | 328 | |
Wayne Roberts |
0:987d9022c152 | 329 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 330 | struct { |
Wayne Roberts |
0:987d9022c152 | 331 | uint16_t preamble_length : 16; // 0 -> 15 |
Wayne Roberts |
0:987d9022c152 | 332 | uint16_t todo : 16; // 16 -> 31 |
Wayne Roberts |
0:987d9022c152 | 333 | } bits; |
Wayne Roberts |
0:987d9022c152 | 334 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 335 | } loraConfigC_t; // at 0x00f2041c |
Wayne Roberts |
0:987d9022c152 | 336 | |
Wayne Roberts |
0:987d9022c152 | 337 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 338 | struct { |
Wayne Roberts |
0:987d9022c152 | 339 | uint8_t todo_a : 8; // 0,1,2,3,4,5,6,7 |
Wayne Roberts |
0:987d9022c152 | 340 | uint8_t todo_b : 2; // 8,9 |
Wayne Roberts |
0:987d9022c152 | 341 | uint8_t invertIQ : 1; // 10 |
Wayne Roberts |
0:987d9022c152 | 342 | uint32_t todo_c :21; // 11,12,13,14 15,16,17,18 19,20,21,22 23,24,25,26 27,28,29,30 31 |
Wayne Roberts |
0:987d9022c152 | 343 | } bits; |
Wayne Roberts |
0:987d9022c152 | 344 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 345 | } loraConfigA_t; // at 0xf20420 |
Wayne Roberts |
0:987d9022c152 | 346 | |
Wayne Roberts |
0:987d9022c152 | 347 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 348 | struct { |
Wayne Roberts |
0:987d9022c152 | 349 | uint8_t todo_a : 1; // 0 |
Wayne Roberts |
0:987d9022c152 | 350 | uint8_t invertIQ : 1; // 1 |
Wayne Roberts |
0:987d9022c152 | 351 | uint32_t todo_b :30; // 2,3,4,5 6,7,8,9 10,11,12,13 14,15,16,17 18,19,20,21 22,23,24,25 26,27,28,29 30,31 |
Wayne Roberts |
0:987d9022c152 | 352 | } bits; |
Wayne Roberts |
0:987d9022c152 | 353 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 354 | } loraConfigB_t; // at 0x00f20428 |
Wayne Roberts |
0:987d9022c152 | 355 | |
Wayne Roberts |
0:987d9022c152 | 356 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 357 | struct { |
Wayne Roberts |
0:987d9022c152 | 358 | uint8_t ppg_a : 4; // 0,1,2,3 |
Wayne Roberts |
0:987d9022c152 | 359 | uint8_t todo : 4; // 4,5,6,7 |
Wayne Roberts |
0:987d9022c152 | 360 | uint8_t ppg_b : 4; // 8,9,10,11 |
Wayne Roberts |
0:987d9022c152 | 361 | uint8_t todo_ : 4; // 12,13,14,15 |
Wayne Roberts |
0:987d9022c152 | 362 | uint16_t _todo :16; // 16 -> 31 |
Wayne Roberts |
0:987d9022c152 | 363 | } bits; |
Wayne Roberts |
0:987d9022c152 | 364 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 365 | } loraSync_t; // at 0x00f20460 |
Wayne Roberts |
0:987d9022c152 | 366 | |
Wayne Roberts |
0:987d9022c152 | 367 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 368 | struct { |
Wayne Roberts |
0:987d9022c152 | 369 | uint32_t todo_ :20; // 0,1,2,3 4,5,6,7 8,9,10,11 12,13,14,15 16,17,18,19 |
Wayne Roberts |
0:987d9022c152 | 370 | uint8_t bt : 4; // 20,21,22,23 (0=0.3 1=0.5 2=0.7 3=1.0) |
Wayne Roberts |
0:987d9022c152 | 371 | uint8_t shaping_en : 1; // 24 |
Wayne Roberts |
0:987d9022c152 | 372 | uint8_t todo : 7; // 25,26,27,28,29,30,31 |
Wayne Roberts |
0:987d9022c152 | 373 | } bits; |
Wayne Roberts |
0:987d9022c152 | 374 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 375 | } gfskConfig0_t; // at 0x00f20314 |
Wayne Roberts |
0:987d9022c152 | 376 | |
Wayne Roberts |
0:987d9022c152 | 377 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 378 | struct { |
Wayne Roberts |
0:987d9022c152 | 379 | uint16_t preamble_length :16; // 0,1,2,3 4,5,6,7 8,9,10,11 12,13,14,15 |
Wayne Roberts |
0:987d9022c152 | 380 | uint8_t preamble_det_len : 4; // 16,17,18,19 0=8bit 1=16bit 2=24bit 3=32bit |
Wayne Roberts |
0:987d9022c152 | 381 | uint8_t preamble_det_enable : 1; // 20 |
Wayne Roberts |
0:987d9022c152 | 382 | uint16_t todo :11; // 21,22,23,24 25,26,27,28, 29,30,31 |
Wayne Roberts |
0:987d9022c152 | 383 | } bits; |
Wayne Roberts |
0:987d9022c152 | 384 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 385 | } gfskConfig1_t; // at 0x00f2034c |
Wayne Roberts |
0:987d9022c152 | 386 | |
Wayne Roberts |
0:987d9022c152 | 387 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 388 | struct __attribute__((packed)) { |
Wayne Roberts |
0:987d9022c152 | 389 | uint32_t _todo :20; // 0,1,2,3 4,5,6,7 8,9,10,11 12,13,14,15 16,17,18,19 |
Wayne Roberts |
0:987d9022c152 | 390 | uint8_t sync_word_length : 7; // 20,21,22,23,24,25,26 length in bits |
Wayne Roberts |
0:987d9022c152 | 391 | uint16_t todo : 5; // 27,28,29,30,31 |
Wayne Roberts |
0:987d9022c152 | 392 | } bits; |
Wayne Roberts |
0:987d9022c152 | 393 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 394 | } gfskConfig2_t; // at 0x00f20350 |
Wayne Roberts |
0:987d9022c152 | 395 | |
Wayne Roberts |
0:987d9022c152 | 396 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 397 | struct { |
Wayne Roberts |
0:987d9022c152 | 398 | uint8_t variable_length : 1; // 0 |
Wayne Roberts |
0:987d9022c152 | 399 | uint32_t todo :31; // 1 -> 31 |
Wayne Roberts |
0:987d9022c152 | 400 | } bits; |
Wayne Roberts |
0:987d9022c152 | 401 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 402 | } gfskConfig3_t; // at 0x00f2035c |
Wayne Roberts |
0:987d9022c152 | 403 | |
Wayne Roberts |
0:987d9022c152 | 404 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 405 | struct __attribute__((packed)) { |
Wayne Roberts |
0:987d9022c152 | 406 | uint8_t todo : 8; // 0 -> 7 |
Wayne Roberts |
0:987d9022c152 | 407 | uint8_t node_adrs : 8; // 8 -> 15 |
Wayne Roberts |
0:987d9022c152 | 408 | uint8_t addr_comp : 2; // 16,17 |
Wayne Roberts |
0:987d9022c152 | 409 | uint8_t _todo : 2; // 18,19 |
Wayne Roberts |
0:987d9022c152 | 410 | uint8_t payload_length : 8; // 20,21,22,23 24,25,26,27 |
Wayne Roberts |
0:987d9022c152 | 411 | uint8_t todo_ : 4; // 28,29,30,31 |
Wayne Roberts |
0:987d9022c152 | 412 | } bits; |
Wayne Roberts |
0:987d9022c152 | 413 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 414 | } gfskConfig4_t; // at 0x00f20368 |
Wayne Roberts |
0:987d9022c152 | 415 | |
Wayne Roberts |
0:987d9022c152 | 416 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 417 | struct { |
Wayne Roberts |
0:987d9022c152 | 418 | uint8_t crc_off : 1; // 0 |
Wayne Roberts |
0:987d9022c152 | 419 | uint8_t todo : 3; // 1,2,3 |
Wayne Roberts |
0:987d9022c152 | 420 | uint8_t crc_size : 1; // 4 0=one-byte 1=two-byte |
Wayne Roberts |
0:987d9022c152 | 421 | uint8_t _todo : 3; // 5,6,7 |
Wayne Roberts |
0:987d9022c152 | 422 | uint8_t crc_invert : 1; // 8 |
Wayne Roberts |
0:987d9022c152 | 423 | uint8_t _todo_ : 7; // 9,10,11,12 13,14,15 |
Wayne Roberts |
0:987d9022c152 | 424 | uint8_t whitening_enable : 1; // 16 |
Wayne Roberts |
0:987d9022c152 | 425 | uint16_t todo_ :15; // 17,18,19,20 21,22,23,24 25,26,27,28 29,30,31 |
Wayne Roberts |
0:987d9022c152 | 426 | } bits; |
Wayne Roberts |
0:987d9022c152 | 427 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 428 | } gfskConfig5_t; // at 0x00f20370 |
Wayne Roberts |
0:987d9022c152 | 429 | |
Wayne Roberts |
0:987d9022c152 | 430 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 431 | struct { |
Wayne Roberts |
0:987d9022c152 | 432 | uint8_t _todo : 8; // 0 -> 7 |
Wayne Roberts |
0:987d9022c152 | 433 | uint8_t RegPASupply : 1; // 8 |
Wayne Roberts |
0:987d9022c152 | 434 | uint32_t todo_ :23; // 9 -> 31 |
Wayne Roberts |
0:987d9022c152 | 435 | } bits; |
Wayne Roberts |
0:987d9022c152 | 436 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 437 | } txParamsA_t; // at 0x00f30074 |
Wayne Roberts |
0:987d9022c152 | 438 | |
Wayne Roberts |
0:987d9022c152 | 439 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 440 | struct { |
Wayne Roberts |
0:987d9022c152 | 441 | uint8_t _todo : 1; // 0 |
Wayne Roberts |
0:987d9022c152 | 442 | uint8_t PaSel : 1; // 1 |
Wayne Roberts |
0:987d9022c152 | 443 | uint8_t __todo : 2; // 2,3 |
Wayne Roberts |
0:987d9022c152 | 444 | uint8_t PaHPSel : 3; // 4,5,6 |
Wayne Roberts |
0:987d9022c152 | 445 | uint8_t todo : 1; // 7 |
Wayne Roberts |
0:987d9022c152 | 446 | uint8_t PaDutyCycle : 3; // 8,9,10 |
Wayne Roberts |
0:987d9022c152 | 447 | uint32_t todo_ :21; // 11 -> 31 |
Wayne Roberts |
0:987d9022c152 | 448 | } bits; |
Wayne Roberts |
0:987d9022c152 | 449 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 450 | } txParamsB_t; // at 0x00f30078 |
Wayne Roberts |
0:987d9022c152 | 451 | |
Wayne Roberts |
0:987d9022c152 | 452 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 453 | struct __attribute__((packed)) { |
Wayne Roberts |
0:987d9022c152 | 454 | uint8_t todo : 8; // 0 -> 7 |
Wayne Roberts |
0:987d9022c152 | 455 | uint8_t pa_ramp_time : 3; // 8,9,10 |
Wayne Roberts |
0:987d9022c152 | 456 | uint8_t _todo : 1; // 11 |
Wayne Roberts |
0:987d9022c152 | 457 | uint8_t tx_dbm : 5; // 12,13,14,15,16 |
Wayne Roberts |
0:987d9022c152 | 458 | uint16_t todo_ :15; // 17 -> 31 |
Wayne Roberts |
0:987d9022c152 | 459 | } bits; |
Wayne Roberts |
0:987d9022c152 | 460 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 461 | } txParamsC_t; // at 0x00f30080 |
Wayne Roberts |
0:987d9022c152 | 462 | |
Wayne Roberts |
0:987d9022c152 | 463 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 464 | struct { |
Wayne Roberts |
0:987d9022c152 | 465 | uint32_t todo_ :28; // 0 -> 27 |
Wayne Roberts |
0:987d9022c152 | 466 | uint8_t PaSel : 1; // 28 |
Wayne Roberts |
0:987d9022c152 | 467 | uint8_t todo : 3; // 29,30,31 |
Wayne Roberts |
0:987d9022c152 | 468 | } bits; |
Wayne Roberts |
0:987d9022c152 | 469 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 470 | } txParamsD_t; // at 0x00f30088 |
Wayne Roberts |
0:987d9022c152 | 471 | |
Wayne Roberts |
0:987d9022c152 | 472 | enum { |
Wayne Roberts |
0:987d9022c152 | 473 | /* 0 */ CMD_FAIL = 0, |
Wayne Roberts |
0:987d9022c152 | 474 | /* 1 */ CMD_PERR, |
Wayne Roberts |
0:987d9022c152 | 475 | /* 2 */ CMD_OK, |
Wayne Roberts |
0:987d9022c152 | 476 | /* 3 */ CMD_DAT |
Wayne Roberts |
0:987d9022c152 | 477 | }; |
Wayne Roberts |
0:987d9022c152 | 478 | |
Wayne Roberts |
0:987d9022c152 | 479 | enum { |
Wayne Roberts |
0:987d9022c152 | 480 | /* 0 */ PACKET_TYPE_NONE = 0, |
Wayne Roberts |
0:987d9022c152 | 481 | /* 1 */ PACKET_TYPE_GFSK, |
Wayne Roberts |
0:987d9022c152 | 482 | /* 2 */ PACKET_TYPE_LORA, |
Wayne Roberts |
0:987d9022c152 | 483 | }; |
Wayne Roberts |
0:987d9022c152 | 484 | |
Wayne Roberts |
0:987d9022c152 | 485 | typedef union { |
Wayne Roberts |
0:987d9022c152 | 486 | struct { |
Wayne Roberts |
0:987d9022c152 | 487 | uint32_t ___ : 2; // 0,1 |
Wayne Roberts |
0:987d9022c152 | 488 | uint32_t TxDone : 1; // 2 |
Wayne Roberts |
0:987d9022c152 | 489 | uint32_t RxDone : 1; // 3 |
Wayne Roberts |
0:987d9022c152 | 490 | uint32_t PreambleDetected : 1; // 4 |
Wayne Roberts |
0:987d9022c152 | 491 | uint32_t SyncHeaderValid : 1; // 5 |
Wayne Roberts |
0:987d9022c152 | 492 | uint32_t HeaderErr : 1; // 6 |
Wayne Roberts |
0:987d9022c152 | 493 | uint32_t Err : 1; // 7 |
Wayne Roberts |
0:987d9022c152 | 494 | uint32_t CadDone : 1; // 8 |
Wayne Roberts |
0:987d9022c152 | 495 | uint32_t CadDetected : 1; // 9 |
Wayne Roberts |
0:987d9022c152 | 496 | uint32_t Timeout : 1; // 10 |
Wayne Roberts |
0:987d9022c152 | 497 | uint32_t __ : 8; // 11,12,13,14,15,16,17,18 |
Wayne Roberts |
0:987d9022c152 | 498 | uint32_t GNSSDone : 1; // 19 |
Wayne Roberts |
0:987d9022c152 | 499 | uint32_t WifiDone : 1; // 20 |
Wayne Roberts |
0:987d9022c152 | 500 | uint32_t lowBat : 1; // 21 |
Wayne Roberts |
0:987d9022c152 | 501 | uint32_t CmdErr : 1; // 22 |
Wayne Roberts |
0:987d9022c152 | 502 | uint32_t Error : 1; // 23 |
Wayne Roberts |
0:987d9022c152 | 503 | uint32_t FskLenError : 1; // 24 |
Wayne Roberts |
0:987d9022c152 | 504 | uint32_t FskAddrError : 1; // 25 |
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0:987d9022c152 | 505 | uint32_t _ : 6; // 26,27,28,29,30,31 |
Wayne Roberts |
0:987d9022c152 | 506 | } bits; |
Wayne Roberts |
0:987d9022c152 | 507 | uint32_t dword; |
Wayne Roberts |
0:987d9022c152 | 508 | } irq_t; |
Wayne Roberts |
0:987d9022c152 | 509 | |
Wayne Roberts |
0:987d9022c152 | 510 | typedef union { |
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0:987d9022c152 | 511 | struct { |
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0:987d9022c152 | 512 | uint16_t bootloader : 1; // 0 |
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0:987d9022c152 | 513 | uint16_t chipMode : 3; // 1,2,3 |
Wayne Roberts |
0:987d9022c152 | 514 | uint16_t resetStatus : 4; // 4,5,6,7 |
Wayne Roberts |
0:987d9022c152 | 515 | uint16_t intActive : 1; // 8 |
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0:987d9022c152 | 516 | uint16_t cmdStatus : 3; // 9,10,11 |
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0:987d9022c152 | 517 | uint16_t rfu : 4; // 12,13,14,15 |
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0:987d9022c152 | 518 | } bits; |
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0:987d9022c152 | 519 | uint16_t word; |
Wayne Roberts |
0:987d9022c152 | 520 | } stat_t; |
Wayne Roberts |
0:987d9022c152 | 521 | |
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0:987d9022c152 | 522 | typedef union { |
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0:987d9022c152 | 523 | struct { |
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0:987d9022c152 | 524 | uint16_t lf_rc_calib : 1; // 0 |
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0:987d9022c152 | 525 | uint16_t hf_rc_calib : 1; // 1 |
Wayne Roberts |
0:987d9022c152 | 526 | uint16_t adc_calib : 1; // 2 |
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0:987d9022c152 | 527 | uint16_t pll_calib : 1; // 3 |
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0:987d9022c152 | 528 | uint16_t img_calib : 1; // 4 |
Wayne Roberts |
0:987d9022c152 | 529 | uint16_t hf_xosc_start_ : 1; // 5 |
Wayne Roberts |
0:987d9022c152 | 530 | uint16_t lf_xosc_start : 1; // 6 |
Wayne Roberts |
0:987d9022c152 | 531 | uint16_t pll_lock : 1; // 7 |
Wayne Roberts |
0:987d9022c152 | 532 | uint16_t rx_adc_offset : 1; // 8 |
Wayne Roberts |
0:987d9022c152 | 533 | uint16_t rfu : 7; // 9,10,11,12,13,14,15 |
Wayne Roberts |
0:987d9022c152 | 534 | } bits; |
Wayne Roberts |
0:987d9022c152 | 535 | uint16_t word; |
Wayne Roberts |
0:987d9022c152 | 536 | } ErrorStat_t; |
Wayne Roberts |
0:987d9022c152 | 537 | |
Wayne Roberts |
0:987d9022c152 | 538 | typedef union { |
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0:987d9022c152 | 539 | struct { |
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0:987d9022c152 | 540 | uint8_t signal : 2; // 0,1 |
Wayne Roberts |
0:987d9022c152 | 541 | uint8_t datarate : 6; // 2,3,4,5,6,7 |
Wayne Roberts |
0:987d9022c152 | 542 | } bits; |
Wayne Roberts |
0:987d9022c152 | 543 | uint16_t octet; |
Wayne Roberts |
0:987d9022c152 | 544 | } wifiType_t; |
Wayne Roberts |
0:987d9022c152 | 545 | |
Wayne Roberts |
0:987d9022c152 | 546 | typedef union { |
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0:987d9022c152 | 547 | struct { |
Wayne Roberts |
0:987d9022c152 | 548 | uint8_t channelID : 4; // 0,1,2,3 |
Wayne Roberts |
0:987d9022c152 | 549 | uint8_t macValidationID : 4; // 4,5,6,7 |
Wayne Roberts |
0:987d9022c152 | 550 | } bits; |
Wayne Roberts |
0:987d9022c152 | 551 | uint16_t octet; |
Wayne Roberts |
0:987d9022c152 | 552 | } wifiChanInfo_t; |
Wayne Roberts |
0:987d9022c152 | 553 | |
Wayne Roberts |
0:987d9022c152 | 554 | typedef enum { |
Wayne Roberts |
0:987d9022c152 | 555 | CHIPMODE_NONE = 0, |
Wayne Roberts |
0:987d9022c152 | 556 | CHIPMODE_RX, |
Wayne Roberts |
0:987d9022c152 | 557 | CHIPMODE_TX |
Wayne Roberts |
0:987d9022c152 | 558 | } chipMote_e; |
Wayne Roberts |
0:987d9022c152 | 559 | |
Wayne Roberts |
0:987d9022c152 | 560 | class SX1265 { |
Wayne Roberts |
0:987d9022c152 | 561 | public: |
Wayne Roberts |
0:987d9022c152 | 562 | SX1265(SPI&, PinName nss, PinName busy, PinName dio9, PinName nrst, uint32_t default_irqs = 0x3ffffff, unsigned tcxoTimeout = 2048, uint8_t tcxoVolts = TCXO_VOLTS_2v7); |
Wayne Roberts |
0:987d9022c152 | 563 | static Callback<void()> dio9_topHalf; // low latency ISR context |
Wayne Roberts |
0:987d9022c152 | 564 | uint16_t xfer(uint16_t opcode, uint16_t writeLen, uint16_t readLen, uint8_t* buf); |
Wayne Roberts |
0:987d9022c152 | 565 | uint32_t service(void); |
Wayne Roberts |
0:987d9022c152 | 566 | void hw_reset(void); |
Wayne Roberts |
0:987d9022c152 | 567 | const char *cmdStatus_toString(uint8_t); |
Wayne Roberts |
0:987d9022c152 | 568 | uint8_t setMHz(float); |
Wayne Roberts |
0:987d9022c152 | 569 | float getMHz(void); |
Wayne Roberts |
0:987d9022c152 | 570 | void to_big_endian16(uint16_t in, uint8_t *out); |
Wayne Roberts |
0:987d9022c152 | 571 | void to_big_endian32(uint32_t in, uint8_t *out); |
Wayne Roberts |
0:987d9022c152 | 572 | void to_big_endian24(uint32_t in, uint8_t *out); |
Wayne Roberts |
0:987d9022c152 | 573 | uint32_t from_big_endian32(const uint8_t *in); |
Wayne Roberts |
0:987d9022c152 | 574 | //int memRegRead(uint32_t addr, uint16_t len_dwords, uint8_t *dest); |
Wayne Roberts |
0:987d9022c152 | 575 | int memRegRead(uint32_t addr, uint16_t len_dwords, uint32_t *dest); |
Wayne Roberts |
0:987d9022c152 | 576 | uint8_t getPacketType(void); |
Wayne Roberts |
0:987d9022c152 | 577 | void setPacketType(uint8_t); |
Wayne Roberts |
0:987d9022c152 | 578 | void start_tx(uint8_t pktLen); // tx_buf must be filled prior to calling |
Wayne Roberts |
0:987d9022c152 | 579 | |
Wayne Roberts |
0:987d9022c152 | 580 | Timer t; |
Wayne Roberts |
0:987d9022c152 | 581 | ErrorStat_t errorStat; |
Wayne Roberts |
0:987d9022c152 | 582 | |
Wayne Roberts |
0:987d9022c152 | 583 | //! RF transmit packet buffer |
Wayne Roberts |
0:987d9022c152 | 584 | uint8_t tx_buf[256]; // lora fifo size |
Wayne Roberts |
0:987d9022c152 | 585 | |
Wayne Roberts |
0:987d9022c152 | 586 | //! RF receive packet buffer |
Wayne Roberts |
0:987d9022c152 | 587 | uint8_t rx_buf[256]; // lora fifo size |
Wayne Roberts |
0:987d9022c152 | 588 | |
Wayne Roberts |
0:987d9022c152 | 589 | Callback<void()> chipModeChange; // read chipMode_e chipMode |
Wayne Roberts |
0:987d9022c152 | 590 | Callback<void()> txDone; // user context |
Wayne Roberts |
0:987d9022c152 | 591 | void (*cadDone)(bool detected); // user context |
Wayne Roberts |
0:987d9022c152 | 592 | void (*rxDone)(uint8_t size, float rssi, float snr); // user context |
Wayne Roberts |
0:987d9022c152 | 593 | void (*timeout)(bool tx); // user context |
Wayne Roberts |
0:987d9022c152 | 594 | unsigned txTimeout; |
Wayne Roberts |
0:987d9022c152 | 595 | uint16_t err_opcode; |
Wayne Roberts |
0:987d9022c152 | 596 | uint8_t rx_buf_offset; |
Wayne Roberts |
0:987d9022c152 | 597 | chipMote_e chipMode; |
Wayne Roberts |
0:987d9022c152 | 598 | |
Wayne Roberts |
0:987d9022c152 | 599 | void GetPaConfig(uint8_t*); /* for read-modify-write */ |
Wayne Roberts |
0:987d9022c152 | 600 | void GetLoRaModulationParameters(uint8_t*); /* for read-modify-write */ |
Wayne Roberts |
0:987d9022c152 | 601 | void GetLoRaPacketParameters(uint8_t*); /* for read-modify-write */ |
Wayne Roberts |
0:987d9022c152 | 602 | void GetGfskModulationParameters(uint8_t*); /* for read-modify-write */ |
Wayne Roberts |
0:987d9022c152 | 603 | void GetGfskPacketParameters(uint8_t*); /* for read-modify-write */ |
Wayne Roberts |
0:987d9022c152 | 604 | |
Wayne Roberts |
0:987d9022c152 | 605 | private: |
Wayne Roberts |
0:987d9022c152 | 606 | SPI& spi; |
Wayne Roberts |
0:987d9022c152 | 607 | DigitalOut nss; |
Wayne Roberts |
0:987d9022c152 | 608 | DigitalIn busy; |
Wayne Roberts |
0:987d9022c152 | 609 | InterruptIn dio9; |
Wayne Roberts |
0:987d9022c152 | 610 | DigitalInOut nrst; |
Wayne Roberts |
0:987d9022c152 | 611 | static void dio9isr(void); |
Wayne Roberts |
0:987d9022c152 | 612 | bool sleeping; |
Wayne Roberts |
0:987d9022c152 | 613 | uint16_t prev_opcode; |
Wayne Roberts |
0:987d9022c152 | 614 | uint16_t this_opcode; |
Wayne Roberts |
0:987d9022c152 | 615 | bool inService; |
Wayne Roberts |
0:987d9022c152 | 616 | void enable_default_irqs_(void); |
Wayne Roberts |
0:987d9022c152 | 617 | |
Wayne Roberts |
0:987d9022c152 | 618 | public: |
Wayne Roberts |
0:987d9022c152 | 619 | uint32_t default_irqs; |
Wayne Roberts |
0:987d9022c152 | 620 | |
Wayne Roberts |
0:987d9022c152 | 621 | private: |
Wayne Roberts |
0:987d9022c152 | 622 | unsigned tcxoStartDelay; |
Wayne Roberts |
0:987d9022c152 | 623 | uint8_t tcxoVolts; |
Wayne Roberts |
0:987d9022c152 | 624 | uint8_t rxArgs[3]; |
Wayne Roberts |
0:987d9022c152 | 625 | }; |
Wayne Roberts |
0:987d9022c152 | 626 | |
Wayne Roberts |
0:987d9022c152 | 627 | #endif /* SX1265_H */ |
Wayne Roberts |
0:987d9022c152 | 628 |