wayne roberts / Mbed OS chat_sx127x

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Dependencies:   SX127x

main.cpp@25:0479cbc2967b, 2020-04-06 (annotated)

Committer:
dudmuck
Date:
Mon Apr 06 17:25:46 2020 +0000
Revision:
25:0479cbc2967b
Parent:
24:9ba45aa15b53 
update mbed-os to latest

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dudmuck 1:1cd0afbed23c 1 #include "sx127x_lora.h"
dudmuck 1:1cd0afbed23c 2 #include "sx127x_fsk.h"
dudmuck 19:be8a8b0e7320 3 #define __STDC_FORMAT_MACROS
dudmuck 19:be8a8b0e7320 4 #include <inttypes.h>
dudmuck 22:2005df80c8a8 5
dudmuck 18:9530d682fd9a 6 //#include "kermit.h"
dudmuck 0:be215de91a68 7
dudmuck 13:c73caaee93a5 8 //#define FSK_PER
dudmuck 10:d9bb2ce57f05 9 //#define START_EIGER_RX
dudmuck 10:d9bb2ce57f05 10 //#define START_EIGER_TX
dudmuck 21:b84a77dfb43c 11 //#define START_OOK_TX_TEST
dudmuck 10:d9bb2ce57f05 12
dudmuck 10:d9bb2ce57f05 13 DigitalOut led1(LED1);
dudmuck 0:be215de91a68 14 Serial pc(USBTX, USBRX);
dudmuck 0:be215de91a68 15
dudmuck 0:be215de91a68 16 uint8_t tx_cnt;
dudmuck 0:be215de91a68 17 char pcbuf[64];
dudmuck 5:360069ec9953 18 int pcbuf_len;
dudmuck 0:be215de91a68 19
dudmuck 0:be215de91a68 20 typedef enum {
dudmuck 0:be215de91a68 21 APP_NONE = 0,
dudmuck 0:be215de91a68 22 APP_CHAT
dudmuck 0:be215de91a68 23 } app_e;
dudmuck 0:be215de91a68 24
dudmuck 0:be215de91a68 25 app_e app = APP_NONE;
dudmuck 0:be215de91a68 26
dudmuck 18:9530d682fd9a 27 #define FSK_LARGE_PKT_THRESHOLD 0x3f
dudmuck 7:c3c54f222ced 28
dudmuck 21:b84a77dfb43c 29 bool crc32_en; // ethcrc
dudmuck 21:b84a77dfb43c 30
dudmuck 21:b84a77dfb43c 31 /*********** cmd_ulrx()... ************/
dudmuck 21:b84a77dfb43c 32 typedef enum {
dudmuck 21:b84a77dfb43c 33 ULRX_STATE_OFF = 0,
dudmuck 21:b84a77dfb43c 34 ULRX_STATE_NEED_LENGTH,
dudmuck 21:b84a77dfb43c 35 ULRX_STATE_PAYLOAD,
dudmuck 21:b84a77dfb43c 36 ULRX_STATE_SYNC1
dudmuck 21:b84a77dfb43c 37 } ulrx_state_e;
dudmuck 21:b84a77dfb43c 38 ulrx_state_e ulrx_state = ULRX_STATE_OFF;
dudmuck 21:b84a77dfb43c 39 bool ulrx_enable;
dudmuck 21:b84a77dfb43c 40 /*********** ...cmd_ulrx() ************/
dudmuck 21:b84a77dfb43c 41
dudmuck 21:b84a77dfb43c 42 uint8_t rx_payload_idx;
dudmuck 21:b84a77dfb43c 43
dudmuck 21:b84a77dfb43c 44 /************** fsk modeReady isr... **********/
dudmuck 21:b84a77dfb43c 45 bool rx_payloadReady_int_en; // cmd_prrx()
dudmuck 21:b84a77dfb43c 46 #define N_RX_PKTS 32
dudmuck 21:b84a77dfb43c 47 #define RX_PKT_SIZE_LIMIT 32
dudmuck 21:b84a77dfb43c 48 uint8_t rx_pkts[N_RX_PKTS][RX_PKT_SIZE_LIMIT];
dudmuck 21:b84a77dfb43c 49 uint8_t n_rx_pkts;
dudmuck 21:b84a77dfb43c 50 /************** ...fsk modeReady isr **********/
dudmuck 21:b84a77dfb43c 51
dudmuck 21:b84a77dfb43c 52 #ifdef TARGET_STM
dudmuck 21:b84a77dfb43c 53 CRC_HandleTypeDef CrcHandle;
dudmuck 21:b84a77dfb43c 54 #endif /* TARGET_STM */
dudmuck 21:b84a77dfb43c 55
dudmuck 21:b84a77dfb43c 56 int rssi_polling_thresh; // 0 = polling off
dudmuck 18:9530d682fd9a 57 bool ook_test_en;
dudmuck 18:9530d682fd9a 58 bool poll_irq_en;
dudmuck 20:b11592c9ba5f 59 volatile RegIrqFlags2_t fsk_RegIrqFlags2_prev;
dudmuck 20:b11592c9ba5f 60 volatile RegIrqFlags1_t fsk_RegIrqFlags1_prev;
dudmuck 20:b11592c9ba5f 61 Timer rx_start_timer;
dudmuck 20:b11592c9ba5f 62 uint32_t secs_rx_start;
dudmuck 1:1cd0afbed23c 63
dudmuck 8:227605e4a760 64 /***************************** eiger per: *************************************************/
dudmuck 8:227605e4a760 65
dudmuck 18:9530d682fd9a 66 uint32_t num_cads;
dudmuck 18:9530d682fd9a 67 bool cadper_enable;
dudmuck 8:227605e4a760 68 bool per_en;
dudmuck 8:227605e4a760 69 float per_tx_delay = 0.1;
dudmuck 8:227605e4a760 70 int per_id;
dudmuck 18:9530d682fd9a 71 uint32_t PacketTxCnt, PacketTxCntEnd;
dudmuck 8:227605e4a760 72 uint32_t PacketPerOkCnt;
dudmuck 8:227605e4a760 73 int PacketRxSequencePrev;
dudmuck 8:227605e4a760 74 uint32_t PacketPerKoCnt;
dudmuck 8:227605e4a760 75 uint32_t PacketNormalCnt;
dudmuck 8:227605e4a760 76 Timeout per_timeout;
dudmuck 8:227605e4a760 77
dudmuck 18:9530d682fd9a 78
dudmuck 18:9530d682fd9a 79
dudmuck 0:be215de91a68 80 /******************************************************************************/
dudmuck 9:2f13a9ef27b4 81 #ifdef TARGET_MTS_MDOT_F411RE
dudmuck 9:2f13a9ef27b4 82 // mosi, miso, sclk, cs, rst, dio0, dio1
dudmuck 23:821b4f426ee6 83 //SX127x radio(LORA_MOSI, LORA_MISO, LORA_SCK, LORA_NSS, LORA_RESET, LORA_DIO0, LORA_DIO1);
dudmuck 23:821b4f426ee6 84 SPI spi(LORA_MOSI, LORA_MISO, LORA_SCK); // mosi, miso, sclk
dudmuck 23:821b4f426ee6 85 // dio0, dio1, nss, spi, rst
dudmuck 23:821b4f426ee6 86 SX127x radio(LORA_DIO0, LORA_DIO1, LORA_NSS, spi, LORA_RESET); // multitech mdot
dudmuck 23:821b4f426ee6 87
dudmuck 23:821b4f426ee6 88 DigitalIn dio3(LORA_DIO3);
dudmuck 9:2f13a9ef27b4 89 DigitalOut txctl(LORA_TXCTL);
dudmuck 9:2f13a9ef27b4 90 DigitalOut rxctl(LORA_RXCTL);
dudmuck 9:2f13a9ef27b4 91
dudmuck 9:2f13a9ef27b4 92 void rfsw_callback()
dudmuck 9:2f13a9ef27b4 93 {
dudmuck 9:2f13a9ef27b4 94 /* SKY13350 */
dudmuck 9:2f13a9ef27b4 95 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) { // start of transmission
dudmuck 9:2f13a9ef27b4 96 txctl = 1;
dudmuck 9:2f13a9ef27b4 97 rxctl = 0;
dudmuck 9:2f13a9ef27b4 98 } else { // reception:
dudmuck 9:2f13a9ef27b4 99 txctl = 0;
dudmuck 9:2f13a9ef27b4 100 rxctl = 1;
dudmuck 9:2f13a9ef27b4 101 }
dudmuck 9:2f13a9ef27b4 102 }
dudmuck 9:2f13a9ef27b4 103
dudmuck 15:c69b942685ea 104 #define FSK_RSSI_OFFSET 0
dudmuck 15:c69b942685ea 105 #define FSK_RSSI_SMOOTHING 2
dudmuck 20:b11592c9ba5f 106 DigitalIn dio2(LORA_DIO2);
dudmuck 20:b11592c9ba5f 107 DigitalIn dio4(LORA_DIO4);
dudmuck 15:c69b942685ea 108
Wayne Roberts 24:9ba45aa15b53 109 #elif defined(TARGET_DISCO_L072CZ_LRWAN1) /********************* ...mDot **********************/
dudmuck 23:821b4f426ee6 110 /* Murata TypeABZ discovery board B-L072Z-LRWAN1 */
dudmuck 22:2005df80c8a8 111 // mosi, miso, sclk, cs, rst, dio0, dio1
dudmuck 23:821b4f426ee6 112 //SX127x radio(PA_7, PA_6, PB_3, PA_15, PC_0, PB_4, PB_1);
dudmuck 23:821b4f426ee6 113
dudmuck 23:821b4f426ee6 114 SPI spi(PA_7, PA_6, PB_3); // mosi, miso, sclk
dudmuck 23:821b4f426ee6 115 // dio0, dio1, nss, spi, rst
dudmuck 23:821b4f426ee6 116 SX127x radio(PB_4, PB_1, PA_15, spi, PC_0); // sx1276 arduino shield
dudmuck 23:821b4f426ee6 117
dudmuck 22:2005df80c8a8 118 DigitalIn dio2(PB_0);
dudmuck 22:2005df80c8a8 119 DigitalIn dio3(PC_13);
dudmuck 22:2005df80c8a8 120 #define FSK_RSSI_OFFSET 0
dudmuck 22:2005df80c8a8 121 #define FSK_RSSI_SMOOTHING 2
dudmuck 22:2005df80c8a8 122 #define CRF1 PA_1
dudmuck 22:2005df80c8a8 123 #define CRF2 PC_2
dudmuck 22:2005df80c8a8 124 #define CRF3 PC_1
dudmuck 22:2005df80c8a8 125 DigitalOut Vctl1(CRF1);
dudmuck 22:2005df80c8a8 126 DigitalOut Vctl2(CRF2);
dudmuck 22:2005df80c8a8 127 DigitalOut Vctl3(CRF3);
dudmuck 22:2005df80c8a8 128
dudmuck 22:2005df80c8a8 129 void rfsw_callback()
dudmuck 22:2005df80c8a8 130 {
dudmuck 22:2005df80c8a8 131 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
dudmuck 22:2005df80c8a8 132 Vctl1 = 0;
dudmuck 22:2005df80c8a8 133 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 22:2005df80c8a8 134 Vctl2 = 0;
dudmuck 22:2005df80c8a8 135 Vctl3 = 1;
dudmuck 22:2005df80c8a8 136 } else {
dudmuck 22:2005df80c8a8 137 Vctl2 = 1;
dudmuck 22:2005df80c8a8 138 Vctl3 = 0;
dudmuck 22:2005df80c8a8 139 }
dudmuck 22:2005df80c8a8 140 } else {
dudmuck 22:2005df80c8a8 141 if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER || radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER_SINGLE)
dudmuck 22:2005df80c8a8 142 Vctl1 = 1;
dudmuck 22:2005df80c8a8 143 else
dudmuck 22:2005df80c8a8 144 Vctl1 = 0;
dudmuck 22:2005df80c8a8 145
dudmuck 22:2005df80c8a8 146 Vctl2 = 0;
dudmuck 22:2005df80c8a8 147 Vctl3 = 0;
dudmuck 22:2005df80c8a8 148 }
dudmuck 22:2005df80c8a8 149 }
dudmuck 22:2005df80c8a8 150 #else /***************** ..Type-ABZ and L073RZ *************/
dudmuck 23:821b4f426ee6 151 SPI spi(D11, D12, D13); // mosi, miso, sclk
dudmuck 23:821b4f426ee6 152 // dio0, dio1, nss, spi, rst
dudmuck 23:821b4f426ee6 153 SX127x radio( D2, D3, D10, spi, A0); // sx1276 arduino shield
dudmuck 0:be215de91a68 154
dudmuck 15:c69b942685ea 155 // for SX1276 arduino shield:
dudmuck 7:c3c54f222ced 156 #ifdef TARGET_LPC11U6X
dudmuck 15:c69b942685ea 157 DigitalInOut rfsw(P0_23);
dudmuck 7:c3c54f222ced 158 #else
dudmuck 15:c69b942685ea 159 DigitalInOut rfsw(A4);
dudmuck 7:c3c54f222ced 160 #endif
dudmuck 6:fe16f96ee335 161
dudmuck 21:b84a77dfb43c 162 InterruptIn dio0int(D2);
dudmuck 21:b84a77dfb43c 163 InterruptIn dio1int(D3);
dudmuck 21:b84a77dfb43c 164 InterruptIn dio2int(D4);
dudmuck 21:b84a77dfb43c 165 InterruptIn dio4int(D8);
dudmuck 14:c57ea544dc18 166 DigitalIn dio2(D4);
dudmuck 21:b84a77dfb43c 167 DigitalIn dio3(D5);
dudmuck 20:b11592c9ba5f 168 DigitalIn dio4(D8);
dudmuck 22:2005df80c8a8 169 DigitalIn dio5(D9);
dudmuck 22:2005df80c8a8 170
dudmuck 22:2005df80c8a8 171 #if defined(TARGET_STM)
dudmuck 21:b84a77dfb43c 172 DigitalOut pc3(PC_3); // nucleo corner pin for misc indication
dudmuck 21:b84a77dfb43c 173 #endif
dudmuck 21:b84a77dfb43c 174
dudmuck 6:fe16f96ee335 175 void rfsw_callback()
dudmuck 6:fe16f96ee335 176 {
dudmuck 6:fe16f96ee335 177 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER)
dudmuck 6:fe16f96ee335 178 rfsw = 1;
dudmuck 6:fe16f96ee335 179 else
dudmuck 6:fe16f96ee335 180 rfsw = 0;
dudmuck 6:fe16f96ee335 181 }
dudmuck 6:fe16f96ee335 182
dudmuck 15:c69b942685ea 183 #define FSK_RSSI_OFFSET 5
dudmuck 15:c69b942685ea 184 #define FSK_RSSI_SMOOTHING 2
dudmuck 15:c69b942685ea 185
dudmuck 15:c69b942685ea 186 typedef enum {
dudmuck 15:c69b942685ea 187 SHIELD_TYPE_NONE = 0,
dudmuck 15:c69b942685ea 188 SHIELD_TYPE_LAS,
dudmuck 15:c69b942685ea 189 SHIELD_TYPE_MAS,
dudmuck 15:c69b942685ea 190 } shield_type_e;
dudmuck 15:c69b942685ea 191 shield_type_e shield_type;
dudmuck 15:c69b942685ea 192
dudmuck 9:2f13a9ef27b4 193 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 9:2f13a9ef27b4 194
dudmuck 9:2f13a9ef27b4 195 SX127x_fsk fsk(radio);
dudmuck 9:2f13a9ef27b4 196 SX127x_lora lora(radio);
dudmuck 18:9530d682fd9a 197 //Kermit kermit(lora);
dudmuck 9:2f13a9ef27b4 198
Wayne Roberts 24:9ba45aa15b53 199 #ifndef TARGET_DISCO_L072CZ_LRWAN1
dudmuck 20:b11592c9ba5f 200 volatile bool saved_dio4;
dudmuck 22:2005df80c8a8 201 #endif
dudmuck 20:b11592c9ba5f 202
dudmuck 21:b84a77dfb43c 203 uint32_t crcTable[256];
dudmuck 21:b84a77dfb43c 204 void make_crc_table()
dudmuck 21:b84a77dfb43c 205 {
dudmuck 21:b84a77dfb43c 206 const uint32_t POLYNOMIAL = 0xEDB88320;
dudmuck 21:b84a77dfb43c 207 uint32_t remainder;
dudmuck 21:b84a77dfb43c 208 uint8_t b = 0;
dudmuck 21:b84a77dfb43c 209 do{
dudmuck 21:b84a77dfb43c 210 // Start with the data byte
dudmuck 21:b84a77dfb43c 211 remainder = b;
dudmuck 21:b84a77dfb43c 212 for (unsigned long bit = 8; bit > 0; --bit)
dudmuck 21:b84a77dfb43c 213 {
dudmuck 21:b84a77dfb43c 214 if (remainder & 1)
dudmuck 21:b84a77dfb43c 215 remainder = (remainder >> 1) ^ POLYNOMIAL;
dudmuck 21:b84a77dfb43c 216 else
dudmuck 21:b84a77dfb43c 217 remainder = (remainder >> 1);
dudmuck 21:b84a77dfb43c 218 }
dudmuck 21:b84a77dfb43c 219 crcTable[(size_t)b] = remainder;
dudmuck 21:b84a77dfb43c 220 } while(0 != ++b);
dudmuck 21:b84a77dfb43c 221 }
dudmuck 21:b84a77dfb43c 222
dudmuck 21:b84a77dfb43c 223 uint32_t gen_crc(const uint8_t *p, size_t n)
dudmuck 21:b84a77dfb43c 224 {
dudmuck 21:b84a77dfb43c 225 uint32_t crc = 0xffffffff;
dudmuck 21:b84a77dfb43c 226 size_t i;
dudmuck 21:b84a77dfb43c 227 for(i = 0; i < n; i++) {
dudmuck 21:b84a77dfb43c 228 crc = crcTable[*p++ ^ (crc&0xff)] ^ (crc>>8);
dudmuck 21:b84a77dfb43c 229 }
dudmuck 21:b84a77dfb43c 230
dudmuck 21:b84a77dfb43c 231 return(~crc);
dudmuck 21:b84a77dfb43c 232 }
dudmuck 21:b84a77dfb43c 233
dudmuck 21:b84a77dfb43c 234
dudmuck 0:be215de91a68 235 void printLoraIrqs_(bool clear)
dudmuck 0:be215de91a68 236 {
dudmuck 0:be215de91a68 237 //in radio class -- RegIrqFlags_t RegIrqFlags;
dudmuck 0:be215de91a68 238
dudmuck 0:be215de91a68 239 //already read RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 0:be215de91a68 240 printf("\r\nIrqFlags:");
dudmuck 1:1cd0afbed23c 241 if (lora.RegIrqFlags.bits.CadDetected)
dudmuck 0:be215de91a68 242 printf("CadDetected ");
dudmuck 1:1cd0afbed23c 243 if (lora.RegIrqFlags.bits.FhssChangeChannel) {
dudmuck 0:be215de91a68 244 //radio.RegHopChannel.octet = radio.read_reg(REG_LR_HOPCHANNEL);
dudmuck 1:1cd0afbed23c 245 printf("FhssChangeChannel:%d ", lora.RegHopChannel.bits.FhssPresentChannel);
dudmuck 0:be215de91a68 246 }
dudmuck 1:1cd0afbed23c 247 if (lora.RegIrqFlags.bits.CadDone)
dudmuck 0:be215de91a68 248 printf("CadDone ");
dudmuck 1:1cd0afbed23c 249 if (lora.RegIrqFlags.bits.TxDone)
dudmuck 0:be215de91a68 250 printf("TxDone ");
dudmuck 1:1cd0afbed23c 251 if (lora.RegIrqFlags.bits.ValidHeader)
dudmuck 0:be215de91a68 252 printf("ValidHeader ");
dudmuck 1:1cd0afbed23c 253 if (lora.RegIrqFlags.bits.PayloadCrcError)
dudmuck 0:be215de91a68 254 printf("PayloadCrcError ");
dudmuck 1:1cd0afbed23c 255 if (lora.RegIrqFlags.bits.RxDone)
dudmuck 0:be215de91a68 256 printf("RxDone ");
dudmuck 1:1cd0afbed23c 257 if (lora.RegIrqFlags.bits.RxTimeout)
dudmuck 0:be215de91a68 258 printf("RxTimeout ");
dudmuck 0:be215de91a68 259
dudmuck 0:be215de91a68 260 printf("\r\n");
dudmuck 0:be215de91a68 261
dudmuck 0:be215de91a68 262 if (clear)
dudmuck 1:1cd0afbed23c 263 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 0:be215de91a68 264
dudmuck 0:be215de91a68 265 }
dudmuck 0:be215de91a68 266
dudmuck 1:1cd0afbed23c 267 void lora_printCodingRate(bool from_rx)
dudmuck 0:be215de91a68 268 {
dudmuck 1:1cd0afbed23c 269 uint8_t d = lora.getCodingRate(from_rx);
dudmuck 0:be215de91a68 270 printf("CodingRate:");
dudmuck 0:be215de91a68 271 switch (d) {
dudmuck 0:be215de91a68 272 case 1: printf("4/5 "); break;
dudmuck 0:be215de91a68 273 case 2: printf("4/6 "); break;
dudmuck 0:be215de91a68 274 case 3: printf("4/7 "); break;
dudmuck 0:be215de91a68 275 case 4: printf("4/8 "); break;
dudmuck 0:be215de91a68 276 default:
dudmuck 0:be215de91a68 277 printf("%d ", d);
dudmuck 0:be215de91a68 278 break;
dudmuck 0:be215de91a68 279 }
dudmuck 0:be215de91a68 280 }
dudmuck 0:be215de91a68 281
dudmuck 1:1cd0afbed23c 282 void lora_printHeaderMode()
dudmuck 0:be215de91a68 283 {
dudmuck 1:1cd0afbed23c 284 if (lora.getHeaderMode())
dudmuck 0:be215de91a68 285 printf("implicit ");
dudmuck 0:be215de91a68 286 else
dudmuck 0:be215de91a68 287 printf("explicit ");
dudmuck 0:be215de91a68 288 }
dudmuck 0:be215de91a68 289
dudmuck 1:1cd0afbed23c 290 void lora_printBw()
dudmuck 0:be215de91a68 291 {
dudmuck 19:be8a8b0e7320 292 (void)lora.getBw();
dudmuck 0:be215de91a68 293
dudmuck 0:be215de91a68 294 printf("Bw:");
dudmuck 0:be215de91a68 295 if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 296 switch (lora.RegModemConfig.sx1276bits.Bw) {
dudmuck 0:be215de91a68 297 case 0: printf("7.8KHz "); break;
dudmuck 0:be215de91a68 298 case 1: printf("10.4KHz "); break;
dudmuck 0:be215de91a68 299 case 2: printf("15.6KHz "); break;
dudmuck 0:be215de91a68 300 case 3: printf("20.8KHz "); break;
dudmuck 0:be215de91a68 301 case 4: printf("31.25KHz "); break;
dudmuck 0:be215de91a68 302 case 5: printf("41.7KHz "); break;
dudmuck 0:be215de91a68 303 case 6: printf("62.5KHz "); break;
dudmuck 0:be215de91a68 304 case 7: printf("125KHz "); break;
dudmuck 0:be215de91a68 305 case 8: printf("250KHz "); break;
dudmuck 0:be215de91a68 306 case 9: printf("500KHz "); break;
dudmuck 1:1cd0afbed23c 307 default: printf("%x ", lora.RegModemConfig.sx1276bits.Bw); break;
dudmuck 0:be215de91a68 308 }
dudmuck 0:be215de91a68 309 } else if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 310 switch (lora.RegModemConfig.sx1272bits.Bw) {
dudmuck 0:be215de91a68 311 case 0: printf("125KHz "); break;
dudmuck 0:be215de91a68 312 case 1: printf("250KHz "); break;
dudmuck 0:be215de91a68 313 case 2: printf("500KHz "); break;
dudmuck 0:be215de91a68 314 case 3: printf("11b "); break;
dudmuck 0:be215de91a68 315 }
dudmuck 0:be215de91a68 316 }
dudmuck 0:be215de91a68 317 }
dudmuck 0:be215de91a68 318
dudmuck 1:1cd0afbed23c 319 void lora_printAllBw()
dudmuck 0:be215de91a68 320 {
dudmuck 0:be215de91a68 321 int i, s;
dudmuck 0:be215de91a68 322
dudmuck 0:be215de91a68 323 if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 324 s = lora.RegModemConfig.sx1276bits.Bw;
dudmuck 0:be215de91a68 325 for (i = 0; i < 10; i++ ) {
dudmuck 1:1cd0afbed23c 326 lora.RegModemConfig.sx1276bits.Bw = i;
dudmuck 0:be215de91a68 327 printf("%d ", i);
dudmuck 1:1cd0afbed23c 328 lora_printBw();
dudmuck 0:be215de91a68 329 printf("\r\n");
dudmuck 0:be215de91a68 330 }
dudmuck 1:1cd0afbed23c 331 lora.RegModemConfig.sx1276bits.Bw = s;
dudmuck 0:be215de91a68 332 } else if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 333 s = lora.RegModemConfig.sx1272bits.Bw;
dudmuck 0:be215de91a68 334 for (i = 0; i < 3; i++ ) {
dudmuck 1:1cd0afbed23c 335 lora.RegModemConfig.sx1272bits.Bw = i;
dudmuck 0:be215de91a68 336 printf("%d ", i);
dudmuck 1:1cd0afbed23c 337 lora_printBw();
dudmuck 0:be215de91a68 338 printf("\r\n");
dudmuck 0:be215de91a68 339 }
dudmuck 1:1cd0afbed23c 340 lora.RegModemConfig.sx1272bits.Bw = s;
dudmuck 0:be215de91a68 341 }
dudmuck 0:be215de91a68 342 }
dudmuck 0:be215de91a68 343
dudmuck 1:1cd0afbed23c 344 void lora_printSf()
dudmuck 0:be215de91a68 345 {
dudmuck 0:be215de91a68 346 // spreading factor same between sx127[26]
dudmuck 1:1cd0afbed23c 347 printf("sf:%d ", lora.getSf());
dudmuck 0:be215de91a68 348 }
dudmuck 0:be215de91a68 349
dudmuck 1:1cd0afbed23c 350 void lora_printRxPayloadCrcOn()
dudmuck 0:be215de91a68 351 {
dudmuck 1:1cd0afbed23c 352 bool on = lora.getRxPayloadCrcOn();
dudmuck 18:9530d682fd9a 353 printf("RxPayloadCrcOn:%d = ", on);
dudmuck 18:9530d682fd9a 354 if (lora.getHeaderMode())
dudmuck 18:9530d682fd9a 355 printf("Rx/"); // implicit mode
dudmuck 18:9530d682fd9a 356
dudmuck 0:be215de91a68 357 if (on)
dudmuck 18:9530d682fd9a 358 printf("Tx CRC Enabled\r\n");
dudmuck 0:be215de91a68 359 else
dudmuck 18:9530d682fd9a 360 printf("Tx CRC disabled\r\n");
dudmuck 0:be215de91a68 361 }
dudmuck 0:be215de91a68 362
dudmuck 1:1cd0afbed23c 363 void lora_printTxContinuousMode()
dudmuck 0:be215de91a68 364 {
dudmuck 1:1cd0afbed23c 365 printf("TxContinuousMode:%d ", lora.RegModemConfig2.sx1276bits.TxContinuousMode); // same for sx1272 and sx1276
dudmuck 0:be215de91a68 366 }
dudmuck 0:be215de91a68 367
dudmuck 1:1cd0afbed23c 368 void lora_printAgcAutoOn()
dudmuck 0:be215de91a68 369 {
dudmuck 1:1cd0afbed23c 370 printf("AgcAutoOn:%d", lora.getAgcAutoOn());
dudmuck 0:be215de91a68 371 }
dudmuck 0:be215de91a68 372
dudmuck 1:1cd0afbed23c 373 void lora_print_dio()
dudmuck 0:be215de91a68 374 {
dudmuck 1:1cd0afbed23c 375 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 0:be215de91a68 376 printf("DIO5:");
dudmuck 0:be215de91a68 377 switch (radio.RegDioMapping2.bits.Dio5Mapping) {
dudmuck 0:be215de91a68 378 case 0: printf("ModeReady"); break;
dudmuck 0:be215de91a68 379 case 1: printf("ClkOut"); break;
dudmuck 0:be215de91a68 380 case 2: printf("ClkOut"); break;
dudmuck 0:be215de91a68 381 }
dudmuck 0:be215de91a68 382 printf(" DIO4:");
dudmuck 0:be215de91a68 383 switch (radio.RegDioMapping2.bits.Dio4Mapping) {
dudmuck 0:be215de91a68 384 case 0: printf("CadDetected"); break;
dudmuck 0:be215de91a68 385 case 1: printf("PllLock"); break;
dudmuck 0:be215de91a68 386 case 2: printf("PllLock"); break;
dudmuck 0:be215de91a68 387 }
dudmuck 0:be215de91a68 388 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 0:be215de91a68 389 printf(" DIO3:");
dudmuck 0:be215de91a68 390 switch (radio.RegDioMapping1.bits.Dio3Mapping) {
dudmuck 0:be215de91a68 391 case 0: printf("CadDone"); break;
dudmuck 0:be215de91a68 392 case 1: printf("ValidHeader"); break;
dudmuck 0:be215de91a68 393 case 2: printf("PayloadCrcError"); break;
dudmuck 0:be215de91a68 394 }
dudmuck 0:be215de91a68 395 printf(" DIO2:");
dudmuck 0:be215de91a68 396 switch (radio.RegDioMapping1.bits.Dio2Mapping) {
dudmuck 0:be215de91a68 397 case 0:
dudmuck 0:be215de91a68 398 case 1:
dudmuck 0:be215de91a68 399 case 2:
dudmuck 0:be215de91a68 400 printf("FhssChangeChannel");
dudmuck 0:be215de91a68 401 break;
dudmuck 0:be215de91a68 402 }
dudmuck 0:be215de91a68 403 printf(" DIO1:");
dudmuck 0:be215de91a68 404 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 0:be215de91a68 405 case 0: printf("RxTimeout"); break;
dudmuck 0:be215de91a68 406 case 1: printf("FhssChangeChannel"); break;
dudmuck 0:be215de91a68 407 case 2: printf("CadDetected"); break;
dudmuck 0:be215de91a68 408 }
dudmuck 0:be215de91a68 409 printf(" DIO0:");
dudmuck 0:be215de91a68 410 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 0:be215de91a68 411 case 0: printf("RxDone"); break;
dudmuck 0:be215de91a68 412 case 1: printf("TxDone"); break;
dudmuck 0:be215de91a68 413 case 2: printf("CadDone"); break;
dudmuck 0:be215de91a68 414 }
dudmuck 0:be215de91a68 415
dudmuck 0:be215de91a68 416 printf("\r\n");
dudmuck 0:be215de91a68 417 }
dudmuck 0:be215de91a68 418
dudmuck 1:1cd0afbed23c 419 void fsk_print_dio()
dudmuck 1:1cd0afbed23c 420 {
dudmuck 1:1cd0afbed23c 421 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 1:1cd0afbed23c 422
dudmuck 2:c6b23a43a9d9 423 printf("DIO5:");
dudmuck 1:1cd0afbed23c 424 switch (radio.RegDioMapping2.bits.Dio5Mapping) {
dudmuck 1:1cd0afbed23c 425 case 0: printf("ClkOut"); break;
dudmuck 1:1cd0afbed23c 426 case 1: printf("PllLock"); break;
dudmuck 1:1cd0afbed23c 427 case 2:
dudmuck 1:1cd0afbed23c 428 if (fsk.RegPktConfig2.bits.DataModePacket)
dudmuck 1:1cd0afbed23c 429 printf("data");
dudmuck 1:1cd0afbed23c 430 else {
dudmuck 1:1cd0afbed23c 431 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 432 printf("preamble");
dudmuck 1:1cd0afbed23c 433 else
dudmuck 1:1cd0afbed23c 434 printf("rssi");
dudmuck 1:1cd0afbed23c 435 }
dudmuck 1:1cd0afbed23c 436 break;
dudmuck 1:1cd0afbed23c 437 case 3: printf("ModeReady"); break;
dudmuck 1:1cd0afbed23c 438 }
dudmuck 1:1cd0afbed23c 439
dudmuck 2:c6b23a43a9d9 440 printf(" DIO4:");
dudmuck 1:1cd0afbed23c 441 switch (radio.RegDioMapping2.bits.Dio4Mapping) {
dudmuck 1:1cd0afbed23c 442 case 0: printf("temp/eol"); break;
dudmuck 1:1cd0afbed23c 443 case 1: printf("PllLock"); break;
dudmuck 1:1cd0afbed23c 444 case 2: printf("TimeOut"); break;
dudmuck 1:1cd0afbed23c 445 case 3:
dudmuck 1:1cd0afbed23c 446 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 447 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 448 printf("preamble");
dudmuck 1:1cd0afbed23c 449 else
dudmuck 1:1cd0afbed23c 450 printf("rssi");
dudmuck 1:1cd0afbed23c 451 } else
dudmuck 1:1cd0afbed23c 452 printf("ModeReady");
dudmuck 1:1cd0afbed23c 453 break;
dudmuck 1:1cd0afbed23c 454 }
dudmuck 1:1cd0afbed23c 455
dudmuck 1:1cd0afbed23c 456 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 1:1cd0afbed23c 457
dudmuck 2:c6b23a43a9d9 458 printf(" DIO3:");
dudmuck 21:b84a77dfb43c 459 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 21:b84a77dfb43c 460 if (radio.RegDioMapping1.bits.Dio3Mapping == 1)
dudmuck 21:b84a77dfb43c 461 printf("TxReady");
dudmuck 21:b84a77dfb43c 462 else
dudmuck 21:b84a77dfb43c 463 printf("FifoEmpty");
dudmuck 21:b84a77dfb43c 464 } else {
dudmuck 21:b84a77dfb43c 465 switch (radio.RegDioMapping1.bits.Dio3Mapping) {
dudmuck 21:b84a77dfb43c 466 case 0: printf("Timeout"); break;
dudmuck 21:b84a77dfb43c 467 case 1:
dudmuck 21:b84a77dfb43c 468 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 21:b84a77dfb43c 469 printf("preamble");
dudmuck 21:b84a77dfb43c 470 else
dudmuck 21:b84a77dfb43c 471 printf("rssi");
dudmuck 21:b84a77dfb43c 472 break;
dudmuck 21:b84a77dfb43c 473 case 2: printf("?automode_status?"); break;
dudmuck 21:b84a77dfb43c 474 case 3: printf("TempChange/LowBat"); break;
dudmuck 21:b84a77dfb43c 475 }
dudmuck 1:1cd0afbed23c 476 }
dudmuck 1:1cd0afbed23c 477
dudmuck 2:c6b23a43a9d9 478 printf(" DIO2:");
dudmuck 1:1cd0afbed23c 479 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 480 switch (radio.RegDioMapping1.bits.Dio2Mapping) {
dudmuck 1:1cd0afbed23c 481 case 0: printf("FifoFull"); break;
dudmuck 1:1cd0afbed23c 482 case 1: printf("RxReady"); break;
dudmuck 1:1cd0afbed23c 483 case 2: printf("FifoFull/rx-timeout"); break;
dudmuck 1:1cd0afbed23c 484 case 3: printf("FifoFull/rx-syncadrs"); break;
dudmuck 1:1cd0afbed23c 485 }
dudmuck 1:1cd0afbed23c 486 } else {
dudmuck 1:1cd0afbed23c 487 printf("Data");
dudmuck 1:1cd0afbed23c 488 }
dudmuck 1:1cd0afbed23c 489
dudmuck 2:c6b23a43a9d9 490 printf(" DIO1:");
dudmuck 1:1cd0afbed23c 491 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 492 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 1:1cd0afbed23c 493 case 0: printf("FifoThresh"); break;
dudmuck 1:1cd0afbed23c 494 case 1: printf("FifoEmpty"); break;
dudmuck 1:1cd0afbed23c 495 case 2: printf("FifoFull"); break;
dudmuck 1:1cd0afbed23c 496 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 497 }
dudmuck 1:1cd0afbed23c 498 } else {
dudmuck 1:1cd0afbed23c 499 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 1:1cd0afbed23c 500 case 0: printf("Dclk"); break;
dudmuck 1:1cd0afbed23c 501 case 1:
dudmuck 1:1cd0afbed23c 502 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 503 printf("preamble");
dudmuck 1:1cd0afbed23c 504 else
dudmuck 1:1cd0afbed23c 505 printf("rssi");
dudmuck 1:1cd0afbed23c 506 break;
dudmuck 1:1cd0afbed23c 507 case 2: printf("-2-"); break;
dudmuck 1:1cd0afbed23c 508 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 509 }
dudmuck 1:1cd0afbed23c 510 }
dudmuck 1:1cd0afbed23c 511
dudmuck 2:c6b23a43a9d9 512 printf(" DIO0:");
dudmuck 1:1cd0afbed23c 513 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 514 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 1:1cd0afbed23c 515 case 0: printf("PayloadReady/PacketSent"); break;
dudmuck 1:1cd0afbed23c 516 case 1: printf("CrcOk"); break;
dudmuck 1:1cd0afbed23c 517 case 2: printf("-2-"); break;
dudmuck 1:1cd0afbed23c 518 case 3: printf("TempChange/LowBat"); break;
dudmuck 1:1cd0afbed23c 519 }
dudmuck 1:1cd0afbed23c 520 } else {
dudmuck 1:1cd0afbed23c 521 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 1:1cd0afbed23c 522 case 0: printf("SyncAdrs/TxReady"); break;
dudmuck 1:1cd0afbed23c 523 case 1:
dudmuck 1:1cd0afbed23c 524 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 525 printf("preamble");
dudmuck 1:1cd0afbed23c 526 else
dudmuck 1:1cd0afbed23c 527 printf("rssi");
dudmuck 1:1cd0afbed23c 528 break;
dudmuck 1:1cd0afbed23c 529 case 2: printf("RxReady"); break;
dudmuck 1:1cd0afbed23c 530 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 531 }
dudmuck 1:1cd0afbed23c 532 }
dudmuck 1:1cd0afbed23c 533 printf("\r\n");
dudmuck 1:1cd0afbed23c 534 }
dudmuck 1:1cd0afbed23c 535
dudmuck 0:be215de91a68 536 void lora_print_status()
dudmuck 15:c69b942685ea 537 {
dudmuck 0:be215de91a68 538 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 0:be215de91a68 539 if (!radio.RegOpMode.bits.LongRangeMode) {
dudmuck 0:be215de91a68 540 printf("FSK\r\n");
dudmuck 0:be215de91a68 541 return;
dudmuck 0:be215de91a68 542 }
dudmuck 0:be215de91a68 543
dudmuck 1:1cd0afbed23c 544 lora_print_dio();
dudmuck 0:be215de91a68 545 printf("LoRa ");
dudmuck 0:be215de91a68 546
dudmuck 0:be215de91a68 547 // printing LoRa registers at 0x0d -> 0x3f
dudmuck 0:be215de91a68 548
dudmuck 1:1cd0afbed23c 549 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 1:1cd0afbed23c 550 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 0:be215de91a68 551
dudmuck 1:1cd0afbed23c 552 lora_printCodingRate(false); // false: transmitted coding rate
dudmuck 1:1cd0afbed23c 553 lora_printHeaderMode();
dudmuck 1:1cd0afbed23c 554 lora_printBw();
dudmuck 1:1cd0afbed23c 555 lora_printSf();
dudmuck 1:1cd0afbed23c 556 lora_printRxPayloadCrcOn();
dudmuck 0:be215de91a68 557 // RegModemStat
dudmuck 0:be215de91a68 558 printf("ModemStat:0x%02x\r\n", radio.read_reg(REG_LR_MODEMSTAT));
dudmuck 0:be215de91a68 559
dudmuck 0:be215de91a68 560 // fifo ptrs:
dudmuck 1:1cd0afbed23c 561 lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH);
dudmuck 1:1cd0afbed23c 562 lora.RegRxMaxPayloadLength = radio.read_reg(REG_LR_RX_MAX_PAYLOADLENGTH);
dudmuck 0:be215de91a68 563 printf("fifoptr=0x%02x txbase=0x%02x rxbase=0x%02x payloadLength=0x%02x maxlen=0x%02x",
dudmuck 0:be215de91a68 564 radio.read_reg(REG_LR_FIFOADDRPTR),
dudmuck 0:be215de91a68 565 radio.read_reg(REG_LR_FIFOTXBASEADDR),
dudmuck 0:be215de91a68 566 radio.read_reg(REG_LR_FIFORXBASEADDR),
dudmuck 1:1cd0afbed23c 567 lora.RegPayloadLength,
dudmuck 1:1cd0afbed23c 568 lora.RegRxMaxPayloadLength
dudmuck 0:be215de91a68 569 );
dudmuck 0:be215de91a68 570
dudmuck 1:1cd0afbed23c 571 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 0:be215de91a68 572 printLoraIrqs_(false);
dudmuck 0:be215de91a68 573
dudmuck 1:1cd0afbed23c 574 lora.RegHopPeriod = radio.read_reg(REG_LR_HOPPERIOD);
dudmuck 1:1cd0afbed23c 575 if (lora.RegHopPeriod != 0) {
dudmuck 1:1cd0afbed23c 576 printf("\r\nHopPeriod:0x%02x\r\n", lora.RegHopPeriod);
dudmuck 0:be215de91a68 577 }
dudmuck 0:be215de91a68 578
dudmuck 18:9530d682fd9a 579 printf("SymbTimeout:%d ", radio.read_u16(REG_LR_MODEMCONFIG2) & 0x3ff);
dudmuck 0:be215de91a68 580
dudmuck 1:1cd0afbed23c 581 lora.RegPreamble = radio.read_u16(REG_LR_PREAMBLEMSB);
dudmuck 4:7a9007dfc0e5 582 printf("PreambleLength:%d ", lora.RegPreamble);
dudmuck 0:be215de91a68 583
dudmuck 0:be215de91a68 584 if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER || radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER_SINGLE) {
dudmuck 15:c69b942685ea 585 printf("rssi:%ddBm ", lora.get_current_rssi());
dudmuck 0:be215de91a68 586 }
dudmuck 0:be215de91a68 587
dudmuck 1:1cd0afbed23c 588 lora_printTxContinuousMode();
dudmuck 0:be215de91a68 589
dudmuck 0:be215de91a68 590 printf("\r\n");
dudmuck 1:1cd0afbed23c 591 lora_printAgcAutoOn();
dudmuck 0:be215de91a68 592 if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 593 printf(" LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 594 }
dudmuck 0:be215de91a68 595
dudmuck 0:be215de91a68 596 printf("\r\nHeaderCount:%d PacketCount:%d, ",
dudmuck 0:be215de91a68 597 radio.read_u16(REG_LR_RXHEADERCNTVALUE_MSB), radio.read_u16(REG_LR_RXPACKETCNTVALUE_MSB));
dudmuck 0:be215de91a68 598
dudmuck 0:be215de91a68 599 printf("Lora detection threshold:%02x\r\n", radio.read_reg(REG_LR_DETECTION_THRESHOLD));
dudmuck 1:1cd0afbed23c 600 lora.RegTest31.octet = radio.read_reg(REG_LR_TEST31);
dudmuck 1:1cd0afbed23c 601 printf("detect_trig_same_peaks_nb:%d\r\n", lora.RegTest31.bits.detect_trig_same_peaks_nb);
dudmuck 0:be215de91a68 602
dudmuck 0:be215de91a68 603 if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 604 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 6:fe16f96ee335 605 printf("LowDataRateOptimize:%d ", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 606 } else if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 607 lora.RegModemConfig3.octet = radio.read_reg(REG_LR_MODEMCONFIG3);
dudmuck 6:fe16f96ee335 608 printf("LowDataRateOptimize:%d ", lora.RegModemConfig3.sx1276bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 609 }
dudmuck 0:be215de91a68 610
dudmuck 6:fe16f96ee335 611 printf(" invert: rx=%d tx=%d\r\n", lora.RegTest33.bits.invert_i_q, !lora.RegTest33.bits.chirp_invert_tx);
dudmuck 6:fe16f96ee335 612
dudmuck 0:be215de91a68 613 printf("\r\n");
dudmuck 0:be215de91a68 614 //printf("A %02x\r\n", radio.RegModemConfig2.octet);
dudmuck 0:be215de91a68 615 }
dudmuck 0:be215de91a68 616
dudmuck 1:1cd0afbed23c 617 uint16_t
dudmuck 1:1cd0afbed23c 618 fsk_get_PayloadLength(void)
dudmuck 1:1cd0afbed23c 619 {
dudmuck 1:1cd0afbed23c 620 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 1:1cd0afbed23c 621
dudmuck 1:1cd0afbed23c 622 return fsk.RegPktConfig2.bits.PayloadLength;
dudmuck 1:1cd0afbed23c 623 }
dudmuck 1:1cd0afbed23c 624
dudmuck 1:1cd0afbed23c 625 void fsk_printAddressFiltering()
dudmuck 1:1cd0afbed23c 626 {
dudmuck 1:1cd0afbed23c 627 uint8_t FSKRegNodeAdrs, FSKRegBroadcastAdrs;
dudmuck 1:1cd0afbed23c 628
dudmuck 1:1cd0afbed23c 629 printf(" AddressFiltering:");
dudmuck 1:1cd0afbed23c 630 switch (fsk.RegPktConfig1.bits.AddressFiltering) {
dudmuck 1:1cd0afbed23c 631 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 632 case 1: // NodeAddress
dudmuck 1:1cd0afbed23c 633 FSKRegNodeAdrs = radio.read_reg(REG_FSK_NODEADRS);
dudmuck 6:fe16f96ee335 634 printf("NodeAdrs:%02x\r\n", FSKRegNodeAdrs);
dudmuck 1:1cd0afbed23c 635 break;
dudmuck 1:1cd0afbed23c 636 case 2: // NodeAddress & BroadcastAddress
dudmuck 1:1cd0afbed23c 637 FSKRegNodeAdrs = radio.read_reg(REG_FSK_NODEADRS);
dudmuck 1:1cd0afbed23c 638 printf("NodeAdrs:%02x ", FSKRegNodeAdrs);
dudmuck 1:1cd0afbed23c 639 FSKRegBroadcastAdrs = radio.read_reg(REG_FSK_BROADCASTADRS);
dudmuck 6:fe16f96ee335 640 printf("BroadcastAdrs:%02x\r\n", FSKRegBroadcastAdrs );
dudmuck 1:1cd0afbed23c 641 break;
dudmuck 1:1cd0afbed23c 642 default:
dudmuck 1:1cd0afbed23c 643 printf("%d", fsk.RegPktConfig1.bits.AddressFiltering);
dudmuck 1:1cd0afbed23c 644 break;
dudmuck 1:1cd0afbed23c 645 }
dudmuck 1:1cd0afbed23c 646 }
dudmuck 1:1cd0afbed23c 647
dudmuck 1:1cd0afbed23c 648 void fsk_print_IrqFlags2()
dudmuck 1:1cd0afbed23c 649 {
dudmuck 2:c6b23a43a9d9 650 RegIrqFlags2_t RegIrqFlags2;
dudmuck 1:1cd0afbed23c 651
dudmuck 1:1cd0afbed23c 652 printf("IrqFlags2: ");
dudmuck 2:c6b23a43a9d9 653 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 2:c6b23a43a9d9 654 if (RegIrqFlags2.bits.FifoFull)
dudmuck 1:1cd0afbed23c 655 printf("FifoFull ");
dudmuck 2:c6b23a43a9d9 656 if (RegIrqFlags2.bits.FifoEmpty)
dudmuck 1:1cd0afbed23c 657 printf("FifoEmpty ");
dudmuck 2:c6b23a43a9d9 658 if (RegIrqFlags2.bits.FifoLevel)
dudmuck 1:1cd0afbed23c 659 printf("FifoLevel ");
dudmuck 2:c6b23a43a9d9 660 if (RegIrqFlags2.bits.FifoOverrun)
dudmuck 1:1cd0afbed23c 661 printf("FifoOverrun ");
dudmuck 2:c6b23a43a9d9 662 if (RegIrqFlags2.bits.PacketSent)
dudmuck 1:1cd0afbed23c 663 printf("PacketSent ");
dudmuck 2:c6b23a43a9d9 664 if (RegIrqFlags2.bits.PayloadReady)
dudmuck 1:1cd0afbed23c 665 printf("PayloadReady ");
dudmuck 2:c6b23a43a9d9 666 if (RegIrqFlags2.bits.CrcOk)
dudmuck 1:1cd0afbed23c 667 printf("CrcOk ");
dudmuck 2:c6b23a43a9d9 668 if (RegIrqFlags2.bits.LowBat)
dudmuck 1:1cd0afbed23c 669 printf("LowBat ");
dudmuck 2:c6b23a43a9d9 670 printf("\r\n");
dudmuck 1:1cd0afbed23c 671 }
dudmuck 1:1cd0afbed23c 672
dudmuck 1:1cd0afbed23c 673 void
dudmuck 1:1cd0afbed23c 674 fsk_print_status()
dudmuck 1:1cd0afbed23c 675 {
dudmuck 1:1cd0afbed23c 676 //uint16_t s;
dudmuck 2:c6b23a43a9d9 677 RegIrqFlags1_t RegIrqFlags1;
dudmuck 1:1cd0afbed23c 678
dudmuck 1:1cd0afbed23c 679 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 1:1cd0afbed23c 680 printf("LoRa\r\n");
dudmuck 1:1cd0afbed23c 681 return;
dudmuck 1:1cd0afbed23c 682 }
dudmuck 1:1cd0afbed23c 683
dudmuck 1:1cd0afbed23c 684 if (radio.RegOpMode.bits.ModulationType == 0) {
dudmuck 1:1cd0afbed23c 685 printf("FSK ");
dudmuck 1:1cd0afbed23c 686 switch (radio.RegOpMode.bits.ModulationShaping) {
dudmuck 1:1cd0afbed23c 687 case 1: printf("BT1.0 "); break;
dudmuck 1:1cd0afbed23c 688 case 2: printf("BT0.5 "); break;
dudmuck 1:1cd0afbed23c 689 case 3: printf("BT0.3 "); break;
dudmuck 1:1cd0afbed23c 690 }
dudmuck 1:1cd0afbed23c 691 } else if (radio.RegOpMode.bits.ModulationType == 1) {
dudmuck 1:1cd0afbed23c 692 printf("OOK ");
dudmuck 18:9530d682fd9a 693 switch (radio.RegOpMode.bits.ModulationShaping) {
dudmuck 18:9530d682fd9a 694 case 1: printf("Fcutoff=bitrate"); break;
dudmuck 18:9530d682fd9a 695 case 2: printf("Fcutoff=2*bitrate"); break;
dudmuck 18:9530d682fd9a 696 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 697 }
dudmuck 1:1cd0afbed23c 698 }
dudmuck 1:1cd0afbed23c 699
dudmuck 19:be8a8b0e7320 700 printf("%" PRIu32 "bps fdev:%" PRIu32 "Hz\r\n", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 1:1cd0afbed23c 701
dudmuck 1:1cd0afbed23c 702 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 1:1cd0afbed23c 703
dudmuck 1:1cd0afbed23c 704 fsk_print_dio();
dudmuck 1:1cd0afbed23c 705
dudmuck 19:be8a8b0e7320 706 printf("rxbw:%" PRIu32 "Hz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 19:be8a8b0e7320 707 printf("afcbw:%" PRIu32 "Hz\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW));
dudmuck 1:1cd0afbed23c 708
dudmuck 1:1cd0afbed23c 709 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 1:1cd0afbed23c 710 printf("RssiOffset:%ddB smoothing:%dsamples\r\n", fsk.RegRssiConfig.bits.RssiOffset, 1 << (fsk.RegRssiConfig.bits.RssiSmoothing+1));
dudmuck 1:1cd0afbed23c 711
dudmuck 1:1cd0afbed23c 712
dudmuck 1:1cd0afbed23c 713 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 1:1cd0afbed23c 714
dudmuck 1:1cd0afbed23c 715 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 716 uint16_t len;
dudmuck 1:1cd0afbed23c 717 /* packet mode */
dudmuck 1:1cd0afbed23c 718 len = fsk_get_PayloadLength();
dudmuck 1:1cd0afbed23c 719 printf("packet RegPayloadLength:0x%03x ", len);
dudmuck 1:1cd0afbed23c 720
dudmuck 1:1cd0afbed23c 721 if (fsk.RegPktConfig2.bits.BeaconOn)
dudmuck 1:1cd0afbed23c 722 printf("BeaconOn ");
dudmuck 1:1cd0afbed23c 723
dudmuck 1:1cd0afbed23c 724 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 1:1cd0afbed23c 725 printf("FifoThreshold:%d TxStartCondition:", fsk.RegFifoThreshold.bits.FifoThreshold);
dudmuck 1:1cd0afbed23c 726 if (fsk.RegFifoThreshold.bits.TxStartCondition)
dudmuck 1:1cd0afbed23c 727 printf("!FifoEmpty");
dudmuck 1:1cd0afbed23c 728 else
dudmuck 1:1cd0afbed23c 729 printf("FifoLevel");
dudmuck 1:1cd0afbed23c 730
dudmuck 1:1cd0afbed23c 731 printf("\r\nAutoRestartRxMode:");
dudmuck 1:1cd0afbed23c 732 switch (fsk.RegSyncConfig.bits.AutoRestartRxMode) {
dudmuck 1:1cd0afbed23c 733 case 0: printf("off "); break;
dudmuck 1:1cd0afbed23c 734 case 1: printf("no-pll-wait "); break;
dudmuck 1:1cd0afbed23c 735 case 2: printf("pll-wait "); break;
dudmuck 1:1cd0afbed23c 736 case 3: printf("3 "); break;
dudmuck 1:1cd0afbed23c 737 }
dudmuck 1:1cd0afbed23c 738 //...todo
dudmuck 1:1cd0afbed23c 739
dudmuck 1:1cd0afbed23c 740 printf("PreambleSize:%d ", radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 1:1cd0afbed23c 741
dudmuck 1:1cd0afbed23c 742 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 1:1cd0afbed23c 743 if (fsk.RegOokPeak.bits.barker_en)
dudmuck 1:1cd0afbed23c 744 printf("barker ");
dudmuck 1:1cd0afbed23c 745 if (!fsk.RegOokPeak.bits.BitSyncOn)
dudmuck 1:1cd0afbed23c 746 printf("BitSyncOff ");
dudmuck 1:1cd0afbed23c 747 //...todo
dudmuck 1:1cd0afbed23c 748
dudmuck 1:1cd0afbed23c 749 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 1:1cd0afbed23c 750 if (fsk.RegPktConfig1.bits.PacketFormatVariable)
dudmuck 1:1cd0afbed23c 751 printf("variable");
dudmuck 1:1cd0afbed23c 752 else
dudmuck 1:1cd0afbed23c 753 printf("fixed");
dudmuck 1:1cd0afbed23c 754 printf("-length\r\ncrc");
dudmuck 1:1cd0afbed23c 755 if (fsk.RegPktConfig1.bits.CrcOn) {
dudmuck 1:1cd0afbed23c 756 printf("On");
dudmuck 1:1cd0afbed23c 757 } else
dudmuck 1:1cd0afbed23c 758 printf("Off");
dudmuck 1:1cd0afbed23c 759 printf(" crctype:");
dudmuck 1:1cd0afbed23c 760 if (fsk.RegPktConfig1.bits.CrCWhiteningType)
dudmuck 1:1cd0afbed23c 761 printf("IBM");
dudmuck 1:1cd0afbed23c 762 else
dudmuck 1:1cd0afbed23c 763 printf("CCITT");
dudmuck 1:1cd0afbed23c 764 printf(" dcFree:");
dudmuck 1:1cd0afbed23c 765 switch (fsk.RegPktConfig1.bits.DcFree) {
dudmuck 1:1cd0afbed23c 766 case 0: printf("none "); break;
dudmuck 1:1cd0afbed23c 767 case 1: printf("Manchester "); break;
dudmuck 1:1cd0afbed23c 768 case 2: printf("Whitening "); break;
dudmuck 1:1cd0afbed23c 769 case 3: printf("reserved "); break;
dudmuck 1:1cd0afbed23c 770 }
dudmuck 1:1cd0afbed23c 771 fsk_printAddressFiltering();
dudmuck 1:1cd0afbed23c 772
dudmuck 1:1cd0afbed23c 773 printf("\r\n");
dudmuck 1:1cd0afbed23c 774 fsk_print_IrqFlags2();
dudmuck 1:1cd0afbed23c 775 } else {
dudmuck 1:1cd0afbed23c 776 /* continuous mode */
dudmuck 1:1cd0afbed23c 777 printf("continuous ");
dudmuck 1:1cd0afbed23c 778 }
dudmuck 1:1cd0afbed23c 779
dudmuck 1:1cd0afbed23c 780 fsk.RegPreambleDetect.octet = radio.read_reg(REG_FSK_PREAMBLEDETECT);
dudmuck 1:1cd0afbed23c 781 printf("PreambleDetect:");
dudmuck 1:1cd0afbed23c 782 if (fsk.RegPreambleDetect.bits.PreambleDetectorOn) {
dudmuck 1:1cd0afbed23c 783 printf("size=%d,tol=%d ",
dudmuck 1:1cd0afbed23c 784 fsk.RegPreambleDetect.bits.PreambleDetectorSize,
dudmuck 1:1cd0afbed23c 785 fsk.RegPreambleDetect.bits.PreambleDetectorTol);
dudmuck 1:1cd0afbed23c 786 } else
dudmuck 1:1cd0afbed23c 787 printf("Off ");
dudmuck 1:1cd0afbed23c 788
dudmuck 18:9530d682fd9a 789 if (fsk.RegSyncConfig.bits.SyncOn) {
dudmuck 18:9530d682fd9a 790 printf(" syncsize:%d ", fsk.RegSyncConfig.bits.SyncSize);
dudmuck 18:9530d682fd9a 791 printf(" : %02x ", radio.read_reg(REG_FSK_SYNCVALUE1));
dudmuck 18:9530d682fd9a 792 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE2));
dudmuck 18:9530d682fd9a 793 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE3));
dudmuck 18:9530d682fd9a 794 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE4));
dudmuck 18:9530d682fd9a 795 } else
dudmuck 18:9530d682fd9a 796 printf("Sync Off");
dudmuck 1:1cd0afbed23c 797 printf("\r\n"); // end sync config
dudmuck 1:1cd0afbed23c 798
dudmuck 1:1cd0afbed23c 799 fsk.RegAfcFei.octet = radio.read_reg(REG_FSK_AFCFEI);
dudmuck 1:1cd0afbed23c 800 printf("afcAutoClear:");
dudmuck 1:1cd0afbed23c 801 if (fsk.RegAfcFei.bits.AfcAutoClearOn)
dudmuck 1:1cd0afbed23c 802 printf("On");
dudmuck 1:1cd0afbed23c 803 else
dudmuck 1:1cd0afbed23c 804 printf("OFF");
dudmuck 1:1cd0afbed23c 805 printf(" afc:%dHz ", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB)));
dudmuck 1:1cd0afbed23c 806
dudmuck 1:1cd0afbed23c 807 printf("fei:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_FEIMSB)));
dudmuck 1:1cd0afbed23c 808
dudmuck 1:1cd0afbed23c 809 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 1:1cd0afbed23c 810 printf("RxTrigger:");
dudmuck 1:1cd0afbed23c 811 switch (fsk.RegRxConfig.bits.RxTrigger) {
dudmuck 1:1cd0afbed23c 812 case 0: printf("none "); break;
dudmuck 1:1cd0afbed23c 813 case 1: printf("rssi "); break;
dudmuck 1:1cd0afbed23c 814 case 6: printf("preamble "); break;
dudmuck 1:1cd0afbed23c 815 case 7: printf("both "); break;
dudmuck 1:1cd0afbed23c 816 default: printf("-%d- ", fsk.RegRxConfig.bits.RxTrigger); break;
dudmuck 1:1cd0afbed23c 817 }
dudmuck 1:1cd0afbed23c 818 printf("AfcAuto:");
dudmuck 1:1cd0afbed23c 819 if (fsk.RegRxConfig.bits.AfcAutoOn)
dudmuck 1:1cd0afbed23c 820 printf("On ");
dudmuck 1:1cd0afbed23c 821 else
dudmuck 1:1cd0afbed23c 822 printf("OFF ");
dudmuck 15:c69b942685ea 823
dudmuck 15:c69b942685ea 824 radio.RegLna.octet = radio.read_reg(REG_LNA);
dudmuck 1:1cd0afbed23c 825 if (!fsk.RegRxConfig.bits.AgcAutoOn) {
dudmuck 1:1cd0afbed23c 826 printf("AgcAutoOff:G%d ", radio.RegLna.bits.LnaGain);
dudmuck 1:1cd0afbed23c 827 }
dudmuck 15:c69b942685ea 828 printf("LnaBoostHF:%d ", radio.RegLna.bits.LnaBoostHF);
dudmuck 1:1cd0afbed23c 829
dudmuck 1:1cd0afbed23c 830 fsk.RegTimerResol.octet = radio.read_reg(REG_FSK_TIMERRESOL);
dudmuck 1:1cd0afbed23c 831 if (fsk.RegTimerResol.bits.hlm_started)
dudmuck 1:1cd0afbed23c 832 printf("hlm_started ");
dudmuck 1:1cd0afbed23c 833 else
dudmuck 1:1cd0afbed23c 834 printf("hlm_stopped ");
dudmuck 1:1cd0afbed23c 835
dudmuck 1:1cd0afbed23c 836 fsk.RegRssiThresh = radio.read_reg(REG_FSK_RSSITHRESH);
dudmuck 1:1cd0afbed23c 837 printf("rssiThreshold:-%.1f@%02x ", fsk.RegRssiThresh / 2.0, REG_FSK_RSSITHRESH);
dudmuck 1:1cd0afbed23c 838
dudmuck 1:1cd0afbed23c 839 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 1:1cd0afbed23c 840 if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER ||
dudmuck 1:1cd0afbed23c 841 radio.RegOpMode.bits.Mode == RF_OPMODE_SYNTHESIZER_RX)
dudmuck 1:1cd0afbed23c 842 {
dudmuck 1:1cd0afbed23c 843 printf("rssi:-%.1f ", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 1:1cd0afbed23c 844 }
dudmuck 1:1cd0afbed23c 845
dudmuck 1:1cd0afbed23c 846 fsk.RegSeqConfig1.octet = radio.read_reg(REG_FSK_SEQCONFIG1);
dudmuck 1:1cd0afbed23c 847 printf("\r\nsequencer: ");
dudmuck 1:1cd0afbed23c 848 printf("FromStart:");
dudmuck 1:1cd0afbed23c 849 switch (fsk.RegSeqConfig1.bits.FromStart) {
dudmuck 1:1cd0afbed23c 850 case 0:
dudmuck 1:1cd0afbed23c 851 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 852 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 853 printf("idle");
dudmuck 1:1cd0afbed23c 854 else
dudmuck 1:1cd0afbed23c 855 printf("sequencerOff");
dudmuck 1:1cd0afbed23c 856 break;
dudmuck 1:1cd0afbed23c 857 case 1: printf("rx"); break;
dudmuck 1:1cd0afbed23c 858 case 2: printf("tx"); break;
dudmuck 1:1cd0afbed23c 859 case 3: printf("tx on fifolevel"); break;
dudmuck 1:1cd0afbed23c 860 }
dudmuck 1:1cd0afbed23c 861 printf(" lowPowerSelection:");
dudmuck 1:1cd0afbed23c 862 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 863 printf("idle");
dudmuck 1:1cd0afbed23c 864 else
dudmuck 1:1cd0afbed23c 865 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 866 if (fsk.RegSeqConfig1.bits.FromStart != 0 &&
dudmuck 1:1cd0afbed23c 867 fsk.RegSeqConfig1.bits.LowPowerSelection != 0)
dudmuck 1:1cd0afbed23c 868 { // if sequencer enabled:
dudmuck 1:1cd0afbed23c 869 printf("\r\nsequencer: IdleMode:");
dudmuck 1:1cd0afbed23c 870 if (fsk.RegSeqConfig1.bits.IdleMode)
dudmuck 1:1cd0afbed23c 871 printf("Sleep");
dudmuck 1:1cd0afbed23c 872 else
dudmuck 1:1cd0afbed23c 873 printf("standby");
dudmuck 1:1cd0afbed23c 874 printf("\r\nsequencer: FromIdle to:");
dudmuck 1:1cd0afbed23c 875 if (fsk.RegSeqConfig1.bits.FromIdle)
dudmuck 1:1cd0afbed23c 876 printf("rx");
dudmuck 1:1cd0afbed23c 877 else
dudmuck 1:1cd0afbed23c 878 printf("tx");
dudmuck 1:1cd0afbed23c 879 printf("\r\nsequencer: FromTransmit to:");
dudmuck 1:1cd0afbed23c 880 if (fsk.RegSeqConfig1.bits.FromTransmit)
dudmuck 1:1cd0afbed23c 881 printf("rx-on-PacketSent");
dudmuck 1:1cd0afbed23c 882 else {
dudmuck 1:1cd0afbed23c 883 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 884 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 885 printf("idle");
dudmuck 1:1cd0afbed23c 886 else
dudmuck 1:1cd0afbed23c 887 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 888 printf("-on-PacketSent");
dudmuck 1:1cd0afbed23c 889 }
dudmuck 1:1cd0afbed23c 890 fsk.RegSeqConfig2.octet = radio.read_reg(REG_FSK_SEQCONFIG2);
dudmuck 1:1cd0afbed23c 891 printf("\r\nsequencer: FromReceive:");
dudmuck 1:1cd0afbed23c 892 switch (fsk.RegSeqConfig2.bits.FromReceive) {
dudmuck 1:1cd0afbed23c 893 case 1: printf("PacketRecevied on PayloadReady"); break;
dudmuck 1:1cd0afbed23c 894 case 2:
dudmuck 1:1cd0afbed23c 895 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 896 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 897 printf("idle");
dudmuck 1:1cd0afbed23c 898 else
dudmuck 1:1cd0afbed23c 899 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 900 printf("-on-payloadReady");
dudmuck 1:1cd0afbed23c 901 break;
dudmuck 1:1cd0afbed23c 902 case 3: printf("PacketRecevied-on-CrcOk"); break;
dudmuck 1:1cd0afbed23c 903 case 4: printf("SequencerOff-on-Rssi"); break;
dudmuck 1:1cd0afbed23c 904 case 5: printf("SequencerOff-on-SyncAddress"); break;
dudmuck 1:1cd0afbed23c 905 case 6: printf("SequencerOff-PreambleDetect"); break;
dudmuck 1:1cd0afbed23c 906 default: printf("-%d-", fsk.RegSeqConfig2.bits.FromReceive); break;
dudmuck 1:1cd0afbed23c 907 }
dudmuck 1:1cd0afbed23c 908 printf("\r\nsequencer: FromRxTimeout:");
dudmuck 1:1cd0afbed23c 909 switch (fsk.RegSeqConfig2.bits.FromRxTimeout) {
dudmuck 1:1cd0afbed23c 910 case 0: printf("rx"); break;
dudmuck 1:1cd0afbed23c 911 case 1: printf("tx"); break;
dudmuck 1:1cd0afbed23c 912 case 2:
dudmuck 1:1cd0afbed23c 913 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 914 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 915 printf("idle");
dudmuck 1:1cd0afbed23c 916 else
dudmuck 1:1cd0afbed23c 917 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 918 break;
dudmuck 1:1cd0afbed23c 919 case 3: printf("SequencerOff"); break;
dudmuck 1:1cd0afbed23c 920 }
dudmuck 1:1cd0afbed23c 921 printf("\r\nsequencer: FromPacketReceived to:");
dudmuck 1:1cd0afbed23c 922 switch (fsk.RegSeqConfig2.bits.FromPacketReceived) {
dudmuck 1:1cd0afbed23c 923 case 0: printf("SequencerOff"); break;
dudmuck 1:1cd0afbed23c 924 case 1: printf("tx on FifoEmpty"); break;
dudmuck 1:1cd0afbed23c 925 case 2:
dudmuck 1:1cd0afbed23c 926 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 927 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 928 printf("idle");
dudmuck 1:1cd0afbed23c 929 else
dudmuck 1:1cd0afbed23c 930 printf("sequencerOff");
dudmuck 1:1cd0afbed23c 931 break;
dudmuck 1:1cd0afbed23c 932 case 3: printf("rx via fs"); break;
dudmuck 1:1cd0afbed23c 933 case 4: printf("rx"); break;
dudmuck 1:1cd0afbed23c 934 }
dudmuck 1:1cd0afbed23c 935
dudmuck 1:1cd0afbed23c 936 fsk.RegTimerResol.octet = radio.read_reg(REG_FSK_TIMERRESOL);
dudmuck 1:1cd0afbed23c 937 printf("\r\nsequencer: timer1:");
dudmuck 1:1cd0afbed23c 938 switch (fsk.RegTimerResol.bits.timer1_resol) {
dudmuck 1:1cd0afbed23c 939 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 940 case 1: printf("%dus", radio.read_reg(REG_FSK_TIMER1COEF) * 64); break;
dudmuck 1:1cd0afbed23c 941 case 2: printf("%.1fms", radio.read_reg(REG_FSK_TIMER1COEF) * 4.1); break;
dudmuck 1:1cd0afbed23c 942 case 3: printf("%.1fs", radio.read_reg(REG_FSK_TIMER1COEF) * 0.262); break;
dudmuck 1:1cd0afbed23c 943 }
dudmuck 1:1cd0afbed23c 944
dudmuck 1:1cd0afbed23c 945 printf(" timer2:");
dudmuck 1:1cd0afbed23c 946 switch (fsk.RegTimerResol.bits.timer2_resol) {
dudmuck 1:1cd0afbed23c 947 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 948 case 1: printf("%dus", radio.read_reg(REG_FSK_TIMER2COEF) * 64); break;
dudmuck 1:1cd0afbed23c 949 case 2: printf("%.1fms", radio.read_reg(REG_FSK_TIMER2COEF) * 4.1); break;
dudmuck 1:1cd0afbed23c 950 case 3: printf("%.1fs", radio.read_reg(REG_FSK_TIMER2COEF) * 0.262); break;
dudmuck 1:1cd0afbed23c 951 }
dudmuck 1:1cd0afbed23c 952 } // ..if sequencer enabled
dudmuck 1:1cd0afbed23c 953
dudmuck 1:1cd0afbed23c 954 printf("\r\nIrqFlags1:");
dudmuck 2:c6b23a43a9d9 955 RegIrqFlags1.octet = radio.read_reg(REG_FSK_IRQFLAGS1);
dudmuck 2:c6b23a43a9d9 956 if (RegIrqFlags1.bits.ModeReady)
dudmuck 1:1cd0afbed23c 957 printf("ModeReady ");
dudmuck 2:c6b23a43a9d9 958 if (RegIrqFlags1.bits.RxReady)
dudmuck 1:1cd0afbed23c 959 printf("RxReady ");
dudmuck 2:c6b23a43a9d9 960 if (RegIrqFlags1.bits.TxReady)
dudmuck 1:1cd0afbed23c 961 printf("TxReady ");
dudmuck 2:c6b23a43a9d9 962 if (RegIrqFlags1.bits.PllLock)
dudmuck 1:1cd0afbed23c 963 printf("PllLock ");
dudmuck 2:c6b23a43a9d9 964 if (RegIrqFlags1.bits.Rssi)
dudmuck 1:1cd0afbed23c 965 printf("Rssi ");
dudmuck 2:c6b23a43a9d9 966 if (RegIrqFlags1.bits.Timeout)
dudmuck 1:1cd0afbed23c 967 printf("Timeout ");
dudmuck 2:c6b23a43a9d9 968 if (RegIrqFlags1.bits.PreambleDetect)
dudmuck 1:1cd0afbed23c 969 printf("PreambleDetect ");
dudmuck 2:c6b23a43a9d9 970 if (RegIrqFlags1.bits.SyncAddressMatch)
dudmuck 1:1cd0afbed23c 971 printf("SyncAddressMatch ");
dudmuck 1:1cd0afbed23c 972
dudmuck 1:1cd0afbed23c 973 printf("\r\n");
dudmuck 1:1cd0afbed23c 974
dudmuck 1:1cd0afbed23c 975 /* TODO if (!SX1272FSK->RegPktConfig1.bits.PacketFormatVariable) { // if fixed-length packet format:
dudmuck 1:1cd0afbed23c 976 s = fsk_get_PayloadLength();
dudmuck 1:1cd0afbed23c 977 if (s > FSK_LARGE_PKT_THRESHOLD)
dudmuck 1:1cd0afbed23c 978 flags.fifo_flow_ctl = 1;
dudmuck 1:1cd0afbed23c 979 else
dudmuck 1:1cd0afbed23c 980 flags.fifo_flow_ctl = 0;
dudmuck 1:1cd0afbed23c 981 }*/
dudmuck 1:1cd0afbed23c 982
dudmuck 1:1cd0afbed23c 983 fsk.RegImageCal.octet = radio.read_reg(REG_FSK_IMAGECAL);
dudmuck 1:1cd0afbed23c 984 if (fsk.RegImageCal.bits.TempMonitorOff) {
dudmuck 1:1cd0afbed23c 985 printf("TempMonitorOff[\r0m\n");
dudmuck 1:1cd0afbed23c 986 } else {
dudmuck 1:1cd0afbed23c 987 printf("TempThreshold:");
dudmuck 1:1cd0afbed23c 988 switch (fsk.RegImageCal.bits.TempThreshold) {
dudmuck 1:1cd0afbed23c 989 case 0: printf("5C"); break;
dudmuck 1:1cd0afbed23c 990 case 1: printf("10C"); break;
dudmuck 1:1cd0afbed23c 991 case 2: printf("15C"); break;
dudmuck 1:1cd0afbed23c 992 case 3: printf("20C"); break;
dudmuck 1:1cd0afbed23c 993 }
dudmuck 1:1cd0afbed23c 994 printf("\r\n");
dudmuck 1:1cd0afbed23c 995 }
dudmuck 1:1cd0afbed23c 996 if (fsk.RegImageCal.bits.ImageCalRunning)
dudmuck 1:1cd0afbed23c 997 printf("ImageCalRunning[\r0m\n");
dudmuck 21:b84a77dfb43c 998
dudmuck 21:b84a77dfb43c 999 if (rx_payloadReady_int_en) {
Wayne Roberts 24:9ba45aa15b53 1000 #ifdef TARGET_DISCO_L072CZ_LRWAN1
dudmuck 22:2005df80c8a8 1001 printf("n_rx_pkts:%u, dio:%u,%u,%u,%u\r\n", n_rx_pkts, dio3.read(), dio2.read(), radio.dio1.read(), radio.dio0.read());
dudmuck 22:2005df80c8a8 1002 #else
dudmuck 21:b84a77dfb43c 1003 printf("n_rx_pkts:%u, dio:%u,%u,%u,%u,%u\r\n", n_rx_pkts, dio4.read(), dio3.read(), dio2.read(), radio.dio1.read(), radio.dio0.read());
dudmuck 22:2005df80c8a8 1004 #endif
dudmuck 21:b84a77dfb43c 1005 }
dudmuck 1:1cd0afbed23c 1006 }
dudmuck 1:1cd0afbed23c 1007
dudmuck 0:be215de91a68 1008 void printOpMode()
dudmuck 0:be215de91a68 1009 {
dudmuck 0:be215de91a68 1010 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 0:be215de91a68 1011 switch (radio.RegOpMode.bits.Mode) {
dudmuck 0:be215de91a68 1012 case RF_OPMODE_SLEEP: printf("sleep"); break;
dudmuck 0:be215de91a68 1013 case RF_OPMODE_STANDBY: printf("stby"); break;
dudmuck 0:be215de91a68 1014 case RF_OPMODE_SYNTHESIZER_TX: printf("fstx"); break;
dudmuck 0:be215de91a68 1015 case RF_OPMODE_TRANSMITTER: printf("tx"); break;
dudmuck 0:be215de91a68 1016 case RF_OPMODE_SYNTHESIZER_RX: printf("fsrx"); break;
dudmuck 0:be215de91a68 1017 case RF_OPMODE_RECEIVER: printf("rx"); break;
dudmuck 0:be215de91a68 1018 case 6:
dudmuck 0:be215de91a68 1019 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 0:be215de91a68 1020 printf("rxs");
dudmuck 0:be215de91a68 1021 else
dudmuck 0:be215de91a68 1022 printf("-6-");
dudmuck 0:be215de91a68 1023 break; // todo: different lora/fsk
dudmuck 0:be215de91a68 1024 case 7:
dudmuck 0:be215de91a68 1025 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 0:be215de91a68 1026 printf("cad");
dudmuck 0:be215de91a68 1027 else
dudmuck 0:be215de91a68 1028 printf("-7-");
dudmuck 0:be215de91a68 1029 break; // todo: different lora/fsk
dudmuck 0:be215de91a68 1030 }
dudmuck 0:be215de91a68 1031 }
dudmuck 0:be215de91a68 1032
dudmuck 0:be215de91a68 1033 void
dudmuck 0:be215de91a68 1034 printPa()
dudmuck 0:be215de91a68 1035 {
dudmuck 0:be215de91a68 1036 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 0:be215de91a68 1037 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 0:be215de91a68 1038 float output_dBm = 17 - (15-radio.RegPaConfig.bits.OutputPower);
dudmuck 0:be215de91a68 1039 printf(" PABOOST OutputPower=%.1fdBm", output_dBm);
dudmuck 0:be215de91a68 1040 } else {
dudmuck 0:be215de91a68 1041 float pmax = (0.6*radio.RegPaConfig.bits.MaxPower) + 10.8;
dudmuck 0:be215de91a68 1042 float output_dBm = pmax - (15-radio.RegPaConfig.bits.OutputPower);
dudmuck 20:b11592c9ba5f 1043 #ifdef TARGET_MTS_MDOT_F411RE
dudmuck 20:b11592c9ba5f 1044 printf(" \x1b[31mRFO pmax=%.1fdBm OutputPower=%.1fdBm\x1b[0m", pmax, output_dBm); // not connected
dudmuck 20:b11592c9ba5f 1045 #else
dudmuck 0:be215de91a68 1046 printf(" RFO pmax=%.1fdBm OutputPower=%.1fdBm", pmax, output_dBm);
dudmuck 20:b11592c9ba5f 1047 #endif
dudmuck 0:be215de91a68 1048 }
dudmuck 0:be215de91a68 1049 }
dudmuck 0:be215de91a68 1050
dudmuck 0:be215de91a68 1051 void /* things always present, whether lora or fsk */
dudmuck 0:be215de91a68 1052 common_print_status()
dudmuck 0:be215de91a68 1053 {
dudmuck 0:be215de91a68 1054 printf("version:0x%02x %.3fMHz ", radio.read_reg(REG_VERSION), radio.get_frf_MHz());
dudmuck 0:be215de91a68 1055 printOpMode();
dudmuck 0:be215de91a68 1056
dudmuck 0:be215de91a68 1057 printPa();
dudmuck 0:be215de91a68 1058
dudmuck 0:be215de91a68 1059 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 0:be215de91a68 1060 if (radio.RegOcp.bits.OcpOn) {
dudmuck 0:be215de91a68 1061 int imax = 0;
dudmuck 0:be215de91a68 1062 if (radio.RegOcp.bits.OcpTrim < 16)
dudmuck 0:be215de91a68 1063 imax = 45 + (5 * radio.RegOcp.bits.OcpTrim);
dudmuck 0:be215de91a68 1064 else if (radio.RegOcp.bits.OcpTrim < 28)
dudmuck 0:be215de91a68 1065 imax = -30 + (10 * radio.RegOcp.bits.OcpTrim);
dudmuck 0:be215de91a68 1066 else
dudmuck 0:be215de91a68 1067 imax = 240;
dudmuck 0:be215de91a68 1068 printf(" OcpOn %dmA ", imax);
dudmuck 0:be215de91a68 1069 } else
dudmuck 0:be215de91a68 1070 printf(" OcpOFF ");
dudmuck 0:be215de91a68 1071
dudmuck 0:be215de91a68 1072 printf("\r\n");
dudmuck 8:227605e4a760 1073
dudmuck 8:227605e4a760 1074 if (per_en) {
dudmuck 18:9530d682fd9a 1075 if (cadper_enable) {
dudmuck 19:be8a8b0e7320 1076 printf("cadper %" PRIu32 ", ", num_cads);
dudmuck 18:9530d682fd9a 1077 }
dudmuck 8:227605e4a760 1078 printf("per_tx_delay:%f\r\n", per_tx_delay);
dudmuck 8:227605e4a760 1079 printf("PER device ID:%d\r\n", per_id);
dudmuck 8:227605e4a760 1080 }
dudmuck 18:9530d682fd9a 1081
dudmuck 20:b11592c9ba5f 1082 if (poll_irq_en) {
dudmuck 18:9530d682fd9a 1083 printf("poll_irq_en\r\n");
dudmuck 20:b11592c9ba5f 1084 if (!radio.RegOpMode.bits.LongRangeMode) {
dudmuck 20:b11592c9ba5f 1085 printf("saved irqs: %02x %02x\r\n", fsk_RegIrqFlags1_prev.octet, fsk_RegIrqFlags2_prev.octet);
dudmuck 20:b11592c9ba5f 1086 }
dudmuck 20:b11592c9ba5f 1087 }
dudmuck 0:be215de91a68 1088
dudmuck 0:be215de91a68 1089 }
dudmuck 0:be215de91a68 1090
dudmuck 0:be215de91a68 1091 void print_rx_buf(int len)
dudmuck 0:be215de91a68 1092 {
dudmuck 0:be215de91a68 1093 int i;
dudmuck 0:be215de91a68 1094
dudmuck 0:be215de91a68 1095 printf("000:");
dudmuck 0:be215de91a68 1096 for (i = 0; i < len; i++) {
dudmuck 0:be215de91a68 1097 //printf("(%d)%02x ", i % 16, rx_buf[i]);
dudmuck 0:be215de91a68 1098 printf("%02x ", radio.rx_buf[i]);
dudmuck 0:be215de91a68 1099 if (i % 16 == 15 && i != len-1)
dudmuck 0:be215de91a68 1100 printf("\r\n%03d:", i+1);
dudmuck 0:be215de91a68 1101
dudmuck 0:be215de91a68 1102 }
dudmuck 0:be215de91a68 1103 printf("\r\n");
dudmuck 0:be215de91a68 1104 }
dudmuck 0:be215de91a68 1105
dudmuck 21:b84a77dfb43c 1106 void lora_print_rx_verbose(uint8_t dlen)
dudmuck 7:c3c54f222ced 1107 {
dudmuck 7:c3c54f222ced 1108 float dbm;
dudmuck 7:c3c54f222ced 1109 printLoraIrqs_(false);
dudmuck 7:c3c54f222ced 1110 if (lora.RegHopPeriod > 0) {
dudmuck 7:c3c54f222ced 1111 lora.RegHopChannel.octet = radio.read_reg(REG_LR_HOPCHANNEL);
dudmuck 7:c3c54f222ced 1112 printf("HopCH:%d ", lora.RegHopChannel.bits.FhssPresentChannel);
dudmuck 7:c3c54f222ced 1113 }
dudmuck 7:c3c54f222ced 1114 printf("%dHz ", lora.get_freq_error_Hz());
dudmuck 7:c3c54f222ced 1115 lora_printCodingRate(true); // true: of received packet
dudmuck 7:c3c54f222ced 1116 dbm = lora.get_pkt_rssi();
dudmuck 7:c3c54f222ced 1117 printf(" crc%s %.1fdB %.1fdBm\r\n",
dudmuck 7:c3c54f222ced 1118 lora.RegHopChannel.bits.RxPayloadCrcOn ? "On" : "OFF",
dudmuck 7:c3c54f222ced 1119 lora.RegPktSnrValue / 4.0,
dudmuck 7:c3c54f222ced 1120 dbm
dudmuck 7:c3c54f222ced 1121 );
dudmuck 7:c3c54f222ced 1122 print_rx_buf(dlen);
dudmuck 18:9530d682fd9a 1123 }
dudmuck 7:c3c54f222ced 1124
dudmuck 18:9530d682fd9a 1125 void set_per_en(bool en)
dudmuck 18:9530d682fd9a 1126 {
dudmuck 18:9530d682fd9a 1127 if (en) {
dudmuck 18:9530d682fd9a 1128 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 1129 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 1130 lora.RegModemConfig.sx1272bits.LowDataRateOptimize = 1;
dudmuck 18:9530d682fd9a 1131 radio.write_reg(REG_LR_MODEMCONFIG, lora.RegModemConfig.octet);
dudmuck 18:9530d682fd9a 1132 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 1133 lora.RegModemConfig3.sx1276bits.LowDataRateOptimize = 1;
dudmuck 18:9530d682fd9a 1134 radio.write_reg(REG_LR_MODEMCONFIG3, lora.RegModemConfig3.octet);
dudmuck 18:9530d682fd9a 1135 }
dudmuck 18:9530d682fd9a 1136 lora.RegPayloadLength = 9;
dudmuck 18:9530d682fd9a 1137 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1138 radio.RegDioMapping1.bits.Dio3Mapping = 1; // to ValidHeader
dudmuck 18:9530d682fd9a 1139 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 1140 } else { // fsk..
dudmuck 18:9530d682fd9a 1141 //fsk_tx_length = 9;
dudmuck 7:c3c54f222ced 1142 }
dudmuck 20:b11592c9ba5f 1143 PacketRxSequencePrev = 0; // transmitter side PacketTxCnt is 1 at first TX
dudmuck 18:9530d682fd9a 1144 //PacketRxSequence = 0;
dudmuck 18:9530d682fd9a 1145 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 1146 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 1147 PacketNormalCnt = 0;
dudmuck 18:9530d682fd9a 1148 } // ..if (per_en)
dudmuck 18:9530d682fd9a 1149 else {
dudmuck 18:9530d682fd9a 1150 per_timeout.detach();
dudmuck 18:9530d682fd9a 1151 }
dudmuck 18:9530d682fd9a 1152
dudmuck 18:9530d682fd9a 1153 per_en = en;
dudmuck 18:9530d682fd9a 1154 }
dudmuck 7:c3c54f222ced 1155
dudmuck 8:227605e4a760 1156 void per_cb()
dudmuck 8:227605e4a760 1157 {
dudmuck 8:227605e4a760 1158 int i;
dudmuck 8:227605e4a760 1159
dudmuck 8:227605e4a760 1160 PacketTxCnt++;
dudmuck 8:227605e4a760 1161
dudmuck 8:227605e4a760 1162 radio.tx_buf[0] = per_id;
dudmuck 8:227605e4a760 1163 radio.tx_buf[1] = PacketTxCnt >> 24;
dudmuck 8:227605e4a760 1164 radio.tx_buf[2] = PacketTxCnt >> 16;
dudmuck 8:227605e4a760 1165 radio.tx_buf[3] = PacketTxCnt >> 8;
dudmuck 8:227605e4a760 1166 radio.tx_buf[4] = PacketTxCnt;
dudmuck 8:227605e4a760 1167 radio.tx_buf[5] = 'P';
dudmuck 8:227605e4a760 1168 radio.tx_buf[6] = 'E';
dudmuck 8:227605e4a760 1169 radio.tx_buf[7] = 'R';
dudmuck 8:227605e4a760 1170 radio.tx_buf[8] = 0;
dudmuck 8:227605e4a760 1171 for (i = 0; i < 8; i++)
dudmuck 8:227605e4a760 1172 radio.tx_buf[8] += radio.tx_buf[i];
dudmuck 8:227605e4a760 1173
dudmuck 13:c73caaee93a5 1174 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 13:c73caaee93a5 1175 lora.start_tx(lora.RegPayloadLength);
dudmuck 13:c73caaee93a5 1176 } else {
dudmuck 13:c73caaee93a5 1177 fsk.start_tx(9);
dudmuck 13:c73caaee93a5 1178 }
dudmuck 10:d9bb2ce57f05 1179
dudmuck 10:d9bb2ce57f05 1180 led1 = !led1.read();
dudmuck 18:9530d682fd9a 1181
dudmuck 18:9530d682fd9a 1182 if (PacketTxCnt == PacketTxCntEnd) {
dudmuck 18:9530d682fd9a 1183 set_per_en(false);
dudmuck 18:9530d682fd9a 1184 return;
dudmuck 18:9530d682fd9a 1185 }
dudmuck 8:227605e4a760 1186 }
dudmuck 8:227605e4a760 1187
dudmuck 13:c73caaee93a5 1188 int per_parse_rx(uint8_t len)
dudmuck 13:c73caaee93a5 1189 {
dudmuck 13:c73caaee93a5 1190 if (len > 8 && radio.rx_buf[5] == 'P' && radio.rx_buf[6] == 'E' && radio.rx_buf[7] == 'R') {
dudmuck 13:c73caaee93a5 1191 int i;
dudmuck 13:c73caaee93a5 1192 float per;
dudmuck 13:c73caaee93a5 1193
dudmuck 13:c73caaee93a5 1194 /* this is PER packet */
dudmuck 19:be8a8b0e7320 1195 int PacketRxSequence = (radio.rx_buf[1] << 24) | (radio.rx_buf[2] << 16) | (radio.rx_buf[3] << 8) | radio.rx_buf[4];
dudmuck 13:c73caaee93a5 1196 PacketPerOkCnt++;
dudmuck 13:c73caaee93a5 1197
dudmuck 13:c73caaee93a5 1198 if( PacketRxSequence <= PacketRxSequencePrev )
dudmuck 13:c73caaee93a5 1199 { // Sequence went back => resynchronization
dudmuck 13:c73caaee93a5 1200 // dont count missed packets this time
dudmuck 13:c73caaee93a5 1201 i = 0;
dudmuck 13:c73caaee93a5 1202 }
dudmuck 13:c73caaee93a5 1203 else
dudmuck 13:c73caaee93a5 1204 {
dudmuck 13:c73caaee93a5 1205 // determine number of missed packets
dudmuck 13:c73caaee93a5 1206 i = PacketRxSequence - PacketRxSequencePrev - 1;
dudmuck 13:c73caaee93a5 1207 }
dudmuck 13:c73caaee93a5 1208
dudmuck 13:c73caaee93a5 1209 led1 = !led1.read();
dudmuck 13:c73caaee93a5 1210 // be ready for the next
dudmuck 13:c73caaee93a5 1211 PacketRxSequencePrev = PacketRxSequence;
dudmuck 13:c73caaee93a5 1212 // increment 'missed' counter for the RX session
dudmuck 13:c73caaee93a5 1213 PacketPerKoCnt += i;
dudmuck 18:9530d682fd9a 1214 per = ( (float)1.0 - ( float )PacketPerOkCnt / ( float )( PacketPerOkCnt + PacketPerKoCnt ) ) * (float)100.0;
dudmuck 19:be8a8b0e7320 1215 printf("%d, ok=%" PRIu32 " missed=%" PRIu32 " normal=%" PRIu32 " per:%.3f ", PacketRxSequence, PacketPerOkCnt, PacketPerKoCnt, PacketNormalCnt, per);
dudmuck 15:c69b942685ea 1216 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 15:c69b942685ea 1217 printf("pkt:%ddBm, snr:%.1fdB, %ddBm\r\n", lora.get_pkt_rssi(), lora.RegPktSnrValue / 4.0, lora.get_current_rssi());
dudmuck 15:c69b942685ea 1218 else {
dudmuck 16:b9d36c60f2d3 1219 wait_us(10000);
dudmuck 15:c69b942685ea 1220 printf(" -%.1fdBm\r\n", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 15:c69b942685ea 1221 }
dudmuck 15:c69b942685ea 1222
dudmuck 13:c73caaee93a5 1223 return 1;
dudmuck 13:c73caaee93a5 1224 } else {
dudmuck 13:c73caaee93a5 1225 return 0;
dudmuck 13:c73caaee93a5 1226 }
dudmuck 13:c73caaee93a5 1227 }
dudmuck 13:c73caaee93a5 1228
dudmuck 18:9530d682fd9a 1229 typedef enum {
dudmuck 18:9530d682fd9a 1230 ON_TXDONE_STATE_NONE = 0,
dudmuck 18:9530d682fd9a 1231 ON_TXDONE_STATE_SYNC_HI_NIBBLE,
dudmuck 18:9530d682fd9a 1232 ON_TXDONE_STATE_SYNC_LO_NIBBLE,
dudmuck 18:9530d682fd9a 1233 ON_TXDONE_STATE_PAYLOAD_LENGTH,
dudmuck 18:9530d682fd9a 1234 } on_txdone_state_e;
dudmuck 18:9530d682fd9a 1235
dudmuck 18:9530d682fd9a 1236 on_txdone_state_e on_txdone_state;
dudmuck 18:9530d682fd9a 1237
dudmuck 18:9530d682fd9a 1238 uint8_t lora_sync_byte;
dudmuck 18:9530d682fd9a 1239 float on_txdone_delay;
dudmuck 18:9530d682fd9a 1240 Timeout on_txdone_timeout;
dudmuck 18:9530d682fd9a 1241 uint8_t on_txdone_repeat_cnt;
dudmuck 18:9530d682fd9a 1242
dudmuck 18:9530d682fd9a 1243 void txdone_timeout_cb()
dudmuck 18:9530d682fd9a 1244 {
dudmuck 18:9530d682fd9a 1245 uint8_t nib;
dudmuck 18:9530d682fd9a 1246
dudmuck 18:9530d682fd9a 1247 switch (on_txdone_state) {
dudmuck 18:9530d682fd9a 1248 case ON_TXDONE_STATE_SYNC_HI_NIBBLE:
dudmuck 18:9530d682fd9a 1249 nib = lora_sync_byte >> 4;
dudmuck 18:9530d682fd9a 1250 if (nib >= 15) {
dudmuck 18:9530d682fd9a 1251 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 1252 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 1253 } else
dudmuck 18:9530d682fd9a 1254 nib++;
dudmuck 18:9530d682fd9a 1255
dudmuck 18:9530d682fd9a 1256 lora_sync_byte = nib << 4;
dudmuck 18:9530d682fd9a 1257
dudmuck 18:9530d682fd9a 1258 radio.write_reg(REG_LR_SYNC_BYTE, lora_sync_byte);
dudmuck 18:9530d682fd9a 1259 printf("upper %02x\r\n", lora_sync_byte);
dudmuck 18:9530d682fd9a 1260 break;
dudmuck 18:9530d682fd9a 1261 case ON_TXDONE_STATE_SYNC_LO_NIBBLE:
dudmuck 18:9530d682fd9a 1262 nib = lora_sync_byte & 0x0f;
dudmuck 18:9530d682fd9a 1263 if (nib >= 15) {
dudmuck 18:9530d682fd9a 1264 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 1265 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 1266 } else
dudmuck 18:9530d682fd9a 1267 nib++;
dudmuck 18:9530d682fd9a 1268
dudmuck 18:9530d682fd9a 1269 lora_sync_byte = nib & 0x0f;
dudmuck 18:9530d682fd9a 1270
dudmuck 18:9530d682fd9a 1271 radio.write_reg(REG_LR_SYNC_BYTE, lora_sync_byte);
dudmuck 18:9530d682fd9a 1272 printf("lower %02x\r\n", lora_sync_byte);
dudmuck 18:9530d682fd9a 1273 break;
dudmuck 18:9530d682fd9a 1274 case ON_TXDONE_STATE_PAYLOAD_LENGTH:
dudmuck 18:9530d682fd9a 1275 if (++on_txdone_repeat_cnt >= 10) {
dudmuck 18:9530d682fd9a 1276 on_txdone_repeat_cnt = 0;
dudmuck 18:9530d682fd9a 1277 if (lora.RegPayloadLength == 255) {
dudmuck 18:9530d682fd9a 1278 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 1279 printf("done\r\n");
dudmuck 18:9530d682fd9a 1280 on_txdone_state = ON_TXDONE_STATE_NONE;
dudmuck 18:9530d682fd9a 1281 return;
dudmuck 18:9530d682fd9a 1282 }
dudmuck 18:9530d682fd9a 1283 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 1284 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1285 printf("pl %d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1286 }
dudmuck 18:9530d682fd9a 1287 tx_cnt++;
dudmuck 18:9530d682fd9a 1288 radio.tx_buf[0] = tx_cnt;
dudmuck 18:9530d682fd9a 1289 radio.tx_buf[1] = ~tx_cnt;
dudmuck 18:9530d682fd9a 1290 break;
dudmuck 18:9530d682fd9a 1291 default:
dudmuck 18:9530d682fd9a 1292 return;
dudmuck 18:9530d682fd9a 1293 } // ..switch (on_txdone_state)
dudmuck 18:9530d682fd9a 1294
dudmuck 18:9530d682fd9a 1295 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1296 }
dudmuck 18:9530d682fd9a 1297
dudmuck 20:b11592c9ba5f 1298
dudmuck 18:9530d682fd9a 1299 void
dudmuck 18:9530d682fd9a 1300 poll_service_radio()
dudmuck 18:9530d682fd9a 1301 {
dudmuck 18:9530d682fd9a 1302 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 1303 } else { // fsk:
dudmuck 21:b84a77dfb43c 1304 if (rx_payloadReady_int_en)
dudmuck 21:b84a77dfb43c 1305 return;
dudmuck 21:b84a77dfb43c 1306
dudmuck 20:b11592c9ba5f 1307 /*RegIrqFlags2_t RegIrqFlags2;
dudmuck 18:9530d682fd9a 1308 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
dudmuck 18:9530d682fd9a 1309 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 1310 if (RegIrqFlags2.bits.PacketSent) {
dudmuck 18:9530d682fd9a 1311 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 18:9530d682fd9a 1312 printf("poll mode fsk tx done\r\n");
dudmuck 18:9530d682fd9a 1313 }
dudmuck 20:b11592c9ba5f 1314 }*/
dudmuck 20:b11592c9ba5f 1315 static uint8_t rssi;
dudmuck 20:b11592c9ba5f 1316 RegIrqFlags2_t RegIrqFlags2;
dudmuck 20:b11592c9ba5f 1317 RegIrqFlags1_t RegIrqFlags1;
dudmuck 20:b11592c9ba5f 1318 RegIrqFlags1.octet = radio.read_reg(REG_FSK_IRQFLAGS1);
dudmuck 20:b11592c9ba5f 1319 if (RegIrqFlags1.octet != fsk_RegIrqFlags1_prev.octet) {
dudmuck 20:b11592c9ba5f 1320 printf("iF1:");
dudmuck 20:b11592c9ba5f 1321 if (RegIrqFlags1.bits.ModeReady ^ fsk_RegIrqFlags1_prev.bits.ModeReady) {
dudmuck 20:b11592c9ba5f 1322 printf("ModeReady-");
dudmuck 20:b11592c9ba5f 1323 if (RegIrqFlags1.bits.ModeReady)
dudmuck 20:b11592c9ba5f 1324 printf("on ");
dudmuck 20:b11592c9ba5f 1325 else
dudmuck 20:b11592c9ba5f 1326 printf("off ");
dudmuck 20:b11592c9ba5f 1327 }
dudmuck 20:b11592c9ba5f 1328 if (RegIrqFlags1.bits.RxReady ^ fsk_RegIrqFlags1_prev.bits.RxReady) {
dudmuck 20:b11592c9ba5f 1329 printf("RxReady-");
dudmuck 20:b11592c9ba5f 1330 if (RegIrqFlags1.bits.RxReady)
dudmuck 20:b11592c9ba5f 1331 printf("on ");
dudmuck 20:b11592c9ba5f 1332 else
dudmuck 20:b11592c9ba5f 1333 printf("off ");
dudmuck 20:b11592c9ba5f 1334 }
dudmuck 20:b11592c9ba5f 1335 if (RegIrqFlags1.bits.TxReady ^ fsk_RegIrqFlags1_prev.bits.TxReady) {
dudmuck 20:b11592c9ba5f 1336 printf("TxReady-");
dudmuck 20:b11592c9ba5f 1337 if (RegIrqFlags1.bits.TxReady)
dudmuck 20:b11592c9ba5f 1338 printf("on ");
dudmuck 20:b11592c9ba5f 1339 else
dudmuck 20:b11592c9ba5f 1340 printf("off ");
dudmuck 20:b11592c9ba5f 1341 }
dudmuck 20:b11592c9ba5f 1342 if (RegIrqFlags1.bits.PllLock ^ fsk_RegIrqFlags1_prev.bits.PllLock) {
dudmuck 20:b11592c9ba5f 1343 printf("PllLock-");
dudmuck 20:b11592c9ba5f 1344 if (RegIrqFlags1.bits.PllLock)
dudmuck 20:b11592c9ba5f 1345 printf("on ");
dudmuck 20:b11592c9ba5f 1346 else
dudmuck 20:b11592c9ba5f 1347 printf("off ");
dudmuck 20:b11592c9ba5f 1348 }
dudmuck 20:b11592c9ba5f 1349 if (RegIrqFlags1.bits.Rssi ^ fsk_RegIrqFlags1_prev.bits.Rssi) {
dudmuck 20:b11592c9ba5f 1350 printf("Rssi-");
dudmuck 20:b11592c9ba5f 1351 if (RegIrqFlags1.bits.Rssi)
dudmuck 20:b11592c9ba5f 1352 printf("on ");
dudmuck 20:b11592c9ba5f 1353 else
dudmuck 20:b11592c9ba5f 1354 printf("off ");
dudmuck 20:b11592c9ba5f 1355 }
dudmuck 20:b11592c9ba5f 1356 if (RegIrqFlags1.bits.Timeout ^ fsk_RegIrqFlags1_prev.bits.Timeout) {
dudmuck 20:b11592c9ba5f 1357 printf("Timeout-");
dudmuck 20:b11592c9ba5f 1358 if (RegIrqFlags1.bits.Timeout)
dudmuck 20:b11592c9ba5f 1359 printf("on ");
dudmuck 20:b11592c9ba5f 1360 else
dudmuck 20:b11592c9ba5f 1361 printf("off ");
dudmuck 20:b11592c9ba5f 1362 }
dudmuck 20:b11592c9ba5f 1363 if (RegIrqFlags1.bits.PreambleDetect ^ fsk_RegIrqFlags1_prev.bits.PreambleDetect) {
dudmuck 20:b11592c9ba5f 1364 printf("PreambleDetect-");
dudmuck 20:b11592c9ba5f 1365 if (RegIrqFlags1.bits.PreambleDetect)
dudmuck 20:b11592c9ba5f 1366 printf("on ");
dudmuck 20:b11592c9ba5f 1367 else
dudmuck 20:b11592c9ba5f 1368 printf("off ");
dudmuck 20:b11592c9ba5f 1369 }
dudmuck 20:b11592c9ba5f 1370 if (RegIrqFlags1.bits.SyncAddressMatch ^ fsk_RegIrqFlags1_prev.bits.SyncAddressMatch) {
dudmuck 20:b11592c9ba5f 1371 printf("SyncAddressMatch-");
dudmuck 20:b11592c9ba5f 1372 if (RegIrqFlags1.bits.SyncAddressMatch)
dudmuck 20:b11592c9ba5f 1373 printf("on ");
dudmuck 20:b11592c9ba5f 1374 else
dudmuck 20:b11592c9ba5f 1375 printf("off ");
dudmuck 20:b11592c9ba5f 1376 }
dudmuck 20:b11592c9ba5f 1377 fsk_RegIrqFlags1_prev.octet = RegIrqFlags1.octet;
dudmuck 20:b11592c9ba5f 1378 printf("\r\n");
dudmuck 20:b11592c9ba5f 1379 fflush(stdout);
dudmuck 20:b11592c9ba5f 1380 }
dudmuck 20:b11592c9ba5f 1381 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 20:b11592c9ba5f 1382 if (RegIrqFlags2.octet != fsk_RegIrqFlags2_prev.octet) {
dudmuck 20:b11592c9ba5f 1383 printf("iF2:");
dudmuck 20:b11592c9ba5f 1384 if (RegIrqFlags2.bits.FifoFull ^ fsk_RegIrqFlags2_prev.bits.FifoFull) {
dudmuck 20:b11592c9ba5f 1385 printf("FifoFull-");
dudmuck 20:b11592c9ba5f 1386 if (RegIrqFlags2.bits.FifoFull)
dudmuck 20:b11592c9ba5f 1387 printf("on ");
dudmuck 20:b11592c9ba5f 1388 else
dudmuck 20:b11592c9ba5f 1389 printf("off ");
dudmuck 20:b11592c9ba5f 1390 }
dudmuck 20:b11592c9ba5f 1391 if (RegIrqFlags2.bits.FifoEmpty ^ fsk_RegIrqFlags2_prev.bits.FifoEmpty) {
dudmuck 20:b11592c9ba5f 1392 printf("FifoEmpty-");
dudmuck 20:b11592c9ba5f 1393 if (RegIrqFlags2.bits.FifoEmpty)
dudmuck 20:b11592c9ba5f 1394 printf("on ");
dudmuck 20:b11592c9ba5f 1395 else {
dudmuck 20:b11592c9ba5f 1396 printf("off ");
dudmuck 20:b11592c9ba5f 1397 rssi = radio.read_reg(REG_FSK_RSSIVALUE);
dudmuck 20:b11592c9ba5f 1398 }
dudmuck 20:b11592c9ba5f 1399 }
dudmuck 20:b11592c9ba5f 1400 if (RegIrqFlags2.bits.FifoLevel ^ fsk_RegIrqFlags2_prev.bits.FifoLevel) {
dudmuck 20:b11592c9ba5f 1401 printf("FifoLevel-");
dudmuck 20:b11592c9ba5f 1402 if (RegIrqFlags2.bits.FifoLevel)
dudmuck 20:b11592c9ba5f 1403 printf("on ");
dudmuck 20:b11592c9ba5f 1404 else
dudmuck 20:b11592c9ba5f 1405 printf("off ");
dudmuck 20:b11592c9ba5f 1406 }
dudmuck 20:b11592c9ba5f 1407 if (RegIrqFlags2.bits.FifoOverrun ^ fsk_RegIrqFlags2_prev.bits.FifoOverrun) {
dudmuck 20:b11592c9ba5f 1408 printf("FifoOverrun-");
dudmuck 20:b11592c9ba5f 1409 if (RegIrqFlags2.bits.FifoOverrun)
dudmuck 20:b11592c9ba5f 1410 printf("on ");
dudmuck 20:b11592c9ba5f 1411 else
dudmuck 20:b11592c9ba5f 1412 printf("off ");
dudmuck 20:b11592c9ba5f 1413 }
dudmuck 20:b11592c9ba5f 1414 if (RegIrqFlags2.bits.PacketSent ^ fsk_RegIrqFlags2_prev.bits.PacketSent) {
dudmuck 20:b11592c9ba5f 1415 printf("PacketSent-");
dudmuck 20:b11592c9ba5f 1416 if (RegIrqFlags2.bits.PacketSent) {
dudmuck 20:b11592c9ba5f 1417 printf("on ");
dudmuck 20:b11592c9ba5f 1418 } else
dudmuck 20:b11592c9ba5f 1419 printf("off ");
dudmuck 20:b11592c9ba5f 1420 }
dudmuck 20:b11592c9ba5f 1421 if (RegIrqFlags2.bits.PayloadReady ^ fsk_RegIrqFlags2_prev.bits.PayloadReady) {
dudmuck 20:b11592c9ba5f 1422 printf("PayloadReady-");
dudmuck 20:b11592c9ba5f 1423 if (RegIrqFlags2.bits.PayloadReady)
dudmuck 20:b11592c9ba5f 1424 printf("on ");
dudmuck 20:b11592c9ba5f 1425 else
dudmuck 20:b11592c9ba5f 1426 printf("off ");
dudmuck 20:b11592c9ba5f 1427 }
dudmuck 20:b11592c9ba5f 1428 if (RegIrqFlags2.bits.CrcOk ^ fsk_RegIrqFlags2_prev.bits.CrcOk) {
dudmuck 20:b11592c9ba5f 1429 printf("CrcOk-");
dudmuck 20:b11592c9ba5f 1430 if (RegIrqFlags2.bits.CrcOk)
dudmuck 20:b11592c9ba5f 1431 printf("on ");
dudmuck 20:b11592c9ba5f 1432 else
dudmuck 20:b11592c9ba5f 1433 printf("off ");
dudmuck 20:b11592c9ba5f 1434 }
dudmuck 20:b11592c9ba5f 1435 if (RegIrqFlags2.bits.LowBat ^ fsk_RegIrqFlags2_prev.bits.LowBat) {
dudmuck 20:b11592c9ba5f 1436 printf("LowBat-");
dudmuck 20:b11592c9ba5f 1437 if (RegIrqFlags2.bits.LowBat)
dudmuck 20:b11592c9ba5f 1438 printf("on ");
dudmuck 20:b11592c9ba5f 1439 else
dudmuck 20:b11592c9ba5f 1440 printf("off ");
dudmuck 20:b11592c9ba5f 1441 }
dudmuck 20:b11592c9ba5f 1442 fsk_RegIrqFlags2_prev.octet = RegIrqFlags2.octet;
dudmuck 20:b11592c9ba5f 1443 printf("\r\n");
dudmuck 20:b11592c9ba5f 1444 fflush(stdout);
dudmuck 20:b11592c9ba5f 1445
dudmuck 20:b11592c9ba5f 1446 if (RegIrqFlags2.bits.PacketSent) {
dudmuck 20:b11592c9ba5f 1447 if (fsk.tx_done_sleep)
dudmuck 20:b11592c9ba5f 1448 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 20:b11592c9ba5f 1449 else
dudmuck 20:b11592c9ba5f 1450 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 20:b11592c9ba5f 1451 }
dudmuck 20:b11592c9ba5f 1452
dudmuck 20:b11592c9ba5f 1453 if (RegIrqFlags2.bits.CrcOk || RegIrqFlags2.bits.PayloadReady) {
dudmuck 20:b11592c9ba5f 1454 if (fsk.RegRxConfig.bits.AfcAutoOn) {
dudmuck 20:b11592c9ba5f 1455 fsk.RegAfcValue = radio.read_s16(REG_FSK_AFCMSB);
dudmuck 20:b11592c9ba5f 1456 printf("%dHz ", (int)(FREQ_STEP_HZ * fsk.RegAfcValue));
dudmuck 20:b11592c9ba5f 1457 if (rssi != 0) {
dudmuck 20:b11592c9ba5f 1458 printf("pkt:-%.1fdBm ", rssi / 2.0);
dudmuck 20:b11592c9ba5f 1459 rssi = 0;
dudmuck 20:b11592c9ba5f 1460 }
dudmuck 20:b11592c9ba5f 1461 }
dudmuck 20:b11592c9ba5f 1462 if (fsk.RegPktConfig1.bits.PacketFormatVariable) {
dudmuck 20:b11592c9ba5f 1463 fsk.rx_buf_length = radio.read_reg(REG_FIFO);
dudmuck 20:b11592c9ba5f 1464 } else {
dudmuck 20:b11592c9ba5f 1465 fsk.rx_buf_length = fsk.RegPktConfig2.bits.PayloadLength;
dudmuck 20:b11592c9ba5f 1466 }
dudmuck 20:b11592c9ba5f 1467
dudmuck 20:b11592c9ba5f 1468 radio.m_cs = 0;
dudmuck 20:b11592c9ba5f 1469 radio.m_spi.write(REG_FIFO); // bit7 is low for reading from radio
dudmuck 20:b11592c9ba5f 1470 for (int i = 0; i < fsk.rx_buf_length; i++) {
dudmuck 20:b11592c9ba5f 1471 radio.rx_buf[i] = radio.m_spi.write(0);
dudmuck 20:b11592c9ba5f 1472 }
dudmuck 20:b11592c9ba5f 1473 radio.m_cs = 1;
dudmuck 20:b11592c9ba5f 1474 /****/
dudmuck 20:b11592c9ba5f 1475 if (per_en) {
dudmuck 20:b11592c9ba5f 1476 if (!per_parse_rx(fsk.rx_buf_length)) {
dudmuck 20:b11592c9ba5f 1477 PacketNormalCnt++;
dudmuck 20:b11592c9ba5f 1478 print_rx_buf(fsk.rx_buf_length);
dudmuck 20:b11592c9ba5f 1479 }
dudmuck 20:b11592c9ba5f 1480 } else {
dudmuck 20:b11592c9ba5f 1481 print_rx_buf(fsk.rx_buf_length);
dudmuck 20:b11592c9ba5f 1482 }
dudmuck 20:b11592c9ba5f 1483 fflush(stdout);
dudmuck 20:b11592c9ba5f 1484 } // ..if CrcOk or PayloadReady
dudmuck 20:b11592c9ba5f 1485 } // ..if RegIrqFlags2 changed
dudmuck 20:b11592c9ba5f 1486 } // ...fsk
dudmuck 18:9530d682fd9a 1487 }
dudmuck 18:9530d682fd9a 1488
dudmuck 18:9530d682fd9a 1489 void cadper_service()
dudmuck 18:9530d682fd9a 1490 {
dudmuck 18:9530d682fd9a 1491 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1492
dudmuck 18:9530d682fd9a 1493
dudmuck 18:9530d682fd9a 1494 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 1495 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 1496 do {
dudmuck 18:9530d682fd9a 1497 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1498 if (lora.RegIrqFlags.bits.RxDone) {
dudmuck 18:9530d682fd9a 1499 service_action_e act = lora.service();
dudmuck 18:9530d682fd9a 1500 if (act == SERVICE_READ_FIFO) {
dudmuck 18:9530d682fd9a 1501 if (!per_parse_rx(lora.RegRxNbBytes)) {
dudmuck 18:9530d682fd9a 1502 PacketNormalCnt++;
dudmuck 21:b84a77dfb43c 1503 lora_print_rx_verbose(lora.RegRxNbBytes);
dudmuck 18:9530d682fd9a 1504 }
dudmuck 18:9530d682fd9a 1505 }
dudmuck 18:9530d682fd9a 1506 break;
dudmuck 18:9530d682fd9a 1507 }
dudmuck 18:9530d682fd9a 1508 } while (!lora.RegIrqFlags.bits.RxTimeout);
dudmuck 18:9530d682fd9a 1509 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 1510 }
dudmuck 18:9530d682fd9a 1511
dudmuck 18:9530d682fd9a 1512 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 1513 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1514 num_cads++;
dudmuck 18:9530d682fd9a 1515 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 1516 }
dudmuck 18:9530d682fd9a 1517
dudmuck 18:9530d682fd9a 1518 }
dudmuck 18:9530d682fd9a 1519
dudmuck 20:b11592c9ba5f 1520 void cmd_restart_rx(uint8_t);
dudmuck 22:2005df80c8a8 1521 int preamble_to_sync_us;
Wayne Roberts 24:9ba45aa15b53 1522 #ifndef TARGET_DISCO_L072CZ_LRWAN1
dudmuck 20:b11592c9ba5f 1523 Timeout timeout_syncAddress;
dudmuck 20:b11592c9ba5f 1524 bool get_syncAddress;
dudmuck 22:2005df80c8a8 1525 #endif
dudmuck 20:b11592c9ba5f 1526 float preamble_detect_at;
dudmuck 20:b11592c9ba5f 1527
dudmuck 20:b11592c9ba5f 1528 void callback_sa_timeout()
dudmuck 20:b11592c9ba5f 1529 {
dudmuck 20:b11592c9ba5f 1530 printf("syncAddress timeout ");
dudmuck 20:b11592c9ba5f 1531 if (dio2.read() == 0) {
dudmuck 20:b11592c9ba5f 1532 //cmd_restart_rx(0);
dudmuck 20:b11592c9ba5f 1533 rx_start_timer.reset();
dudmuck 20:b11592c9ba5f 1534 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 23:821b4f426ee6 1535 printf("(false preamble detect at %f, secs:%lu)\r\n", preamble_detect_at, time(NULL) - secs_rx_start);
dudmuck 20:b11592c9ba5f 1536 secs_rx_start = time(NULL);
dudmuck 20:b11592c9ba5f 1537 radio.set_opmode(RF_OPMODE_RECEIVER);
dudmuck 20:b11592c9ba5f 1538 } else
dudmuck 20:b11592c9ba5f 1539 printf("\r\n");
dudmuck 20:b11592c9ba5f 1540 }
dudmuck 20:b11592c9ba5f 1541
dudmuck 0:be215de91a68 1542 void
dudmuck 0:be215de91a68 1543 service_radio()
dudmuck 0:be215de91a68 1544 {
dudmuck 1:1cd0afbed23c 1545 service_action_e act;
dudmuck 14:c57ea544dc18 1546 static uint8_t rssi = 0;
dudmuck 1:1cd0afbed23c 1547
dudmuck 1:1cd0afbed23c 1548 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 21:b84a77dfb43c 1549 if (rssi_polling_thresh != 0 && radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
dudmuck 23:821b4f426ee6 1550 rssi = lora.get_current_rssi(); // dBm returned, negative value
Wayne Roberts 24:9ba45aa15b53 1551 #if defined(TARGET_STM) && !defined(TARGET_DISCO_L072CZ_LRWAN1) && !defined(TARGET_MTS_MDOT_F411RE)
dudmuck 21:b84a77dfb43c 1552 if (rssi < rssi_polling_thresh)
dudmuck 21:b84a77dfb43c 1553 pc3 = 0; // signal weaker than threshold
dudmuck 21:b84a77dfb43c 1554 else
dudmuck 21:b84a77dfb43c 1555 pc3 = 1; // signal stronger than threshold
dudmuck 21:b84a77dfb43c 1556 #endif
dudmuck 21:b84a77dfb43c 1557 }
dudmuck 21:b84a77dfb43c 1558
dudmuck 18:9530d682fd9a 1559 if (cadper_enable) {
dudmuck 18:9530d682fd9a 1560 cadper_service();
dudmuck 18:9530d682fd9a 1561 }
dudmuck 4:7a9007dfc0e5 1562
dudmuck 1:1cd0afbed23c 1563 act = lora.service();
dudmuck 0:be215de91a68 1564
dudmuck 1:1cd0afbed23c 1565 switch (act) {
dudmuck 1:1cd0afbed23c 1566 case SERVICE_READ_FIFO:
dudmuck 8:227605e4a760 1567 if (app == APP_NONE) {
dudmuck 8:227605e4a760 1568 if (per_en) {
dudmuck 13:c73caaee93a5 1569 if (!per_parse_rx(lora.RegRxNbBytes)) {
dudmuck 8:227605e4a760 1570 PacketNormalCnt++;
dudmuck 21:b84a77dfb43c 1571 lora_print_rx_verbose(lora.RegRxNbBytes);
dudmuck 8:227605e4a760 1572 }
dudmuck 8:227605e4a760 1573 } else
dudmuck 21:b84a77dfb43c 1574 lora_print_rx_verbose(lora.RegRxNbBytes);
dudmuck 15:c69b942685ea 1575 fflush(stdout);
dudmuck 1:1cd0afbed23c 1576 } else if (app == APP_CHAT) {
dudmuck 1:1cd0afbed23c 1577 if (lora.RegHopChannel.bits.RxPayloadCrcOn) {
dudmuck 1:1cd0afbed23c 1578 if (lora.RegIrqFlags.bits.PayloadCrcError)
dudmuck 1:1cd0afbed23c 1579 printf("crcError\r\n");
dudmuck 1:1cd0afbed23c 1580 else {
dudmuck 1:1cd0afbed23c 1581 int n = lora.RegRxNbBytes;
dudmuck 1:1cd0afbed23c 1582 radio.rx_buf[n++] = '\r';
dudmuck 1:1cd0afbed23c 1583 radio.rx_buf[n++] = '\n';
dudmuck 1:1cd0afbed23c 1584 radio.rx_buf[n] = 0; // null terminate
dudmuck 1:1cd0afbed23c 1585 printf((char *)radio.rx_buf);
dudmuck 1:1cd0afbed23c 1586 }
dudmuck 1:1cd0afbed23c 1587 } else
dudmuck 1:1cd0afbed23c 1588 printf("crcOff\r\n");
dudmuck 1:1cd0afbed23c 1589
dudmuck 1:1cd0afbed23c 1590 // clear Irq flags
dudmuck 1:1cd0afbed23c 1591 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 1:1cd0afbed23c 1592 // should still be in receive mode
dudmuck 0:be215de91a68 1593 }
dudmuck 1:1cd0afbed23c 1594 break;
dudmuck 1:1cd0afbed23c 1595 case SERVICE_TX_DONE:
dudmuck 1:1cd0afbed23c 1596 if (app == APP_CHAT) {
dudmuck 18:9530d682fd9a 1597 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 8:227605e4a760 1598 } else if (per_en) {
dudmuck 18:9530d682fd9a 1599 per_timeout.attach(&per_cb, per_tx_delay); // start next TX
dudmuck 18:9530d682fd9a 1600 } else if (on_txdone_state != ON_TXDONE_STATE_NONE) {
dudmuck 18:9530d682fd9a 1601 on_txdone_timeout.attach(&txdone_timeout_cb, on_txdone_delay);
dudmuck 1:1cd0afbed23c 1602 }
dudmuck 1:1cd0afbed23c 1603 break;
dudmuck 1:1cd0afbed23c 1604 case SERVICE_ERROR:
dudmuck 1:1cd0afbed23c 1605 printf("error\r\n");
dudmuck 1:1cd0afbed23c 1606 break;
dudmuck 19:be8a8b0e7320 1607 case SERVICE_NONE:
dudmuck 19:be8a8b0e7320 1608 break;
dudmuck 1:1cd0afbed23c 1609 } // ...switch (act)
dudmuck 1:1cd0afbed23c 1610 } else {
dudmuck 1:1cd0afbed23c 1611 /* FSK: */
dudmuck 21:b84a77dfb43c 1612
dudmuck 21:b84a77dfb43c 1613 if (rx_payloadReady_int_en)
dudmuck 21:b84a77dfb43c 1614 return; // radio service by ISR only
dudmuck 21:b84a77dfb43c 1615
dudmuck 21:b84a77dfb43c 1616 if (ulrx_enable)
dudmuck 21:b84a77dfb43c 1617 return;
dudmuck 21:b84a77dfb43c 1618
dudmuck 1:1cd0afbed23c 1619 act = fsk.service();
dudmuck 1:1cd0afbed23c 1620
dudmuck 1:1cd0afbed23c 1621 switch (act) {
dudmuck 1:1cd0afbed23c 1622 case SERVICE_READ_FIFO:
dudmuck 2:c6b23a43a9d9 1623 if (app == APP_CHAT) {
dudmuck 2:c6b23a43a9d9 1624 int n = fsk.rx_buf_length;
dudmuck 2:c6b23a43a9d9 1625 radio.rx_buf[n++] = '\r';
dudmuck 2:c6b23a43a9d9 1626 radio.rx_buf[n++] = '\n';
dudmuck 2:c6b23a43a9d9 1627 radio.rx_buf[n] = 0; // null terminate
dudmuck 2:c6b23a43a9d9 1628 printf((char *)radio.rx_buf);
dudmuck 2:c6b23a43a9d9 1629 } else {
dudmuck 21:b84a77dfb43c 1630 if (fsk.RegRxConfig.bits.AfcAutoOn) {
dudmuck 14:c57ea544dc18 1631 printf("%dHz ", (int)(FREQ_STEP_HZ * fsk.RegAfcValue));
dudmuck 14:c57ea544dc18 1632 if (rssi != 0) {
dudmuck 15:c69b942685ea 1633 printf("pkt:-%.1fdBm ", rssi / 2.0);
dudmuck 14:c57ea544dc18 1634 rssi = 0;
dudmuck 15:c69b942685ea 1635 }
dudmuck 21:b84a77dfb43c 1636 }
dudmuck 13:c73caaee93a5 1637 if (per_en) {
dudmuck 13:c73caaee93a5 1638 if (!per_parse_rx(fsk.rx_buf_length)) {
dudmuck 13:c73caaee93a5 1639 PacketNormalCnt++;
dudmuck 13:c73caaee93a5 1640 print_rx_buf(fsk.rx_buf_length);
dudmuck 13:c73caaee93a5 1641 }
dudmuck 13:c73caaee93a5 1642 } else {
dudmuck 13:c73caaee93a5 1643 print_rx_buf(fsk.rx_buf_length);
dudmuck 13:c73caaee93a5 1644 }
dudmuck 21:b84a77dfb43c 1645
dudmuck 2:c6b23a43a9d9 1646 }
dudmuck 21:b84a77dfb43c 1647 if (crc32_en) {
dudmuck 21:b84a77dfb43c 1648 uint32_t c, *u32_ptr = (uint32_t*)&radio.rx_buf[fsk.rx_buf_length-4];
dudmuck 23:821b4f426ee6 1649 printf("rx crc:%08x, ", (unsigned int)(*u32_ptr));
dudmuck 21:b84a77dfb43c 1650 c = gen_crc(radio.rx_buf, fsk.rx_buf_length-4);
dudmuck 23:821b4f426ee6 1651 printf("calc crc:%08x\r\n", (unsigned int)c);
dudmuck 21:b84a77dfb43c 1652 }
dudmuck 21:b84a77dfb43c 1653 fflush(stdout);
dudmuck 1:1cd0afbed23c 1654 break;
dudmuck 2:c6b23a43a9d9 1655 case SERVICE_TX_DONE:
dudmuck 18:9530d682fd9a 1656 if (ook_test_en)
dudmuck 18:9530d682fd9a 1657 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 2:c6b23a43a9d9 1658 if (app == APP_CHAT) {
dudmuck 2:c6b23a43a9d9 1659 fsk.start_rx();
dudmuck 13:c73caaee93a5 1660 } else if (per_en) {
dudmuck 13:c73caaee93a5 1661 per_timeout.attach(&per_cb, per_tx_delay); // start next TX
dudmuck 13:c73caaee93a5 1662 }
dudmuck 2:c6b23a43a9d9 1663 break;
dudmuck 19:be8a8b0e7320 1664 case SERVICE_ERROR:
dudmuck 19:be8a8b0e7320 1665 case SERVICE_NONE:
dudmuck 19:be8a8b0e7320 1666 break;
dudmuck 20:b11592c9ba5f 1667 } // ...switch (act)
dudmuck 22:2005df80c8a8 1668
Wayne Roberts 24:9ba45aa15b53 1669 #ifndef TARGET_DISCO_L072CZ_LRWAN1
dudmuck 20:b11592c9ba5f 1670 /* FSK receiver handling of preamble detection */
dudmuck 20:b11592c9ba5f 1671 if (radio.RegDioMapping2.bits.MapPreambleDetect && radio.RegDioMapping2.bits.Dio4Mapping == 3) {
dudmuck 20:b11592c9ba5f 1672 if (saved_dio4 != dio4.read()) {
dudmuck 20:b11592c9ba5f 1673 //printf("predet-dio4:%d\r\n", dio4.read());
dudmuck 20:b11592c9ba5f 1674 /* FSK: preamble detect state change */
dudmuck 20:b11592c9ba5f 1675 if (dio4.read()) {
dudmuck 20:b11592c9ba5f 1676 if (radio.RegDioMapping1.bits.Dio2Mapping == 3) { // if we can see SyncAddress
dudmuck 20:b11592c9ba5f 1677 get_syncAddress = true;
dudmuck 20:b11592c9ba5f 1678 timeout_syncAddress.attach_us(callback_sa_timeout, preamble_to_sync_us);
dudmuck 20:b11592c9ba5f 1679 }
dudmuck 20:b11592c9ba5f 1680 /* how long after RX start is preamble detection occuring? */
dudmuck 20:b11592c9ba5f 1681 //printf("preamble detect at %f\r\n", rx_start_timer.read());
dudmuck 20:b11592c9ba5f 1682 preamble_detect_at = rx_start_timer.read();
dudmuck 20:b11592c9ba5f 1683 } else {
dudmuck 20:b11592c9ba5f 1684 get_syncAddress = false;
dudmuck 20:b11592c9ba5f 1685 //printf("preamble detect clear\r\n");
dudmuck 20:b11592c9ba5f 1686 }
dudmuck 20:b11592c9ba5f 1687 saved_dio4 = dio4.read();
dudmuck 20:b11592c9ba5f 1688 }
dudmuck 20:b11592c9ba5f 1689 } // ..if dio4 is
dudmuck 22:2005df80c8a8 1690
dudmuck 20:b11592c9ba5f 1691 if (radio.RegDioMapping1.bits.Dio2Mapping == 3) {
dudmuck 20:b11592c9ba5f 1692 if (dio2.read()) {
dudmuck 20:b11592c9ba5f 1693 if (get_syncAddress) {
dudmuck 20:b11592c9ba5f 1694 timeout_syncAddress.detach();
dudmuck 20:b11592c9ba5f 1695 get_syncAddress = false;
dudmuck 20:b11592c9ba5f 1696 }
dudmuck 15:c69b942685ea 1697 rssi = radio.read_reg(REG_FSK_RSSIVALUE);
dudmuck 14:c57ea544dc18 1698 }
dudmuck 14:c57ea544dc18 1699 }
Wayne Roberts 24:9ba45aa15b53 1700 #endif /* !TARGET_DISCO_L072CZ_LRWAN1 */
dudmuck 22:2005df80c8a8 1701
dudmuck 21:b84a77dfb43c 1702 if (rssi_polling_thresh != 0 && radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
dudmuck 21:b84a77dfb43c 1703 rssi = radio.read_reg(REG_FSK_RSSIVALUE);
dudmuck 21:b84a77dfb43c 1704 rssi = -rssi;
Wayne Roberts 24:9ba45aa15b53 1705 #if defined(TARGET_STM) && !defined(TARGET_DISCO_L072CZ_LRWAN1) && !defined(TARGET_MTS_MDOT_F411RE)
dudmuck 21:b84a77dfb43c 1706 if (rssi < rssi_polling_thresh)
dudmuck 21:b84a77dfb43c 1707 pc3 = 0; // signal weaker than threshold
dudmuck 21:b84a77dfb43c 1708 else
dudmuck 21:b84a77dfb43c 1709 pc3 = 1; // signal stronger than threshold
dudmuck 22:2005df80c8a8 1710 #endif
dudmuck 21:b84a77dfb43c 1711 }
dudmuck 22:2005df80c8a8 1712
dudmuck 14:c57ea544dc18 1713 } // ...!radio.RegOpMode.bits.LongRangeMode
dudmuck 0:be215de91a68 1714 }
dudmuck 0:be215de91a68 1715
dudmuck 5:360069ec9953 1716 /*int get_kbd_str(char* buf, int size)
dudmuck 0:be215de91a68 1717 {
dudmuck 0:be215de91a68 1718 char c;
dudmuck 0:be215de91a68 1719 int i;
dudmuck 0:be215de91a68 1720 static int prev_len;
dudmuck 0:be215de91a68 1721
dudmuck 0:be215de91a68 1722 for (i = 0;;) {
dudmuck 0:be215de91a68 1723 if (pc.readable()) {
dudmuck 0:be215de91a68 1724 c = pc.getc();
dudmuck 0:be215de91a68 1725 if (c == 8 && i > 0) {
dudmuck 0:be215de91a68 1726 pc.putc(8);
dudmuck 0:be215de91a68 1727 pc.putc(' ');
dudmuck 0:be215de91a68 1728 pc.putc(8);
dudmuck 0:be215de91a68 1729 i--;
dudmuck 0:be215de91a68 1730 } else if (c == '\r') {
dudmuck 0:be215de91a68 1731 if (i == 0) {
dudmuck 0:be215de91a68 1732 return prev_len; // repeat previous
dudmuck 0:be215de91a68 1733 } else {
dudmuck 0:be215de91a68 1734 buf[i] = 0; // null terminate
dudmuck 0:be215de91a68 1735 prev_len = i;
dudmuck 0:be215de91a68 1736 return i;
dudmuck 0:be215de91a68 1737 }
dudmuck 0:be215de91a68 1738 } else if (c == 3) {
dudmuck 0:be215de91a68 1739 // ctrl-C abort
dudmuck 0:be215de91a68 1740 return -1;
dudmuck 0:be215de91a68 1741 } else if (i < size) {
dudmuck 0:be215de91a68 1742 buf[i++] = c;
dudmuck 0:be215de91a68 1743 pc.putc(c);
dudmuck 0:be215de91a68 1744 }
dudmuck 4:7a9007dfc0e5 1745 } else {
dudmuck 0:be215de91a68 1746 service_radio();
dudmuck 4:7a9007dfc0e5 1747 }
dudmuck 0:be215de91a68 1748 } // ...for()
dudmuck 5:360069ec9953 1749 }*/
dudmuck 0:be215de91a68 1750
dudmuck 0:be215de91a68 1751 void
dudmuck 0:be215de91a68 1752 console_chat()
dudmuck 0:be215de91a68 1753 {
dudmuck 5:360069ec9953 1754 //int i, len = get_kbd_str(pcbuf, sizeof(pcbuf));
dudmuck 5:360069ec9953 1755
dudmuck 5:360069ec9953 1756 service_radio();
dudmuck 5:360069ec9953 1757
dudmuck 5:360069ec9953 1758 if (pcbuf_len < 0) {
dudmuck 0:be215de91a68 1759 printf("chat abort\r\n");
dudmuck 5:360069ec9953 1760 pcbuf_len = 0;
dudmuck 0:be215de91a68 1761 app = APP_NONE;
dudmuck 0:be215de91a68 1762 return;
dudmuck 5:360069ec9953 1763 } else if (pcbuf_len == 0) {
dudmuck 5:360069ec9953 1764 return;
dudmuck 0:be215de91a68 1765 } else {
dudmuck 5:360069ec9953 1766 int i;
dudmuck 5:360069ec9953 1767 for (i = 0; i < pcbuf_len; i++)
dudmuck 0:be215de91a68 1768 radio.tx_buf[i] = pcbuf[i];
dudmuck 1:1cd0afbed23c 1769 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 5:360069ec9953 1770 lora.RegPayloadLength = pcbuf_len;
dudmuck 1:1cd0afbed23c 1771 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 5:360069ec9953 1772 lora.start_tx(pcbuf_len);
dudmuck 2:c6b23a43a9d9 1773 } else {
dudmuck 5:360069ec9953 1774 fsk.start_tx(pcbuf_len);
dudmuck 2:c6b23a43a9d9 1775 }
dudmuck 5:360069ec9953 1776 pcbuf_len = 0;
dudmuck 0:be215de91a68 1777 printf("\r\n");
dudmuck 0:be215de91a68 1778 }
dudmuck 0:be215de91a68 1779 }
dudmuck 0:be215de91a68 1780
dudmuck 22:2005df80c8a8 1781 const uint8_t ookt_tx_payload[29] = {
dudmuck 21:b84a77dfb43c 1782 0x55, 0x55, 0x55, 0x55, 0xA9, 0x66, 0x69, 0x65,
dudmuck 21:b84a77dfb43c 1783 0x39, 0x53, 0xAA, 0xC3, 0xA6, 0x95, 0xC6, 0x3C,
dudmuck 21:b84a77dfb43c 1784 0x6A, 0x33, 0x33, 0xC6, 0xCA, 0xA6, 0x33, 0x33,
dudmuck 21:b84a77dfb43c 1785 0x55, 0x6A, 0xA6, 0xAA, 0x53
dudmuck 21:b84a77dfb43c 1786 };
dudmuck 23:821b4f426ee6 1787 volatile unsigned int ook_tx_cnt = 0;
dudmuck 21:b84a77dfb43c 1788
dudmuck 21:b84a77dfb43c 1789 void callback_ook_tx_test()
dudmuck 21:b84a77dfb43c 1790 {
dudmuck 23:821b4f426ee6 1791 unsigned int i;
dudmuck 21:b84a77dfb43c 1792
dudmuck 21:b84a77dfb43c 1793 //radio.write_reg(REG_FSK_SYNCCONFIG, 0);
dudmuck 21:b84a77dfb43c 1794
dudmuck 21:b84a77dfb43c 1795 printf("%u ookTx: ", ook_tx_cnt++);
dudmuck 21:b84a77dfb43c 1796 for (i = 0; i < sizeof(ookt_tx_payload); i++) {
dudmuck 21:b84a77dfb43c 1797 radio.tx_buf[i] = ookt_tx_payload[i];
dudmuck 21:b84a77dfb43c 1798 printf("%02x ", radio.tx_buf[i]);
dudmuck 21:b84a77dfb43c 1799 }
dudmuck 21:b84a77dfb43c 1800 printf("\r\n");
dudmuck 21:b84a77dfb43c 1801
dudmuck 21:b84a77dfb43c 1802 //printf("syncConf:%x\r\n", radio.read_reg(REG_FSK_SYNCCONFIG));
dudmuck 21:b84a77dfb43c 1803 fsk.start_tx(sizeof(ookt_tx_payload));
dudmuck 21:b84a77dfb43c 1804 }
dudmuck 21:b84a77dfb43c 1805
dudmuck 18:9530d682fd9a 1806 typedef enum {
dudmuck 18:9530d682fd9a 1807 TXTICKER_STATE_OFF = 0,
dudmuck 18:9530d682fd9a 1808 TXTICKER_STATE_TOGGLE_PAYLOAD_BIT,
dudmuck 18:9530d682fd9a 1809 TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH,
dudmuck 18:9530d682fd9a 1810 TXTICKER_STATE_CYCLE_CODING_RATE,
dudmuck 18:9530d682fd9a 1811 TXTICKER_STATE_TOG_HEADER_MODE,
dudmuck 18:9530d682fd9a 1812 TXTICKER_STATE_TOG_CRC_ON,
dudmuck 18:9530d682fd9a 1813 TXTICKER_STATE_CYCLE_SYNC_1,
dudmuck 18:9530d682fd9a 1814 TXTICKER_STATE_CYCLE_SYNC_2,
dudmuck 18:9530d682fd9a 1815 TXTICKER_STATE_RAMP_PAYLOAD_DATA_START,
dudmuck 18:9530d682fd9a 1816 TXTICKER_STATE_RAMP_PAYLOAD_DATA,
dudmuck 18:9530d682fd9a 1817 TXTICKER_STATE_SYMBOL_SWEEP,
dudmuck 18:9530d682fd9a 1818 TXTICKER_STATE_TOGGLE_ALL_BITS_START,
dudmuck 18:9530d682fd9a 1819 TXTICKER_STATE_TOGGLE_ALL_BITS,
dudmuck 18:9530d682fd9a 1820 } txticker_state_e;
dudmuck 18:9530d682fd9a 1821
dudmuck 18:9530d682fd9a 1822 txticker_state_e txticker_state;
dudmuck 18:9530d682fd9a 1823 float tx_ticker_rate = 0.5;
dudmuck 18:9530d682fd9a 1824 Ticker tx_ticker;
dudmuck 18:9530d682fd9a 1825
dudmuck 18:9530d682fd9a 1826 uint8_t txticker_sync_byte;
dudmuck 18:9530d682fd9a 1827 uint8_t payload_length_stop;
dudmuck 18:9530d682fd9a 1828 uint8_t symbol_num;
dudmuck 18:9530d682fd9a 1829 uint32_t symbol_sweep_bit_counter = 0;
dudmuck 18:9530d682fd9a 1830 unsigned int symbol_sweep_bit_counter_stop;
dudmuck 18:9530d682fd9a 1831 uint8_t symbol_sweep_nbits;
dudmuck 18:9530d682fd9a 1832 uint8_t byte_pad_length;
dudmuck 18:9530d682fd9a 1833
dudmuck 18:9530d682fd9a 1834 uint8_t tab_current_byte_num;
dudmuck 18:9530d682fd9a 1835 uint8_t tab_current_bit_in_byte;
dudmuck 18:9530d682fd9a 1836
dudmuck 18:9530d682fd9a 1837 void fp_cb()
dudmuck 18:9530d682fd9a 1838 {
dudmuck 18:9530d682fd9a 1839 int i;
dudmuck 18:9530d682fd9a 1840 if (!radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 1841 return;
dudmuck 18:9530d682fd9a 1842
dudmuck 18:9530d682fd9a 1843 switch (txticker_state) {
dudmuck 18:9530d682fd9a 1844 case TXTICKER_STATE_TOGGLE_PAYLOAD_BIT:
dudmuck 18:9530d682fd9a 1845 /*
dudmuck 18:9530d682fd9a 1846 {
dudmuck 18:9530d682fd9a 1847 if (fp_tog_bit_ < 32) {
dudmuck 18:9530d682fd9a 1848 uint32_t bp = 1 << fp_tog_bit_;
dudmuck 18:9530d682fd9a 1849 fp_data ^= bp;
dudmuck 18:9530d682fd9a 1850 //printf("bp%02x ", bp);
dudmuck 18:9530d682fd9a 1851 }
dudmuck 18:9530d682fd9a 1852 memcpy(radio.tx_buf, &fp_data, fp_data_length);
dudmuck 18:9530d682fd9a 1853 printf("TX ");
dudmuck 18:9530d682fd9a 1854 for (i = 0; i < fp_data_length; i++)
dudmuck 18:9530d682fd9a 1855 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1856
dudmuck 18:9530d682fd9a 1857 printf("\r\n");
dudmuck 18:9530d682fd9a 1858 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1859 break;
dudmuck 18:9530d682fd9a 1860 }
dudmuck 18:9530d682fd9a 1861 */
dudmuck 18:9530d682fd9a 1862 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1863 break;
dudmuck 18:9530d682fd9a 1864 case TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH:
dudmuck 18:9530d682fd9a 1865 {
dudmuck 18:9530d682fd9a 1866 if (lora.RegPayloadLength > payload_length_stop)
dudmuck 18:9530d682fd9a 1867 lora.RegPayloadLength = 0;
dudmuck 18:9530d682fd9a 1868 else
dudmuck 18:9530d682fd9a 1869 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 1870
dudmuck 18:9530d682fd9a 1871 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1872 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1873 printf("RegPayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1874 break;
dudmuck 18:9530d682fd9a 1875 }
dudmuck 18:9530d682fd9a 1876 case TXTICKER_STATE_CYCLE_CODING_RATE:
dudmuck 18:9530d682fd9a 1877 {
dudmuck 18:9530d682fd9a 1878 uint8_t cr = lora.getCodingRate(false); // false: TX coding rate
dudmuck 18:9530d682fd9a 1879 if (cr == 4)
dudmuck 18:9530d682fd9a 1880 cr = 0;
dudmuck 18:9530d682fd9a 1881 else
dudmuck 18:9530d682fd9a 1882 cr++;
dudmuck 18:9530d682fd9a 1883
dudmuck 18:9530d682fd9a 1884 lora.setCodingRate(cr);
dudmuck 18:9530d682fd9a 1885 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1886 printf("tx cr:%d\r\n", cr);
dudmuck 18:9530d682fd9a 1887 break;
dudmuck 18:9530d682fd9a 1888 }
dudmuck 18:9530d682fd9a 1889 case TXTICKER_STATE_TOG_HEADER_MODE:
dudmuck 18:9530d682fd9a 1890 {
dudmuck 18:9530d682fd9a 1891 lora.setHeaderMode(!lora.getHeaderMode());
dudmuck 18:9530d682fd9a 1892 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1893 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 1894 lora_printHeaderMode();
dudmuck 18:9530d682fd9a 1895 printf("\r\n");
dudmuck 18:9530d682fd9a 1896 break;
dudmuck 18:9530d682fd9a 1897 }
dudmuck 18:9530d682fd9a 1898 case TXTICKER_STATE_TOG_CRC_ON:
dudmuck 18:9530d682fd9a 1899 {
dudmuck 18:9530d682fd9a 1900 lora.setRxPayloadCrcOn(!lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 1901 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1902 printf("crc on:%d\r\n", lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 1903 break;
dudmuck 18:9530d682fd9a 1904 }
dudmuck 18:9530d682fd9a 1905 case TXTICKER_STATE_CYCLE_SYNC_1:
dudmuck 18:9530d682fd9a 1906 {
dudmuck 18:9530d682fd9a 1907 /* cycle hi nibble of 0x39 register */
dudmuck 18:9530d682fd9a 1908 if ((txticker_sync_byte & 0xf0) == 0xf0)
dudmuck 18:9530d682fd9a 1909 txticker_sync_byte &= 0x0f;
dudmuck 18:9530d682fd9a 1910 else
dudmuck 18:9530d682fd9a 1911 txticker_sync_byte += 0x10;
dudmuck 18:9530d682fd9a 1912 radio.write_reg(REG_LR_SYNC_BYTE, txticker_sync_byte);
dudmuck 18:9530d682fd9a 1913 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1914 printf("0x39: %02x\r\n", txticker_sync_byte);
dudmuck 18:9530d682fd9a 1915 break;
dudmuck 18:9530d682fd9a 1916 }
dudmuck 18:9530d682fd9a 1917 case TXTICKER_STATE_CYCLE_SYNC_2:
dudmuck 18:9530d682fd9a 1918 {
dudmuck 18:9530d682fd9a 1919 /* cycle lo nibble of 0x39 register */
dudmuck 18:9530d682fd9a 1920 if ((txticker_sync_byte & 0x0f) == 0x0f)
dudmuck 18:9530d682fd9a 1921 txticker_sync_byte &= 0xf0;
dudmuck 18:9530d682fd9a 1922 else
dudmuck 18:9530d682fd9a 1923 txticker_sync_byte += 0x01;
dudmuck 18:9530d682fd9a 1924 radio.write_reg(REG_LR_SYNC_BYTE, txticker_sync_byte);
dudmuck 18:9530d682fd9a 1925 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1926 printf("0x39: %02x\r\n", txticker_sync_byte);
dudmuck 18:9530d682fd9a 1927 break;
dudmuck 18:9530d682fd9a 1928 }
dudmuck 18:9530d682fd9a 1929 case TXTICKER_STATE_RAMP_PAYLOAD_DATA_START:
dudmuck 18:9530d682fd9a 1930 txticker_state = TXTICKER_STATE_RAMP_PAYLOAD_DATA;
dudmuck 18:9530d682fd9a 1931 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1932 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 1933
dudmuck 18:9530d682fd9a 1934 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1935 printf("payload start, len:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1936 break;
dudmuck 18:9530d682fd9a 1937 case TXTICKER_STATE_RAMP_PAYLOAD_DATA:
dudmuck 18:9530d682fd9a 1938 for (i = lora.RegPayloadLength-1; i >= 0; i--) {
dudmuck 18:9530d682fd9a 1939 //printf("i:%d ", i);
dudmuck 18:9530d682fd9a 1940 if (radio.tx_buf[i] == 255) {
dudmuck 18:9530d682fd9a 1941 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 1942 } else {
dudmuck 18:9530d682fd9a 1943 radio.tx_buf[i]++;
dudmuck 18:9530d682fd9a 1944 break;
dudmuck 18:9530d682fd9a 1945 }
dudmuck 18:9530d682fd9a 1946 }
dudmuck 18:9530d682fd9a 1947 //printf("\r\n");
dudmuck 18:9530d682fd9a 1948 printf("send:");
dudmuck 18:9530d682fd9a 1949 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 1950 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1951 }
dudmuck 18:9530d682fd9a 1952 printf("\r\n");
dudmuck 18:9530d682fd9a 1953 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1954 if (radio.tx_buf[0] == 255) {
dudmuck 18:9530d682fd9a 1955 printf("payload ramp done\r\n");
dudmuck 18:9530d682fd9a 1956 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1957 }
dudmuck 18:9530d682fd9a 1958 break;
dudmuck 18:9530d682fd9a 1959 case TXTICKER_STATE_SYMBOL_SWEEP: // fpsNL command, where N=symbol num, L=nbytes
dudmuck 18:9530d682fd9a 1960 {
dudmuck 18:9530d682fd9a 1961 uint32_t mask;
dudmuck 18:9530d682fd9a 1962 /*for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1963 radio.tx_buf[i] = 0;*/
dudmuck 18:9530d682fd9a 1964 i = byte_pad_length;
dudmuck 19:be8a8b0e7320 1965 printf("bit_counter 0x%" PRIx32 " : ", symbol_sweep_bit_counter);
dudmuck 18:9530d682fd9a 1966 for (int bn = 0; bn < symbol_sweep_nbits; bn += 2) {
dudmuck 18:9530d682fd9a 1967 /* 2 lsbits going into first byte */
dudmuck 18:9530d682fd9a 1968 mask = 1 << bn;
dudmuck 18:9530d682fd9a 1969 if (symbol_sweep_bit_counter & mask)
dudmuck 18:9530d682fd9a 1970 radio.tx_buf[i] |= 1 << symbol_num;
dudmuck 18:9530d682fd9a 1971 else
dudmuck 18:9530d682fd9a 1972 radio.tx_buf[i] &= ~(1 << symbol_num);
dudmuck 18:9530d682fd9a 1973 mask = 2 << bn;
dudmuck 18:9530d682fd9a 1974 if (symbol_sweep_bit_counter & mask)
dudmuck 18:9530d682fd9a 1975 radio.tx_buf[i] |= 0x10 << symbol_num;
dudmuck 18:9530d682fd9a 1976 else
dudmuck 18:9530d682fd9a 1977 radio.tx_buf[i] &= ~(0x10 << symbol_num);
dudmuck 18:9530d682fd9a 1978 //printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1979 i++;
dudmuck 18:9530d682fd9a 1980 }
dudmuck 18:9530d682fd9a 1981 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1982 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1983 printf("\r\n");
dudmuck 18:9530d682fd9a 1984 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1985 if (++symbol_sweep_bit_counter == symbol_sweep_bit_counter_stop) {
dudmuck 18:9530d682fd9a 1986 printf("stop\r\n");
dudmuck 18:9530d682fd9a 1987 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1988 }
dudmuck 18:9530d682fd9a 1989 }
dudmuck 18:9530d682fd9a 1990 break;
dudmuck 18:9530d682fd9a 1991 case TXTICKER_STATE_TOGGLE_ALL_BITS_START:
dudmuck 18:9530d682fd9a 1992 tab_current_byte_num = byte_pad_length;
dudmuck 18:9530d682fd9a 1993 tab_current_bit_in_byte = 0;
dudmuck 18:9530d682fd9a 1994 printf("tx ");
dudmuck 18:9530d682fd9a 1995 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 1996 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 1997 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1998 }
dudmuck 18:9530d682fd9a 1999 printf("\r\n");
dudmuck 18:9530d682fd9a 2000 txticker_state = TXTICKER_STATE_TOGGLE_ALL_BITS;
dudmuck 18:9530d682fd9a 2001 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2002 break;
dudmuck 18:9530d682fd9a 2003 case TXTICKER_STATE_TOGGLE_ALL_BITS:
dudmuck 18:9530d682fd9a 2004 {
dudmuck 18:9530d682fd9a 2005 uint8_t mask = 1 << tab_current_bit_in_byte;
dudmuck 18:9530d682fd9a 2006 radio.tx_buf[tab_current_byte_num] = mask;
dudmuck 18:9530d682fd9a 2007 printf("bit%d in [%d]: tx ", tab_current_bit_in_byte, tab_current_byte_num);
dudmuck 18:9530d682fd9a 2008 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 2009 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 2010 }
dudmuck 18:9530d682fd9a 2011 printf("\r\n");
dudmuck 18:9530d682fd9a 2012 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2013 if (++tab_current_bit_in_byte == 8) {
dudmuck 18:9530d682fd9a 2014 radio.tx_buf[tab_current_byte_num] = 0;
dudmuck 18:9530d682fd9a 2015 tab_current_bit_in_byte = 0;
dudmuck 18:9530d682fd9a 2016 if (++tab_current_byte_num == lora.RegPayloadLength) {
dudmuck 18:9530d682fd9a 2017 tx_ticker.detach();
dudmuck 18:9530d682fd9a 2018 }
dudmuck 18:9530d682fd9a 2019 }
dudmuck 18:9530d682fd9a 2020 }
dudmuck 18:9530d682fd9a 2021 break;
dudmuck 18:9530d682fd9a 2022 default:
dudmuck 18:9530d682fd9a 2023 tx_ticker.detach();
dudmuck 18:9530d682fd9a 2024 break;
dudmuck 18:9530d682fd9a 2025 } // ...switch (txticker_state)
dudmuck 18:9530d682fd9a 2026 }
dudmuck 18:9530d682fd9a 2027
dudmuck 18:9530d682fd9a 2028 void ook_test_tx(int len)
dudmuck 18:9530d682fd9a 2029 {
dudmuck 18:9530d682fd9a 2030 int i;
dudmuck 18:9530d682fd9a 2031 /*
dudmuck 18:9530d682fd9a 2032 fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 2033 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 2034 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 18:9530d682fd9a 2035 */
dudmuck 18:9530d682fd9a 2036 for (i = 0; i < 4; i++) {
dudmuck 18:9530d682fd9a 2037 radio.tx_buf[i] = 0xaa;
dudmuck 18:9530d682fd9a 2038 }
dudmuck 18:9530d682fd9a 2039
dudmuck 18:9530d682fd9a 2040 printf("ooktx:");
dudmuck 18:9530d682fd9a 2041 for (i = 0; i < len; i++) {
dudmuck 18:9530d682fd9a 2042 radio.tx_buf[i+4] = rand() & 0xff;
dudmuck 18:9530d682fd9a 2043 printf("%02x ", radio.tx_buf[i+4]);
dudmuck 18:9530d682fd9a 2044 }
dudmuck 18:9530d682fd9a 2045 printf("\r\n");
dudmuck 18:9530d682fd9a 2046 fsk.start_tx(len+4);
dudmuck 18:9530d682fd9a 2047
dudmuck 18:9530d682fd9a 2048 while (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
dudmuck 18:9530d682fd9a 2049 if (poll_irq_en)
dudmuck 18:9530d682fd9a 2050 poll_service_radio();
dudmuck 18:9530d682fd9a 2051 else
dudmuck 18:9530d682fd9a 2052 service_radio();
dudmuck 18:9530d682fd9a 2053 }
dudmuck 18:9530d682fd9a 2054 }
dudmuck 18:9530d682fd9a 2055
dudmuck 18:9530d682fd9a 2056 void cmd_init(uint8_t args_at)
dudmuck 10:d9bb2ce57f05 2057 {
dudmuck 18:9530d682fd9a 2058 printf("init\r\n");
dudmuck 18:9530d682fd9a 2059 radio.init();
dudmuck 18:9530d682fd9a 2060 if (!radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2061 fsk.init(); // put FSK modem to some functioning default
dudmuck 18:9530d682fd9a 2062 } else {
dudmuck 18:9530d682fd9a 2063 // lora configuration is more simple
dudmuck 18:9530d682fd9a 2064 }
dudmuck 18:9530d682fd9a 2065 }
dudmuck 18:9530d682fd9a 2066
dudmuck 18:9530d682fd9a 2067 void cmd_per_tx_delay(uint8_t idx)
dudmuck 18:9530d682fd9a 2068 {
dudmuck 18:9530d682fd9a 2069 int i;
dudmuck 18:9530d682fd9a 2070 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2071 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2072 per_tx_delay = i / 1000.0;
dudmuck 18:9530d682fd9a 2073 }
dudmuck 18:9530d682fd9a 2074 printf("per_tx_delay:%dms\r\n", (int)(per_tx_delay * 1000));
dudmuck 18:9530d682fd9a 2075 }
dudmuck 18:9530d682fd9a 2076
dudmuck 21:b84a77dfb43c 2077 const uint8_t test_payload_A[7] = {
dudmuck 21:b84a77dfb43c 2078 0x80, 0x02, 0x58, 0xF5, 0xDF, 0xB8, 0x9E
dudmuck 21:b84a77dfb43c 2079 };
dudmuck 21:b84a77dfb43c 2080
dudmuck 21:b84a77dfb43c 2081 const uint8_t test_payload_B[] = {
dudmuck 21:b84a77dfb43c 2082 0xca, 0xfe, 0xba, 0xbe
dudmuck 21:b84a77dfb43c 2083 };
dudmuck 21:b84a77dfb43c 2084
dudmuck 21:b84a77dfb43c 2085 const uint8_t test_payload_C[0x1a] = {
dudmuck 21:b84a77dfb43c 2086 0x88, 0x39, 0x1F, 0xC6, 0xD3, 0xEB, 0xA4, 0xAC,
dudmuck 21:b84a77dfb43c 2087 0xFB, 0xB9, 0xBA, 0xB9, 0xBE, 0x13, 0x61, 0x4C,
dudmuck 21:b84a77dfb43c 2088 0x43, 0x83, 0x00, 0x92, 0x84, 0x00, 0x6F, 0x87,
dudmuck 21:b84a77dfb43c 2089 0x7C, 0xB2
dudmuck 21:b84a77dfb43c 2090 };
dudmuck 21:b84a77dfb43c 2091
dudmuck 18:9530d682fd9a 2092 void cmd_tx(uint8_t idx)
dudmuck 18:9530d682fd9a 2093 {
dudmuck 18:9530d682fd9a 2094 int i;
dudmuck 18:9530d682fd9a 2095 static uint16_t fsk_tx_length;
dudmuck 18:9530d682fd9a 2096
dudmuck 18:9530d682fd9a 2097 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2098 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2099 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2100 lora.RegPayloadLength = i;
dudmuck 18:9530d682fd9a 2101 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2102 }
dudmuck 18:9530d682fd9a 2103
dudmuck 21:b84a77dfb43c 2104 if (pcbuf[idx] == 'A') {
dudmuck 21:b84a77dfb43c 2105 } else if (pcbuf[idx] == 'B') {
dudmuck 21:b84a77dfb43c 2106 } else if (pcbuf[idx] == 'C') {
dudmuck 21:b84a77dfb43c 2107 } else {
dudmuck 21:b84a77dfb43c 2108 tx_cnt++;
dudmuck 21:b84a77dfb43c 2109 printf("payload:%02x\r\n", tx_cnt);
dudmuck 21:b84a77dfb43c 2110
dudmuck 21:b84a77dfb43c 2111 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 21:b84a77dfb43c 2112 radio.tx_buf[i] = tx_cnt;
dudmuck 21:b84a77dfb43c 2113 }
dudmuck 21:b84a77dfb43c 2114
dudmuck 18:9530d682fd9a 2115 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2116 } else { // FSK:
dudmuck 21:b84a77dfb43c 2117
dudmuck 21:b84a77dfb43c 2118 /* always variable-length format */
dudmuck 21:b84a77dfb43c 2119 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 21:b84a77dfb43c 2120 if (!fsk.RegPktConfig1.bits.PacketFormatVariable) {
dudmuck 21:b84a77dfb43c 2121 printf("fsk fixed->variable\r\n");
dudmuck 21:b84a77dfb43c 2122 fsk.RegPktConfig1.bits.PacketFormatVariable = 1;
dudmuck 21:b84a77dfb43c 2123 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 21:b84a77dfb43c 2124 }
dudmuck 21:b84a77dfb43c 2125
dudmuck 18:9530d682fd9a 2126 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2127 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2128 fsk_tx_length = i;
dudmuck 18:9530d682fd9a 2129 }
dudmuck 18:9530d682fd9a 2130 if (ook_test_en) {
dudmuck 18:9530d682fd9a 2131 ook_test_tx(fsk_tx_length);
dudmuck 18:9530d682fd9a 2132 } else {
dudmuck 18:9530d682fd9a 2133 if (radio.RegOpMode.bits.Mode != RF_OPMODE_TRANSMITTER) { // if not already busy transmitting
dudmuck 21:b84a77dfb43c 2134 if (pcbuf[idx] == 'A') {
dudmuck 21:b84a77dfb43c 2135 fsk_tx_length = sizeof(test_payload_A);
dudmuck 21:b84a77dfb43c 2136 memcpy(radio.tx_buf, test_payload_A, fsk_tx_length);
dudmuck 21:b84a77dfb43c 2137 } else if (pcbuf[idx] == 'B') {
dudmuck 21:b84a77dfb43c 2138 fsk_tx_length = sizeof(test_payload_B);
dudmuck 21:b84a77dfb43c 2139 memcpy(radio.tx_buf, test_payload_B, fsk_tx_length);
dudmuck 21:b84a77dfb43c 2140 } else if (pcbuf[idx] == 'C') {
dudmuck 21:b84a77dfb43c 2141 fsk_tx_length = sizeof(test_payload_C);
dudmuck 21:b84a77dfb43c 2142 memcpy(radio.tx_buf, test_payload_C, fsk_tx_length);
dudmuck 21:b84a77dfb43c 2143 } else {
dudmuck 21:b84a77dfb43c 2144 tx_cnt++;
dudmuck 21:b84a77dfb43c 2145 printf("payload:%02x\r\n", tx_cnt);
dudmuck 21:b84a77dfb43c 2146 for (i = 0; i < fsk_tx_length; i++) {
dudmuck 21:b84a77dfb43c 2147 radio.tx_buf[i] = tx_cnt;
dudmuck 21:b84a77dfb43c 2148 }
dudmuck 18:9530d682fd9a 2149 }
dudmuck 21:b84a77dfb43c 2150
dudmuck 18:9530d682fd9a 2151 fsk.start_tx(fsk_tx_length);
dudmuck 18:9530d682fd9a 2152 }
dudmuck 18:9530d682fd9a 2153 }
dudmuck 18:9530d682fd9a 2154 } // !LoRa
dudmuck 18:9530d682fd9a 2155
dudmuck 18:9530d682fd9a 2156 }
dudmuck 18:9530d682fd9a 2157
dudmuck 21:b84a77dfb43c 2158 volatile uint16_t long_byte_count, long_byte_count_at_full;
dudmuck 21:b84a77dfb43c 2159
dudmuck 21:b84a77dfb43c 2160 const uint8_t test_preamble_sync[] = {
dudmuck 21:b84a77dfb43c 2161 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0x33, 0xcb, 0x82
dudmuck 21:b84a77dfb43c 2162 };
dudmuck 21:b84a77dfb43c 2163
dudmuck 21:b84a77dfb43c 2164 void _ulm_write_fifo(uint8_t len)
dudmuck 21:b84a77dfb43c 2165 {
dudmuck 21:b84a77dfb43c 2166 uint8_t i;
dudmuck 21:b84a77dfb43c 2167
dudmuck 21:b84a77dfb43c 2168 //dio2 is FifoFull
dudmuck 21:b84a77dfb43c 2169 radio.m_cs = 0;
dudmuck 21:b84a77dfb43c 2170 radio.m_spi.write(REG_FIFO | 0x80); // bit7 is high for writing to radio
dudmuck 21:b84a77dfb43c 2171
dudmuck 21:b84a77dfb43c 2172 for (i = 0; i < len; ) {
dudmuck 21:b84a77dfb43c 2173 //printf("_%02x\r\n", radio.tx_buf[i]);
dudmuck 21:b84a77dfb43c 2174 radio.m_spi.write(radio.tx_buf[i++]);
dudmuck 21:b84a77dfb43c 2175 long_byte_count++;
dudmuck 21:b84a77dfb43c 2176 if (dio2) {
dudmuck 21:b84a77dfb43c 2177 long_byte_count_at_full = long_byte_count;
dudmuck 21:b84a77dfb43c 2178 while (radio.dio1)
dudmuck 21:b84a77dfb43c 2179 ;
dudmuck 21:b84a77dfb43c 2180 }
dudmuck 21:b84a77dfb43c 2181 }
dudmuck 21:b84a77dfb43c 2182 radio.m_cs = 1;
dudmuck 21:b84a77dfb43c 2183 }
dudmuck 21:b84a77dfb43c 2184
dudmuck 21:b84a77dfb43c 2185 int write_buf_to_fifo(const uint8_t* send_buf, uint8_t target_length)
dudmuck 21:b84a77dfb43c 2186 {
dudmuck 21:b84a77dfb43c 2187 /* block until all is written */
dudmuck 21:b84a77dfb43c 2188 uint8_t total_sent = 0;
dudmuck 21:b84a77dfb43c 2189
dudmuck 21:b84a77dfb43c 2190 //printf("wbtf %u\r\n", target_length);
dudmuck 21:b84a77dfb43c 2191 while (target_length > total_sent) {
dudmuck 21:b84a77dfb43c 2192 uint8_t this_length = target_length - total_sent;
dudmuck 21:b84a77dfb43c 2193 memcpy(radio.tx_buf+total_sent, send_buf+total_sent, this_length);
dudmuck 21:b84a77dfb43c 2194 _ulm_write_fifo(this_length);
dudmuck 21:b84a77dfb43c 2195 total_sent += this_length;
dudmuck 21:b84a77dfb43c 2196 }
dudmuck 21:b84a77dfb43c 2197 return total_sent;
dudmuck 21:b84a77dfb43c 2198 }
dudmuck 21:b84a77dfb43c 2199
dudmuck 21:b84a77dfb43c 2200 #define TEST_PAYLOAD test_payload_C
dudmuck 21:b84a77dfb43c 2201 //#define TEST_PAYLOAD test_payload_A
dudmuck 21:b84a77dfb43c 2202 void cmd_long_tx(uint8_t idx)
dudmuck 21:b84a77dfb43c 2203 {
dudmuck 21:b84a77dfb43c 2204 unsigned int pkt_cnt = 0;
dudmuck 21:b84a77dfb43c 2205 bool first_pkt;
dudmuck 21:b84a77dfb43c 2206 /* transmit multipe packets without any time between packets (back to back) */
dudmuck 21:b84a77dfb43c 2207
dudmuck 21:b84a77dfb43c 2208 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 21:b84a77dfb43c 2209 sscanf(pcbuf+idx, "%u", &pkt_cnt);
dudmuck 21:b84a77dfb43c 2210 }
dudmuck 21:b84a77dfb43c 2211
dudmuck 21:b84a77dfb43c 2212 printf("tx %u pkts\r\n", pkt_cnt);
dudmuck 21:b84a77dfb43c 2213 if (pkt_cnt < 1)
dudmuck 21:b84a77dfb43c 2214 return;
dudmuck 21:b84a77dfb43c 2215
dudmuck 21:b84a77dfb43c 2216 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 21:b84a77dfb43c 2217 radio.RegDioMapping2.bits.Dio5Mapping = 2; // data output to observation
dudmuck 21:b84a77dfb43c 2218 radio.RegDioMapping2.bits.Dio4Mapping = 3; // output preamble detect indication
dudmuck 21:b84a77dfb43c 2219 radio.RegDioMapping2.bits.MapPreambleDetect = 1;
dudmuck 21:b84a77dfb43c 2220 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 21:b84a77dfb43c 2221
dudmuck 21:b84a77dfb43c 2222 //unlimited packet length mode
dudmuck 21:b84a77dfb43c 2223 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 21:b84a77dfb43c 2224 fsk.RegPktConfig1.bits.PacketFormatVariable = 0; // fixed length format
dudmuck 21:b84a77dfb43c 2225 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 21:b84a77dfb43c 2226
dudmuck 21:b84a77dfb43c 2227 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 21:b84a77dfb43c 2228 fsk.RegPktConfig2.bits.PayloadLength = 0;
dudmuck 21:b84a77dfb43c 2229 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 21:b84a77dfb43c 2230 //DIO3 to FifoEmpty (for end of tx)
dudmuck 21:b84a77dfb43c 2231 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 21:b84a77dfb43c 2232 radio.RegDioMapping1.bits.Dio3Mapping = 0; // FifoEmpty
dudmuck 21:b84a77dfb43c 2233 //DIO2 to FifoFull
dudmuck 21:b84a77dfb43c 2234 radio.RegDioMapping1.bits.Dio2Mapping = 0; // FIfoFull
dudmuck 21:b84a77dfb43c 2235 //DIO1 to FifoLevel
dudmuck 21:b84a77dfb43c 2236 radio.RegDioMapping1.bits.Dio1Mapping = 0; // FifoLevel
dudmuck 21:b84a77dfb43c 2237 radio.RegDioMapping1.bits.Dio0Mapping = 0; // PacketSent
dudmuck 21:b84a77dfb43c 2238 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 21:b84a77dfb43c 2239 //FifoThreshold to approx 1/5th full
dudmuck 21:b84a77dfb43c 2240 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 21:b84a77dfb43c 2241 fsk.RegFifoThreshold.bits.FifoThreshold = sizeof(TEST_PAYLOAD)-1; // allow single packet
dudmuck 21:b84a77dfb43c 2242 // tx start condition to FifoLevel
dudmuck 21:b84a77dfb43c 2243 fsk.RegFifoThreshold.bits.TxStartCondition = 0; // start on FifoLevel
dudmuck 21:b84a77dfb43c 2244 radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
dudmuck 21:b84a77dfb43c 2245
dudmuck 21:b84a77dfb43c 2246 long_byte_count = 0;
dudmuck 21:b84a77dfb43c 2247 long_byte_count_at_full = 0xffff;
dudmuck 21:b84a77dfb43c 2248
dudmuck 21:b84a77dfb43c 2249 radio.set_opmode(RF_OPMODE_TRANSMITTER);
dudmuck 21:b84a77dfb43c 2250 first_pkt = true; // preamble+sync sent by packet engine only for first packet
dudmuck 21:b84a77dfb43c 2251 for (; pkt_cnt > 0; pkt_cnt--) {
dudmuck 21:b84a77dfb43c 2252 uint8_t len;
dudmuck 21:b84a77dfb43c 2253 if (first_pkt)
dudmuck 21:b84a77dfb43c 2254 first_pkt = false;
dudmuck 21:b84a77dfb43c 2255 else {
dudmuck 21:b84a77dfb43c 2256 if (dio3) {
dudmuck 21:b84a77dfb43c 2257 printf("fail-empty\r\n");
dudmuck 21:b84a77dfb43c 2258 }
dudmuck 21:b84a77dfb43c 2259 write_buf_to_fifo(test_preamble_sync, sizeof(test_preamble_sync));
dudmuck 21:b84a77dfb43c 2260 }
dudmuck 21:b84a77dfb43c 2261
dudmuck 21:b84a77dfb43c 2262 len = sizeof(TEST_PAYLOAD); //TEST_PAYLOAD doesnt start with length
dudmuck 21:b84a77dfb43c 2263 write_buf_to_fifo(&len, 1);
dudmuck 21:b84a77dfb43c 2264 write_buf_to_fifo(TEST_PAYLOAD, sizeof(TEST_PAYLOAD));
dudmuck 21:b84a77dfb43c 2265 } // ..
dudmuck 21:b84a77dfb43c 2266
dudmuck 21:b84a77dfb43c 2267 rx_start_timer.reset();
dudmuck 21:b84a77dfb43c 2268 rx_start_timer.start();
dudmuck 21:b84a77dfb43c 2269 while (!dio3) {
dudmuck 21:b84a77dfb43c 2270 if (rx_start_timer.read() > 1) {
dudmuck 21:b84a77dfb43c 2271 printf("fifoEmpty fail\r\n");
dudmuck 21:b84a77dfb43c 2272 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 21:b84a77dfb43c 2273 return;
dudmuck 21:b84a77dfb43c 2274 }
dudmuck 21:b84a77dfb43c 2275 }
dudmuck 21:b84a77dfb43c 2276
dudmuck 21:b84a77dfb43c 2277 rx_start_timer.reset();
dudmuck 21:b84a77dfb43c 2278 rx_start_timer.start();
dudmuck 21:b84a77dfb43c 2279 while (!radio.dio0) {
dudmuck 21:b84a77dfb43c 2280 if (rx_start_timer.read() > 3) {
dudmuck 21:b84a77dfb43c 2281 printf("PacketSent fail\r\n");
dudmuck 21:b84a77dfb43c 2282 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 21:b84a77dfb43c 2283 return;
dudmuck 21:b84a77dfb43c 2284 }
dudmuck 21:b84a77dfb43c 2285 }
dudmuck 21:b84a77dfb43c 2286 wait_us(100);
dudmuck 21:b84a77dfb43c 2287 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 21:b84a77dfb43c 2288 printf("done ok %u, %u\r\n", long_byte_count, long_byte_count_at_full);
dudmuck 21:b84a77dfb43c 2289
dudmuck 21:b84a77dfb43c 2290 }
dudmuck 21:b84a77dfb43c 2291
dudmuck 18:9530d682fd9a 2292 void cmd_hw_reset(uint8_t idx)
dudmuck 18:9530d682fd9a 2293 {
dudmuck 18:9530d682fd9a 2294 printf("hw_reset()\r\n");
dudmuck 18:9530d682fd9a 2295 radio.hw_reset();
dudmuck 18:9530d682fd9a 2296 ook_test_en = false;
dudmuck 18:9530d682fd9a 2297 poll_irq_en = false;
dudmuck 18:9530d682fd9a 2298 }
dudmuck 18:9530d682fd9a 2299
dudmuck 18:9530d682fd9a 2300 void cmd_read_all_regs(uint8_t idx)
dudmuck 18:9530d682fd9a 2301 {
dudmuck 18:9530d682fd9a 2302 uint8_t a, d;
dudmuck 18:9530d682fd9a 2303
dudmuck 18:9530d682fd9a 2304 // read all registers
dudmuck 18:9530d682fd9a 2305 for (a = 1; a < 0x71; a++) {
dudmuck 18:9530d682fd9a 2306 d = radio.read_reg(a);
dudmuck 18:9530d682fd9a 2307 printf("%02x: %02x\r\n", a, d);
dudmuck 18:9530d682fd9a 2308 }
dudmuck 18:9530d682fd9a 2309 }
dudmuck 18:9530d682fd9a 2310
dudmuck 18:9530d682fd9a 2311 void cmd_read_current_rssi(uint8_t idx)
dudmuck 18:9530d682fd9a 2312 {
dudmuck 18:9530d682fd9a 2313 if (radio.RegOpMode.bits.Mode != RF_OPMODE_RECEIVER) {
dudmuck 18:9530d682fd9a 2314 radio.set_opmode(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 2315 wait_us(10000);
dudmuck 18:9530d682fd9a 2316 }
dudmuck 18:9530d682fd9a 2317 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2318 printf("rssi:%ddBm\r\n", lora.get_current_rssi());
dudmuck 18:9530d682fd9a 2319 else
dudmuck 18:9530d682fd9a 2320 printf("rssi:-%.1f\r\n", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 18:9530d682fd9a 2321 }
dudmuck 18:9530d682fd9a 2322
dudmuck 21:b84a77dfb43c 2323 void cmd_rssi_polling(uint8_t idx)
dudmuck 21:b84a77dfb43c 2324 {
dudmuck 21:b84a77dfb43c 2325 if ((pcbuf[idx] >= '0' && pcbuf[idx] <= '9') || pcbuf[idx] == '-') {
dudmuck 21:b84a77dfb43c 2326 sscanf(pcbuf+idx, "%d", &rssi_polling_thresh);
dudmuck 21:b84a77dfb43c 2327 }
dudmuck 21:b84a77dfb43c 2328 printf("rssi_polling_thresh:%d\r\n", rssi_polling_thresh);
dudmuck 21:b84a77dfb43c 2329 }
dudmuck 21:b84a77dfb43c 2330
dudmuck 18:9530d682fd9a 2331 void cmd_lora_continuous_tx(uint8_t idx)
dudmuck 18:9530d682fd9a 2332 {
dudmuck 18:9530d682fd9a 2333 /* TxContinuousMode same for sx1272 and sx1276 */
dudmuck 18:9530d682fd9a 2334 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2335 lora.RegModemConfig2.sx1276bits.TxContinuousMode ^= 1;
dudmuck 18:9530d682fd9a 2336 radio.write_reg(REG_LR_MODEMCONFIG2, lora.RegModemConfig2.octet);
dudmuck 18:9530d682fd9a 2337 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 13:c73caaee93a5 2338
dudmuck 18:9530d682fd9a 2339 lora_printTxContinuousMode();
dudmuck 18:9530d682fd9a 2340 printf("\r\n");
dudmuck 18:9530d682fd9a 2341 }
dudmuck 18:9530d682fd9a 2342
dudmuck 18:9530d682fd9a 2343 void cmd_fsk_test_case(uint8_t idx)
dudmuck 18:9530d682fd9a 2344 {
dudmuck 18:9530d682fd9a 2345 if (pcbuf[idx] < '0' || pcbuf[idx] > '9') {
dudmuck 19:be8a8b0e7320 2346 printf("%" PRIu32 "bps fdev:%" PRIu32 "hz ", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 19:be8a8b0e7320 2347 printf("rxbw:%" PRIu32 "Hz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 19:be8a8b0e7320 2348 printf("afcbw:%" PRIu32 "Hz preambleLen:%" PRIu16 "\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW), radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 18:9530d682fd9a 2349 } else {
dudmuck 18:9530d682fd9a 2350 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 2351 per_tx_delay = 0.3;
dudmuck 18:9530d682fd9a 2352
dudmuck 18:9530d682fd9a 2353 if (radio.read_reg(REG_FSK_SYNCVALUE1) == 0x55 && radio.read_reg(REG_FSK_SYNCVALUE2)) {
dudmuck 18:9530d682fd9a 2354 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 2355 fsk.RegSyncConfig.bits.SyncSize = 2;
dudmuck 18:9530d682fd9a 2356 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2357 radio.write_reg(REG_FSK_SYNCVALUE3, 0x90);
dudmuck 18:9530d682fd9a 2358 radio.write_reg(REG_FSK_SYNCVALUE2, 0x4e);
dudmuck 18:9530d682fd9a 2359 radio.write_reg(REG_FSK_SYNCVALUE1, 0x63);
dudmuck 18:9530d682fd9a 2360 }
dudmuck 18:9530d682fd9a 2361
dudmuck 18:9530d682fd9a 2362 fsk.RegPreambleDetect.octet = radio.read_reg(REG_FSK_PREAMBLEDETECT);
dudmuck 18:9530d682fd9a 2363 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 18:9530d682fd9a 2364 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 2365
dudmuck 18:9530d682fd9a 2366 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 2367 fsk.RegRxConfig.bits.AfcAutoOn = 1;
dudmuck 18:9530d682fd9a 2368 fsk.RegRxConfig.bits.AgcAutoOn = 1;
dudmuck 20:b11592c9ba5f 2369 fsk.RegRxConfig.bits.RxTrigger = 7; // both
dudmuck 18:9530d682fd9a 2370 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2371
dudmuck 18:9530d682fd9a 2372 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 18:9530d682fd9a 2373 fsk.RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 18:9530d682fd9a 2374 fsk.RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 18:9530d682fd9a 2375 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 2376
dudmuck 18:9530d682fd9a 2377 switch (pcbuf[idx]) {
dudmuck 18:9530d682fd9a 2378 case '0':
dudmuck 18:9530d682fd9a 2379 fsk.set_bitrate(4800);
dudmuck 18:9530d682fd9a 2380 fsk.set_tx_fdev_hz(5005);
dudmuck 18:9530d682fd9a 2381 fsk.set_rx_dcc_bw_hz(10417, 0); // rxbw
dudmuck 18:9530d682fd9a 2382 fsk.set_rx_dcc_bw_hz(50000, 1); // afcbw
dudmuck 18:9530d682fd9a 2383 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 2384 break;
dudmuck 18:9530d682fd9a 2385 case '1':
dudmuck 18:9530d682fd9a 2386 fsk.set_bitrate(50000);
dudmuck 18:9530d682fd9a 2387 fsk.set_tx_fdev_hz(25000);
dudmuck 18:9530d682fd9a 2388 fsk.set_rx_dcc_bw_hz(62500, 0); // rxbw
dudmuck 18:9530d682fd9a 2389 fsk.set_rx_dcc_bw_hz(100000, 1); // afcbw
dudmuck 18:9530d682fd9a 2390 radio.write_u16(REG_FSK_PREAMBLEMSB, 9);
dudmuck 18:9530d682fd9a 2391 break;
dudmuck 18:9530d682fd9a 2392 case '2':
dudmuck 18:9530d682fd9a 2393 fsk.set_bitrate(38400);
dudmuck 18:9530d682fd9a 2394 fsk.set_tx_fdev_hz(20020);
dudmuck 18:9530d682fd9a 2395 fsk.set_rx_dcc_bw_hz(50000, 0); // rxbw
dudmuck 18:9530d682fd9a 2396 fsk.set_rx_dcc_bw_hz(100000, 1); // afcbw
dudmuck 18:9530d682fd9a 2397 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 2398 break;
dudmuck 18:9530d682fd9a 2399 case '3':
dudmuck 18:9530d682fd9a 2400 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 2401 fsk.set_tx_fdev_hz(20020);
dudmuck 18:9530d682fd9a 2402 fsk.set_rx_dcc_bw_hz(25000, 0); // rxbw
dudmuck 18:9530d682fd9a 2403 fsk.set_rx_dcc_bw_hz(50000, 1); // afcbw
dudmuck 18:9530d682fd9a 2404 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 2405 break;
dudmuck 18:9530d682fd9a 2406 case '4':
dudmuck 18:9530d682fd9a 2407 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 2408 fsk.set_tx_fdev_hz(4028);
dudmuck 18:9530d682fd9a 2409 fsk.set_rx_dcc_bw_hz(7813, 0); // rxbw
dudmuck 18:9530d682fd9a 2410 fsk.set_rx_dcc_bw_hz(25000, 1); // afcbw
dudmuck 18:9530d682fd9a 2411 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 2412 break;
dudmuck 18:9530d682fd9a 2413 case '5':
dudmuck 18:9530d682fd9a 2414 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 2415 fsk.set_tx_fdev_hz(4028);
dudmuck 18:9530d682fd9a 2416 fsk.set_rx_dcc_bw_hz(5208, 0); // rxbw
dudmuck 18:9530d682fd9a 2417 fsk.set_rx_dcc_bw_hz(10417, 1); // afcbw
dudmuck 18:9530d682fd9a 2418 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 20:b11592c9ba5f 2419 break;
dudmuck 20:b11592c9ba5f 2420 case '6':
dudmuck 20:b11592c9ba5f 2421 fsk.set_bitrate(65536);
dudmuck 20:b11592c9ba5f 2422 fsk.set_tx_fdev_hz(16384);
dudmuck 20:b11592c9ba5f 2423 fsk.set_rx_dcc_bw_hz(62500, 0); // rxbw
dudmuck 20:b11592c9ba5f 2424 fsk.set_rx_dcc_bw_hz(100000, 1); // afcbw
dudmuck 21:b84a77dfb43c 2425
dudmuck 21:b84a77dfb43c 2426 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 21:b84a77dfb43c 2427 fsk.RegPktConfig1.bits.CrcOn = 0;
dudmuck 21:b84a77dfb43c 2428 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 21:b84a77dfb43c 2429
dudmuck 20:b11592c9ba5f 2430 radio.write_u16(REG_FSK_PREAMBLEMSB, 5);
dudmuck 20:b11592c9ba5f 2431 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 20:b11592c9ba5f 2432 fsk.RegSyncConfig.bits.SyncSize = 2;
dudmuck 21:b84a77dfb43c 2433 fsk.RegSyncConfig.bits.SyncOn = 1;
dudmuck 20:b11592c9ba5f 2434 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 21:b84a77dfb43c 2435 radio.write_reg(REG_FSK_SYNCVALUE1, 0x33);
dudmuck 20:b11592c9ba5f 2436 radio.write_reg(REG_FSK_SYNCVALUE2, 0xcb);
dudmuck 21:b84a77dfb43c 2437 radio.write_reg(REG_FSK_SYNCVALUE3, 0x82);
dudmuck 21:b84a77dfb43c 2438
dudmuck 21:b84a77dfb43c 2439 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 21:b84a77dfb43c 2440 radio.RegOpMode.bits.ModulationType = 0; // 0 = FSK
dudmuck 21:b84a77dfb43c 2441 radio.RegOpMode.bits.ModulationShaping = 2; // 2=BT0.5
dudmuck 21:b84a77dfb43c 2442 radio.write_reg(REG_OPMODE, radio.RegOpMode.octet);
dudmuck 21:b84a77dfb43c 2443
dudmuck 21:b84a77dfb43c 2444 fsk.RegAfcFei.octet = radio.read_reg(REG_FSK_AFCFEI);
dudmuck 21:b84a77dfb43c 2445 fsk.RegAfcFei.bits.AfcAutoClearOn = 0;
dudmuck 21:b84a77dfb43c 2446 radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
dudmuck 20:b11592c9ba5f 2447
dudmuck 20:b11592c9ba5f 2448 fsk.RegRxConfig.bits.RxTrigger = 6; // preamble
dudmuck 20:b11592c9ba5f 2449 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 20:b11592c9ba5f 2450 radio.RegDioMapping2.bits.Dio4Mapping = 3;
dudmuck 20:b11592c9ba5f 2451 radio.RegDioMapping2.bits.MapPreambleDetect = 1; // dio4 to preambleDetect in RX
dudmuck 20:b11592c9ba5f 2452 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 20:b11592c9ba5f 2453 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to SyncAddress in RX
dudmuck 20:b11592c9ba5f 2454 radio.RegDioMapping1.bits.Dio1Mapping = 1; // to FifoEmpty
dudmuck 20:b11592c9ba5f 2455 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 20:b11592c9ba5f 2456 break;
dudmuck 18:9530d682fd9a 2457 } // ...switch (pcbuf[idx])
dudmuck 19:be8a8b0e7320 2458 printf("%" PRIu32 "bps fdev:%" PRIu32 "hz ", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 19:be8a8b0e7320 2459 printf("rxbw:%" PRIu32 "Hz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 20:b11592c9ba5f 2460 printf("afcbw:%" PRIu32 "Hz preambleLen:%" PRIu16 "\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW), radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 20:b11592c9ba5f 2461
dudmuck 20:b11592c9ba5f 2462 /* time between preamble occurring and syncAddress occuring
dudmuck 20:b11592c9ba5f 2463 * = bitrate in microseconds * 8 * (preamble bytes + sync bytes)
dudmuck 20:b11592c9ba5f 2464 */
dudmuck 20:b11592c9ba5f 2465 preamble_to_sync_us = (1.0 / fsk.get_bitrate())*1e6 * 8 * (radio.read_u16(REG_FSK_PREAMBLEMSB)+1 + fsk.RegSyncConfig.bits.SyncSize+2);
dudmuck 20:b11592c9ba5f 2466 //printf("bitrate:%d, %f\r\n", fsk.get_bitrate(), 1.0 / fsk.get_bitrate()*1e6);
dudmuck 20:b11592c9ba5f 2467 printf("preamble_to_sync_us:%d\r\n", preamble_to_sync_us);
dudmuck 18:9530d682fd9a 2468 }
dudmuck 18:9530d682fd9a 2469 }
dudmuck 18:9530d682fd9a 2470
dudmuck 20:b11592c9ba5f 2471 void cmd_restart_rx(uint8_t idx)
dudmuck 20:b11592c9ba5f 2472 {
dudmuck 20:b11592c9ba5f 2473 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 20:b11592c9ba5f 2474 fsk.RegRxConfig.bits.RestartRxWithoutPllLock = 1;
dudmuck 20:b11592c9ba5f 2475 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 20:b11592c9ba5f 2476 rx_start_timer.reset();
dudmuck 20:b11592c9ba5f 2477 secs_rx_start = time(NULL);
dudmuck 20:b11592c9ba5f 2478 fsk.RegRxConfig.bits.RestartRxWithoutPllLock = 0;
dudmuck 20:b11592c9ba5f 2479 printf("RestartRxWithoutPllLock\r\n");
dudmuck 20:b11592c9ba5f 2480 }
dudmuck 20:b11592c9ba5f 2481
dudmuck 18:9530d682fd9a 2482 void cmd_toggle_modem(uint8_t idx)
dudmuck 18:9530d682fd9a 2483 {
dudmuck 18:9530d682fd9a 2484 ook_test_en = false;
dudmuck 18:9530d682fd9a 2485 poll_irq_en = false;
dudmuck 18:9530d682fd9a 2486 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2487 fsk.enable(false);
dudmuck 18:9530d682fd9a 2488 else
dudmuck 18:9530d682fd9a 2489 lora.enable();
dudmuck 18:9530d682fd9a 2490
dudmuck 18:9530d682fd9a 2491 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 18:9530d682fd9a 2492 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2493 printf("LoRa\r\n");
dudmuck 18:9530d682fd9a 2494 else
dudmuck 18:9530d682fd9a 2495 printf("FSK\r\n");
dudmuck 18:9530d682fd9a 2496 }
dudmuck 18:9530d682fd9a 2497
dudmuck 18:9530d682fd9a 2498 void cmd_empty_fifo(uint8_t idx)
dudmuck 18:9530d682fd9a 2499 {
dudmuck 18:9530d682fd9a 2500 RegIrqFlags2_t RegIrqFlags2;
dudmuck 18:9530d682fd9a 2501 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 2502 while (!RegIrqFlags2.bits.FifoEmpty) {
dudmuck 18:9530d682fd9a 2503 if (pc.readable())
dudmuck 18:9530d682fd9a 2504 break;
dudmuck 18:9530d682fd9a 2505 printf("%02x\r\n", radio.read_reg(REG_FIFO));
dudmuck 18:9530d682fd9a 2506 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 2507 }
dudmuck 18:9530d682fd9a 2508 }
dudmuck 18:9530d682fd9a 2509
dudmuck 18:9530d682fd9a 2510 void cmd_print_status(uint8_t idx)
dudmuck 18:9530d682fd9a 2511 {
dudmuck 18:9530d682fd9a 2512 if (radio.type == SX1276) {
Wayne Roberts 24:9ba45aa15b53 2513 #if defined(TARGET_MTS_MDOT_F411RE)
dudmuck 18:9530d682fd9a 2514 printf("\r\nSX1276 ");
dudmuck 18:9530d682fd9a 2515 #else
dudmuck 18:9530d682fd9a 2516 if (shield_type == SHIELD_TYPE_LAS)
dudmuck 18:9530d682fd9a 2517 printf("\r\nSX1276LAS ");
dudmuck 18:9530d682fd9a 2518 if (shield_type == SHIELD_TYPE_MAS)
dudmuck 18:9530d682fd9a 2519 printf("\r\nSX1276MAS ");
dudmuck 18:9530d682fd9a 2520 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 18:9530d682fd9a 2521 } else if (radio.type == SX1272)
dudmuck 18:9530d682fd9a 2522 printf("\r\nSX1272 ");
dudmuck 18:9530d682fd9a 2523
dudmuck 18:9530d682fd9a 2524 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 18:9530d682fd9a 2525 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2526 lora_print_status();
dudmuck 18:9530d682fd9a 2527 else
dudmuck 18:9530d682fd9a 2528 fsk_print_status();
dudmuck 18:9530d682fd9a 2529 common_print_status();
dudmuck 18:9530d682fd9a 2530 }
dudmuck 18:9530d682fd9a 2531
dudmuck 18:9530d682fd9a 2532 void cmd_hop_period(uint8_t idx)
dudmuck 18:9530d682fd9a 2533 {
dudmuck 18:9530d682fd9a 2534 int i;
dudmuck 18:9530d682fd9a 2535 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2536 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2537 lora.RegHopPeriod = i;
dudmuck 18:9530d682fd9a 2538 radio.write_reg(REG_LR_HOPPERIOD, lora.RegHopPeriod);
dudmuck 18:9530d682fd9a 2539 if (radio.RegDioMapping1.bits.Dio1Mapping != 1) {
dudmuck 18:9530d682fd9a 2540 radio.RegDioMapping1.bits.Dio1Mapping = 1;
dudmuck 18:9530d682fd9a 2541 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2542 }
dudmuck 18:9530d682fd9a 2543 }
dudmuck 18:9530d682fd9a 2544 lora.RegHopPeriod = radio.read_reg(REG_LR_HOPPERIOD);
dudmuck 18:9530d682fd9a 2545 printf("HopPeriod:0x%02x\r\n", lora.RegHopPeriod);
dudmuck 18:9530d682fd9a 2546 }
dudmuck 18:9530d682fd9a 2547
dudmuck 18:9530d682fd9a 2548 void cmd_lora_ppg(uint8_t idx)
dudmuck 18:9530d682fd9a 2549 {
dudmuck 18:9530d682fd9a 2550 int i;
dudmuck 18:9530d682fd9a 2551 if (pcbuf[idx] != 0) {
dudmuck 18:9530d682fd9a 2552 sscanf(pcbuf+idx, "%x", &i);
dudmuck 18:9530d682fd9a 2553 radio.write_reg(REG_LR_SYNC_BYTE, i);
dudmuck 18:9530d682fd9a 2554 }
dudmuck 18:9530d682fd9a 2555 printf("lora sync:0x%02x\r\n", radio.read_reg(REG_LR_SYNC_BYTE));
dudmuck 18:9530d682fd9a 2556 }
dudmuck 18:9530d682fd9a 2557
dudmuck 18:9530d682fd9a 2558 void cmd_rssi_offset(uint8_t idx)
dudmuck 18:9530d682fd9a 2559 {
dudmuck 18:9530d682fd9a 2560 int i;
dudmuck 18:9530d682fd9a 2561 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2562 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2563 fsk.RegRssiConfig.bits.RssiOffset = i;
dudmuck 18:9530d682fd9a 2564 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 2565 }
dudmuck 18:9530d682fd9a 2566 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 2567 printf("RssiOffset:%d\r\n", fsk.RegRssiConfig.bits.RssiOffset);
dudmuck 18:9530d682fd9a 2568 }
dudmuck 18:9530d682fd9a 2569
dudmuck 18:9530d682fd9a 2570 void cmd_rssi_smoothing(uint8_t idx)
dudmuck 18:9530d682fd9a 2571 {
dudmuck 18:9530d682fd9a 2572 int i;
dudmuck 18:9530d682fd9a 2573 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2574 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2575 fsk.RegRssiConfig.bits.RssiSmoothing = i;
dudmuck 18:9530d682fd9a 2576 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 2577 }
dudmuck 18:9530d682fd9a 2578 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 2579 printf("RssiSmoothing:%d\r\n", fsk.RegRssiConfig.bits.RssiSmoothing);
dudmuck 18:9530d682fd9a 2580 }
dudmuck 18:9530d682fd9a 2581
dudmuck 18:9530d682fd9a 2582 void cmd_rssi_threshold(uint8_t idx)
dudmuck 18:9530d682fd9a 2583 {
dudmuck 19:be8a8b0e7320 2584 if ((pcbuf[idx] >= '0' && pcbuf[idx] <= '9') || pcbuf[idx] == '-') {
dudmuck 18:9530d682fd9a 2585 float dbm;
dudmuck 18:9530d682fd9a 2586 sscanf(pcbuf+idx, "%f", &dbm);
dudmuck 18:9530d682fd9a 2587 dbm *= (float)2.0;
dudmuck 18:9530d682fd9a 2588 fsk.RegRssiThresh = (int)fabs(dbm);
dudmuck 18:9530d682fd9a 2589 radio.write_reg(REG_FSK_RSSITHRESH, fsk.RegRssiThresh);
dudmuck 18:9530d682fd9a 2590 }
dudmuck 18:9530d682fd9a 2591 fsk.RegRssiThresh = radio.read_reg(REG_FSK_RSSITHRESH);
dudmuck 18:9530d682fd9a 2592 printf("rssiThreshold:-%.1f\r\n", fsk.RegRssiThresh / 2.0);
dudmuck 18:9530d682fd9a 2593 }
dudmuck 18:9530d682fd9a 2594
dudmuck 18:9530d682fd9a 2595 void cmd_rx_trigger(uint8_t idx)
dudmuck 18:9530d682fd9a 2596 {
dudmuck 18:9530d682fd9a 2597 printf("RxTrigger:");
dudmuck 18:9530d682fd9a 2598 switch (fsk.RegRxConfig.bits.RxTrigger) {
dudmuck 18:9530d682fd9a 2599 case 0: fsk.RegRxConfig.bits.RxTrigger = 1;
dudmuck 18:9530d682fd9a 2600 printf("rssi\r\n");
dudmuck 18:9530d682fd9a 2601 break;
dudmuck 18:9530d682fd9a 2602 case 1: fsk.RegRxConfig.bits.RxTrigger = 6;
dudmuck 18:9530d682fd9a 2603 printf("preamble\r\n");
dudmuck 18:9530d682fd9a 2604 break;
dudmuck 18:9530d682fd9a 2605 case 6: fsk.RegRxConfig.bits.RxTrigger = 7;
dudmuck 18:9530d682fd9a 2606 printf("both\r\n");
dudmuck 18:9530d682fd9a 2607 break;
dudmuck 18:9530d682fd9a 2608 case 7: fsk.RegRxConfig.bits.RxTrigger = 0;
dudmuck 18:9530d682fd9a 2609 printf("none\r\n");
dudmuck 18:9530d682fd9a 2610 break;
dudmuck 18:9530d682fd9a 2611 default: fsk.RegRxConfig.bits.RxTrigger = 0;
dudmuck 18:9530d682fd9a 2612 printf("none\r\n");
dudmuck 18:9530d682fd9a 2613 break;
dudmuck 18:9530d682fd9a 2614 }
dudmuck 18:9530d682fd9a 2615 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2616 }
dudmuck 18:9530d682fd9a 2617
dudmuck 18:9530d682fd9a 2618 void cmd_cadper(uint8_t idx)
dudmuck 18:9530d682fd9a 2619 {
dudmuck 18:9530d682fd9a 2620 set_per_en(true);
dudmuck 18:9530d682fd9a 2621
dudmuck 18:9530d682fd9a 2622 PacketNormalCnt = 0;
dudmuck 20:b11592c9ba5f 2623 PacketRxSequencePrev = 0; // transmitter side PacketTxCnt is 1 at first TX
dudmuck 18:9530d682fd9a 2624 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 2625 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 2626
dudmuck 18:9530d682fd9a 2627 cadper_enable = true;
dudmuck 18:9530d682fd9a 2628
dudmuck 18:9530d682fd9a 2629 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2630 /* clear any stale flag */
dudmuck 18:9530d682fd9a 2631 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2632
dudmuck 18:9530d682fd9a 2633 /* start first CAD */
dudmuck 18:9530d682fd9a 2634 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 2635 num_cads = 0;
dudmuck 18:9530d682fd9a 2636 }
dudmuck 18:9530d682fd9a 2637
dudmuck 18:9530d682fd9a 2638 #if 0
dudmuck 18:9530d682fd9a 2639 void cmd_cadrx(uint8_t idx)
dudmuck 18:9530d682fd9a 2640 {
dudmuck 18:9530d682fd9a 2641 int n_tries = 1;
dudmuck 18:9530d682fd9a 2642 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2643 /* clear any stale flag */
dudmuck 18:9530d682fd9a 2644 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2645
dudmuck 18:9530d682fd9a 2646 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2647 sscanf(pcbuf+idx, "%d", &n_tries);
dudmuck 18:9530d682fd9a 2648 }
dudmuck 18:9530d682fd9a 2649
dudmuck 18:9530d682fd9a 2650 while (n_tries > 0) {
dudmuck 18:9530d682fd9a 2651 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 2652
dudmuck 18:9530d682fd9a 2653 do {
dudmuck 18:9530d682fd9a 2654 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2655 } while (!lora.RegIrqFlags.bits.CadDetected && !lora.RegIrqFlags.bits.CadDone);
dudmuck 18:9530d682fd9a 2656 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 2657 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 2658 n_tries = 1; // end
dudmuck 18:9530d682fd9a 2659 printf("CadDetected ");
dudmuck 18:9530d682fd9a 2660 }
dudmuck 18:9530d682fd9a 2661 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 2662 printf("CadDone ");
dudmuck 18:9530d682fd9a 2663 }
dudmuck 18:9530d682fd9a 2664
dudmuck 18:9530d682fd9a 2665 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2666 printf("\r\n");
dudmuck 18:9530d682fd9a 2667 n_tries--;
dudmuck 18:9530d682fd9a 2668 }
dudmuck 18:9530d682fd9a 2669 }
dudmuck 18:9530d682fd9a 2670 #endif /* #if 0 */
dudmuck 18:9530d682fd9a 2671
dudmuck 18:9530d682fd9a 2672 void cmd_cad(uint8_t idx)
dudmuck 18:9530d682fd9a 2673 {
dudmuck 18:9530d682fd9a 2674 int n_tries = 1;
dudmuck 18:9530d682fd9a 2675 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2676 /* clear any stale flag */
dudmuck 18:9530d682fd9a 2677 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2678
dudmuck 18:9530d682fd9a 2679 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2680 sscanf(pcbuf+idx, "%d", &n_tries);
dudmuck 18:9530d682fd9a 2681 }
dudmuck 18:9530d682fd9a 2682
dudmuck 18:9530d682fd9a 2683 while (n_tries > 0) {
dudmuck 18:9530d682fd9a 2684 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 2685
dudmuck 18:9530d682fd9a 2686 do {
dudmuck 18:9530d682fd9a 2687 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2688 } while (!lora.RegIrqFlags.bits.CadDetected && !lora.RegIrqFlags.bits.CadDone);
dudmuck 18:9530d682fd9a 2689 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 2690 n_tries = 1; // end
dudmuck 18:9530d682fd9a 2691 printf("CadDetected ");
dudmuck 18:9530d682fd9a 2692 }
dudmuck 18:9530d682fd9a 2693 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 2694 if (n_tries == 1) // print on last try
dudmuck 18:9530d682fd9a 2695 printf("CadDone ");
dudmuck 18:9530d682fd9a 2696 }
dudmuck 18:9530d682fd9a 2697
dudmuck 18:9530d682fd9a 2698 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2699 n_tries--;
dudmuck 18:9530d682fd9a 2700 }
dudmuck 18:9530d682fd9a 2701 printf("\r\n");
dudmuck 18:9530d682fd9a 2702 }
dudmuck 18:9530d682fd9a 2703
dudmuck 18:9530d682fd9a 2704 void cmd_rx_timeout(uint8_t idx)
dudmuck 18:9530d682fd9a 2705 {
dudmuck 18:9530d682fd9a 2706 int symb_timeout;
dudmuck 18:9530d682fd9a 2707 uint16_t reg_u16 = radio.read_u16(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2708
dudmuck 18:9530d682fd9a 2709 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2710 sscanf(pcbuf+idx, "%d", &symb_timeout);
dudmuck 18:9530d682fd9a 2711 reg_u16 &= 0xfc00;
dudmuck 18:9530d682fd9a 2712 reg_u16 |= symb_timeout;
dudmuck 22:2005df80c8a8 2713 radio.write_u16(REG_LR_MODEMCONFIG2, reg_u16);
dudmuck 18:9530d682fd9a 2714 }
dudmuck 18:9530d682fd9a 2715 reg_u16 = radio.read_u16(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2716 printf("SymbTimeout:%d\r\n", reg_u16 & 0x3ff);
dudmuck 18:9530d682fd9a 2717 }
dudmuck 18:9530d682fd9a 2718
dudmuck 18:9530d682fd9a 2719 void cmd_rx_single(uint8_t idx)
dudmuck 18:9530d682fd9a 2720 {
dudmuck 18:9530d682fd9a 2721 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 2722 }
dudmuck 18:9530d682fd9a 2723
dudmuck 21:b84a77dfb43c 2724 void preamble_without_sync()
dudmuck 21:b84a77dfb43c 2725 {
dudmuck 21:b84a77dfb43c 2726 printf("preamble_without_sync Afc:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB)));
dudmuck 21:b84a77dfb43c 2727 fsk.RegRxConfig.bits.RestartRxWithoutPllLock = 1;
dudmuck 21:b84a77dfb43c 2728 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 21:b84a77dfb43c 2729 }
dudmuck 21:b84a77dfb43c 2730
dudmuck 21:b84a77dfb43c 2731 Timeout pd_timeout;
dudmuck 21:b84a77dfb43c 2732 Timeout sync_timeout;
dudmuck 21:b84a77dfb43c 2733 void preamble_detect_isr()
dudmuck 21:b84a77dfb43c 2734 {
dudmuck 21:b84a77dfb43c 2735 // only used between frames, on background noise
dudmuck 21:b84a77dfb43c 2736 pd_timeout.attach_us(&preamble_without_sync, 1500); // 122us per byte
dudmuck 21:b84a77dfb43c 2737 }
dudmuck 21:b84a77dfb43c 2738
dudmuck 18:9530d682fd9a 2739 void cmd_rx(uint8_t idx)
dudmuck 18:9530d682fd9a 2740 {
dudmuck 18:9530d682fd9a 2741 set_per_en(false);
dudmuck 18:9530d682fd9a 2742
dudmuck 18:9530d682fd9a 2743 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2744 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 2745 else {
dudmuck 20:b11592c9ba5f 2746 if (poll_irq_en) {
dudmuck 20:b11592c9ba5f 2747 fsk_RegIrqFlags2_prev.octet = 0;
dudmuck 20:b11592c9ba5f 2748 fsk_RegIrqFlags1_prev.octet = 0;
dudmuck 20:b11592c9ba5f 2749 }
dudmuck 20:b11592c9ba5f 2750
dudmuck 20:b11592c9ba5f 2751 rx_start_timer.start();
dudmuck 20:b11592c9ba5f 2752 secs_rx_start = time(NULL);
dudmuck 18:9530d682fd9a 2753 fsk.start_rx();
dudmuck 18:9530d682fd9a 2754 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 18:9530d682fd9a 2755 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2756 if (radio.HF) {
dudmuck 18:9530d682fd9a 2757 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 2758 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 18:9530d682fd9a 2759 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 18:9530d682fd9a 2760 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 21:b84a77dfb43c 2761 }
dudmuck 21:b84a77dfb43c 2762
dudmuck 21:b84a77dfb43c 2763 // sync shadow regsiters
dudmuck 21:b84a77dfb43c 2764 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 21:b84a77dfb43c 2765 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 18:9530d682fd9a 2766 }
dudmuck 18:9530d682fd9a 2767 }
dudmuck 18:9530d682fd9a 2768
dudmuck 18:9530d682fd9a 2769 void cmd_radio_reg_read(uint8_t idx)
dudmuck 18:9530d682fd9a 2770 {
dudmuck 18:9530d682fd9a 2771 int i;
dudmuck 18:9530d682fd9a 2772 sscanf(pcbuf+idx, "%x", &i);
dudmuck 18:9530d682fd9a 2773 printf("%02x: %02x\r\n", i, radio.read_reg(i));
dudmuck 18:9530d682fd9a 2774 }
dudmuck 18:9530d682fd9a 2775
dudmuck 18:9530d682fd9a 2776 void cmd_radio_reg_write(uint8_t idx)
dudmuck 18:9530d682fd9a 2777 {
dudmuck 18:9530d682fd9a 2778 int i, n;
dudmuck 18:9530d682fd9a 2779 sscanf(pcbuf+idx, "%x %x", &i, &n);
dudmuck 18:9530d682fd9a 2780 radio.write_reg(i, n);
dudmuck 18:9530d682fd9a 2781 printf("%02x: %02x\r\n", i, radio.read_reg(i));
dudmuck 18:9530d682fd9a 2782 }
dudmuck 18:9530d682fd9a 2783
dudmuck 18:9530d682fd9a 2784 void cmd_mod_shaping(uint8_t idx)
dudmuck 18:9530d682fd9a 2785 {
dudmuck 18:9530d682fd9a 2786 uint8_t s = fsk.get_modulation_shaping();
dudmuck 18:9530d682fd9a 2787
dudmuck 18:9530d682fd9a 2788 if (s == 3)
dudmuck 18:9530d682fd9a 2789 s = 0;
dudmuck 18:9530d682fd9a 2790 else
dudmuck 18:9530d682fd9a 2791 s++;
dudmuck 18:9530d682fd9a 2792
dudmuck 18:9530d682fd9a 2793 fsk.set_modulation_shaping(s);
dudmuck 18:9530d682fd9a 2794
dudmuck 18:9530d682fd9a 2795 if (radio.RegOpMode.bits.ModulationType == 0) {
dudmuck 18:9530d682fd9a 2796 printf("FSK ");
dudmuck 18:9530d682fd9a 2797 switch (s) {
dudmuck 18:9530d682fd9a 2798 case 0: printf("off"); break;
dudmuck 18:9530d682fd9a 2799 case 1: printf("BT1.0 "); break;
dudmuck 18:9530d682fd9a 2800 case 2: printf("BT0.5 "); break;
dudmuck 18:9530d682fd9a 2801 case 3: printf("BT0.3 "); break;
dudmuck 18:9530d682fd9a 2802 }
dudmuck 18:9530d682fd9a 2803 } else if (radio.RegOpMode.bits.ModulationType == 1) {
dudmuck 18:9530d682fd9a 2804 printf("OOK ");
dudmuck 18:9530d682fd9a 2805 switch (s) {
dudmuck 18:9530d682fd9a 2806 case 0: printf("off"); break;
dudmuck 18:9530d682fd9a 2807 case 1: printf("Fcutoff=bitrate"); break;
dudmuck 18:9530d682fd9a 2808 case 2: printf("Fcutoff=2*bitrate"); break;
dudmuck 18:9530d682fd9a 2809 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 2810 }
dudmuck 18:9530d682fd9a 2811 }
dudmuck 18:9530d682fd9a 2812
dudmuck 18:9530d682fd9a 2813 printf("\r\n");
dudmuck 18:9530d682fd9a 2814 }
dudmuck 18:9530d682fd9a 2815
dudmuck 18:9530d682fd9a 2816 void cmd_MapPreambleDetect(uint8_t idx)
dudmuck 18:9530d682fd9a 2817 {
dudmuck 18:9530d682fd9a 2818 radio.RegDioMapping2.bits.MapPreambleDetect ^= 1;
dudmuck 18:9530d682fd9a 2819 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 2820 printf("MapPreambleDetect:");
dudmuck 18:9530d682fd9a 2821 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 18:9530d682fd9a 2822 printf("preamble\r\n");
dudmuck 18:9530d682fd9a 2823 else
dudmuck 18:9530d682fd9a 2824 printf("rssi\r\n");
dudmuck 18:9530d682fd9a 2825 }
dudmuck 18:9530d682fd9a 2826
dudmuck 18:9530d682fd9a 2827 void cmd_bgr(uint8_t idx)
dudmuck 18:9530d682fd9a 2828 {
dudmuck 18:9530d682fd9a 2829 RegPdsTrim1_t pds_trim;
dudmuck 18:9530d682fd9a 2830 uint8_t adr;
dudmuck 18:9530d682fd9a 2831 if (radio.type == SX1276)
dudmuck 18:9530d682fd9a 2832 adr = REG_PDSTRIM1_SX1276;
dudmuck 18:9530d682fd9a 2833 else
dudmuck 18:9530d682fd9a 2834 adr = REG_PDSTRIM1_SX1272;
dudmuck 18:9530d682fd9a 2835
dudmuck 18:9530d682fd9a 2836 pds_trim.octet = radio.read_reg(adr);
dudmuck 18:9530d682fd9a 2837 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2838 int i;
dudmuck 18:9530d682fd9a 2839 sscanf(&pcbuf[idx], "%d", &i);
dudmuck 18:9530d682fd9a 2840 pds_trim.bits.prog_txdac = i;
dudmuck 18:9530d682fd9a 2841 }
dudmuck 18:9530d682fd9a 2842 radio.write_reg(adr, pds_trim.octet);
dudmuck 18:9530d682fd9a 2843 printf("prog_txdac:%.1fuA\r\n", 2.5 + (pds_trim.bits.prog_txdac * 0.625));
dudmuck 18:9530d682fd9a 2844 /* increase OCP threshold to allow more power */
dudmuck 18:9530d682fd9a 2845 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 18:9530d682fd9a 2846 if (radio.RegOcp.bits.OcpTrim < 16) {
dudmuck 18:9530d682fd9a 2847 radio.RegOcp.bits.OcpTrim = 16;
dudmuck 18:9530d682fd9a 2848 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 18:9530d682fd9a 2849 }
dudmuck 18:9530d682fd9a 2850 }
dudmuck 18:9530d682fd9a 2851
dudmuck 18:9530d682fd9a 2852 void cmd_ook(uint8_t idx)
dudmuck 18:9530d682fd9a 2853 {
dudmuck 18:9530d682fd9a 2854 fsk.set_bitrate(32768);
dudmuck 18:9530d682fd9a 2855 radio.write_u16(REG_FSK_PREAMBLEMSB, 0); // zero preamble length
dudmuck 18:9530d682fd9a 2856 radio.RegOpMode.bits.ModulationType = 1; // to ook mode
dudmuck 18:9530d682fd9a 2857 radio.write_reg(REG_OPMODE, radio.RegOpMode.octet);
dudmuck 18:9530d682fd9a 2858 fsk.RegSyncConfig.bits.SyncOn = 0;
dudmuck 18:9530d682fd9a 2859 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2860 ook_test_en = true;
dudmuck 18:9530d682fd9a 2861 printf("OOK\r\n");
dudmuck 18:9530d682fd9a 2862 }
dudmuck 18:9530d682fd9a 2863
dudmuck 18:9530d682fd9a 2864 void cmd_ocp(uint8_t idx)
dudmuck 18:9530d682fd9a 2865 {
dudmuck 18:9530d682fd9a 2866 int i;
dudmuck 18:9530d682fd9a 2867 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2868 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2869 if (i < 130)
dudmuck 18:9530d682fd9a 2870 radio.RegOcp.bits.OcpTrim = (i - 45) / 5;
dudmuck 18:9530d682fd9a 2871 else
dudmuck 18:9530d682fd9a 2872 radio.RegOcp.bits.OcpTrim = (i + 30) / 10;
dudmuck 18:9530d682fd9a 2873 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 18:9530d682fd9a 2874 }
dudmuck 18:9530d682fd9a 2875 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 18:9530d682fd9a 2876 if (radio.RegOcp.bits.OcpTrim < 16)
dudmuck 18:9530d682fd9a 2877 i = 45 + (5 * radio.RegOcp.bits.OcpTrim);
dudmuck 18:9530d682fd9a 2878 else if (radio.RegOcp.bits.OcpTrim < 28)
dudmuck 18:9530d682fd9a 2879 i = (10 * radio.RegOcp.bits.OcpTrim) - 30;
dudmuck 18:9530d682fd9a 2880 else
dudmuck 18:9530d682fd9a 2881 i = 240;
dudmuck 18:9530d682fd9a 2882 printf("Ocp: %dmA\r\n", i);
dudmuck 18:9530d682fd9a 2883 }
dudmuck 18:9530d682fd9a 2884
dudmuck 18:9530d682fd9a 2885 void cmd_op(uint8_t idx)
dudmuck 18:9530d682fd9a 2886 {
dudmuck 18:9530d682fd9a 2887 int i, dbm;
dudmuck 18:9530d682fd9a 2888 RegPdsTrim1_t pds_trim;
dudmuck 18:9530d682fd9a 2889 uint8_t adr;
dudmuck 18:9530d682fd9a 2890 if (radio.type == SX1276)
dudmuck 18:9530d682fd9a 2891 adr = REG_PDSTRIM1_SX1276;
dudmuck 18:9530d682fd9a 2892 else
dudmuck 18:9530d682fd9a 2893 adr = REG_PDSTRIM1_SX1272;
dudmuck 18:9530d682fd9a 2894
dudmuck 18:9530d682fd9a 2895 pds_trim.octet = radio.read_reg(adr);
dudmuck 18:9530d682fd9a 2896
dudmuck 19:be8a8b0e7320 2897 if (pcbuf[idx] >= '0' && (pcbuf[idx] <= '9' || pcbuf[idx] == '-')) {
dudmuck 18:9530d682fd9a 2898 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2899 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 18:9530d682fd9a 2900 /* PABOOST used: +2dbm to +17, or +20 */
dudmuck 18:9530d682fd9a 2901 if (i == 20) {
dudmuck 18:9530d682fd9a 2902 printf("+20dBm PADAC bias\r\n");
dudmuck 18:9530d682fd9a 2903 i -= 3;
dudmuck 18:9530d682fd9a 2904 pds_trim.bits.prog_txdac = 7;
dudmuck 21:b84a77dfb43c 2905 radio.write_reg(adr, pds_trim.octet);
dudmuck 13:c73caaee93a5 2906 }
dudmuck 18:9530d682fd9a 2907 if (i > 1)
dudmuck 18:9530d682fd9a 2908 radio.RegPaConfig.bits.OutputPower = i - 2;
dudmuck 18:9530d682fd9a 2909 } else {
dudmuck 18:9530d682fd9a 2910 /* RFO used: -1 to +14dbm */
dudmuck 18:9530d682fd9a 2911 if (i < 15)
dudmuck 18:9530d682fd9a 2912 radio.RegPaConfig.bits.OutputPower = i + 1;
dudmuck 18:9530d682fd9a 2913 }
dudmuck 18:9530d682fd9a 2914 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 2915 }
dudmuck 18:9530d682fd9a 2916 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 18:9530d682fd9a 2917 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 18:9530d682fd9a 2918 printf("PA_BOOST ");
dudmuck 18:9530d682fd9a 2919 dbm = radio.RegPaConfig.bits.OutputPower + pds_trim.bits.prog_txdac - 2;
dudmuck 18:9530d682fd9a 2920 } else {
dudmuck 18:9530d682fd9a 2921 printf("RFO ");
dudmuck 18:9530d682fd9a 2922 dbm = radio.RegPaConfig.bits.OutputPower - 1;
dudmuck 18:9530d682fd9a 2923 }
dudmuck 18:9530d682fd9a 2924 printf("OutputPower:%ddBm\r\n", dbm);
dudmuck 18:9530d682fd9a 2925 }
dudmuck 18:9530d682fd9a 2926
dudmuck 18:9530d682fd9a 2927
dudmuck 18:9530d682fd9a 2928
dudmuck 18:9530d682fd9a 2929 void cmd_fsk_agcauto(uint8_t idx)
dudmuck 18:9530d682fd9a 2930 {
dudmuck 18:9530d682fd9a 2931 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 2932 fsk.RegRxConfig.bits.AgcAutoOn ^= 1;
dudmuck 18:9530d682fd9a 2933 printf("AgcAuto:");
dudmuck 18:9530d682fd9a 2934 if (fsk.RegRxConfig.bits.AgcAutoOn)
dudmuck 18:9530d682fd9a 2935 printf("On\r\n");
dudmuck 18:9530d682fd9a 2936 else
dudmuck 18:9530d682fd9a 2937 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 2938 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2939 }
dudmuck 18:9530d682fd9a 2940
dudmuck 18:9530d682fd9a 2941 void cmd_fsk_afcauto(uint8_t idx)
dudmuck 18:9530d682fd9a 2942 {
dudmuck 18:9530d682fd9a 2943 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 2944 fsk.RegRxConfig.bits.AfcAutoOn ^= 1;
dudmuck 18:9530d682fd9a 2945 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2946 printf("AfcAuto:");
dudmuck 18:9530d682fd9a 2947 if (fsk.RegRxConfig.bits.AfcAutoOn)
dudmuck 18:9530d682fd9a 2948 printf("On\r\n");
dudmuck 18:9530d682fd9a 2949 else
dudmuck 18:9530d682fd9a 2950 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 2951 }
dudmuck 18:9530d682fd9a 2952
dudmuck 21:b84a77dfb43c 2953 void cmd_crc32(uint8_t idx)
dudmuck 21:b84a77dfb43c 2954 {
dudmuck 21:b84a77dfb43c 2955 crc32_en ^= true;
dudmuck 21:b84a77dfb43c 2956 printf("crc32_en:%u\r\n", crc32_en);
dudmuck 21:b84a77dfb43c 2957 }
dudmuck 21:b84a77dfb43c 2958
dudmuck 18:9530d682fd9a 2959 void cmd_crcOn(uint8_t idx)
dudmuck 18:9530d682fd9a 2960 {
dudmuck 18:9530d682fd9a 2961 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2962 lora.setRxPayloadCrcOn(!lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 2963 lora_printRxPayloadCrcOn();
dudmuck 18:9530d682fd9a 2964 } else {
dudmuck 18:9530d682fd9a 2965 printf("CrcOn:");
dudmuck 18:9530d682fd9a 2966 fsk.RegPktConfig1.bits.CrcOn ^= 1;
dudmuck 18:9530d682fd9a 2967 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 2968 if (fsk.RegPktConfig1.bits.CrcOn)
dudmuck 18:9530d682fd9a 2969 printf("On\r\n");
dudmuck 18:9530d682fd9a 2970 else
dudmuck 18:9530d682fd9a 2971 printf("Off\r\n");
dudmuck 18:9530d682fd9a 2972 if (fsk.RegPktConfig2.bits.DataModePacket && radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
dudmuck 18:9530d682fd9a 2973 fsk.config_dio0_for_pktmode_rx();
dudmuck 18:9530d682fd9a 2974 }
dudmuck 18:9530d682fd9a 2975 }
dudmuck 18:9530d682fd9a 2976 printf("\r\n");
dudmuck 18:9530d682fd9a 2977 }
dudmuck 18:9530d682fd9a 2978
dudmuck 18:9530d682fd9a 2979 #ifdef LORA_TX_TEST
dudmuck 18:9530d682fd9a 2980 void cmd_lora_fixed_payload_symbol(uint8_t idx) // fixed payload, symbol test
dudmuck 18:9530d682fd9a 2981 {
dudmuck 18:9530d682fd9a 2982 int n, i;
dudmuck 18:9530d682fd9a 2983
dudmuck 18:9530d682fd9a 2984 symbol_num = pcbuf[idx] - '0';
dudmuck 18:9530d682fd9a 2985 sscanf(pcbuf+idx+2, "%d", &i);
dudmuck 18:9530d682fd9a 2986 n = i >> 2; // num nibbles
dudmuck 18:9530d682fd9a 2987 printf("%d nibbles: ", n);
dudmuck 18:9530d682fd9a 2988 lora.RegPayloadLength = byte_pad_length;
dudmuck 18:9530d682fd9a 2989 while (n > 0) {
dudmuck 18:9530d682fd9a 2990 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 2991 n -= 2; // one byte = two nibbles
dudmuck 18:9530d682fd9a 2992 }
dudmuck 18:9530d682fd9a 2993 printf("%d bytes\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2994 symbol_sweep_nbits = i >> 2;
dudmuck 18:9530d682fd9a 2995 symbol_sweep_bit_counter = 0;
dudmuck 18:9530d682fd9a 2996 symbol_sweep_bit_counter_stop = 1 << symbol_sweep_nbits; // one bit per nibble used in symbol (2bits per byte)
dudmuck 18:9530d682fd9a 2997 printf("sweep symbol %d, length bytes:%d nbits:%d stop:0x%x\r\n", symbol_num, lora.RegPayloadLength, symbol_sweep_nbits, symbol_sweep_bit_counter_stop);
dudmuck 18:9530d682fd9a 2998 txticker_state = TXTICKER_STATE_SYMBOL_SWEEP;
dudmuck 18:9530d682fd9a 2999 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3000 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3001 }
dudmuck 18:9530d682fd9a 3002
dudmuck 18:9530d682fd9a 3003 void cmd_fixed_payload_offset(uint8_t idx)
dudmuck 18:9530d682fd9a 3004 {
dudmuck 18:9530d682fd9a 3005 int i;
dudmuck 18:9530d682fd9a 3006 if (pcbuf[idx] >='0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3007 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3008 byte_pad_length = i;
dudmuck 18:9530d682fd9a 3009 }
dudmuck 18:9530d682fd9a 3010 printf("byte_pad_length:%d\r\n", byte_pad_length);
dudmuck 18:9530d682fd9a 3011 }
dudmuck 18:9530d682fd9a 3012
dudmuck 18:9530d682fd9a 3013 void cmd_lora_fixed_payload(uint8_t idx)
dudmuck 18:9530d682fd9a 3014 {
dudmuck 18:9530d682fd9a 3015 int n, a, i, d = 0;
dudmuck 18:9530d682fd9a 3016 for (i = idx; i < pcbuf_len; ) {
dudmuck 18:9530d682fd9a 3017 //printf("scan:\"%s\"\r\n", pcbuf+i);
dudmuck 18:9530d682fd9a 3018 sscanf(pcbuf+i, "%x", &n);
dudmuck 18:9530d682fd9a 3019 //printf("n:%x\r\n", n);
dudmuck 18:9530d682fd9a 3020 radio.tx_buf[d] = n;
dudmuck 18:9530d682fd9a 3021 printf("%02x ", n);
dudmuck 18:9530d682fd9a 3022 while (pcbuf[i] == ' ')
dudmuck 18:9530d682fd9a 3023 i++;
dudmuck 18:9530d682fd9a 3024 //printf("%d pcbuf[i]:%x\r\n", i, pcbuf[i]);
dudmuck 18:9530d682fd9a 3025 for (a = i; pcbuf[a] != ' '; a++)
dudmuck 18:9530d682fd9a 3026 if (a >= pcbuf_len)
dudmuck 18:9530d682fd9a 3027 break;
dudmuck 18:9530d682fd9a 3028 i = a;
dudmuck 18:9530d682fd9a 3029 while (pcbuf[i] == ' ') {
dudmuck 18:9530d682fd9a 3030 i++;
dudmuck 18:9530d682fd9a 3031 if (i >= pcbuf_len)
dudmuck 18:9530d682fd9a 3032 break;
dudmuck 18:9530d682fd9a 3033 }
dudmuck 18:9530d682fd9a 3034 d++;
dudmuck 18:9530d682fd9a 3035 }
dudmuck 18:9530d682fd9a 3036 lora.RegPayloadLength = d;
dudmuck 18:9530d682fd9a 3037 printf("\r\nlora.RegPayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3038 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3039 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3040 }
dudmuck 18:9530d682fd9a 3041
dudmuck 18:9530d682fd9a 3042 void cmd_lora_toggle_crcOn(uint8_t idx)
dudmuck 18:9530d682fd9a 3043 {
dudmuck 18:9530d682fd9a 3044 /* test lora crc on/off */
dudmuck 18:9530d682fd9a 3045 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 3046 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3047 txticker_state = TXTICKER_STATE_TOG_CRC_ON;
dudmuck 18:9530d682fd9a 3048 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3049 }
dudmuck 18:9530d682fd9a 3050
dudmuck 18:9530d682fd9a 3051 void lora_cycle_payload_length(uint8_t idx)
dudmuck 18:9530d682fd9a 3052 {
dudmuck 18:9530d682fd9a 3053 int i;
dudmuck 18:9530d682fd9a 3054 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3055 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3056 payload_length_stop = i;
dudmuck 18:9530d682fd9a 3057 }
dudmuck 18:9530d682fd9a 3058 txticker_state = TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH;
dudmuck 18:9530d682fd9a 3059 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3060 }
dudmuck 18:9530d682fd9a 3061
dudmuck 18:9530d682fd9a 3062 void cmd_lora_data_ramp(uint8_t idx)
dudmuck 18:9530d682fd9a 3063 {
dudmuck 18:9530d682fd9a 3064 // lora payload data ramping
dudmuck 18:9530d682fd9a 3065 lora.RegPayloadLength = pcbuf[idx] - '0';
dudmuck 18:9530d682fd9a 3066 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3067 txticker_state = TXTICKER_STATE_RAMP_PAYLOAD_DATA_START;
dudmuck 18:9530d682fd9a 3068 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3069 }
dudmuck 18:9530d682fd9a 3070
dudmuck 18:9530d682fd9a 3071 void cmd_lora_sync_lo_nibble(uint8_t idx)
dudmuck 18:9530d682fd9a 3072 {
dudmuck 18:9530d682fd9a 3073 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 3074 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 3075 on_txdone_delay = 0.100;
dudmuck 18:9530d682fd9a 3076 txdone_timeout_cb();
dudmuck 18:9530d682fd9a 3077 //sync_sweep_timeout.attach(&txdone_timeout_cb, sync_sweep_delay);
dudmuck 18:9530d682fd9a 3078 }
dudmuck 18:9530d682fd9a 3079
dudmuck 18:9530d682fd9a 3080 void cmd_lora_toggle_header_mode(uint8_t idx)
dudmuck 18:9530d682fd9a 3081 {
dudmuck 18:9530d682fd9a 3082 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 3083 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3084 txticker_state = TXTICKER_STATE_TOG_HEADER_MODE;
dudmuck 18:9530d682fd9a 3085 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3086 }
dudmuck 18:9530d682fd9a 3087
dudmuck 18:9530d682fd9a 3088 void cmd_lora_sync_sweep(uint8_t idx)
dudmuck 18:9530d682fd9a 3089 {
dudmuck 18:9530d682fd9a 3090 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 3091 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3092 txticker_sync_byte = 0x12;
dudmuck 18:9530d682fd9a 3093 if (pcbuf[idx] == '1')
dudmuck 18:9530d682fd9a 3094 txticker_state = TXTICKER_STATE_CYCLE_SYNC_1;
dudmuck 18:9530d682fd9a 3095 else if (pcbuf[idx] == '2')
dudmuck 18:9530d682fd9a 3096 txticker_state = TXTICKER_STATE_CYCLE_SYNC_2;
dudmuck 18:9530d682fd9a 3097 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3098 }
dudmuck 18:9530d682fd9a 3099
dudmuck 18:9530d682fd9a 3100 void cmd_lora_all_payload_lengths(uint8_t idx)
dudmuck 18:9530d682fd9a 3101 {
dudmuck 18:9530d682fd9a 3102 on_txdone_repeat_cnt = 0;
dudmuck 18:9530d682fd9a 3103 on_txdone_state = ON_TXDONE_STATE_PAYLOAD_LENGTH;
dudmuck 18:9530d682fd9a 3104 on_txdone_delay = 0.200;
dudmuck 18:9530d682fd9a 3105 txdone_timeout_cb();
dudmuck 18:9530d682fd9a 3106 lora.RegPayloadLength = 0;
dudmuck 18:9530d682fd9a 3107 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3108 }
dudmuck 18:9530d682fd9a 3109
dudmuck 18:9530d682fd9a 3110 void cmd_lora_toggle_all_bits(uint8_t idx)
dudmuck 18:9530d682fd9a 3111 {
dudmuck 18:9530d682fd9a 3112 lora.RegPayloadLength = (pcbuf[idx] - '0') + byte_pad_length;
dudmuck 18:9530d682fd9a 3113 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3114 txticker_state = TXTICKER_STATE_TOGGLE_ALL_BITS_START;
dudmuck 18:9530d682fd9a 3115 printf("tab byte length:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3116
dudmuck 18:9530d682fd9a 3117 if (lora.RegPayloadLength > 0)
dudmuck 18:9530d682fd9a 3118 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3119 }
dudmuck 18:9530d682fd9a 3120
dudmuck 18:9530d682fd9a 3121 void cmd_lora_cycle_codingrates(uint8_t idx)
dudmuck 18:9530d682fd9a 3122 {
dudmuck 18:9530d682fd9a 3123 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 3124 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3125 txticker_state = TXTICKER_STATE_CYCLE_CODING_RATE;
dudmuck 18:9530d682fd9a 3126 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3127 }
dudmuck 18:9530d682fd9a 3128 #endif /* LORA_TX_TEST */
dudmuck 18:9530d682fd9a 3129
dudmuck 18:9530d682fd9a 3130 void cmd_codingRate(uint8_t idx)
dudmuck 18:9530d682fd9a 3131 {
dudmuck 18:9530d682fd9a 3132 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9')
dudmuck 18:9530d682fd9a 3133 lora.setCodingRate(pcbuf[idx] - '0');
dudmuck 18:9530d682fd9a 3134 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 3135 lora_printCodingRate(false); // false: transmitted
dudmuck 18:9530d682fd9a 3136 printf("\r\n");
dudmuck 18:9530d682fd9a 3137 }
dudmuck 18:9530d682fd9a 3138
dudmuck 18:9530d682fd9a 3139 void cmd_lora_header_mode(uint8_t idx)
dudmuck 18:9530d682fd9a 3140 {
dudmuck 18:9530d682fd9a 3141 lora.setHeaderMode(!lora.getHeaderMode());
dudmuck 18:9530d682fd9a 3142 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 3143 lora_printHeaderMode();
dudmuck 18:9530d682fd9a 3144 printf("\r\n");
dudmuck 18:9530d682fd9a 3145 }
dudmuck 18:9530d682fd9a 3146
dudmuck 18:9530d682fd9a 3147 void cmd_fsk_AfcAutoClearOn(uint8_t idx)
dudmuck 18:9530d682fd9a 3148 {
dudmuck 18:9530d682fd9a 3149 fsk.RegAfcFei.bits.AfcAutoClearOn ^= 1;
dudmuck 18:9530d682fd9a 3150 printf("AfcAutoClearOn: ");
dudmuck 18:9530d682fd9a 3151 radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
dudmuck 18:9530d682fd9a 3152 if (fsk.RegAfcFei.bits.AfcAutoClearOn)
dudmuck 18:9530d682fd9a 3153 printf("ON\r\n");
dudmuck 18:9530d682fd9a 3154 else
dudmuck 18:9530d682fd9a 3155 printf("off\r\n");
dudmuck 18:9530d682fd9a 3156 }
dudmuck 18:9530d682fd9a 3157
dudmuck 18:9530d682fd9a 3158 void cmd_fsk_AutoRestartRxMode(uint8_t idx)
dudmuck 18:9530d682fd9a 3159 {
dudmuck 18:9530d682fd9a 3160 fsk.RegSyncConfig.bits.AutoRestartRxMode++;
dudmuck 18:9530d682fd9a 3161 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 3162 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 3163 printf("AutoRestartRxMode:");
dudmuck 18:9530d682fd9a 3164 switch (fsk.RegSyncConfig.bits.AutoRestartRxMode) {
dudmuck 18:9530d682fd9a 3165 case 0: printf("off "); break;
dudmuck 18:9530d682fd9a 3166 case 1: printf("no-pll-wait "); break;
dudmuck 18:9530d682fd9a 3167 case 2: printf("pll-wait "); break;
dudmuck 18:9530d682fd9a 3168 case 3: printf("3 "); break;
dudmuck 18:9530d682fd9a 3169 }
dudmuck 18:9530d682fd9a 3170 printf("\r\n");
dudmuck 18:9530d682fd9a 3171 }
dudmuck 18:9530d682fd9a 3172
dudmuck 18:9530d682fd9a 3173 void cmd_AfcClear(uint8_t idx)
dudmuck 18:9530d682fd9a 3174 {
dudmuck 18:9530d682fd9a 3175 printf("clear afc: ");
dudmuck 18:9530d682fd9a 3176 fsk.RegAfcFei.bits.AfcClear = 1;
dudmuck 18:9530d682fd9a 3177 radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
dudmuck 18:9530d682fd9a 3178 fsk.RegAfcFei.bits.AfcClear = 0;
dudmuck 18:9530d682fd9a 3179 printf("%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB)));
dudmuck 18:9530d682fd9a 3180 }
dudmuck 18:9530d682fd9a 3181
dudmuck 18:9530d682fd9a 3182 void cmd_fsk_bitrate(uint8_t idx)
dudmuck 18:9530d682fd9a 3183 {
dudmuck 18:9530d682fd9a 3184 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3185 float kbits;
dudmuck 18:9530d682fd9a 3186 sscanf(&pcbuf[idx], "%f", &kbits);
dudmuck 18:9530d682fd9a 3187 fsk.set_bitrate((int)(kbits*1000));
dudmuck 18:9530d682fd9a 3188 }
dudmuck 18:9530d682fd9a 3189 printf("%fkbps\r\n", fsk.get_bitrate()/(float)1000.0);
dudmuck 18:9530d682fd9a 3190 }
dudmuck 18:9530d682fd9a 3191
dudmuck 18:9530d682fd9a 3192 void cmd_bandwidth(uint8_t idx)
dudmuck 18:9530d682fd9a 3193 {
dudmuck 18:9530d682fd9a 3194 int i;
dudmuck 18:9530d682fd9a 3195 float f;
dudmuck 18:9530d682fd9a 3196 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3197 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3198 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 3199 sscanf(&pcbuf[idx], "%d", &i);
dudmuck 18:9530d682fd9a 3200 lora.setBw_KHz(i);
dudmuck 18:9530d682fd9a 3201 } else
dudmuck 18:9530d682fd9a 3202 lora_printAllBw();
dudmuck 18:9530d682fd9a 3203 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 3204 printf("current ");
dudmuck 18:9530d682fd9a 3205 lora_printBw();
dudmuck 18:9530d682fd9a 3206 printf("\r\n");
dudmuck 18:9530d682fd9a 3207 } else { // FSK:
dudmuck 18:9530d682fd9a 3208 if (pcbuf[idx] == 'a') {
dudmuck 18:9530d682fd9a 3209 idx++;
dudmuck 18:9530d682fd9a 3210 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3211 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 3212 sscanf(&pcbuf[idx], "%f", &f);
dudmuck 18:9530d682fd9a 3213 fsk.set_rx_dcc_bw_hz((int)(f*(float)1000.0), 1);
dudmuck 18:9530d682fd9a 3214 }
dudmuck 18:9530d682fd9a 3215 printf("afcbw:%.3fkHz\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW)/1000.0);
dudmuck 18:9530d682fd9a 3216 } else {
dudmuck 18:9530d682fd9a 3217 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3218 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 3219 sscanf(&pcbuf[idx], "%f", &f);
dudmuck 18:9530d682fd9a 3220 fsk.set_rx_dcc_bw_hz((int)(f*(float)1000.0), 0);
dudmuck 18:9530d682fd9a 3221 }
dudmuck 18:9530d682fd9a 3222 printf("rxbw:%.3fkHz\r\n", fsk.get_rx_bw_hz(REG_FSK_RXBW)/1000.0);
dudmuck 18:9530d682fd9a 3223 }
dudmuck 18:9530d682fd9a 3224 }
dudmuck 18:9530d682fd9a 3225 }
dudmuck 18:9530d682fd9a 3226
dudmuck 18:9530d682fd9a 3227 void cmd_lora_poll_validHeader(uint8_t idx)
dudmuck 18:9530d682fd9a 3228 {
dudmuck 18:9530d682fd9a 3229 lora.poll_vh ^= 1;
dudmuck 18:9530d682fd9a 3230 printf("poll_vh:%d\r\n", lora.poll_vh);
dudmuck 18:9530d682fd9a 3231 }
dudmuck 18:9530d682fd9a 3232
dudmuck 18:9530d682fd9a 3233 void cmd_fsk_syncword(uint8_t idx)
dudmuck 18:9530d682fd9a 3234 {
dudmuck 18:9530d682fd9a 3235 int i, d = 0;
dudmuck 18:9530d682fd9a 3236 uint8_t reg_addr = REG_FSK_SYNCVALUE1;
dudmuck 18:9530d682fd9a 3237
dudmuck 18:9530d682fd9a 3238 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 3239
dudmuck 18:9530d682fd9a 3240 if (pcbuf_len != idx) { // something to write?
dudmuck 18:9530d682fd9a 3241 for (i = idx; i < pcbuf_len; ) {
dudmuck 18:9530d682fd9a 3242 int a, n;
dudmuck 18:9530d682fd9a 3243 sscanf(pcbuf+i, "%x", &n);
dudmuck 18:9530d682fd9a 3244 radio.write_reg(reg_addr++, n);
dudmuck 18:9530d682fd9a 3245 //printf("%02x ", n);
dudmuck 18:9530d682fd9a 3246 while (pcbuf[i] == ' ')
dudmuck 18:9530d682fd9a 3247 i++;
dudmuck 18:9530d682fd9a 3248 for (a = i; pcbuf[a] != ' '; a++)
dudmuck 18:9530d682fd9a 3249 if (a >= pcbuf_len)
dudmuck 18:9530d682fd9a 3250 break;
dudmuck 18:9530d682fd9a 3251 i = a;
dudmuck 18:9530d682fd9a 3252 while (pcbuf[i] == ' ') {
dudmuck 18:9530d682fd9a 3253 i++;
dudmuck 18:9530d682fd9a 3254 if (i >= pcbuf_len)
dudmuck 18:9530d682fd9a 3255 break;
dudmuck 18:9530d682fd9a 3256 }
dudmuck 18:9530d682fd9a 3257 d++;
dudmuck 18:9530d682fd9a 3258 }
dudmuck 18:9530d682fd9a 3259
dudmuck 18:9530d682fd9a 3260 fsk.RegSyncConfig.bits.SyncSize = reg_addr - REG_FSK_SYNCVALUE1 - 1;
dudmuck 18:9530d682fd9a 3261 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 3262 }
dudmuck 18:9530d682fd9a 3263
dudmuck 18:9530d682fd9a 3264 printf("%d: ", fsk.RegSyncConfig.bits.SyncSize);
dudmuck 18:9530d682fd9a 3265 for (i = 0; i <= fsk.RegSyncConfig.bits.SyncSize; i++)
dudmuck 18:9530d682fd9a 3266 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE1+i));
dudmuck 18:9530d682fd9a 3267 printf("\r\n");
dudmuck 18:9530d682fd9a 3268 }
dudmuck 18:9530d682fd9a 3269
dudmuck 18:9530d682fd9a 3270 void cmd_fsk_syncOn(uint8_t idx)
dudmuck 18:9530d682fd9a 3271 {
dudmuck 18:9530d682fd9a 3272 fsk.RegSyncConfig.bits.SyncOn ^= 1;
dudmuck 18:9530d682fd9a 3273 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 3274 printf("SyncOn:%d\r\n", fsk.RegSyncConfig.bits.SyncOn);
dudmuck 18:9530d682fd9a 3275 }
dudmuck 18:9530d682fd9a 3276
dudmuck 18:9530d682fd9a 3277 void cmd_fsk_bitsync(uint8_t idx)
dudmuck 18:9530d682fd9a 3278 {
dudmuck 18:9530d682fd9a 3279 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 3280 fsk.RegOokPeak.bits.BitSyncOn ^= 1;
dudmuck 18:9530d682fd9a 3281 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 3282 if (fsk.RegOokPeak.bits.BitSyncOn)
dudmuck 18:9530d682fd9a 3283 printf("BitSyncOn\r\n");
dudmuck 18:9530d682fd9a 3284 else
dudmuck 18:9530d682fd9a 3285 printf("BitSync Off\r\n");
dudmuck 18:9530d682fd9a 3286 }
dudmuck 18:9530d682fd9a 3287
dudmuck 18:9530d682fd9a 3288 void cmd_lora_sf(uint8_t idx)
dudmuck 18:9530d682fd9a 3289 {
dudmuck 18:9530d682fd9a 3290 int i;
dudmuck 18:9530d682fd9a 3291 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3292 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3293 lora.setSf(i);
dudmuck 18:9530d682fd9a 3294 if (i == 6 && !lora.getHeaderMode()) {
dudmuck 18:9530d682fd9a 3295 printf("SF6: to implicit header mode\r\n");
dudmuck 18:9530d682fd9a 3296 lora.setHeaderMode(true);
dudmuck 18:9530d682fd9a 3297 }
dudmuck 18:9530d682fd9a 3298 }
dudmuck 18:9530d682fd9a 3299 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 3300 lora_printSf();
dudmuck 18:9530d682fd9a 3301 printf("\r\n");
dudmuck 18:9530d682fd9a 3302 }
dudmuck 18:9530d682fd9a 3303
dudmuck 18:9530d682fd9a 3304 void cmd_fsk_TxStartCondition(uint8_t idx)
dudmuck 18:9530d682fd9a 3305 {
dudmuck 18:9530d682fd9a 3306 fsk.RegFifoThreshold.bits.TxStartCondition ^= 1;
dudmuck 18:9530d682fd9a 3307 radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
dudmuck 18:9530d682fd9a 3308 printf("TxStartCondition:");
dudmuck 18:9530d682fd9a 3309 if (fsk.RegFifoThreshold.bits.TxStartCondition)
dudmuck 18:9530d682fd9a 3310 printf("!FifoEmpty\r\n");
dudmuck 18:9530d682fd9a 3311 else
dudmuck 18:9530d682fd9a 3312 printf("FifoLevel\r\n");
dudmuck 18:9530d682fd9a 3313 }
dudmuck 18:9530d682fd9a 3314
dudmuck 18:9530d682fd9a 3315 void cmd_fsk_read_fei(uint8_t idx)
dudmuck 18:9530d682fd9a 3316 {
dudmuck 18:9530d682fd9a 3317 printf("fei:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_FEIMSB)));
dudmuck 18:9530d682fd9a 3318 }
dudmuck 18:9530d682fd9a 3319
dudmuck 18:9530d682fd9a 3320 void cmd_fsk_fdev(uint8_t idx)
dudmuck 18:9530d682fd9a 3321 {
dudmuck 18:9530d682fd9a 3322 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3323 float khz;
dudmuck 18:9530d682fd9a 3324 sscanf(pcbuf+idx, "%f", &khz);
dudmuck 18:9530d682fd9a 3325 fsk.set_tx_fdev_hz((int)(khz*1000));
dudmuck 18:9530d682fd9a 3326 }
dudmuck 18:9530d682fd9a 3327 printf("fdev:%fKHz\r\n", fsk.get_tx_fdev_hz()/(float)1000.0);
dudmuck 18:9530d682fd9a 3328 }
dudmuck 18:9530d682fd9a 3329
dudmuck 21:b84a77dfb43c 3330 void cmd_spifreq(uint8_t idx)
dudmuck 21:b84a77dfb43c 3331 {
dudmuck 21:b84a77dfb43c 3332 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 21:b84a77dfb43c 3333 int hz, MHz;
dudmuck 21:b84a77dfb43c 3334 sscanf(pcbuf+idx, "%d", &MHz);
dudmuck 21:b84a77dfb43c 3335 hz = MHz * 1000000;
dudmuck 21:b84a77dfb43c 3336 printf("spi hz:%u\r\n", hz);
dudmuck 21:b84a77dfb43c 3337 radio.m_spi.frequency(hz);
dudmuck 21:b84a77dfb43c 3338 }
dudmuck 21:b84a77dfb43c 3339 }
dudmuck 21:b84a77dfb43c 3340
dudmuck 18:9530d682fd9a 3341 void cmd_frf(uint8_t idx)
dudmuck 18:9530d682fd9a 3342 {
dudmuck 18:9530d682fd9a 3343 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3344 float MHz;
dudmuck 18:9530d682fd9a 3345 sscanf(pcbuf+idx, "%f", &MHz);
dudmuck 18:9530d682fd9a 3346 //printf("MHz:%f\r\n", MHz);
dudmuck 18:9530d682fd9a 3347 radio.set_frf_MHz(MHz);
dudmuck 18:9530d682fd9a 3348 }
dudmuck 18:9530d682fd9a 3349 printf("%fMHz\r\n", radio.get_frf_MHz());
Wayne Roberts 24:9ba45aa15b53 3350 #if !defined(TARGET_MTS_MDOT_F411RE) && !defined(TARGET_DISCO_L072CZ_LRWAN1)
dudmuck 18:9530d682fd9a 3351 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 18:9530d682fd9a 3352 if (shield_type == SHIELD_TYPE_LAS) {
dudmuck 18:9530d682fd9a 3353 // LAS HF=PA_BOOST LF=RFO
dudmuck 18:9530d682fd9a 3354 if (radio.HF)
dudmuck 18:9530d682fd9a 3355 radio.RegPaConfig.bits.PaSelect = 1;
dudmuck 18:9530d682fd9a 3356 else
dudmuck 18:9530d682fd9a 3357 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 18:9530d682fd9a 3358 }
dudmuck 18:9530d682fd9a 3359 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 3360 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 18:9530d682fd9a 3361 }
dudmuck 18:9530d682fd9a 3362
dudmuck 18:9530d682fd9a 3363 void cmd_fsk_PacketFormat(uint8_t idx)
dudmuck 18:9530d682fd9a 3364 {
dudmuck 18:9530d682fd9a 3365 printf("PacketFormat:");
dudmuck 18:9530d682fd9a 3366 fsk.RegPktConfig1.bits.PacketFormatVariable ^= 1;
dudmuck 18:9530d682fd9a 3367 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 3368 if (fsk.RegPktConfig1.bits.PacketFormatVariable)
dudmuck 18:9530d682fd9a 3369 printf("variable\r\n");
dudmuck 18:9530d682fd9a 3370 else
dudmuck 18:9530d682fd9a 3371 printf("fixed\r\n");
dudmuck 18:9530d682fd9a 3372 }
dudmuck 18:9530d682fd9a 3373
dudmuck 18:9530d682fd9a 3374 void cmd_payload_length(uint8_t idx)
dudmuck 18:9530d682fd9a 3375 {
dudmuck 18:9530d682fd9a 3376 int i;
dudmuck 18:9530d682fd9a 3377 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3378 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3379 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3380 lora.RegPayloadLength = i;
dudmuck 13:c73caaee93a5 3381 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3382 } else {
dudmuck 18:9530d682fd9a 3383 fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 3384 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 10:d9bb2ce57f05 3385 }
dudmuck 18:9530d682fd9a 3386 }
dudmuck 18:9530d682fd9a 3387 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3388 lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH);
dudmuck 18:9530d682fd9a 3389 printf("PayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3390 } else {
dudmuck 18:9530d682fd9a 3391 printf("PayloadLength:%d\r\n", fsk_get_PayloadLength());
dudmuck 18:9530d682fd9a 3392 }
dudmuck 18:9530d682fd9a 3393 }
dudmuck 18:9530d682fd9a 3394
dudmuck 18:9530d682fd9a 3395 void cmd_paRamp(uint8_t idx)
dudmuck 18:9530d682fd9a 3396 {
dudmuck 18:9530d682fd9a 3397 int i;
dudmuck 18:9530d682fd9a 3398 uint8_t reg_par = radio.read_reg(REG_PARAMP);
dudmuck 18:9530d682fd9a 3399 uint8_t PaRamp = reg_par & 0x0f;
dudmuck 18:9530d682fd9a 3400 reg_par &= 0xf0;
dudmuck 18:9530d682fd9a 3401 if (PaRamp == 15)
dudmuck 18:9530d682fd9a 3402 PaRamp = 0;
dudmuck 18:9530d682fd9a 3403 else
dudmuck 18:9530d682fd9a 3404 PaRamp++;
dudmuck 18:9530d682fd9a 3405 radio.write_reg(REG_PARAMP, reg_par | PaRamp);
dudmuck 18:9530d682fd9a 3406 printf("PaRamp:");
dudmuck 18:9530d682fd9a 3407 switch (PaRamp) {
dudmuck 18:9530d682fd9a 3408 case 0: i = 3400; break;
dudmuck 18:9530d682fd9a 3409 case 1: i = 2000; break;
dudmuck 18:9530d682fd9a 3410 case 2: i = 1000; break;
dudmuck 18:9530d682fd9a 3411 case 3: i = 500; break;
dudmuck 18:9530d682fd9a 3412 case 4: i = 250; break;
dudmuck 18:9530d682fd9a 3413 case 5: i = 125; break;
dudmuck 18:9530d682fd9a 3414 case 6: i = 100; break;
dudmuck 18:9530d682fd9a 3415 case 7: i = 62; break;
dudmuck 18:9530d682fd9a 3416 case 8: i = 50; break;
dudmuck 18:9530d682fd9a 3417 case 9: i = 40; break;
dudmuck 18:9530d682fd9a 3418 case 10: i = 31; break;
dudmuck 18:9530d682fd9a 3419 case 11: i = 25; break;
dudmuck 18:9530d682fd9a 3420 case 12: i = 20; break;
dudmuck 18:9530d682fd9a 3421 case 13: i = 15; break;
dudmuck 18:9530d682fd9a 3422 case 14: i = 12; break;
dudmuck 18:9530d682fd9a 3423 case 15: i = 10; break;
dudmuck 18:9530d682fd9a 3424 }
dudmuck 18:9530d682fd9a 3425 printf("%dus\r\n", i);
dudmuck 18:9530d682fd9a 3426 }
dudmuck 18:9530d682fd9a 3427
dudmuck 18:9530d682fd9a 3428 void cmd_paSelect(uint8_t idx)
dudmuck 18:9530d682fd9a 3429 {
dudmuck 18:9530d682fd9a 3430 radio.RegPaConfig.bits.PaSelect ^= 1;
dudmuck 18:9530d682fd9a 3431 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 3432 printPa();
dudmuck 18:9530d682fd9a 3433 printf("\r\n");
dudmuck 18:9530d682fd9a 3434 }
dudmuck 18:9530d682fd9a 3435
dudmuck 18:9530d682fd9a 3436 void cmd_poll_irq_en(uint8_t idx)
dudmuck 18:9530d682fd9a 3437 {
dudmuck 18:9530d682fd9a 3438 poll_irq_en ^= 1;
dudmuck 18:9530d682fd9a 3439 printf("poll_irq_en:");
dudmuck 20:b11592c9ba5f 3440 if (poll_irq_en) {
dudmuck 18:9530d682fd9a 3441 printf("irqFlags register\r\n");
dudmuck 20:b11592c9ba5f 3442 fsk_RegIrqFlags1_prev.octet = 0;
dudmuck 20:b11592c9ba5f 3443 fsk_RegIrqFlags2_prev.octet = 0;
dudmuck 20:b11592c9ba5f 3444 } else
dudmuck 18:9530d682fd9a 3445 printf("DIO pin interrupt\r\n");
dudmuck 18:9530d682fd9a 3446 }
dudmuck 18:9530d682fd9a 3447
dudmuck 18:9530d682fd9a 3448 void cmd_per_id(uint8_t idx)
dudmuck 18:9530d682fd9a 3449 {
dudmuck 18:9530d682fd9a 3450 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3451 sscanf(pcbuf+idx, "%d", &per_id);
dudmuck 18:9530d682fd9a 3452 }
dudmuck 18:9530d682fd9a 3453 printf("PER device ID:%d\r\n", per_id);
dudmuck 18:9530d682fd9a 3454 }
dudmuck 18:9530d682fd9a 3455
dudmuck 18:9530d682fd9a 3456 void cmd_pertx(uint8_t idx)
dudmuck 18:9530d682fd9a 3457 {
dudmuck 18:9530d682fd9a 3458 int i;
dudmuck 18:9530d682fd9a 3459
dudmuck 18:9530d682fd9a 3460 if (cadper_enable)
dudmuck 18:9530d682fd9a 3461 cadper_enable = false;
dudmuck 18:9530d682fd9a 3462
dudmuck 18:9530d682fd9a 3463 set_per_en(true);
dudmuck 18:9530d682fd9a 3464 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3465 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3466 PacketTxCntEnd = i;
dudmuck 18:9530d682fd9a 3467 }
dudmuck 18:9530d682fd9a 3468 PacketTxCnt = 0;
dudmuck 18:9530d682fd9a 3469 per_timeout.attach(&per_cb, per_tx_delay);
dudmuck 18:9530d682fd9a 3470 }
dudmuck 18:9530d682fd9a 3471
dudmuck 18:9530d682fd9a 3472 void cmd_perrx(uint8_t idx)
dudmuck 18:9530d682fd9a 3473 {
dudmuck 18:9530d682fd9a 3474 set_per_en(true);
dudmuck 18:9530d682fd9a 3475
dudmuck 18:9530d682fd9a 3476 PacketNormalCnt = 0;
dudmuck 20:b11592c9ba5f 3477 PacketRxSequencePrev = 0; // transmitter side PacketTxCnt is 1 at first TX
dudmuck 18:9530d682fd9a 3478 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 3479 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 3480 //dio3.rise(&dio3_cb);
dudmuck 18:9530d682fd9a 3481
dudmuck 18:9530d682fd9a 3482 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 3483 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 13:c73caaee93a5 3484 else {
dudmuck 18:9530d682fd9a 3485 fsk.start_rx();
dudmuck 18:9530d682fd9a 3486 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 18:9530d682fd9a 3487 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3488 if (radio.HF) {
dudmuck 18:9530d682fd9a 3489 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 3490 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 18:9530d682fd9a 3491 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 18:9530d682fd9a 3492 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 3493 }
dudmuck 18:9530d682fd9a 3494 }
dudmuck 18:9530d682fd9a 3495 }
dudmuck 18:9530d682fd9a 3496
dudmuck 18:9530d682fd9a 3497 void cmd_fsk_PreambleDetectorOn(uint8_t idx)
dudmuck 18:9530d682fd9a 3498 {
dudmuck 18:9530d682fd9a 3499 fsk.RegPreambleDetect.bits.PreambleDetectorOn ^= 1;
dudmuck 18:9530d682fd9a 3500 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 3501 printf("PreambleDetector:");
dudmuck 18:9530d682fd9a 3502 if (fsk.RegPreambleDetect.bits.PreambleDetectorOn)
dudmuck 18:9530d682fd9a 3503 printf("On\r\n");
dudmuck 18:9530d682fd9a 3504 else
dudmuck 18:9530d682fd9a 3505 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 3506 }
dudmuck 18:9530d682fd9a 3507
dudmuck 18:9530d682fd9a 3508 void cmd_fsk_PreambleDetectorSize(uint8_t idx)
dudmuck 18:9530d682fd9a 3509 {
dudmuck 18:9530d682fd9a 3510 int i;
dudmuck 18:9530d682fd9a 3511 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3512 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3513 fsk.RegPreambleDetect.bits.PreambleDetectorSize = i;
dudmuck 18:9530d682fd9a 3514 }
dudmuck 18:9530d682fd9a 3515 printf("PreambleDetectorSize:%d\r\n", fsk.RegPreambleDetect.bits.PreambleDetectorSize);
dudmuck 18:9530d682fd9a 3516 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 3517 }
dudmuck 18:9530d682fd9a 3518
dudmuck 18:9530d682fd9a 3519 void cmd_fsk_PreambleDetectorTol(uint8_t idx)
dudmuck 18:9530d682fd9a 3520 {
dudmuck 18:9530d682fd9a 3521 int i;
dudmuck 18:9530d682fd9a 3522 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3523 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3524 fsk.RegPreambleDetect.bits.PreambleDetectorTol = i;
dudmuck 18:9530d682fd9a 3525 }
dudmuck 18:9530d682fd9a 3526 printf("PreambleDetectorTol:%d\r\n", fsk.RegPreambleDetect.bits.PreambleDetectorTol);
dudmuck 18:9530d682fd9a 3527 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 3528 }
dudmuck 18:9530d682fd9a 3529
dudmuck 18:9530d682fd9a 3530 void cmd_PreambleSize(uint8_t idx)
dudmuck 18:9530d682fd9a 3531 {
dudmuck 18:9530d682fd9a 3532 int i;
dudmuck 18:9530d682fd9a 3533 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3534 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3535 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3536 radio.write_u16(REG_LR_PREAMBLEMSB, i);
dudmuck 18:9530d682fd9a 3537 }
dudmuck 18:9530d682fd9a 3538 lora.RegPreamble = radio.read_u16(REG_LR_PREAMBLEMSB);
dudmuck 18:9530d682fd9a 3539 printf("lora PreambleLength:%d\r\n", lora.RegPreamble);
dudmuck 18:9530d682fd9a 3540 } else {
dudmuck 18:9530d682fd9a 3541 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3542 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3543 radio.write_u16(REG_FSK_PREAMBLEMSB, i);
dudmuck 18:9530d682fd9a 3544 }
dudmuck 18:9530d682fd9a 3545 printf("PreambleSize:%d\r\n", radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 18:9530d682fd9a 3546 }
dudmuck 18:9530d682fd9a 3547 }
dudmuck 18:9530d682fd9a 3548
dudmuck 18:9530d682fd9a 3549 void cmd_fsk_PreamblePolarity(uint8_t idx)
dudmuck 18:9530d682fd9a 3550 {
dudmuck 18:9530d682fd9a 3551 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 3552 fsk.RegSyncConfig.bits.PreamblePolarity ^= 1;
dudmuck 18:9530d682fd9a 3553 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 3554 if (fsk.RegSyncConfig.bits.PreamblePolarity)
dudmuck 18:9530d682fd9a 3555 printf("0x55\r\n");
dudmuck 18:9530d682fd9a 3556 else
dudmuck 18:9530d682fd9a 3557 printf("0xaa\r\n");
dudmuck 18:9530d682fd9a 3558 }
dudmuck 18:9530d682fd9a 3559
dudmuck 18:9530d682fd9a 3560 void cmd_pllbw(uint8_t idx)
dudmuck 18:9530d682fd9a 3561 {
dudmuck 18:9530d682fd9a 3562 RegPll_t pll;
dudmuck 18:9530d682fd9a 3563 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 3564 // 0x5c and 0x5e registers
dudmuck 18:9530d682fd9a 3565 pll.octet = radio.read_reg(REG_PLL_SX1272);
dudmuck 18:9530d682fd9a 3566 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 3567 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 3568 else
dudmuck 18:9530d682fd9a 3569 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 3570 radio.write_reg(REG_PLL_SX1272, pll.octet);
dudmuck 18:9530d682fd9a 3571 pll.octet = radio.read_reg(REG_PLL_LOWPN_SX1272);
dudmuck 18:9530d682fd9a 3572 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 3573 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 3574 else
dudmuck 18:9530d682fd9a 3575 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 3576 radio.write_reg(REG_PLL_LOWPN_SX1272, pll.octet);
dudmuck 18:9530d682fd9a 3577 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 3578 // 0x70 register
dudmuck 18:9530d682fd9a 3579 pll.octet = radio.read_reg(REG_PLL_SX1276);
dudmuck 18:9530d682fd9a 3580 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 3581 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 3582 else
dudmuck 18:9530d682fd9a 3583 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 3584 radio.write_reg(REG_PLL_SX1276, pll.octet);
dudmuck 18:9530d682fd9a 3585 }
dudmuck 18:9530d682fd9a 3586 switch (pll.bits.PllBandwidth) {
dudmuck 18:9530d682fd9a 3587 case 0: printf("75"); break;
dudmuck 18:9530d682fd9a 3588 case 1: printf("150"); break;
dudmuck 18:9530d682fd9a 3589 case 2: printf("225"); break;
dudmuck 18:9530d682fd9a 3590 case 3: printf("300"); break;
dudmuck 18:9530d682fd9a 3591 }
dudmuck 18:9530d682fd9a 3592 printf("KHz\r\n");
dudmuck 18:9530d682fd9a 3593 }
dudmuck 18:9530d682fd9a 3594
dudmuck 18:9530d682fd9a 3595 void cmd_lna_boost(uint8_t idx)
dudmuck 18:9530d682fd9a 3596 {
dudmuck 18:9530d682fd9a 3597 radio.RegLna.octet = radio.read_reg(REG_LNA);
dudmuck 18:9530d682fd9a 3598 if (radio.RegLna.bits.LnaBoostHF == 3)
dudmuck 18:9530d682fd9a 3599 radio.RegLna.bits.LnaBoostHF = 0;
dudmuck 18:9530d682fd9a 3600 else
dudmuck 18:9530d682fd9a 3601 radio.RegLna.bits.LnaBoostHF++;
dudmuck 18:9530d682fd9a 3602 radio.write_reg(REG_LNA, radio.RegLna.octet);
dudmuck 18:9530d682fd9a 3603 printf("LNA-boost:%d\r\n", radio.RegLna.bits.LnaBoostHF);
dudmuck 18:9530d682fd9a 3604 }
dudmuck 18:9530d682fd9a 3605
dudmuck 18:9530d682fd9a 3606 void cmd_LowDataRateOptimize(uint8_t idx)
dudmuck 18:9530d682fd9a 3607 {
dudmuck 18:9530d682fd9a 3608 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 3609 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 3610 lora.RegModemConfig.sx1272bits.LowDataRateOptimize ^= 1;
dudmuck 18:9530d682fd9a 3611 printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 18:9530d682fd9a 3612 radio.write_reg(REG_LR_MODEMCONFIG, lora.RegModemConfig.octet);
dudmuck 18:9530d682fd9a 3613 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 3614 lora.RegModemConfig3.octet = radio.read_reg(REG_LR_MODEMCONFIG3);
dudmuck 18:9530d682fd9a 3615 lora.RegModemConfig3.sx1276bits.LowDataRateOptimize ^= 1;
dudmuck 18:9530d682fd9a 3616 printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig3.sx1276bits.LowDataRateOptimize);
dudmuck 18:9530d682fd9a 3617 radio.write_reg(REG_LR_MODEMCONFIG3, lora.RegModemConfig3.octet);
dudmuck 18:9530d682fd9a 3618 }
dudmuck 18:9530d682fd9a 3619 }
dudmuck 18:9530d682fd9a 3620
dudmuck 18:9530d682fd9a 3621 void cmd_fsk_FifoThreshold(uint8_t idx)
dudmuck 18:9530d682fd9a 3622 {
dudmuck 18:9530d682fd9a 3623 int i;
dudmuck 18:9530d682fd9a 3624 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 18:9530d682fd9a 3625 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3626 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3627 fsk.RegFifoThreshold.bits.FifoThreshold = i;
dudmuck 18:9530d682fd9a 3628 }
dudmuck 18:9530d682fd9a 3629 radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
dudmuck 18:9530d682fd9a 3630 printf("FifoThreshold:%d\r\n", fsk.RegFifoThreshold.bits.FifoThreshold);
dudmuck 18:9530d682fd9a 3631 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 18:9530d682fd9a 3632 }
dudmuck 18:9530d682fd9a 3633
dudmuck 18:9530d682fd9a 3634 void cmd_tx_ticker_rate(uint8_t idx)
dudmuck 18:9530d682fd9a 3635 {
dudmuck 18:9530d682fd9a 3636 if (pcbuf[idx] != 0) {
dudmuck 18:9530d682fd9a 3637 sscanf(pcbuf+idx, "%f", &tx_ticker_rate);
dudmuck 18:9530d682fd9a 3638 }
dudmuck 18:9530d682fd9a 3639 printf("tx_ticker_rate:%f\r\n", tx_ticker_rate);
dudmuck 18:9530d682fd9a 3640 }
dudmuck 18:9530d682fd9a 3641
dudmuck 18:9530d682fd9a 3642 void cmd_lora_tx_invert(uint8_t idx)
dudmuck 18:9530d682fd9a 3643 {
dudmuck 18:9530d682fd9a 3644 lora.invert_tx(lora.RegTest33.bits.chirp_invert_tx);
dudmuck 18:9530d682fd9a 3645 printf("chirp_invert_tx :%d\r\n", lora.RegTest33.bits.chirp_invert_tx);
dudmuck 18:9530d682fd9a 3646 }
dudmuck 18:9530d682fd9a 3647
dudmuck 18:9530d682fd9a 3648 void cmd_lora_rx_invert(uint8_t idx)
dudmuck 18:9530d682fd9a 3649 {
dudmuck 18:9530d682fd9a 3650 lora.invert_rx(!lora.RegTest33.bits.invert_i_q);
dudmuck 18:9530d682fd9a 3651 printf("rx invert_i_q:%d\r\n", lora.RegTest33.bits.invert_i_q);
dudmuck 18:9530d682fd9a 3652 }
dudmuck 18:9530d682fd9a 3653
dudmuck 18:9530d682fd9a 3654 void cmd_fsk_dcfree(uint8_t idx)
dudmuck 18:9530d682fd9a 3655 {
dudmuck 18:9530d682fd9a 3656 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 18:9530d682fd9a 3657 if (fsk.RegPktConfig1.bits.DcFree == 3)
dudmuck 18:9530d682fd9a 3658 fsk.RegPktConfig1.bits.DcFree = 0;
dudmuck 18:9530d682fd9a 3659 else
dudmuck 18:9530d682fd9a 3660 fsk.RegPktConfig1.bits.DcFree++;
dudmuck 18:9530d682fd9a 3661 printf(" dcFree:");
dudmuck 18:9530d682fd9a 3662 switch (fsk.RegPktConfig1.bits.DcFree) {
dudmuck 18:9530d682fd9a 3663 case 0: printf("none "); break;
dudmuck 18:9530d682fd9a 3664 case 1: printf("Manchester "); break;
dudmuck 18:9530d682fd9a 3665 case 2: printf("Whitening "); break;
dudmuck 18:9530d682fd9a 3666 case 3: printf("reserved "); break;
dudmuck 18:9530d682fd9a 3667 }
dudmuck 18:9530d682fd9a 3668 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 3669 printf("\r\n");
dudmuck 18:9530d682fd9a 3670 }
dudmuck 18:9530d682fd9a 3671
dudmuck 21:b84a77dfb43c 3672 void cmd_bt(uint8_t idx)
dudmuck 21:b84a77dfb43c 3673 {
dudmuck 21:b84a77dfb43c 3674 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 21:b84a77dfb43c 3675 if (radio.RegOpMode.bits.ModulationType != 0) {
dudmuck 21:b84a77dfb43c 3676 printf("!fsk\r\n");
dudmuck 21:b84a77dfb43c 3677 return;
dudmuck 21:b84a77dfb43c 3678 }
dudmuck 21:b84a77dfb43c 3679
dudmuck 21:b84a77dfb43c 3680 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 21:b84a77dfb43c 3681 float bt;
dudmuck 21:b84a77dfb43c 3682 sscanf(pcbuf+idx, "%f", &bt);
dudmuck 21:b84a77dfb43c 3683 if (bt > 1.0)
dudmuck 21:b84a77dfb43c 3684 radio.RegOpMode.bits.ModulationShaping = 0; // 0 = no shaping
dudmuck 21:b84a77dfb43c 3685 else if (bt > 0.6)
dudmuck 21:b84a77dfb43c 3686 radio.RegOpMode.bits.ModulationShaping = 1; // 1 = BT1.0
dudmuck 21:b84a77dfb43c 3687 else if (bt > 0.4)
dudmuck 21:b84a77dfb43c 3688 radio.RegOpMode.bits.ModulationShaping = 2; // 2 = BT0.5
dudmuck 21:b84a77dfb43c 3689 else
dudmuck 21:b84a77dfb43c 3690 radio.RegOpMode.bits.ModulationShaping = 3; // 3 = BT0.3
dudmuck 21:b84a77dfb43c 3691 }
dudmuck 21:b84a77dfb43c 3692 radio.write_reg(REG_OPMODE, radio.RegOpMode.octet);
dudmuck 21:b84a77dfb43c 3693 switch (radio.RegOpMode.bits.ModulationShaping) {
dudmuck 21:b84a77dfb43c 3694 case 0: printf("no-shaping "); break;
dudmuck 21:b84a77dfb43c 3695 case 1: printf("BT1.0 "); break;
dudmuck 21:b84a77dfb43c 3696 case 2: printf("BT0.5 "); break;
dudmuck 21:b84a77dfb43c 3697 case 3: printf("BT0.3 "); break;
dudmuck 21:b84a77dfb43c 3698 }
dudmuck 21:b84a77dfb43c 3699 printf("\r\n");
dudmuck 21:b84a77dfb43c 3700 }
dudmuck 21:b84a77dfb43c 3701
dudmuck 18:9530d682fd9a 3702 void cmd_fsk_DataMode(uint8_t idx)
dudmuck 18:9530d682fd9a 3703 {
dudmuck 18:9530d682fd9a 3704 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 18:9530d682fd9a 3705 fsk.RegPktConfig2.bits.DataModePacket ^= 1;
dudmuck 18:9530d682fd9a 3706 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 18:9530d682fd9a 3707 printf("datamode:");
dudmuck 18:9530d682fd9a 3708 if (fsk.RegPktConfig2.bits.DataModePacket)
dudmuck 18:9530d682fd9a 3709 printf("packet\r\n");
dudmuck 18:9530d682fd9a 3710 else
dudmuck 18:9530d682fd9a 3711 printf("continuous\r\n");
dudmuck 18:9530d682fd9a 3712 }
dudmuck 18:9530d682fd9a 3713
dudmuck 18:9530d682fd9a 3714 void cmd_show_dio(uint8_t idx)
dudmuck 18:9530d682fd9a 3715 {
dudmuck 18:9530d682fd9a 3716 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 3717 lora_print_dio();
dudmuck 18:9530d682fd9a 3718 else
dudmuck 18:9530d682fd9a 3719 fsk_print_dio();
dudmuck 18:9530d682fd9a 3720 }
dudmuck 18:9530d682fd9a 3721
dudmuck 18:9530d682fd9a 3722 void cmd_set_dio(uint8_t idx)
dudmuck 18:9530d682fd9a 3723 {
dudmuck 18:9530d682fd9a 3724 switch (pcbuf[idx]) {
dudmuck 18:9530d682fd9a 3725 case '0':
dudmuck 18:9530d682fd9a 3726 radio.RegDioMapping1.bits.Dio0Mapping++;
dudmuck 18:9530d682fd9a 3727 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3728 break;
dudmuck 18:9530d682fd9a 3729 case '1':
dudmuck 18:9530d682fd9a 3730 radio.RegDioMapping1.bits.Dio1Mapping++;
dudmuck 18:9530d682fd9a 3731 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3732 break;
dudmuck 18:9530d682fd9a 3733 case '2':
dudmuck 18:9530d682fd9a 3734 radio.RegDioMapping1.bits.Dio2Mapping++;
dudmuck 18:9530d682fd9a 3735 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3736 break;
dudmuck 18:9530d682fd9a 3737 case '3':
dudmuck 18:9530d682fd9a 3738 radio.RegDioMapping1.bits.Dio3Mapping++;
dudmuck 18:9530d682fd9a 3739 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3740 break;
dudmuck 18:9530d682fd9a 3741 case '4':
dudmuck 18:9530d682fd9a 3742 radio.RegDioMapping2.bits.Dio4Mapping++;
dudmuck 18:9530d682fd9a 3743 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 3744 break;
dudmuck 18:9530d682fd9a 3745 case '5':
dudmuck 18:9530d682fd9a 3746 radio.RegDioMapping2.bits.Dio5Mapping++;
dudmuck 18:9530d682fd9a 3747 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 3748 break;
dudmuck 18:9530d682fd9a 3749 } // ...switch (pcbuf[idx])
dudmuck 18:9530d682fd9a 3750 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 3751 lora_print_dio();
dudmuck 18:9530d682fd9a 3752 else
dudmuck 18:9530d682fd9a 3753 fsk_print_dio();
dudmuck 18:9530d682fd9a 3754 }
dudmuck 18:9530d682fd9a 3755
dudmuck 18:9530d682fd9a 3756 void cmd_mode_standby(uint8_t idx)
dudmuck 18:9530d682fd9a 3757 {
dudmuck 18:9530d682fd9a 3758 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 3759 printf("standby\r\n");
dudmuck 18:9530d682fd9a 3760 }
dudmuck 18:9530d682fd9a 3761
dudmuck 18:9530d682fd9a 3762 void cmd_mode_sleep(uint8_t idx)
dudmuck 18:9530d682fd9a 3763 {
dudmuck 18:9530d682fd9a 3764 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 18:9530d682fd9a 3765 printf("sleep\r\n");
dudmuck 18:9530d682fd9a 3766 }
dudmuck 18:9530d682fd9a 3767
dudmuck 18:9530d682fd9a 3768 void cmd_mode_fstx(uint8_t idx)
dudmuck 18:9530d682fd9a 3769 {
dudmuck 18:9530d682fd9a 3770 radio.set_opmode(RF_OPMODE_SYNTHESIZER_TX);
dudmuck 18:9530d682fd9a 3771 printf("fstx\r\n");
dudmuck 18:9530d682fd9a 3772 }
dudmuck 18:9530d682fd9a 3773
dudmuck 18:9530d682fd9a 3774 void cmd_mode_fsrx(uint8_t idx)
dudmuck 18:9530d682fd9a 3775 {
dudmuck 18:9530d682fd9a 3776 radio.set_opmode(RF_OPMODE_SYNTHESIZER_RX);
dudmuck 18:9530d682fd9a 3777 printf("fsrx\r\n");
dudmuck 18:9530d682fd9a 3778 }
dudmuck 18:9530d682fd9a 3779
dudmuck 18:9530d682fd9a 3780 void cmd_chat(uint8_t idx)
dudmuck 18:9530d682fd9a 3781 {
dudmuck 18:9530d682fd9a 3782 app = APP_CHAT;
dudmuck 18:9530d682fd9a 3783 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 3784 printf("chat start\r\n");
dudmuck 18:9530d682fd9a 3785 }
dudmuck 18:9530d682fd9a 3786
dudmuck 18:9530d682fd9a 3787 void cmd_OokThreshType(uint8_t idx)
dudmuck 18:9530d682fd9a 3788 {
dudmuck 18:9530d682fd9a 3789 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 3790 if (fsk.RegOokPeak.bits.OokThreshType == 2)
dudmuck 18:9530d682fd9a 3791 fsk.RegOokPeak.bits.OokThreshType = 0;
dudmuck 18:9530d682fd9a 3792 else
dudmuck 18:9530d682fd9a 3793 fsk.RegOokPeak.bits.OokThreshType++;
dudmuck 18:9530d682fd9a 3794
dudmuck 18:9530d682fd9a 3795 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 3796 printf("OokThreshType:");
dudmuck 18:9530d682fd9a 3797 switch (fsk.RegOokPeak.bits.OokThreshType) {
dudmuck 18:9530d682fd9a 3798 case 0: printf("fixed"); break;
dudmuck 18:9530d682fd9a 3799 case 1: printf("peak"); break;
dudmuck 18:9530d682fd9a 3800 case 2: printf("average"); break;
dudmuck 18:9530d682fd9a 3801 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 3802 }
dudmuck 18:9530d682fd9a 3803 printf("\r\n");
dudmuck 18:9530d682fd9a 3804 }
dudmuck 18:9530d682fd9a 3805
dudmuck 18:9530d682fd9a 3806 void cmd_OokPeakTheshStep(uint8_t idx)
dudmuck 18:9530d682fd9a 3807 {
dudmuck 18:9530d682fd9a 3808 float f;
dudmuck 18:9530d682fd9a 3809 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 3810 if (fsk.RegOokPeak.bits.OokPeakThreshStep == 7)
dudmuck 18:9530d682fd9a 3811 fsk.RegOokPeak.bits.OokPeakThreshStep = 0;
dudmuck 18:9530d682fd9a 3812 else
dudmuck 18:9530d682fd9a 3813 fsk.RegOokPeak.bits.OokPeakThreshStep++;
dudmuck 18:9530d682fd9a 3814
dudmuck 18:9530d682fd9a 3815 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 3816 switch (fsk.RegOokPeak.bits.OokPeakThreshStep) {
dudmuck 18:9530d682fd9a 3817 case 0: f = 0.5; break;
dudmuck 18:9530d682fd9a 3818 case 1: f = 1; break;
dudmuck 18:9530d682fd9a 3819 case 2: f = 1.5; break;
dudmuck 18:9530d682fd9a 3820 case 3: f = 2; break;
dudmuck 18:9530d682fd9a 3821 case 4: f = 3; break;
dudmuck 18:9530d682fd9a 3822 case 5: f = 4; break;
dudmuck 18:9530d682fd9a 3823 case 6: f = 5; break;
dudmuck 18:9530d682fd9a 3824 case 7: f = 6; break;
dudmuck 18:9530d682fd9a 3825 }
dudmuck 18:9530d682fd9a 3826 printf("OokPeakThreshStep:%.1fdB\r\n", f);
dudmuck 18:9530d682fd9a 3827 }
dudmuck 18:9530d682fd9a 3828
dudmuck 18:9530d682fd9a 3829 void cmd_OokFixedThresh(uint8_t idx)
dudmuck 18:9530d682fd9a 3830 {
dudmuck 18:9530d682fd9a 3831 int i;
dudmuck 18:9530d682fd9a 3832 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3833 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3834 radio.write_reg(REG_FSK_OOKFIX, i);
dudmuck 18:9530d682fd9a 3835 }
dudmuck 18:9530d682fd9a 3836 i = radio.read_reg(REG_FSK_OOKFIX);
dudmuck 18:9530d682fd9a 3837 printf("OokFixedThreshold:%d\r\n", i);
dudmuck 18:9530d682fd9a 3838 }
dudmuck 18:9530d682fd9a 3839
dudmuck 18:9530d682fd9a 3840 void cmd_clkout(uint8_t idx)
dudmuck 18:9530d682fd9a 3841 {
dudmuck 18:9530d682fd9a 3842 RegOsc_t reg_osc;
dudmuck 18:9530d682fd9a 3843 reg_osc.octet = radio.read_reg(REG_FSK_OSC);
dudmuck 18:9530d682fd9a 3844 if (reg_osc.bits.ClkOut == 7)
dudmuck 18:9530d682fd9a 3845 reg_osc.bits.ClkOut = 0;
dudmuck 18:9530d682fd9a 3846 else
dudmuck 18:9530d682fd9a 3847 reg_osc.bits.ClkOut++;
dudmuck 18:9530d682fd9a 3848
dudmuck 18:9530d682fd9a 3849 printf("ClkOut:%d\r\n", reg_osc.bits.ClkOut);
dudmuck 18:9530d682fd9a 3850 radio.write_reg(REG_FSK_OSC, reg_osc.octet);
dudmuck 18:9530d682fd9a 3851 }
dudmuck 21:b84a77dfb43c 3852
dudmuck 21:b84a77dfb43c 3853 void cmd_ook_tx_test(uint8_t idx)
dudmuck 21:b84a77dfb43c 3854 {
dudmuck 21:b84a77dfb43c 3855 radio.set_frf_MHz(915.0);
dudmuck 21:b84a77dfb43c 3856
dudmuck 21:b84a77dfb43c 3857 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 21:b84a77dfb43c 3858 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 21:b84a77dfb43c 3859 cmd_toggle_modem(0);
dudmuck 21:b84a77dfb43c 3860
dudmuck 21:b84a77dfb43c 3861 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 21:b84a77dfb43c 3862 fsk.RegPktConfig1.bits.CrcOn = 0;
dudmuck 21:b84a77dfb43c 3863 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 21:b84a77dfb43c 3864
dudmuck 21:b84a77dfb43c 3865 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 21:b84a77dfb43c 3866 radio.RegDioMapping2.bits.Dio5Mapping = 2; // Data
dudmuck 21:b84a77dfb43c 3867 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 21:b84a77dfb43c 3868
dudmuck 21:b84a77dfb43c 3869 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 21:b84a77dfb43c 3870 radio.RegDioMapping1.bits.Dio3Mapping = 1; // TxReady
dudmuck 21:b84a77dfb43c 3871 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 21:b84a77dfb43c 3872
dudmuck 21:b84a77dfb43c 3873 //radio.write_reg(REG_FSK_SYNCCONFIG, 0);
dudmuck 21:b84a77dfb43c 3874 cmd_ook(0);
dudmuck 21:b84a77dfb43c 3875 radio.write_reg(REG_FSK_SYNCCONFIG, 0);
dudmuck 21:b84a77dfb43c 3876 /* radio.write_u16(REG_FSK_PREAMBLEMSB, 4); // preamble length
dudmuck 21:b84a77dfb43c 3877
dudmuck 21:b84a77dfb43c 3878 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 21:b84a77dfb43c 3879 fsk.RegSyncConfig.bits.SyncOn = 1;
dudmuck 21:b84a77dfb43c 3880 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 21:b84a77dfb43c 3881
dudmuck 21:b84a77dfb43c 3882 // 0123456
dudmuck 21:b84a77dfb43c 3883 sprintf(pcbuf, "syncw a9 66 69 65");
dudmuck 21:b84a77dfb43c 3884 cmd_fsk_syncword(6);*/
dudmuck 21:b84a77dfb43c 3885 tx_ticker.attach(&callback_ook_tx_test, tx_ticker_rate);
dudmuck 21:b84a77dfb43c 3886 }
dudmuck 18:9530d682fd9a 3887
dudmuck 18:9530d682fd9a 3888 void cmd_help(uint8_t args_at);
dudmuck 18:9530d682fd9a 3889
dudmuck 18:9530d682fd9a 3890 typedef enum {
dudmuck 18:9530d682fd9a 3891 MODEM_BOTH,
dudmuck 18:9530d682fd9a 3892 MODEM_FSK,
dudmuck 18:9530d682fd9a 3893 MODEM_LORA
dudmuck 18:9530d682fd9a 3894 } modem_e;
dudmuck 18:9530d682fd9a 3895
dudmuck 18:9530d682fd9a 3896 typedef struct {
dudmuck 18:9530d682fd9a 3897 modem_e modem;
dudmuck 18:9530d682fd9a 3898 const char* const cmd;
dudmuck 18:9530d682fd9a 3899 void (*handler)(uint8_t args_at);
dudmuck 18:9530d682fd9a 3900 const char* const arg_descr;
dudmuck 18:9530d682fd9a 3901 const char* const description;
dudmuck 18:9530d682fd9a 3902 } menu_item_t;
dudmuck 18:9530d682fd9a 3903
dudmuck 18:9530d682fd9a 3904 const menu_item_t menu_items[] =
dudmuck 18:9530d682fd9a 3905 { /* after first character, command names must be [A-Za-z] */
dudmuck 18:9530d682fd9a 3906 { MODEM_BOTH, "chat", cmd_chat, "","start keyboard chat"},
dudmuck 18:9530d682fd9a 3907 { MODEM_BOTH, "rssi", cmd_read_current_rssi, "","(RX) read instantaneous RSSI"},
dudmuck 21:b84a77dfb43c 3908 { MODEM_BOTH, "prssi", cmd_rssi_polling, "<%d>","dbm of rssi polling, 0 = off"},
dudmuck 18:9530d682fd9a 3909 { MODEM_BOTH, "txpd", cmd_per_tx_delay, "<%d>","get/set PER tx delay (in milliseconds)"},
dudmuck 18:9530d682fd9a 3910 { MODEM_BOTH, "pertx", cmd_pertx, "<%d pkt count>","start Eiger PER TX"},
dudmuck 18:9530d682fd9a 3911 { MODEM_BOTH, "perrx", cmd_perrx, "","start Eiger PER RX"},
dudmuck 18:9530d682fd9a 3912 { MODEM_BOTH, "pres", cmd_PreambleSize, "<%d>", "get/set PreambleSize"},
dudmuck 18:9530d682fd9a 3913 { MODEM_BOTH, "pllbw", cmd_pllbw, "", "increment pllbw"},
dudmuck 18:9530d682fd9a 3914 { MODEM_BOTH, "lnab", cmd_lna_boost, "", "(RX) increment LNA boost"},
dudmuck 18:9530d682fd9a 3915 { MODEM_BOTH, "stby", cmd_mode_standby, "", "set chip mode to standby"},
dudmuck 18:9530d682fd9a 3916 { MODEM_BOTH, "sleep", cmd_mode_sleep, "", "set chip mode to sleep"},
dudmuck 18:9530d682fd9a 3917 { MODEM_BOTH, "fstx", cmd_mode_fstx, "", "set chip mode to fstx"},
dudmuck 18:9530d682fd9a 3918 { MODEM_BOTH, "fsrx", cmd_mode_fsrx, "", "set chip mode to fsrx"},
dudmuck 18:9530d682fd9a 3919 { MODEM_BOTH, "crcon", cmd_crcOn, "","toggle crcOn"},
dudmuck 21:b84a77dfb43c 3920 { MODEM_BOTH, "ethcrc", cmd_crc32, "","toggle enable software crc32"},
dudmuck 21:b84a77dfb43c 3921 { MODEM_BOTH, "spif", cmd_spifreq, "<MHz>","change SPI clock frequency"},
dudmuck 18:9530d682fd9a 3922 { MODEM_BOTH, "payl", cmd_payload_length, "<%d>","get/set payload length"},
dudmuck 18:9530d682fd9a 3923 { MODEM_BOTH, "bgr", cmd_bgr, "<%d>","(TX) get/set reference for TX DAC"},
dudmuck 18:9530d682fd9a 3924 { MODEM_BOTH, "ocp", cmd_ocp, "<%d>","(TX) get/set milliamps current limit"},
dudmuck 18:9530d682fd9a 3925 { MODEM_BOTH, "frf", cmd_frf, "<MHz>","get/set RF center frequency"},
dudmuck 18:9530d682fd9a 3926 { MODEM_BOTH, "pas", cmd_paSelect, "","(TX) toggle RFO/PA_BOOST"},
dudmuck 18:9530d682fd9a 3927 { MODEM_BOTH, "pid", cmd_per_id, "<%d>","get/set ID number in Eiger PER packet"},
dudmuck 18:9530d682fd9a 3928 { MODEM_BOTH, "dio", cmd_show_dio, "","print dio mapping"},
dudmuck 18:9530d682fd9a 3929
dudmuck 18:9530d682fd9a 3930 { MODEM_FSK, "clkout", cmd_clkout, "","increment ClkOut divider"},
dudmuck 18:9530d682fd9a 3931 { MODEM_FSK, "ookt", cmd_OokThreshType, "","(RX) increment OokThreshType"},
dudmuck 18:9530d682fd9a 3932 { MODEM_FSK, "ooks", cmd_OokPeakTheshStep, "","(RX) increment OokPeakTheshStep"},
dudmuck 18:9530d682fd9a 3933 { MODEM_FSK, "sqlch", cmd_OokFixedThresh, "<%d>","(RX) get/set OokFixedThresh"},
dudmuck 18:9530d682fd9a 3934 { MODEM_FSK, "rssit", cmd_rssi_threshold, "<-dBm>","(RX) get/set rssi threshold"},
dudmuck 18:9530d682fd9a 3935 { MODEM_FSK, "rssis", cmd_rssi_smoothing, "<%d>","(RX) get/set rssi smoothing"},
dudmuck 18:9530d682fd9a 3936 { MODEM_FSK, "rssio", cmd_rssi_offset, "<%d>","(RX) get/set rssi offset"},
dudmuck 18:9530d682fd9a 3937 { MODEM_FSK, "mods", cmd_mod_shaping, "", "(TX) increment modulation shaping"},
dudmuck 18:9530d682fd9a 3938 { MODEM_FSK, "agcauto", cmd_fsk_agcauto, "", "(RX) toggle AgcAutoOn"},
dudmuck 18:9530d682fd9a 3939 { MODEM_FSK, "afcauto", cmd_fsk_afcauto, "", "(RX) toggle AfcAutoOn"},
dudmuck 18:9530d682fd9a 3940 { MODEM_FSK, "syncw", cmd_fsk_syncword, "<hex bytes>", "get/set syncword"},
dudmuck 18:9530d682fd9a 3941 { MODEM_FSK, "syncon", cmd_fsk_syncOn, "", "toggle SyncOn (frame sync, SFD enable)"},
dudmuck 18:9530d682fd9a 3942 { MODEM_FSK, "bitsync", cmd_fsk_bitsync, "", "toggle BitSyncOn (continuous mode only)"},
dudmuck 18:9530d682fd9a 3943 { MODEM_FSK, "fifot", cmd_fsk_TxStartCondition, "", "(TX) toggle TxStartCondition"},
dudmuck 18:9530d682fd9a 3944 { MODEM_FSK, "pktf", cmd_fsk_PacketFormat, "", "toggle PacketFormat fixed/variable length"},
dudmuck 18:9530d682fd9a 3945 { MODEM_FSK, "poll", cmd_poll_irq_en, "", "toggle poll_irq_en"},
dudmuck 18:9530d682fd9a 3946 { MODEM_FSK, "prep", cmd_fsk_PreamblePolarity, "", "toggle PreamblePolarity"},
dudmuck 18:9530d682fd9a 3947 { MODEM_FSK, "datam", cmd_fsk_DataMode, "", "toggle DataMode (packet/continuous)"},
dudmuck 18:9530d682fd9a 3948 { MODEM_FSK, "rxt", cmd_rx_trigger, "","(RX) increment RxTrigger"},
dudmuck 18:9530d682fd9a 3949 { MODEM_FSK, "ook", cmd_ook, "","enter OOK mode"},
dudmuck 21:b84a77dfb43c 3950 { MODEM_FSK, "otx", cmd_ook_tx_test, "","start ook tx repeat"},
dudmuck 18:9530d682fd9a 3951 { MODEM_FSK, "fei", cmd_fsk_read_fei, "","(RX) read FEI"},
dudmuck 18:9530d682fd9a 3952 { MODEM_FSK, "fdev", cmd_fsk_fdev, "<kHz>","(TX) get/set fdev"},
dudmuck 18:9530d682fd9a 3953 { MODEM_FSK, "par", cmd_paRamp, "","(TX) increment paRamp"},
dudmuck 18:9530d682fd9a 3954 { MODEM_FSK, "pde", cmd_fsk_PreambleDetectorOn, "","(RX) toggle PreambleDetectorOn"},
dudmuck 18:9530d682fd9a 3955 { MODEM_FSK, "pds", cmd_fsk_PreambleDetectorSize, "<%d>","(RX) get/set PreambleDetectorSize"},
dudmuck 18:9530d682fd9a 3956 { MODEM_FSK, "pdt", cmd_fsk_PreambleDetectorTol, "<%d>","(RX) get/set PreambleDetectorTol"},
dudmuck 18:9530d682fd9a 3957 { MODEM_FSK, "thr", cmd_fsk_FifoThreshold, "<%d>","get/set FifoThreshold"},
dudmuck 18:9530d682fd9a 3958 { MODEM_FSK, "dcf", cmd_fsk_dcfree, "","(RX) increment DcFree"},
dudmuck 18:9530d682fd9a 3959 { MODEM_FSK, "br", cmd_fsk_bitrate, "<%f kbps>","get/set bitrate"},
dudmuck 18:9530d682fd9a 3960 { MODEM_FSK, "ac", cmd_AfcClear, "","(RX) AfcClear"},
dudmuck 18:9530d682fd9a 3961 { MODEM_FSK, "ar", cmd_fsk_AutoRestartRxMode, "","(RX) increment AutoRestartRxMode"},
dudmuck 18:9530d682fd9a 3962 { MODEM_FSK, "alc", cmd_fsk_AfcAutoClearOn, "","(RX) toggle AfcAutoClearOn"},
dudmuck 18:9530d682fd9a 3963 { MODEM_FSK, "mp", cmd_MapPreambleDetect, "","(RX) toggle MapPreambleDetect"},
dudmuck 20:b11592c9ba5f 3964 { MODEM_FSK, "rrx", cmd_restart_rx, "","restart RX"},
dudmuck 18:9530d682fd9a 3965 { MODEM_BOTH, "op", cmd_op, "<dBm>","(TX) get/set TX power"},
dudmuck 21:b84a77dfb43c 3966 { MODEM_FSK, "bt", cmd_bt, "","get/set BT"},
dudmuck 22:2005df80c8a8 3967 { MODEM_FSK, "ltx", cmd_long_tx, "<%d>","long tx"},
dudmuck 18:9530d682fd9a 3968
dudmuck 18:9530d682fd9a 3969 #ifdef LORA_TX_TEST
dudmuck 18:9530d682fd9a 3970 { MODEM_LORA, "apl", cmd_lora_all_payload_lengths, "","(TXTEST) sweep payload lengths 0->255"},
dudmuck 18:9530d682fd9a 3971 { MODEM_LORA, "csn", cmd_lora_sync_sweep, "[12]","(TXTEST) sweep ppg symbol"},
dudmuck 18:9530d682fd9a 3972 { MODEM_LORA, "ss", cmd_lora_sync_lo_nibble, "","(TXTEST) ppg low nibble"},
dudmuck 18:9530d682fd9a 3973 { MODEM_LORA, "cpl", lora_cycle_payload_length, "[%d stop]","(TXTEST) sweep payload length"},
dudmuck 18:9530d682fd9a 3974 { MODEM_LORA, "ro", cmd_lora_data_ramp, "[%d bytes]","(TXTEST) sweep payload data"},
dudmuck 18:9530d682fd9a 3975 { MODEM_LORA, "ccr", cmd_lora_cycle_codingrates, "","(TXTEST) cycle coding rates"},
dudmuck 18:9530d682fd9a 3976 { MODEM_LORA, "fps", cmd_lora_fixed_payload_symbol, "[symbol_num n_bits]","(TXTEST) sweep symbol, n_bits=bits per symbol set (sf8=24, sf9=28, etc)"},
dudmuck 18:9530d682fd9a 3977 { MODEM_LORA, "fpo", cmd_fixed_payload_offset, "<nbytes>","(TXTEST) padding offset for fp tests"},
dudmuck 18:9530d682fd9a 3978 { MODEM_LORA, "fp", cmd_lora_fixed_payload, "[bytes]","(TXTEST) fixed payload"},
dudmuck 18:9530d682fd9a 3979 { MODEM_LORA, "tab", cmd_lora_toggle_all_bits, "[byte length]","(TXTEST) toggle all bits"},
dudmuck 18:9530d682fd9a 3980 { MODEM_LORA, "tcrc", cmd_lora_toggle_crcOn, "","(TXTEST) toggle crcOn"},
dudmuck 18:9530d682fd9a 3981 { MODEM_LORA, "thm", cmd_lora_toggle_header_mode, "","(TXTEST) toggle explicit/implicit"},
dudmuck 18:9530d682fd9a 3982 #endif /* LORA_TX_TEST */
dudmuck 18:9530d682fd9a 3983
dudmuck 21:b84a77dfb43c 3984 { MODEM_BOTH, "ttr", cmd_tx_ticker_rate, "<%f seconds>","(TXTEST) get/set tx_ticker rate"},
dudmuck 18:9530d682fd9a 3985 { MODEM_LORA, "cadper", cmd_cadper, "","Eiger PER RX using CAD" },
dudmuck 18:9530d682fd9a 3986 { MODEM_LORA, "cad", cmd_cad, "<%d num tries>","(RX) run channel activity detection" },
dudmuck 18:9530d682fd9a 3987 { MODEM_LORA, "iqinv", cmd_lora_rx_invert, "","(RX) toggle RX IQ invert" },
dudmuck 18:9530d682fd9a 3988 { MODEM_LORA, "cin", cmd_lora_tx_invert, "","(TX) toggle TX IQ invert" },
dudmuck 18:9530d682fd9a 3989 { MODEM_LORA, "lhp", cmd_hop_period, "<%d>","(RX) get/set hop period"},
dudmuck 18:9530d682fd9a 3990 { MODEM_LORA, "sync", cmd_lora_ppg, "<%x>","get/set sync (post-preamble gap)"},
dudmuck 18:9530d682fd9a 3991 { MODEM_LORA, "cr", cmd_codingRate, "<1-4>","get/set codingRate"},
dudmuck 18:9530d682fd9a 3992 { MODEM_LORA, "lhm", cmd_lora_header_mode, "","toggle explicit/implicit"},
dudmuck 18:9530d682fd9a 3993 { MODEM_LORA, "vh", cmd_lora_poll_validHeader, "","toggle polling of validHeader"},
dudmuck 18:9530d682fd9a 3994 { MODEM_LORA, "sf", cmd_lora_sf, "<%d>","get/set spreadingFactor"},
dudmuck 18:9530d682fd9a 3995 { MODEM_LORA, "ldr", cmd_LowDataRateOptimize, "","toggle LowDataRateOptimize"},
dudmuck 18:9530d682fd9a 3996 { MODEM_LORA, "txc", cmd_lora_continuous_tx, "","(TX) toggle TxContinuousMode"},
dudmuck 18:9530d682fd9a 3997 { MODEM_BOTH, "tx", cmd_tx, "<%d>","transmit packet. optional payload length"},
dudmuck 18:9530d682fd9a 3998 { MODEM_BOTH, "bw", cmd_bandwidth, "<kHz>","get/set bandwith"},
dudmuck 18:9530d682fd9a 3999 { MODEM_LORA, "rxt", cmd_rx_timeout, "<%d>","(RX) get/set SymbTimeout"},
dudmuck 18:9530d682fd9a 4000 { MODEM_LORA, "rxs", cmd_rx_single, "","start RX_SINGLE"},
dudmuck 18:9530d682fd9a 4001 { MODEM_BOTH, "rx", cmd_rx, "","start RX"},
dudmuck 18:9530d682fd9a 4002
dudmuck 18:9530d682fd9a 4003 { MODEM_BOTH, "h", cmd_hw_reset, "","hardware reset"},
dudmuck 18:9530d682fd9a 4004 { MODEM_BOTH, "i", cmd_init, "","initialize radio driver"},
dudmuck 18:9530d682fd9a 4005 { MODEM_BOTH, "R", cmd_read_all_regs, "","read all radio registers"},
dudmuck 18:9530d682fd9a 4006 { MODEM_BOTH, "r", cmd_radio_reg_read, "[%x]","read single radio register"},
dudmuck 18:9530d682fd9a 4007 { MODEM_BOTH, "w", cmd_radio_reg_write, "[%x %x]","write single radio register"},
dudmuck 18:9530d682fd9a 4008
dudmuck 18:9530d682fd9a 4009 { MODEM_BOTH, "L", cmd_toggle_modem, "","toggle between LoRa / FSK"},
dudmuck 18:9530d682fd9a 4010 { MODEM_FSK, "E", cmd_empty_fifo, "","empty out FIFO"},
dudmuck 18:9530d682fd9a 4011 { MODEM_FSK, "c", cmd_fsk_test_case, "<%d>","get/set test cases"},
dudmuck 18:9530d682fd9a 4012 { MODEM_BOTH, "d", cmd_set_dio, "<%d pin num>","increment dio mapping"},
dudmuck 18:9530d682fd9a 4013 { MODEM_BOTH, ".", cmd_print_status, "","print status"},
dudmuck 18:9530d682fd9a 4014 { MODEM_BOTH, "?", cmd_help, "","this list of commands"},
dudmuck 19:be8a8b0e7320 4015 { MODEM_BOTH, NULL, NULL, NULL, NULL }
dudmuck 18:9530d682fd9a 4016 };
dudmuck 18:9530d682fd9a 4017
dudmuck 18:9530d682fd9a 4018 void cmd_help(uint8_t args_at)
dudmuck 18:9530d682fd9a 4019 {
dudmuck 18:9530d682fd9a 4020 int i;
dudmuck 18:9530d682fd9a 4021
dudmuck 18:9530d682fd9a 4022 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 4023 if (menu_items[i].modem == MODEM_BOTH)
dudmuck 18:9530d682fd9a 4024 printf("%s%s\t%s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 4025 }
dudmuck 18:9530d682fd9a 4026
dudmuck 18:9530d682fd9a 4027 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 4028 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 4029 if (menu_items[i].modem == MODEM_LORA)
dudmuck 18:9530d682fd9a 4030 printf("%s%s\t(LoRa) %s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 4031 }
dudmuck 18:9530d682fd9a 4032 } else {
dudmuck 18:9530d682fd9a 4033 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 4034 if (menu_items[i].modem == MODEM_FSK)
dudmuck 18:9530d682fd9a 4035 printf("%s%s\t(FSK) %s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 4036 }
dudmuck 18:9530d682fd9a 4037 }
dudmuck 10:d9bb2ce57f05 4038 }
dudmuck 10:d9bb2ce57f05 4039
dudmuck 0:be215de91a68 4040 void
dudmuck 0:be215de91a68 4041 console()
dudmuck 0:be215de91a68 4042 {
dudmuck 18:9530d682fd9a 4043 int i;
dudmuck 18:9530d682fd9a 4044 uint8_t user_cmd_len;
dudmuck 5:360069ec9953 4045
dudmuck 18:9530d682fd9a 4046 if (poll_irq_en)
dudmuck 18:9530d682fd9a 4047 poll_service_radio();
dudmuck 18:9530d682fd9a 4048 else
dudmuck 18:9530d682fd9a 4049 service_radio();
dudmuck 0:be215de91a68 4050
dudmuck 5:360069ec9953 4051 if (pcbuf_len < 0) {
dudmuck 0:be215de91a68 4052 printf("abort\r\n");
dudmuck 21:b84a77dfb43c 4053 rx_payloadReady_int_en = false;
dudmuck 18:9530d682fd9a 4054 cadper_enable = false;
dudmuck 8:227605e4a760 4055 per_en = false;
dudmuck 5:360069ec9953 4056 pcbuf_len = 0;
dudmuck 15:c69b942685ea 4057 if ((radio.RegOpMode.bits.Mode != RF_OPMODE_SLEEP) && (radio.RegOpMode.bits.Mode != RF_OPMODE_STANDBY)) {
dudmuck 15:c69b942685ea 4058 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 15:c69b942685ea 4059 }
dudmuck 18:9530d682fd9a 4060 on_txdone_state = ON_TXDONE_STATE_NONE;
dudmuck 18:9530d682fd9a 4061 tx_ticker.detach();
dudmuck 0:be215de91a68 4062 return;
dudmuck 0:be215de91a68 4063 }
dudmuck 5:360069ec9953 4064 if (pcbuf_len == 0)
dudmuck 5:360069ec9953 4065 return;
dudmuck 18:9530d682fd9a 4066
dudmuck 0:be215de91a68 4067 printf("\r\n");
dudmuck 18:9530d682fd9a 4068
dudmuck 18:9530d682fd9a 4069 /* get end of user-entered command */
dudmuck 18:9530d682fd9a 4070 user_cmd_len = 1; // first character can be any character
dudmuck 18:9530d682fd9a 4071 for (i = 1; i <= pcbuf_len; i++) {
dudmuck 18:9530d682fd9a 4072 if (pcbuf[i] < 'A' || (pcbuf[i] > 'Z' && pcbuf[i] < 'a') || pcbuf[i] > 'z') {
dudmuck 18:9530d682fd9a 4073 user_cmd_len = i;
dudmuck 18:9530d682fd9a 4074 break;
dudmuck 7:c3c54f222ced 4075 }
dudmuck 0:be215de91a68 4076 }
dudmuck 18:9530d682fd9a 4077
dudmuck 18:9530d682fd9a 4078 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 4079 int mi_len = strlen(menu_items[i].cmd);
dudmuck 18:9530d682fd9a 4080 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 4081 if (menu_items[i].modem == MODEM_FSK)
dudmuck 18:9530d682fd9a 4082 continue; // FSK commands not used in LoRa
dudmuck 18:9530d682fd9a 4083 } else {
dudmuck 18:9530d682fd9a 4084 if (menu_items[i].modem == MODEM_LORA)
dudmuck 18:9530d682fd9a 4085 continue; // LoRa commands not used in FSK
dudmuck 18:9530d682fd9a 4086 }
dudmuck 18:9530d682fd9a 4087
dudmuck 18:9530d682fd9a 4088 if (menu_items[i].handler && user_cmd_len == mi_len && (strncmp(pcbuf, menu_items[i].cmd, mi_len) == 0)) {
dudmuck 18:9530d682fd9a 4089 while (pcbuf[mi_len] == ' ') // skip past spaces
dudmuck 18:9530d682fd9a 4090 mi_len++;
dudmuck 18:9530d682fd9a 4091 menu_items[i].handler(mi_len);
dudmuck 18:9530d682fd9a 4092 break;
dudmuck 18:9530d682fd9a 4093 }
dudmuck 18:9530d682fd9a 4094 }
dudmuck 18:9530d682fd9a 4095
dudmuck 5:360069ec9953 4096 pcbuf_len = 0;
dudmuck 0:be215de91a68 4097 printf("> ");
dudmuck 18:9530d682fd9a 4098 fflush(stdout);
dudmuck 0:be215de91a68 4099 }
dudmuck 0:be215de91a68 4100
dudmuck 5:360069ec9953 4101 void rx_callback()
dudmuck 5:360069ec9953 4102 {
dudmuck 5:360069ec9953 4103 static uint8_t pcbuf_idx = 0;
dudmuck 5:360069ec9953 4104 static uint8_t prev_len = 0;;
dudmuck 5:360069ec9953 4105 char c = pc.getc();
dudmuck 18:9530d682fd9a 4106 /*if (kermit.uart_rx_enabled) {
dudmuck 18:9530d682fd9a 4107 kermit.rx_callback(c);
dudmuck 18:9530d682fd9a 4108 } else*/ {
dudmuck 18:9530d682fd9a 4109 if (c == 8) {
dudmuck 18:9530d682fd9a 4110 if (pcbuf_idx > 0) {
dudmuck 18:9530d682fd9a 4111 pc.putc(8);
dudmuck 18:9530d682fd9a 4112 pc.putc(' ');
dudmuck 18:9530d682fd9a 4113 pc.putc(8);
dudmuck 18:9530d682fd9a 4114 pcbuf_idx--;
dudmuck 18:9530d682fd9a 4115 }
dudmuck 18:9530d682fd9a 4116 } else if (c == 3) { // ctrl-C
dudmuck 18:9530d682fd9a 4117 pcbuf_len = -1;
dudmuck 18:9530d682fd9a 4118 } else if (c == '\r') {
dudmuck 18:9530d682fd9a 4119 if (pcbuf_idx == 0) {
dudmuck 18:9530d682fd9a 4120 pcbuf_len = prev_len;
dudmuck 18:9530d682fd9a 4121 } else {
dudmuck 18:9530d682fd9a 4122 pcbuf[pcbuf_idx] = 0; // null terminate
dudmuck 18:9530d682fd9a 4123 prev_len = pcbuf_idx;
dudmuck 18:9530d682fd9a 4124 pcbuf_idx = 0;
dudmuck 18:9530d682fd9a 4125 pcbuf_len = prev_len;
dudmuck 18:9530d682fd9a 4126 }
dudmuck 18:9530d682fd9a 4127 }/* else if (c == SOH) {
dudmuck 18:9530d682fd9a 4128 kermit.uart_rx_enable();
dudmuck 18:9530d682fd9a 4129 }*/ else if (pcbuf_idx < sizeof(pcbuf)) {
dudmuck 18:9530d682fd9a 4130 pcbuf[pcbuf_idx++] = c;
dudmuck 18:9530d682fd9a 4131 pc.putc(c);
dudmuck 5:360069ec9953 4132 }
dudmuck 5:360069ec9953 4133 }
dudmuck 5:360069ec9953 4134 }
dudmuck 5:360069ec9953 4135
dudmuck 0:be215de91a68 4136 int main()
dudmuck 5:360069ec9953 4137 {
dudmuck 5:360069ec9953 4138 #if defined(TARGET_NUCLEO_L152RE) && defined(USE_DEBUGGER)
dudmuck 5:360069ec9953 4139 DBGMCU_Config(DBGMCU_SLEEP, ENABLE);
dudmuck 5:360069ec9953 4140 DBGMCU_Config(DBGMCU_STOP, ENABLE);
dudmuck 5:360069ec9953 4141 DBGMCU_Config(DBGMCU_STANDBY, ENABLE);
dudmuck 5:360069ec9953 4142 #endif
dudmuck 0:be215de91a68 4143
dudmuck 0:be215de91a68 4144 pc.baud(57600);
dudmuck 6:fe16f96ee335 4145 printf("\r\nmain()\r\n");
dudmuck 6:fe16f96ee335 4146
dudmuck 5:360069ec9953 4147 pc.attach(rx_callback);
dudmuck 0:be215de91a68 4148
dudmuck 21:b84a77dfb43c 4149 make_crc_table();
dudmuck 21:b84a77dfb43c 4150
Wayne Roberts 24:9ba45aa15b53 4151 #if !defined(TARGET_MTS_MDOT_F411RE) && !defined(TARGET_DISCO_L072CZ_LRWAN1)
dudmuck 15:c69b942685ea 4152 rfsw.input();
dudmuck 15:c69b942685ea 4153 if (rfsw.read()) {
dudmuck 15:c69b942685ea 4154 shield_type = SHIELD_TYPE_LAS;
dudmuck 15:c69b942685ea 4155 printf("LAS\r\n");
dudmuck 15:c69b942685ea 4156 } else {
dudmuck 15:c69b942685ea 4157 shield_type = SHIELD_TYPE_MAS;
dudmuck 15:c69b942685ea 4158 printf("MAS\r\n");
dudmuck 15:c69b942685ea 4159 }
dudmuck 15:c69b942685ea 4160
dudmuck 15:c69b942685ea 4161 rfsw.output();
dudmuck 15:c69b942685ea 4162 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 23:821b4f426ee6 4163 radio.rf_switch = rfsw_callback;
dudmuck 10:d9bb2ce57f05 4164
dudmuck 13:c73caaee93a5 4165 #ifdef FSK_PER
dudmuck 13:c73caaee93a5 4166 fsk.enable(false);
dudmuck 13:c73caaee93a5 4167 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 13:c73caaee93a5 4168 fsk.RegSyncConfig.bits.SyncSize = 2;
dudmuck 13:c73caaee93a5 4169 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 13:c73caaee93a5 4170 radio.write_reg(REG_FSK_SYNCVALUE3, 0x90);
dudmuck 13:c73caaee93a5 4171 radio.write_reg(REG_FSK_SYNCVALUE2, 0x4e);
dudmuck 13:c73caaee93a5 4172 radio.write_reg(REG_FSK_SYNCVALUE1, 0x63);
dudmuck 13:c73caaee93a5 4173
dudmuck 13:c73caaee93a5 4174 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 16:b9d36c60f2d3 4175 fsk.RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 16:b9d36c60f2d3 4176 fsk.RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 16:b9d36c60f2d3 4177 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 13:c73caaee93a5 4178
dudmuck 13:c73caaee93a5 4179 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 13:c73caaee93a5 4180 fsk.RegRxConfig.bits.AfcAutoOn = 1;
dudmuck 16:b9d36c60f2d3 4181 fsk.RegRxConfig.bits.AgcAutoOn = 1;
dudmuck 16:b9d36c60f2d3 4182 fsk.RegRxConfig.bits.RxTrigger = 7;
dudmuck 13:c73caaee93a5 4183 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 13:c73caaee93a5 4184
dudmuck 13:c73caaee93a5 4185 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 13:c73caaee93a5 4186 fsk.set_rx_dcc_bw_hz(41666, 1); // afcbw
dudmuck 13:c73caaee93a5 4187 fsk.set_rx_dcc_bw_hz(20833, 0); // rxbw
dudmuck 13:c73caaee93a5 4188
dudmuck 13:c73caaee93a5 4189 fsk.set_tx_fdev_hz(10000);
dudmuck 13:c73caaee93a5 4190
dudmuck 13:c73caaee93a5 4191 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 13:c73caaee93a5 4192
dudmuck 13:c73caaee93a5 4193 fsk.RegPktConfig2.bits.PayloadLength = 64;
dudmuck 13:c73caaee93a5 4194 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 13:c73caaee93a5 4195
dudmuck 13:c73caaee93a5 4196 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 13:c73caaee93a5 4197 radio.RegDioMapping2.bits.Dio5Mapping = 2; // data output to observation
dudmuck 14:c57ea544dc18 4198 radio.RegDioMapping2.bits.Dio4Mapping = 3; // output preamble detect indication
dudmuck 14:c57ea544dc18 4199 radio.RegDioMapping2.bits.MapPreambleDetect = 1;
dudmuck 13:c73caaee93a5 4200 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 16:b9d36c60f2d3 4201
dudmuck 16:b9d36c60f2d3 4202 RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 16:b9d36c60f2d3 4203 RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 16:b9d36c60f2d3 4204 RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 16:b9d36c60f2d3 4205 write_reg(REG_FSK_PREAMBLEDETECT, RegPreambleDetect.octet);
dudmuck 16:b9d36c60f2d3 4206
dudmuck 13:c73caaee93a5 4207 #endif /* FSK_PER */
dudmuck 10:d9bb2ce57f05 4208
dudmuck 10:d9bb2ce57f05 4209 #ifdef START_EIGER_TX
dudmuck 14:c57ea544dc18 4210 uint8_t addr;
dudmuck 10:d9bb2ce57f05 4211 radio.set_frf_MHz(915.0);
dudmuck 11:81ff5bcafd97 4212
dudmuck 11:81ff5bcafd97 4213 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 11:81ff5bcafd97 4214 radio.RegOcp.bits.OcpTrim = 20;
dudmuck 11:81ff5bcafd97 4215 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 11:81ff5bcafd97 4216
dudmuck 11:81ff5bcafd97 4217 RegPdsTrim1_t pds_trim;
dudmuck 14:c57ea544dc18 4218 if (radio.type == SX1276)
dudmuck 14:c57ea544dc18 4219 addr = REG_PDSTRIM1_SX1276;
dudmuck 14:c57ea544dc18 4220 else
dudmuck 14:c57ea544dc18 4221 addr = REG_PDSTRIM1_SX1272;
dudmuck 14:c57ea544dc18 4222
dudmuck 14:c57ea544dc18 4223 pds_trim.octet = radio.read_reg(addr);
dudmuck 11:81ff5bcafd97 4224 pds_trim.bits.prog_txdac = 7;
dudmuck 14:c57ea544dc18 4225 radio.write_reg(addr, pds_trim.octet);
dudmuck 11:81ff5bcafd97 4226
dudmuck 13:c73caaee93a5 4227 #ifndef FSK_PER
dudmuck 13:c73caaee93a5 4228 lora.enable();
dudmuck 12:beb0387c1b4c 4229 lora.setSf(10);
dudmuck 10:d9bb2ce57f05 4230 if (radio.type == SX1276)
dudmuck 10:d9bb2ce57f05 4231 lora.setBw(7); // 7 == 125khz
dudmuck 13:c73caaee93a5 4232 #endif
dudmuck 10:d9bb2ce57f05 4233
dudmuck 10:d9bb2ce57f05 4234 toggle_per_en();
dudmuck 10:d9bb2ce57f05 4235 PacketTxCnt = 0;
dudmuck 10:d9bb2ce57f05 4236 per_timeout.attach(&per_cb, per_tx_delay);
dudmuck 11:81ff5bcafd97 4237 #endif /* START_EIGER_TX */
dudmuck 10:d9bb2ce57f05 4238
dudmuck 10:d9bb2ce57f05 4239 #ifdef START_EIGER_RX
dudmuck 13:c73caaee93a5 4240
dudmuck 10:d9bb2ce57f05 4241 radio.set_frf_MHz(915.0);
dudmuck 11:81ff5bcafd97 4242 radio.RegPaConfig.bits.PaSelect = 1; // 0: use RFO for sx1276 shield, 1==PA_BOOST
dudmuck 10:d9bb2ce57f05 4243 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 10:d9bb2ce57f05 4244
dudmuck 10:d9bb2ce57f05 4245 toggle_per_en();
dudmuck 10:d9bb2ce57f05 4246 PacketNormalCnt = 0;
dudmuck 20:b11592c9ba5f 4247 PacketRxSequencePrev = 0;
dudmuck 10:d9bb2ce57f05 4248 PacketPerKoCnt = 0;
dudmuck 13:c73caaee93a5 4249 PacketPerOkCnt = 0;
dudmuck 13:c73caaee93a5 4250
dudmuck 13:c73caaee93a5 4251 #ifndef FSK_PER
dudmuck 13:c73caaee93a5 4252 lora.enable();
dudmuck 13:c73caaee93a5 4253 lora.setSf(10);
dudmuck 13:c73caaee93a5 4254 if (radio.type == SX1276)
dudmuck 13:c73caaee93a5 4255 lora.setBw(7); // 7 == 125khz
dudmuck 10:d9bb2ce57f05 4256 lora.start_rx();
dudmuck 13:c73caaee93a5 4257 #else
dudmuck 13:c73caaee93a5 4258 fsk.start_rx();
dudmuck 14:c57ea544dc18 4259 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 14:c57ea544dc18 4260 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 15:c69b942685ea 4261
dudmuck 15:c69b942685ea 4262 if (radio.HF) {
dudmuck 15:c69b942685ea 4263 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 15:c69b942685ea 4264 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 15:c69b942685ea 4265 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 15:c69b942685ea 4266 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 15:c69b942685ea 4267 }
dudmuck 10:d9bb2ce57f05 4268 #endif
dudmuck 13:c73caaee93a5 4269
dudmuck 15:c69b942685ea 4270 if (radio.HF) {
dudmuck 15:c69b942685ea 4271 radio.RegLna.bits.LnaBoostHF = 3;
dudmuck 15:c69b942685ea 4272 radio.write_reg(REG_LNA, radio.RegLna.octet);
dudmuck 15:c69b942685ea 4273 }
dudmuck 15:c69b942685ea 4274
dudmuck 13:c73caaee93a5 4275 #endif /* START_EIGER_RX */
dudmuck 15:c69b942685ea 4276
dudmuck 15:c69b942685ea 4277 (void)radio.get_frf_MHz();
dudmuck 15:c69b942685ea 4278 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
Wayne Roberts 24:9ba45aa15b53 4279 #if defined(TARGET_MTS_MDOT_F411RE)
dudmuck 20:b11592c9ba5f 4280 radio.RegPaConfig.bits.PaSelect = 1; // mDot uses PA_BOOST
dudmuck 20:b11592c9ba5f 4281 #else
dudmuck 15:c69b942685ea 4282 if (shield_type == SHIELD_TYPE_LAS) {
dudmuck 15:c69b942685ea 4283 // LAS HF=PA_BOOST LF=RFO
dudmuck 15:c69b942685ea 4284 if (radio.HF)
dudmuck 15:c69b942685ea 4285 radio.RegPaConfig.bits.PaSelect = 1;
dudmuck 15:c69b942685ea 4286 else
dudmuck 15:c69b942685ea 4287 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 15:c69b942685ea 4288 } else if (shield_type == SHIELD_TYPE_MAS) {
dudmuck 15:c69b942685ea 4289 // MAS HF=RFO LF=RFO
dudmuck 15:c69b942685ea 4290 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 20:b11592c9ba5f 4291 }
dudmuck 20:b11592c9ba5f 4292 #endif
dudmuck 15:c69b942685ea 4293 radio.RegPaConfig.bits.OutputPower = 15;
dudmuck 15:c69b942685ea 4294 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 6:fe16f96ee335 4295
dudmuck 21:b84a77dfb43c 4296 #ifdef START_OOK_TX_TEST
dudmuck 21:b84a77dfb43c 4297 cmd_ook_tx_test(0);
dudmuck 21:b84a77dfb43c 4298 #endif /* START_OOK_TX_TEST */
dudmuck 0:be215de91a68 4299
dudmuck 0:be215de91a68 4300 while(1) {
dudmuck 0:be215de91a68 4301 switch (app) {
dudmuck 0:be215de91a68 4302 case APP_NONE:
dudmuck 0:be215de91a68 4303 console();
dudmuck 0:be215de91a68 4304 break;
dudmuck 0:be215de91a68 4305 case APP_CHAT:
dudmuck 0:be215de91a68 4306 console_chat();
dudmuck 0:be215de91a68 4307 break;
dudmuck 0:be215de91a68 4308 } // ...switch (app)
dudmuck 5:360069ec9953 4309
dudmuck 5:360069ec9953 4310 #if TARGET_NUCLEO_L152RE
dudmuck 5:360069ec9953 4311 //sleep();
dudmuck 5:360069ec9953 4312 #endif
dudmuck 0:be215de91a68 4313 } // ...while(1)
dudmuck 0:be215de91a68 4314 }
dudmuck 0:be215de91a68 4315