Nicolas Duchoud / MTCH112

MTCH112 Eval Board Microchip capacitive proximity sensor

mtch112.h@0:8203e12416bb, 2018-08-23 (annotated)

Committer:
duchonic
Date:
Thu Aug 23 06:17:50 2018 +0000
Revision:
0:8203e12416bb
First

Who changed what in which revision?

UserRevisionLine numberNew contents of line
duchonic 0:8203e12416bb 1 #include <mbed.h>
duchonic 0:8203e12416bb 2
duchonic 0:8203e12416bb 3
duchonic 0:8203e12416bb 4
duchonic 0:8203e12416bb 5 #define WRITE_PROTECT_BYTE_H 0x55
duchonic 0:8203e12416bb 6 #define WRITE_PROTECT_BYTE_L 0xAA
duchonic 0:8203e12416bb 7
duchonic 0:8203e12416bb 8 //Configuration Registers
duchonic 0:8203e12416bb 9 #define CONFIG_RESET_CALIB 0x00
duchonic 0:8203e12416bb 10 #define CONFIG_OUTCON 0x01
duchonic 0:8203e12416bb 11 #define CONFIG_CALCON0 0x02
duchonic 0:8203e12416bb 12 #define CONFIG_CALCON1 0x03CONFIG_OUTCON_VALUE
duchonic 0:8203e12416bb 13 #define CONFIG_ADACQ0 0x04
duchonic 0:8203e12416bb 14 #define CONFIG_ADACQ1 0x05
duchonic 0:8203e12416bb 15 #define CONFIG_LPCON 0x06
duchonic 0:8203e12416bb 16 #define CONFIG_PRESS_THRESH 0x07
duchonic 0:8203e12416bb 17 #define CONFIG_PROX_THRESH 0x08
duchonic 0:8203e12416bb 18 #define CONFIG_TIMEOUT_L 0x09
duchonic 0:8203e12416bb 19 #define CONFIG_TIMEOUT_H 0x0A
duchonic 0:8203e12416bb 20 #define CONFIG_I2CADDR 0x0B
duchonic 0:8203e12416bb 21
duchonic 0:8203e12416bb 22 #define CONFIG_RESET_CALIB_VALUE 0xFF
duchonic 0:8203e12416bb 23 #define CONFIG_OUTCON_VALUE 0x04
duchonic 0:8203e12416bb 24 #define CONFIG_PROX_THRESH_VALUE 0x14
duchonic 0:8203e12416bb 25 #define CONFIG_PRESS_THRESH_VALUE 0xFF
duchonic 0:8203e12416bb 26
duchonic 0:8203e12416bb 27 //Read/Output Registers, readonly
duchonic 0:8203e12416bb 28 #define OUTPUT_STATE 0x80
duchonic 0:8203e12416bb 29 #define OUTPUT_READING0L 0X81
duchonic 0:8203e12416bb 30 #define OUTPUT_READING0H 0X82
duchonic 0:8203e12416bb 31 #define OUTPUT_READING1L 0X83
duchonic 0:8203e12416bb 32 #define OUTPUT_READING1H 0X84
duchonic 0:8203e12416bb 33 #define OUTPUT_BASELINE0L 0x85
duchonic 0:8203e12416bb 34 #define OUTPUT_BASELINE0H 0x86
duchonic 0:8203e12416bb 35 #define OUTPUT_BASELINE1L 0X87
duchonic 0:8203e12416bb 36 #define OUTPUT_BASELINE1H 0x88
duchonic 0:8203e12416bb 37
duchonic 0:8203e12416bb 38 #define SLEEP_1ms 0x00
duchonic 0:8203e12416bb 39 #define SLEEP_2ms 0x02
duchonic 0:8203e12416bb 40 #define SLEEP_4ms 0x04
duchonic 0:8203e12416bb 41 #define SLEEP_8ms 0x06
duchonic 0:8203e12416bb 42 #define SLEEP_16ms 0x08
duchonic 0:8203e12416bb 43 #define SLEEP_32ms 0x0A
duchonic 0:8203e12416bb 44 #define SLEEP_64ms 0x0C
duchonic 0:8203e12416bb 45 #define SLEEP_128ms 0x0E
duchonic 0:8203e12416bb 46 #define SLEEP_256ms 0x10
duchonic 0:8203e12416bb 47 #define SLEEP_512ms 0x12
duchonic 0:8203e12416bb 48 #define SLEEP_1s 0x14
duchonic 0:8203e12416bb 49 #define SLEEP_2s 0x16
duchonic 0:8203e12416bb 50 #define SLEEP_4s 0x18
duchonic 0:8203e12416bb 51 #define SLEEP_8s 0x1A
duchonic 0:8203e12416bb 52 #define SLEEP_16S 0x1C
duchonic 0:8203e12416bb 53 #define SLEEP_32s 0x1E
duchonic 0:8203e12416bb 54 #define SLEEP_64s 0x20
duchonic 0:8203e12416bb 55 #define SLEEP_128s 0x22
duchonic 0:8203e12416bb 56 #define SLEEP_256s 0x24
duchonic 0:8203e12416bb 57 #define CLK_32MHZ 0x01
duchonic 0:8203e12416bb 58 #define CLK_16MHZ 0x00
duchonic 0:8203e12416bb 59
duchonic 0:8203e12416bb 60
duchonic 0:8203e12416bb 61 class MTCH112
duchonic 0:8203e12416bb 62 {
duchonic 0:8203e12416bb 63 public:
duchonic 0:8203e12416bb 64 MTCH112(PinName sda, PinName scl, uint8_t addr);
duchonic 0:8203e12416bb 65 ~MTCH112();
duchonic 0:8203e12416bb 66 uint8_t MTCH112_Init(void);
duchonic 0:8203e12416bb 67 uint8_t MTCH112_GetState(void);
duchonic 0:8203e12416bb 68
duchonic 0:8203e12416bb 69 private:
duchonic 0:8203e12416bb 70 I2C m_i2c;
duchonic 0:8203e12416bb 71 uint8_t m_addr;
duchonic 0:8203e12416bb 72 void SetRegister(uint8_t registerAddr, uint8_t data);
duchonic 0:8203e12416bb 73 uint8_t GetRegister(uint8_t registerAddr);
duchonic 0:8203e12416bb 74 };