David Mort / SSEL_spi

CLASS for automated serial 'chip select' implimentation utilizing mbed LPC1768 Timer2 hardware and it's inturrupt features.

SSEL_spi.h@0:9fa30f3069ae, 2014-03-22 (annotated)

Committer:
dtmort
Date:
Sat Mar 22 18:57:17 2014 +0000
Revision:
0:9fa30f3069ae
Initial commit 2014.03.22

Who changed what in which revision?

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dtmort 0:9fa30f3069ae 1 /* Class SSEL_spi, Copyright 2014, David T. Mort (http://mbed.org/users/dtmort/)
dtmort 0:9fa30f3069ae 2
dtmort 0:9fa30f3069ae 3 Licensed under the Apache License, Version 2.0 (the "License");
dtmort 0:9fa30f3069ae 4 you may not use this file except in compliance with the License.
dtmort 0:9fa30f3069ae 5 You may obtain a copy of the License at
dtmort 0:9fa30f3069ae 6
dtmort 0:9fa30f3069ae 7 http://www.apache.org/licenses/LICENSE-2.0
dtmort 0:9fa30f3069ae 8
dtmort 0:9fa30f3069ae 9 Unless required by applicable law or agreed to in writing, software
dtmort 0:9fa30f3069ae 10 distributed under the License is distributed on an "AS IS" BASIS,
dtmort 0:9fa30f3069ae 11 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
dtmort 0:9fa30f3069ae 12 See the License for the specific language governing permissions and
dtmort 0:9fa30f3069ae 13 limitations under the License.
dtmort 0:9fa30f3069ae 14 */
dtmort 0:9fa30f3069ae 15 #ifndef MBED_SSEL_SPI_H
dtmort 0:9fa30f3069ae 16 #define MBED_SSEL_SPI_H
dtmort 0:9fa30f3069ae 17
dtmort 0:9fa30f3069ae 18
dtmort 0:9fa30f3069ae 19 #include "mbed.h"
dtmort 0:9fa30f3069ae 20 extern "C" void TIMER2_IRQHandler (void); //this method Linker loads ISR vector at compile time
dtmort 0:9fa30f3069ae 21
dtmort 0:9fa30f3069ae 22 /**A hardware implimentation of a Serial (chip) SElect line output designed primarily for SPI (Serial Peripheral Interface)
dtmort 0:9fa30f3069ae 23 * devices by utilizing mbed LPC1768 Timer 2 hardware and it's inturrupt features.
dtmort 0:9fa30f3069ae 24 *
dtmort 0:9fa30f3069ae 25 * Use of this class does require hardwiring p30 to the serial clock output (usually p7 or p13).
dtmort 0:9fa30f3069ae 26 *
dtmort 0:9fa30f3069ae 27 * p8 is the SSEL serial select output pin (chip select) and is not relocatable.
dtmort 0:9fa30f3069ae 28 *
dtmort 0:9fa30f3069ae 29 * Some SPI peripherals require data latching while the serial clock is still active on
dtmort 0:9fa30f3069ae 30 * the last bit clocked-in, such as the Maxim MAX6952. Using the mbed SPI and DigitalOut API's
dtmort 0:9fa30f3069ae 31 * (for chip select) this timing is not possible. This SSEL_spi class takes advantage of
dtmort 0:9fa30f3069ae 32 * the speed achievable with the mbed SPI API, and leaves the chip select output handling
dtmort 0:9fa30f3069ae 33 * entirely in the capable hands of the Timer 2 hardware with fully automated frame lengths
dtmort 0:9fa30f3069ae 34 * making code simpler to write and read.
dtmort 0:9fa30f3069ae 35 *
dtmort 0:9fa30f3069ae 36 * - Flexible serial frame lengths from 0 .. 4,294,967,295 bits (usually a multiple of SPI bit length)
dtmort 0:9fa30f3069ae 37 * - Un-attended automation of the chip select line.
dtmort 0:9fa30f3069ae 38 * - Selectable mode for proper clock polarity and edge trigger (make same as SPI mode).
dtmort 0:9fa30f3069ae 39 * - Selectable chip select polarity (active-low or active-high).
dtmort 0:9fa30f3069ae 40 * - Latching data in while clock is still active on last bit,
dtmort 0:9fa30f3069ae 41 * **such as required by the Maxim MAX6952. This is not possible with the mbed API,
dtmort 0:9fa30f3069ae 42 * onboard SPI or SSP hardware alone. SPI speed is limited up to 3Mhz for this feature.
dtmort 0:9fa30f3069ae 43 * Higher SPI speeds are permissable although due to the limitations of the hardware the chip
dtmort 0:9fa30f3069ae 44 * select will latch AFTER sclk returns to the inactive state, tolerated by some serial peripherals.
dtmort 0:9fa30f3069ae 45 * - Allows one-shot loading of all serial daisy-chained hardware registers before latching.
dtmort 0:9fa30f3069ae 46 * Prevents display ghosting effect. For example
dtmort 0:9fa30f3069ae 47 * a daisy-chain of seven serial chips each requiring 16 bits each would set up a frame
dtmort 0:9fa30f3069ae 48 * length of 7 x 16 = 112 bit frame length.
dtmort 0:9fa30f3069ae 49 *
dtmort 0:9fa30f3069ae 50 * The MAX6952 chip requires the following sequence:
dtmort 0:9fa30f3069ae 51 *
dtmort 0:9fa30f3069ae 52 * [[http://datasheets.maxim-ic.com/en/ds/MAX6952.pdf]]
dtmort 0:9fa30f3069ae 53 * -# Take CLK low.
dtmort 0:9fa30f3069ae 54 * -# Take CS low. This enables the internal 16-bit shift register.
dtmort 0:9fa30f3069ae 55 * -# Clock 16 bits of data into DIN, D15 first to D0 last, observing the setup and hold times. Bit D15 is low, indicating a write command.
dtmort 0:9fa30f3069ae 56 * -# Take CS high **(while CLK is still high after clocking in the last data bit).
dtmort 0:9fa30f3069ae 57 * -# Take CLK low.
dtmort 0:9fa30f3069ae 58 *
dtmort 0:9fa30f3069ae 59 * Example:
dtmort 0:9fa30f3069ae 60 * @code
dtmort 0:9fa30f3069ae 61 * // Send a 16 bit word to a SPI slave
dtmort 0:9fa30f3069ae 62 * // NOTE: You must hardwire sclk output pin (usually p7 or p13)
dtmort 0:9fa30f3069ae 63 * // to p30 which is the CAP2.0 sensing pin used by Timer2.
dtmort 0:9fa30f3069ae 64 *
dtmort 0:9fa30f3069ae 65 * // Chip select is automatic and will always be p8
dtmort 0:9fa30f3069ae 66 *
dtmort 0:9fa30f3069ae 67 * #include "mbed.h"
dtmort 0:9fa30f3069ae 68 * #include "SSEL_spi.h"
dtmort 0:9fa30f3069ae 69 *
dtmort 0:9fa30f3069ae 70 * SPI spi(p5,p6,p7); //mosi, miso, sclk
dtmort 0:9fa30f3069ae 71 * SSEL_spi cs(16,0); //16 bits per frame, mode 0 (mode optional, 0 is default)
dtmort 0:9fa30f3069ae 72 *
dtmort 0:9fa30f3069ae 73 * int main(){
dtmort 0:9fa30f3069ae 74 * cs.active(1); //optionally will establish active-high (1) chip select
dtmort 0:9fa30f3069ae 75 * spi.format(16,0);
dtmort 0:9fa30f3069ae 76 * spi.frequency(1000000);
dtmort 0:9fa30f3069ae 77 *
dtmort 0:9fa30f3069ae 78 * while(1) spi.write(0x5555);
dtmort 0:9fa30f3069ae 79 *
dtmort 0:9fa30f3069ae 80 * }
dtmort 0:9fa30f3069ae 81 * @endcode
dtmort 0:9fa30f3069ae 82 */
dtmort 0:9fa30f3069ae 83 class SSEL_spi {
dtmort 0:9fa30f3069ae 84
dtmort 0:9fa30f3069ae 85 public:
dtmort 0:9fa30f3069ae 86 /**Create automatated SSEL chip select output for an SPI interface on p8 utilizing Timer2. Must hardwire SPI sclk output pin to p30.
dtmort 0:9fa30f3069ae 87 *
dtmort 0:9fa30f3069ae 88 * @param frame Bit Length of the SSEL chip select frame. Usually a multiple of the SPI bit length transmission.
dtmort 0:9fa30f3069ae 89 * @param mode Set up proper triggering from SPI sclk output. Default mode = 0. Set mode same as SPI mode.
dtmort 0:9fa30f3069ae 90 *
dtmort 0:9fa30f3069ae 91 */
dtmort 0:9fa30f3069ae 92 SSEL_spi(uint32_t frame, int mode=0);
dtmort 0:9fa30f3069ae 93
dtmort 0:9fa30f3069ae 94 /** Set active state of the chip select pin 8
dtmort 0:9fa30f3069ae 95 *
dtmort 0:9fa30f3069ae 96 * Is active-low (0) by default. Call only if change needed.
dtmort 0:9fa30f3069ae 97 *
dtmort 0:9fa30f3069ae 98 * Can also be called to force an output high or low condition.
dtmort 0:9fa30f3069ae 99 * @param cs 0 (default) for active-low, 1 for active-high
dtmort 0:9fa30f3069ae 100 */
dtmort 0:9fa30f3069ae 101 void active(bool cs);
dtmort 0:9fa30f3069ae 102 protected:
dtmort 0:9fa30f3069ae 103
dtmort 0:9fa30f3069ae 104 private:
dtmort 0:9fa30f3069ae 105
dtmort 0:9fa30f3069ae 106 };
dtmort 0:9fa30f3069ae 107 #endif