Mo El-Sharkawy
/
ECE533_mcr20_connectivity_test_FRDMk64f
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Dependencies: fsl_phy_mcr20a fsl_smac mbed-rtos mbed
Fork of
mcr20_connectivity_test_FRDMk64f
by 
samuel belete
Revision 0:4eb2240dbd22, committed 2015-07-16
- Comitter:
- andreikovacs
- Date:
- Thu Jul 16 07:29:15 2015 +0000
- Child:
- 1:1eb1eccc81c2
- Commit message:
- Initial commit;
Changed in this revision
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/FSL_CONN_FWK/Common/EmbeddedTypes.h Thu Jul 16 07:29:15 2015 +0000 @@ -0,0 +1,106 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file EmbeddedTypes.h +* This file holds type definitions that maps the standard c-types into types +* with guaranteed sizes. The types are target/platform specific and must be edited +* for each new target/platform. +* The header file also provides definitions for TRUE, FALSE and NULL. +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _EMBEDDEDTYPES_H_ +#define _EMBEDDEDTYPES_H_ + + +/************************************************************************************ +* +* INCLUDES +* +************************************************************************************/ + +#include <stdint.h> +#include <stdlib.h> +#include <string.h> + +#ifdef __ICCARM__ +#include <intrinsics.h> +#endif + +/************************************************************************************ +* +* TYPE DEFINITIONS +* +************************************************************************************/ + +/* boolean types */ +typedef uint8_t bool_t; + +typedef uint8_t index_t; + +/* TRUE/FALSE definition*/ +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +/* null pointer definition*/ +#ifndef NULL +#define NULL (( void * )( 0x0UL )) +#endif + +#if defined(__GNUC__) +#define PACKED_STRUCT struct __attribute__ ((__packed__)) +#define PACKED_UNION union __attribute__ ((__packed__)) +#elif defined(__IAR_SYSTEMS_ICC__) +#define PACKED_STRUCT __packed struct +#define PACKED_UNION __packed union +#else +#define PACKED_STRUCT struct +#define PACKED_UNION union +#endif + +typedef unsigned char uint8_t; +//typedef unsigned long uint32_t; + +#define MIN(a,b) (((a) < (b))?(a):(b)) + +/* Compute the number of elements of an array */ +#define NumberOfElements(x) (sizeof(x)/sizeof((x)[0])) + +#define GetRelAddr(strct, member) ((uint32_t)&(((strct*)(void *)0)->member)) +#define GetSizeOfMember(strct, member) sizeof(((strct*)(void *)0)->member) + +/* Type definitions for link configuration of instantiable layers */ +#define gInvalidInstanceId_c (instanceId_t)(-1) +typedef uint32_t instanceId_t; + +#endif /* _EMBEDDEDTYPES_H_ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_CONN_FWK/MemManager/Interface/MemManager.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,198 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MemManager.h
+* This is the header file for the Memory Manager interface.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _MEM_MANAGER_H_
+#define _MEM_MANAGER_H_
+
+/*! *********************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+********************************************************************************** */
+#include "EmbeddedTypes.h"
+#include "GenericList.h"
+#include "MemManagerConfig.h"
+
+
+/*! *********************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+********************************************************************************** */
+/*Defines pools by block size and number of blocks. Must be alligned to 4 bytes.*/
+#ifndef PoolsDetails_c
+#define PoolsDetails_c \
+ _block_size_ 64 _number_of_blocks_ 8 _eol_ \
+ _block_size_ 128 _number_of_blocks_ 2 _eol_ \
+ _block_size_ 256 _number_of_blocks_ 6 _eol_
+#endif
+
+
+/*! *********************************************************************************
+*************************************************************************************
+* Private type definitions
+*************************************************************************************
+********************************************************************************** */
+/*Defines statuses used in MEM_BufferAlloc and MEM_BufferFree*/
+typedef enum
+{
+ MEM_SUCCESS_c = 0, /* No error occurred */
+ MEM_INIT_ERROR_c, /* Memory initialization error */
+ MEM_ALLOC_ERROR_c, /* Memory allocation error */
+ MEM_FREE_ERROR_c, /* Memory free error */
+ MEM_UNKNOWN_ERROR_c /* something bad has happened... */
+}memStatus_t;
+
+
+/*! *********************************************************************************
+*************************************************************************************
+* Public prototypes
+*************************************************************************************
+********************************************************************************** */
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*Initialises the Memory Manager.*/
+memStatus_t MEM_Init(void);
+/*Returns the number of available blocks that fit the given size.*/
+uint32_t MEM_GetAvailableBlocks(uint32_t size);
+/*Frees the givem buffer.*/
+memStatus_t MEM_BufferFree(void* buffer);
+/*Returns the allocated buffer of the given size.*/
+void* MEM_BufferAlloc(uint32_t numBytes);
+/*Returns the size of a given buffer*/
+uint16_t MEM_BufferGetSize(void* buffer);
+/*Performs a write-read-verify test accross all pools*/
+uint32_t MEM_WriteReadTest(void);
+#ifdef __cplusplus
+}//extern "C"
+#endif
+
+/*! *********************************************************************************
+*************************************************************************************
+* Private macros
+*************************************************************************************
+********************************************************************************** */
+#if defined(MEM_TRACKING) && defined(DEBUG_ASSERT)
+#define MEM_ASSERT(condition) if(!(condition))while(1);
+#else
+#define MEM_ASSERT(condition) (void)(condition);
+#endif
+
+
+/*! *********************************************************************************
+*************************************************************************************
+* Private type definitions
+*************************************************************************************
+********************************************************************************** */
+
+#ifdef MEM_STATISTICS
+/*Statistics structure definition. Used by pools.*/
+typedef struct poolStat_tag
+ {
+ uint16_t numBlocks;
+ uint16_t allocatedBlocks;
+ uint16_t allocatedBlocksPeak;
+ uint16_t allocationFailures;
+ uint16_t freeFailures;
+#ifdef MEM_TRACKING
+ uint16_t poolFragmentWaste;
+ uint16_t poolFragmentWastePeak;
+#endif /*MEM_TRACKING*/
+ } poolStat_t;
+#endif /*MEM_STATISTICS*/
+
+#ifdef MEM_TRACKING
+/*Definition for alloc indicators. Used in buffer tracking.*/
+typedef enum
+{
+ MEM_TRACKING_FREE_c = 0,
+ MEM_TRACKING_ALLOC_c,
+}memTrackingStatus_t;
+
+/*Tracking structure definition.*/
+typedef struct BlockTracking_tag
+{
+ void *blockAddr; /*Addr of Msg, not that this pointer is
+ 4 byte bigger than the addr in the pool
+ has the header of the msg is 4 bytes */
+ uint16_t blockSize; /*Size of block in bytes.*/
+ uint16_t fragmentWaste; /*Size requested by allocator.*/
+ void *allocAddr; /*Return address of last Alloc made */
+ void *freeAddr; /*Return address of last Free made */
+ uint16_t allocCounter; /*No of time this msg has been allocated */
+ uint16_t freeCounter; /*No of time this msg has been freed */
+ memTrackingStatus_t allocStatus; /*1 if currently allocated, 0 if currently free */
+ // uint8_t padding;
+}blockTracking_t;
+#endif /*MEM_TRACKING*/
+
+/*Header description for buffers.*/
+typedef struct listHeader_tag
+{
+ listElement_t link;
+ struct pools_tag *pParentPool;
+}listHeader_t;
+
+/*Buffer pools. Used by most functions*/
+typedef struct pools_tag
+{
+ list_t anchor; /* MUST be first element in pools_t struct */
+ uint16_t nextBlockSize;
+ uint16_t blockSize;
+#ifdef MEM_STATISTICS
+ poolStat_t poolStatistics;
+ uint8_t padding[2];
+#endif /*MEM_STATISTICS*/
+}pools_t;
+
+/*Buffer pool description. Used by MM_Init() for creating the buffer pools. */
+typedef struct poolInfo_tag
+{
+ uint16_t blockSize;
+ uint16_t poolSize;
+ /* uint8_t padding[2]; */
+}poolInfo_t;
+
+/*! *********************************************************************************
+*************************************************************************************
+* Private prototypes
+*************************************************************************************
+********************************************************************************** */
+
+#ifdef MEM_TRACKING
+uint8_t MEM_Track(listHeader_t *block, memTrackingStatus_t alloc, uint32_t address, uint16_t requestedSize);
+uint8_t MEM_BufferCheck(uint8_t *p, uint32_t size);
+#endif /*MEM_TRACKING*/
+
+#endif /* _MEM_MANAGER_H_ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/FSL_CONN_FWK/MemManager/Interface/MemManagerConfig.h Thu Jul 16 07:29:15 2015 +0000 @@ -0,0 +1,49 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file MemManagerConfig.h +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + + +#ifndef _MEM_MANAGER_CONFIG_H_ +#define _MEM_MANAGER_CONFIG_H_ + +/*Defines pools by block size and number of blocks. Must be aligned to 4 bytes.*/ +#ifndef PoolsDetails_c +#define PoolsDetails_c \ + _block_size_ 64 _number_of_blocks_ 8 _eol_ \ + _block_size_ 128 _number_of_blocks_ 2 _eol_ \ + _block_size_ 256 _number_of_blocks_ 10 _eol_ +#endif + +/*Enables debug features: tracking and statistics.*/ +/*Tracking disabled*/ +/*Statistics disabled*/ + +#endif /* _MEM_MANAGER_CONFIG_H_ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_CONN_FWK/MemManager/Source/MemManager.c Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,620 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MemManager.c
+* This is the source file for the Memory Manager.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/*! *********************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+********************************************************************************** */
+#include "EmbeddedTypes.h"
+#include "mbedAbstraction.h"
+#include "fsl_os_abstraction.h"
+#ifdef MEM_DEBUG
+#include "Panic.h"
+#endif
+#include "MemManager.h"
+
+
+/*! *********************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+********************************************************************************** */
+
+#define _block_size_ {
+#define _number_of_blocks_ ,
+#define _eol_ },
+
+poolInfo_t poolInfo[] =
+{
+ PoolsDetails_c
+ {0, 0} /*termination tag*/
+};
+
+#undef _block_size_
+#undef _number_of_blocks_
+#undef _eol_
+
+#define _block_size_ (sizeof(listHeader_t)+
+#define _number_of_blocks_ ) *
+#define _eol_ +
+
+#define heapSize_c (PoolsDetails_c 0)
+
+// Heap
+uint8_t memHeap[heapSize_c];
+const uint32_t heapSize = heapSize_c;
+
+#undef _block_size_
+#undef _number_of_blocks_
+#undef _eol_
+
+#define _block_size_ 0 *
+#define _number_of_blocks_ + 0 *
+#define _eol_ + 1 +
+
+#define poolCount (PoolsDetails_c 0)
+
+// Memory pool info and anchors.
+pools_t memPools[poolCount];
+
+#undef _block_size_
+#undef _number_of_blocks_
+#undef _eol_
+
+#ifdef MEM_TRACKING
+
+#define _block_size_ 0*
+#define _number_of_blocks_ +
+#define _eol_ +
+
+#define mTotalNoOfMsgs_d (PoolsDetails_c 0)
+static const uint16_t mTotalNoOfMsgs_c = mTotalNoOfMsgs_d;
+blockTracking_t memTrack[mTotalNoOfMsgs_d];
+
+#undef _block_size_
+#undef _number_of_blocks_
+#undef _eol_
+
+#endif /*MEM_TRACKING*/
+
+// Free messages counter. Not used by module.
+uint16_t gFreeMessagesCount;
+
+/*! *********************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+********************************************************************************** */
+
+/*! *********************************************************************************
+* \brief This function initializes the message module private variables.
+* Must be called at boot time, or if device is reset.
+*
+* \param[in] none
+*
+* \return MEM_SUCCESS_c if initialization is successful. (It's always successful).
+*
+********************************************************************************** */
+memStatus_t MEM_Init()
+{
+ poolInfo_t *pPoolInfo = poolInfo; // IN: Memory layout information
+ pools_t *pPools = memPools;// OUT: Will be initialized with requested memory pools.
+ uint8_t *pHeap = memHeap;// IN: Memory heap.
+ uint8_t poolN;
+#ifdef MEM_TRACKING
+ uint16_t memTrackIndex = 0;
+#endif /*MEM_TRACKING*/
+
+ gFreeMessagesCount = 0;
+
+ for(;;)
+ {
+ poolN = pPoolInfo->poolSize;
+ ListInit((listHandle_t)&pPools->anchor, poolN);
+#ifdef MEM_STATISTICS
+ pPools->poolStatistics.numBlocks = 0;
+ pPools->poolStatistics.allocatedBlocks = 0;
+ pPools->poolStatistics.allocatedBlocksPeak = 0;
+ pPools->poolStatistics.allocationFailures = 0;
+ pPools->poolStatistics.freeFailures = 0;
+#ifdef MEM_TRACKING
+ pPools->poolStatistics.poolFragmentWaste = 0;
+ pPools->poolStatistics.poolFragmentWastePeak = 0;
+#endif /*MEM_TRACKING*/
+#endif /*MEM_STATISTICS*/
+
+ while(poolN)
+ {
+ // Add block to list of free memory.
+ ListAddTail((listHandle_t)&pPools->anchor, (listElementHandle_t)&((listHeader_t *)pHeap)->link);
+ ((listHeader_t *)pHeap)->pParentPool = pPools;
+#ifdef MEM_STATISTICS
+ pPools->poolStatistics.numBlocks++;
+#endif /*MEM_STATISTICS*/
+
+ gFreeMessagesCount++;
+#ifdef MEM_TRACKING
+ memTrack[memTrackIndex].blockAddr = (void *)(pHeap + sizeof(listHeader_t));
+ memTrack[memTrackIndex].blockSize = pPoolInfo->blockSize;
+ memTrack[memTrackIndex].fragmentWaste = 0;
+ memTrack[memTrackIndex].allocAddr = NULL;
+ memTrack[memTrackIndex].allocCounter = 0;
+ memTrack[memTrackIndex].allocStatus = MEM_TRACKING_FREE_c;
+ memTrack[memTrackIndex].freeAddr = NULL;
+ memTrack[memTrackIndex].freeCounter = 0;
+ memTrackIndex++;
+#endif /*MEM_TRACKING*/
+
+ // Add block size (without list header)
+ pHeap += pPoolInfo->blockSize + sizeof(listHeader_t);
+ poolN--;
+ }
+
+ pPools->blockSize = pPoolInfo->blockSize;
+ pPools->nextBlockSize = (pPoolInfo+1)->blockSize;
+ if(pPools->nextBlockSize == 0)
+ {
+ break;
+ }
+
+ pPools++;
+ pPoolInfo++;
+ }
+ return MEM_SUCCESS_c;
+}
+
+/*! *********************************************************************************
+* \brief This function returns the number of available blocks greater or
+* equal to the given size.
+*
+* \param[in] size - Size of blocks to check for availability.
+*
+* \return Number of available blocks greater or equal to the given size.
+*
+* \pre Memory manager must be previously initialized.
+*
+********************************************************************************** */
+uint32_t MEM_GetAvailableBlocks
+ (
+ uint32_t size
+ )
+{
+ pools_t *pPools = memPools;
+ uint32_t pTotalCount = 0;
+
+ for(;;)
+ {
+ if(size <= pPools->blockSize)
+ {
+ pTotalCount += ListGetSize((listHandle_t)&pPools->anchor);
+ }
+
+ if(pPools->nextBlockSize == 0)
+ {
+ break;
+ }
+
+ pPools++;
+ }
+
+ return pTotalCount;
+}
+
+/*! *********************************************************************************
+* \brief Allocate a block from the memory pools. The function uses the
+* numBytes argument to look up a pool with adequate block sizes.
+* \param[in] numBytes - Size of buffer to allocate.
+*
+* \return Pointer to the allocated buffer, NULL if failed.
+*
+* \pre Memory manager must be previously initialized.
+*
+********************************************************************************** */
+void* MEM_BufferAlloc
+ (
+ uint32_t numBytes // IN: Minimum number of bytes to allocate
+ )
+{
+#ifdef MEM_TRACKING
+
+ /* Save the Link Register */
+ volatile uint32_t savedLR;
+// __asm("str r14, [SP]");
+ __asm("push {r2} ");
+ __asm("push {LR} ");
+ __asm("pop {r2} ");
+ __asm("str r2, [SP, #4]");
+ __asm("pop {r2}");
+
+#endif /*MEM_TRACKING*/
+
+ pools_t *pPools = memPools;
+ listHeader_t *pBlock;
+
+#ifdef MEM_TRACKING
+ uint16_t requestedSize = numBytes;
+#endif /*MEM_TRACKING*/
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ while(numBytes)
+ {
+ if(numBytes <= pPools->blockSize)
+ {
+ pBlock = (listHeader_t *)ListRemoveHead((listHandle_t)&pPools->anchor);
+
+ if(NULL != pBlock)
+ {
+ pBlock++;
+ gFreeMessagesCount--;
+
+#ifdef MEM_STATISTICS
+ pPools->poolStatistics.allocatedBlocks++;
+ if ( pPools->poolStatistics.allocatedBlocks > pPools->poolStatistics.allocatedBlocksPeak )
+ {
+ pPools->poolStatistics.allocatedBlocksPeak = pPools->poolStatistics.allocatedBlocks;
+ }
+ MEM_ASSERT(pPools->poolStatistics.allocatedBlocks <= pPools->poolStatistics.numBlocks);
+#endif /*MEM_STATISTICS*/
+
+#ifdef MEM_TRACKING
+ MEM_Track(pBlock, MEM_TRACKING_ALLOC_c, savedLR, requestedSize);
+#endif /*MEM_TRACKING*/
+ OSA_ExitCritical(kCriticalDisableInt);
+ return pBlock;
+ }
+ else
+ {
+ if(numBytes > pPools->nextBlockSize) break;
+ // No more blocks of that size, try next size.
+ numBytes = pPools->nextBlockSize;
+ }
+ }
+ // Try next pool
+ if(pPools->nextBlockSize)
+ pPools++;
+ else
+ break;
+ }
+#ifdef MEM_STATISTICS
+ pPools->poolStatistics.allocationFailures++;
+#endif /*MEM_STATISTICS*/
+
+#ifdef MEM_DEBUG
+ panic( 0, (uint32_t)MEM_BufferAlloc, 0, 0);
+#endif
+
+ OSA_ExitCritical(kCriticalDisableInt);
+ return NULL;
+}
+
+/*! *********************************************************************************
+* \brief Deallocate a memory block by putting it in the corresponding pool
+* of free blocks.
+*
+* \param[in] buffer - Pointer to buffer to deallocate.
+*
+* \return MEM_SUCCESS_c if deallocation was successful, MEM_FREE_ERROR_c if not.
+*
+* \pre Memory manager must be previously initialized.
+*
+* \remarks Never deallocate the same buffer twice.
+*
+********************************************************************************** */
+memStatus_t MEM_BufferFree
+ (
+ void* buffer // IN: Block of memory to free
+ )
+{
+#ifdef MEM_TRACKING
+
+ /* Save the Link Register */
+ volatile uint32_t savedLR;
+// __asm("str r14, [SP]");
+ __asm("push {r1} ");
+ __asm("push {LR} ");
+ __asm("pop {r1} ");
+ __asm("str r1, [SP, #4]");
+ __asm("pop {r1}");
+#endif /*MEM_TRACKING*/
+
+ if(buffer == NULL)
+ {
+ return MEM_FREE_ERROR_c;
+ }
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ listHeader_t *pHeader = (listHeader_t *)buffer-1;
+ pools_t *pParentPool = (pools_t *)pHeader->pParentPool;
+
+ pools_t *pool = memPools;
+ for(;;)
+ {
+ if (pParentPool == pool)
+ break;
+ if(pool->nextBlockSize == 0)
+ {
+ /* The parent pool was not found! This means that the memory buffer is corrupt or
+ that the MEM_BufferFree() function was called with an invalid parameter */
+#ifdef MEM_STATISTICS
+ pParentPool->poolStatistics.freeFailures++;
+#endif /*MEM_STATISTICS*/
+ OSA_ExitCritical(kCriticalDisableInt);
+ return MEM_FREE_ERROR_c;
+ }
+ pool++;
+ }
+
+ if( pHeader->link.list != NULL )
+ {
+ /* The memory buffer appears to be enqueued in a linked list.
+ This list may be the free memory buffers pool, or another list. */
+#ifdef MEM_STATISTICS
+ pParentPool->poolStatistics.freeFailures++;
+#endif /*MEM_STATISTICS*/
+ OSA_ExitCritical(kCriticalDisableInt);
+ return MEM_FREE_ERROR_c;
+ }
+
+ gFreeMessagesCount++;
+
+ ListAddTail((listHandle_t)&pParentPool->anchor, (listElementHandle_t)&pHeader->link);
+
+#ifdef MEM_STATISTICS
+ MEM_ASSERT(pParentPool->poolStatistics.allocatedBlocks > 0);
+ pParentPool->poolStatistics.allocatedBlocks--;
+#endif /*MEM_STATISTICS*/
+
+#ifdef MEM_TRACKING
+ MEM_Track(buffer, MEM_TRACKING_FREE_c, savedLR, 0);
+#endif /*MEM_TRACKING*/
+ OSA_ExitCritical(kCriticalDisableInt);
+ return MEM_SUCCESS_c;
+}
+
+/*! *********************************************************************************
+* \brief Determines the size of a memory block
+*
+* \param[in] buffer - Pointer to buffer.
+*
+* \return size of memory block
+*
+* \pre Memory manager must be previously initialized.
+*
+********************************************************************************** */
+uint16_t MEM_BufferGetSize
+(
+void* buffer // IN: Block of memory to free
+)
+{
+ if( buffer )
+ {
+ return ((pools_t *)((listHeader_t *)buffer-1)->pParentPool)->blockSize;
+ }
+
+ return 0;
+}
+
+/*! *********************************************************************************
+*************************************************************************************
+* Private functions
+*************************************************************************************
+********************************************************************************** */
+/*! *********************************************************************************
+* \brief This function updates the tracking array element corresponding to the given
+* block.
+*
+* \param[in] block - Pointer to the block.
+* \param[in] alloc - Indicates whether an allocation or free operation was performed
+* \param[in] address - Address where MEM_BufferAlloc or MEM_BufferFree was called
+* \param[in] requestedSize - Indicates the requested buffer size passed to MEM_BufferAlloc.
+* Has no use if a free operation was performed.
+*
+* \return Returns TRUE if correct allocation or dealocation was performed, FALSE if a
+* buffer was allocated or freed twice.
+*
+********************************************************************************** */
+#ifdef MEM_TRACKING
+uint8_t MEM_Track(listHeader_t *block, memTrackingStatus_t alloc, uint32_t address, uint16_t requestedSize)
+{
+ uint16_t i;
+ blockTracking_t *pTrack = NULL;
+#ifdef MEM_STATISTICS
+ poolStat_t * poolStatistics = (poolStat_t *)&((pools_t *)( (listElementHandle_t)(block-1)->pParentPool ))->poolStatistics;
+#endif
+
+ for( i=0; i<mTotalNoOfMsgs_c; i++ )
+ {
+ if( block == memTrack[i].blockAddr )
+ {
+ pTrack = &memTrack[i];
+ break;
+ }
+ }
+
+ if( !pTrack || pTrack->allocStatus == alloc)
+ {
+#ifdef MEM_DEBUG
+ panic( 0, (uint32_t)MEM_Track, 0, 0);
+#endif
+ return FALSE;
+ }
+
+ pTrack->allocStatus = alloc;
+
+ if(alloc == MEM_TRACKING_ALLOC_c)
+ {
+ pTrack->fragmentWaste = pTrack->blockSize - requestedSize;
+ pTrack->allocCounter++;
+ pTrack->allocAddr = (void *)address;
+#ifdef MEM_STATISTICS
+
+ poolStatistics->poolFragmentWaste += pTrack->fragmentWaste;
+ if(poolStatistics->poolFragmentWaste > poolStatistics->poolFragmentWastePeak)
+ poolStatistics->poolFragmentWastePeak = poolStatistics->poolFragmentWaste;
+#endif /*MEM_STATISTICS*/
+ }
+ else
+ {
+#ifdef MEM_STATISTICS
+ poolStatistics->poolFragmentWaste -= pTrack->fragmentWaste;
+#endif /*MEM_STATISTICS*/
+ pTrack->fragmentWaste = 0;
+ pTrack->freeCounter++;
+ pTrack->freeAddr = (void *)address;
+ }
+
+ return TRUE;
+}
+
+/*! *********************************************************************************
+* \brief This function checks for buffer overflow when copying multiple bytes
+*
+* \param[in] p - pointer to destination.
+* \param[in] size - number of bytes to copy
+*
+* \return 1 if overflow detected, else 0
+*
+********************************************************************************** */
+uint8_t MEM_BufferCheck(uint8_t *p, uint32_t size)
+{
+ uint32_t i;
+
+ if( (p < (uint8_t*)memHeap) || (p > ((uint8_t*)memHeap + sizeof(memHeap))) )
+ return 0;
+
+ for(i=0; i<mTotalNoOfMsgs_c-1; i++)
+ {
+ if( p > (uint8_t*)memTrack[i].blockAddr &&
+ p < (uint8_t*)memTrack[i+1].blockAddr )
+ {
+ if( (p+size) > ((uint8_t*)memTrack[i+1].blockAddr - sizeof(listHeader_t)) )
+ {
+#ifdef MEM_DEBUG
+ panic(0,0,0,0);
+#endif
+ return 1;
+ }
+
+ break;
+ }
+ }
+ return 0;
+}
+#endif /*MEM_TRACKING*/
+
+/*! *********************************************************************************
+* \brief Performs a write-read-verify test for every byte in all memory pools.
+*
+* \return Returns MEM_SUCCESS_c if test was successful, MEM_ALLOC_ERROR_c if a
+* buffer was not allocated successufuly, MEM_FREE_ERROR_c if a
+* buffer was not freed successufuly or MEM_UNKNOWN_ERROR_c if a verify error,
+* heap overflow or data corruption occurred.
+*
+********************************************************************************** */
+uint32_t MEM_WriteReadTest(void)
+{
+ uint8_t *data, count = 1;
+ uint32_t idx1,idx2,idx3;
+ uint32_t freeMsgs;
+
+ /*memory write test*/
+ freeMsgs = MEM_GetAvailableBlocks(0);
+
+ for(idx1=0; poolInfo[idx1].blockSize != 0; idx1++)
+ {
+ for(idx2=0; idx2 < poolInfo[idx1].poolSize; idx2++)
+ {
+ data = (uint8_t *)MEM_BufferAlloc(poolInfo[idx1].blockSize);
+
+ if(data == NULL)
+ {
+ return MEM_ALLOC_ERROR_c;
+ }
+
+ for(idx3=0; idx3 < poolInfo[idx1].blockSize; idx3++)
+ {
+ if(data > memHeap + heapSize)
+ {
+ return MEM_UNKNOWN_ERROR_c;
+ }
+ *data = count & 0xff;
+ data++;
+ }
+ count++;
+ }
+ }
+
+ count = 1;
+ data = memHeap;
+ /*memory read test*/
+ for(idx1=0; poolInfo[idx1].blockSize != 0; idx1++)
+ {
+ for(idx2=0; idx2 < poolInfo[idx1].poolSize; idx2++)
+ {
+ /*New block; jump over list header*/
+ data = data + sizeof(listHeader_t);
+ for(idx3=0; idx3<poolInfo[idx1].blockSize; idx3++)
+ {
+ if(*data == count)
+ {
+ data++;
+ }
+ else
+ {
+ return MEM_UNKNOWN_ERROR_c;
+ }
+ }
+ if(MEM_BufferFree( data - poolInfo[idx1].blockSize) != MEM_SUCCESS_c)
+ {
+ return MEM_FREE_ERROR_c;
+ }
+ count++;
+ }
+ }
+ if(MEM_GetAvailableBlocks(0) != freeMsgs)
+ {
+ return MEM_UNKNOWN_ERROR_c;
+ }
+#ifdef MEM_STATISTICS
+ for(idx1 = 0; poolInfo[idx1].blockSize != 0; idx1++)
+ {
+ memPools[idx1].poolStatistics.allocatedBlocksPeak = 0;
+ }
+#endif /*MEM_STATISTICS*/
+
+ return MEM_SUCCESS_c;
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_CONN_FWK/RNG/RNG.cpp Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,306 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file RNG.c
+* RNG implementation file for the ARM CORTEX-M4 processor
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+#include "RNG_Interface.h"
+#include "fsl_device_registers.h"
+#include "fsl_clock_manager.h"
+//#include "SecLib.h"
+#include "FunctionLib.h"
+
+#if (gSecLib_HWSupport_d == gSecLib_MMCAUSupport_d)
+//#include "mmcau_interface.h"
+#endif
+
+#ifndef gRNG_UsePhyRngForInitialSeed_d
+#define gRNG_UsePhyRngForInitialSeed_d 0
+#endif
+
+#if (gRNG_HWSupport_d == gRNG_NoHWSupport_d)
+ uint32_t mRandomNumber;
+
+ #if gRNG_UsePhyRngForInitialSeed_d
+ extern void PhyGetRandomNo(uint32_t *pRandomNo);
+ #endif
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Private macros
+*************************************************************************************
+************************************************************************************/
+#define mPRNG_NoOfBits_c (160)
+#define mPRNG_NoOfBytes_c (mPRNG_NoOfBits_c/8)
+#define mPRNG_NoOfLongWords_c (mPRNG_NoOfBits_c/32)
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+static uint32_t XKEY[mPRNG_NoOfLongWords_c];
+static uint32_t mPRNG_Requests = gRngMaxRequests_d;
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/******************************************************************************
+ * Name: RNG_Init()
+ * Description: Initialize the RNG HW module
+ * Parameter(s): -
+ * Return: Status of the RNG module
+ ******************************************************************************/
+uint8_t RNG_Init(void)
+{
+#if gRNG_HWSupport_d == gRNG_RNGAHWSupport_d
+ CLOCK_SYS_EnableRngaClock(0);
+ /* Mask Interrupts and start RNG */
+ RNG_CR = RNG_CR_INTM_MASK | RNG_CR_HA_MASK | RNG_CR_GO_MASK;
+
+#elif gRNG_HWSupport_d == gRNG_RNGBHWSupport_d
+ CLOCK_SYS_EnableRngbClock(0);
+ /* Execute a SW Reset */
+ RNG_CMD |= RNG_CMD_SR_MASK;
+
+ /* Mask Interrupts */
+ RNG_CR = RNG_CR_MASKDONE_MASK | RNG_CR_MASKERR_MASK;
+
+ /* Start Self Test and Seed Generation */
+ RNG_CMD = RNG_CMD_ST_MASK | RNG_CMD_GS_MASK;
+
+ /* Wait for Self Test and Seed Generation to be done*/
+ while (RNG_CMD & (RNG_CMD_ST_MASK | RNG_CMD_GS_MASK));
+
+ /* Enable RNG Auto-Reseed */
+ RNG_CR |= RNG_CR_AR_MASK;
+
+ /* Check for Errors */
+ if ( RNG_SR & RNG_SR_ERR_MASK )
+ {
+ return (uint8_t)(RNG_ESR);
+ }
+#elif gRNG_HWSupport_d == gRNG_TRNGHWSupport_d
+// uint32_t temp;
+//
+// SIM_SCGC6 |= SIM_SCGC6_TRNG_MASK;
+//
+// /* Reset TRNG registers to default values */
+// HW_TRNG_RTMCTL_WR(gTRNG_BaseAddr_c, BM_TRNG_RTMCTL_RST_DEF | BM_TRNG_RTMCTL_PRGM);
+//
+// /* Enable Entropy Valid IRQ */
+// //disallow device to sleep, allow device to sleep in ISR
+// //HW_TRNG_SA_TRNG_INT_MASK_SET(gTRNG_BaseAddr_c, BM_TRNG_SA_TRNG_INT_MASK_SA_TRNG_SBS_ENTROPY_VALID);
+//
+// /* Set TRNG in Run mode, and enable entropy read access */
+// temp = HW_TRNG_RTMCTL_RD(gTRNG_BaseAddr_c);
+// temp &= ~(BM_TRNG_RTMCTL_PRGM | BM_TRNG_RTMCTL_ERR);
+// temp |= BM_TRNG_RTMCTL_TRNG_ACC;
+// HW_TRNG_RTMCTL_WR(gTRNG_BaseAddr_c, temp);
+#else
+ #if gRNG_UsePhyRngForInitialSeed_d
+ PhyGetRandomNo(&mRandomNumber);
+ #else
+ mRandomNumber = HW_SIM_UIDL_RD(SIM_BASE);
+ #endif
+#endif /* gRNG_HwSupport_d == 1 */
+
+ /* Init Successfull */
+ return gRngSuccess_d;
+}
+
+/******************************************************************************
+ * Name: RNG_HwGetRandomNo()
+ * Description: Read a random number from the HW RNG module
+ * Parameter(s): [OUT] pRandomNo - pointer to location where the RN will be stored
+ * Return: status of the RNG module
+ ******************************************************************************/
+#if (gRNG_HWSupport_d != gRNG_NoHWSupport_d)
+static uint8_t RNG_HwGetRandomNo(uint32_t* pRandomNo)
+{
+#if gRNG_HWSupport_d == gRNG_RNGAHWSupport_d
+ /* If output register is empty, wait for a new random number */
+ while ( ((RNG_SR & RNG_SR_OREG_LVL_MASK) >> RNG_SR_OREG_LVL_SHIFT) == 0 );
+
+ /* Copy the output of RNG module */
+ *pRandomNo = RNG_OR;
+
+#elif gRNG_HWSupport_d == gRNG_RNGBHWSupport_d
+ /* Check for Errors */
+ if ( RNG_SR & RNG_SR_ERR_MASK )
+ return (uint8_t)(RNG_ESR);
+
+ /* If output FIFO is empty, wait for a new random number */
+ while (((RNG_SR & RNG_SR_FIFO_LVL_MASK) >> RNG_SR_FIFO_LVL_SHIFT) == 0 );
+
+ /* Copy the output of RNG module */
+ *pRandomNo = RNG_OUT;
+
+#elif gRNG_HWSupport_d == gRNG_TRNGHWSupport_d
+ static uint8_t entropyIdx = 0;
+
+ /* wait for entropy to be generated or for an error */
+ while( !(HW_TRNG_RTMCTL_RD(gTRNG_BaseAddr_c) & (BM_TRNG_RTMCTL_ENT_VAL | BM_TRNG_RTMCTL_ERR)) );
+
+ if( HW_TRNG_RTMCTL_RD(gTRNG_BaseAddr_c) & BM_TRNG_RTMCTL_ERR )
+ return gRngInternalError_d;
+
+ *pRandomNo = HW_TRNG_RTENTan_RD(gTRNG_BaseAddr_c, entropyIdx);
+ if( ++entropyIdx == 16 )
+ {
+ entropyIdx = 0;
+ //disallow device to sleep
+ }
+#endif
+
+ return gRngSuccess_d;
+}
+#endif /* gRNG_HwSupport_d */
+
+
+/******************************************************************************
+ * Name: RNG_GetRandomNo()
+ * Description: Read a random number from RNG module or from 802.15.4 PHY
+ * Parameter(s): [OUT] pRandomNo - pointer to location where the RN will be stored
+ * Return: none
+ ******************************************************************************/
+void RNG_GetRandomNo(uint32_t* pRandomNo)
+{
+ /* Check for NULL pointers */
+ if (NULL == pRandomNo)
+ return;
+
+#if (gRNG_HWSupport_d == gRNG_NoHWSupport_d)
+ mRandomNumber = (mRandomNumber * 6075) + 1283;
+ FLib_MemCpy(pRandomNo, &mRandomNumber, sizeof(uint32_t));
+#else
+ (void)RNG_HwGetRandomNo(pRandomNo);
+#endif
+}
+
+/******************************************************************************
+ * Name: RNG_SetPseudoRandomNoSeed()
+ * Description: Initialize seed for the PRNG algorithm.
+ * Parameter(s):
+ * pSeed - pointer to a buffer containing 20 bytes (160 bits).
+ * Can be set using the RNG_GetRandomNo() function.
+ * Return: None
+ ******************************************************************************/
+void RNG_SetPseudoRandomNoSeed(uint8_t* pSeed)
+{
+ mPRNG_Requests = 1;
+ FLib_MemCpy( XKEY, pSeed, mPRNG_NoOfBytes_c );
+}
+
+#if 0
+/******************************************************************************
+ * Name: RNG_GetRandomNo()
+ *
+ * Description: Pseudo Random Number Generator (PRNG) implementation
+ * according to NIST FIPS Publication 186-2, APPENDIX 3
+ *
+ * Let x be the signer's private key. The following may be used to generate m values of x:
+ * Step 1. Choose a new, secret value for the seed-key, XKEY.
+ * Step 2. In hexadecimal notation let
+ * t = 67452301 EFCDAB89 98BADCFE 10325476 C3D2E1F0.
+ * This is the initial value for H0 || H1 || H2 || H3 || H4 in the SHS.
+ * Step 3. For j = 0 to m - 1 do
+ * a. XSEEDj = optional user input.
+ * b. XVAL = (XKEY + XSEEDj) mod 2^b
+ * c. xj = G(t,XVAL) mod q
+ * d. XKEY = (1 + XKEY + xj) mod 2^b
+ *
+ * Parameter(s):
+ * pOut - pointer to the output buffer
+ * outBytes - the number of bytes to be copyed (1-20)
+ * pXSEED - optional user SEED. Should be NULL if not used.
+ *
+ * Return: The number of bytes copied or -1 if reseed is needed
+ ******************************************************************************/
+int16_t RNG_GetPseudoRandomNo(uint8_t* pOut, uint8_t outBytes, uint8_t* pXSEED)
+{
+ uint32_t i;
+ sha1Context_t ctx;
+
+ if (mPRNG_Requests == gRngMaxRequests_d)
+ return -1;
+
+ mPRNG_Requests++;
+
+ /* a. XSEEDj = optional user input. */
+ if (pXSEED)
+ {
+ /* b. XVAL = (XKEY + XSEEDj) mod 2^b */
+ for (i=0; i<mPRNG_NoOfBytes_c; i++)
+ {
+ ctx.buffer[i] = ((uint8_t*)XKEY)[i] + pXSEED[i];
+ }
+ }
+ else
+ {
+ for (i=0; i<mPRNG_NoOfBytes_c; i++)
+ {
+ ctx.buffer[i] = ((uint8_t*)XKEY)[i];
+ }
+ }
+
+ /* c. xj = G(t,XVAL) mod q
+ ***************************/
+ SHA1_Hash(&ctx, ctx.buffer, mPRNG_NoOfBytes_c);
+
+ /* d. XKEY = (1 + XKEY + xj) mod 2^b */
+ XKEY[0] += 1;
+ for (i=0; i<mPRNG_NoOfLongWords_c; i++)
+ {
+ XKEY[i] += ctx.hash[i];
+ }
+
+ /* Check if the length provided exceeds the output data size */
+ if (outBytes > mPRNG_NoOfBytes_c)
+ {
+ outBytes = mPRNG_NoOfBytes_c;
+ }
+
+ /* Copy the generated number */
+ for (i=0; i < outBytes; i++)
+ {
+ pOut[i] = ((uint8_t*)ctx.hash)[i];
+ }
+
+ return outBytes;
+}
+#endif
+
+/********************************** EOF ***************************************/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/FSL_CONN_FWK/RNG/RNG_Interface.h Thu Jul 16 07:29:15 2015 +0000 @@ -0,0 +1,114 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file RNG_interface.h +* RNG implementation header file for the ARM CORTEX-M4 processor +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _RNG_INTERFACE_H_ +#define _RNG_INTERFACE_H_ + +#include "EmbeddedTypes.h" + + +/****************************************************************************** +******************************************************************************* +* Public macros +******************************************************************************* +******************************************************************************/ +#define gRNG_NoHWSupport_d 0 +#define gRNG_RNGAHWSupport_d 1 +#define gRNG_RNGBHWSupport_d 2 +#define gRNG_TRNGHWSupport_d 3 + +#ifndef gRNG_HWSupport_d +#define gRNG_HWSupport_d gRNG_NoHWSupport_d +#endif + +#define gRngSuccess_d (0x00) +#define gRngInternalError_d (0x01) +#define gRngNullPointer_d (0x80) +#define gRngMaxRequests_d (100000) + + +/****************************************************************************** +******************************************************************************* +* Public type definitions +******************************************************************************* +******************************************************************************/ + +/****************************************************************************** +******************************************************************************* +* Public memory declarations +******************************************************************************* +******************************************************************************/ + +/****************************************************************************** +******************************************************************************* +* Public function prototypes +******************************************************************************* +******************************************************************************/ + +/****************************************************************************** + * Name: RNG_Init() + * Description: Initialize the RNG HW module + * Parameter(s): - + * Return: Status of the RNG module + ******************************************************************************/ +uint8_t RNG_Init(void); + +/****************************************************************************** + * Name: RNG_GetRandomNo() + * Description: Reads a 32-bit statistically random number from the RNG module or from 802.15.4 PHY + * Parameter(s): [OUT] pRandomNo - pointer to location where the RN will be stored + * Return: none + ******************************************************************************/ +void RNG_GetRandomNo(uint32_t* pRandomNo); + +/****************************************************************************** + * Name: PRNG_SetSeed() + * Description: Initialize seed for the PRNG algorithm. + * Parameter(s): + * pSeed - can be set using the RNG_GetRandomNo() function + * Return: None + ******************************************************************************/ +void RNG_SetPseudoRandomNoSeed(uint8_t* pSeed); + +/****************************************************************************** + * Name: PRNG_GetRandomNo() + * Description: Generates a NIST FIPS Publication 186-2-compliant 160 bit pseudo-random number + * Parameter(s): + * pOut - pointer to the output buffer + * outBytes - the number of bytes to be copyed (1-20) + * pXSEED - optional user SEED. Should be NULL if not used. + * Return: The number of bytes copied or -1 if reseed is needed + ******************************************************************************/ +int16_t RNG_GetPseudoRandomNo(uint8_t* pOut, uint8_t outBytes, uint8_t* pXSEED); + +#endif /* _RNG_INTERFACE_H_ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_CONN_FWK/Utils/FunctionLib/FunctionLib.c Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,496 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file FunctionLib.c
+* This module contains various common functions like copy and compare routines.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#include "FunctionLib.h"
+
+#if gUseToolchainMemFunc_d
+#include <string.h>
+#endif
+
+/*! *********************************************************************************
+*************************************************************************************
+* Private macros
+*************************************************************************************
+********************************************************************************** */
+
+/*! *********************************************************************************
+*************************************************************************************
+* Private prototypes
+*************************************************************************************
+********************************************************************************** */
+
+/*! *********************************************************************************
+*************************************************************************************
+* Private type definitions
+*************************************************************************************
+********************************************************************************** */
+
+/*! *********************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+********************************************************************************** */
+
+/*! *********************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+********************************************************************************** */
+
+/*! *********************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+********************************************************************************** */
+
+/*! *********************************************************************************
+* \brief This function copies bytes from one buffer to another.
+* The buffers should not overlap.
+*
+* \param[in, out] pDst Pointer to the destination buffer.
+*
+* \param[in] pSrc Pointer to the source buffer.
+*
+* \param[in] cBytes Number of bytes to copy.
+*
+* \post The source and destination buffers must not overlap.
+*
+* \remarks
+*
+********************************************************************************** */
+void FLib_MemCpy (void* pDst,
+ void* pSrc,
+ uint32_t cBytes)
+{
+#if gUseToolchainMemFunc_d
+ memcpy(pDst, pSrc, cBytes);
+#else
+ while (cBytes)
+ {
+ *((uint8_t*)pDst) = *((uint8_t*)pSrc);
+ pDst = ((uint8_t*)pDst)+1;
+ pSrc = ((uint8_t*)pSrc)+1;
+ cBytes--;
+ }
+#endif
+}
+
+/*! *********************************************************************************
+* \brief This function copies the specified number of bytes from the
+* source address to the destination address. No attempt is made
+* to handle overlapping copies to prevent loss of data.
+* The copying is optimized to avoid alignment problems, and attempts
+* to copy 32bit numbers optimally.
+*
+* \param[in] from_ptr Pointer to the source buffer.
+*
+* \param[in, out] to_ptr Pointer to the destination buffer.
+*
+* \param[in] number_of_bytes Number of bytes to copy (32 bit value).
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+void FLib_MemCpyAligned32bit (void* to_ptr,
+ void* from_ptr,
+ register uint32_t number_of_bytes)
+{
+ uint8_t* from8_ptr = (uint8_t*)from_ptr;
+ uint8_t* to8_ptr = (uint8_t*)to_ptr;
+ uint16_t* from16_ptr = (uint16_t*)from_ptr;
+ uint16_t* to16_ptr = (uint16_t*)to_ptr;
+ register uint32_t* from32_ptr = (uint32_t*)from_ptr;
+ register uint32_t* to32_ptr = (uint32_t*)to_ptr;
+
+ register uint32_t loops;
+
+ if (number_of_bytes > 3)
+ {
+ /* Try to align source on word */
+ if ((uint32_t)from_ptr & 1)
+ {
+ from8_ptr = (uint8_t*)from_ptr;
+ to8_ptr = (uint8_t*)to_ptr;
+
+ *to8_ptr++ = *from8_ptr++;
+
+ from_ptr = from8_ptr;
+ to_ptr = to8_ptr;
+ --number_of_bytes;
+ }
+
+ /* Try to align source on longword */
+ if ((uint32_t)from_ptr & 2)
+ {
+ from16_ptr = (uint16_t*)from_ptr;
+ to16_ptr = (uint16_t*)to_ptr;
+
+ *to16_ptr++ = *from16_ptr++;
+
+ from_ptr = from16_ptr;
+ to_ptr = to16_ptr;
+ number_of_bytes -= 2;
+ }
+
+ from32_ptr = (uint32_t*)from_ptr;
+ to32_ptr = (uint32_t*)to_ptr;
+
+ for (loops = number_of_bytes >> 2; loops != 0; loops--)
+ {
+ *to32_ptr++ = *from32_ptr++;
+ }
+
+ from_ptr = from32_ptr;
+ to_ptr = to32_ptr;
+ }
+
+ /* Copy all remaining bytes */
+ if (number_of_bytes & 2)
+ {
+ from16_ptr = (uint16_t*)from_ptr;
+ to16_ptr = (uint16_t*)to_ptr;
+
+ *to16_ptr++ = *from16_ptr++;
+
+ from_ptr = from16_ptr;
+ to_ptr = to16_ptr;
+ }
+
+ if (number_of_bytes & 1)
+ {
+ *(uint8_t*)to_ptr = *(uint8_t*)from_ptr;
+ }
+}
+
+
+/*! *********************************************************************************
+* \brief Copy bytes from one buffer to another. The buffers should not overlap.
+* The function can copy in either direction. If 'dir' is TRUE, then the function
+* works like FLib_MemCpy(). If FALSE, the function swaps the buffer pointers
+* before copying.
+*
+* \param[in, out] pBuf1 Pointer to the destination/source buffer.
+*
+* \param[in, out] pBuf2 Pointer to the source/destination buffer.
+*
+* \param[in] dir Direction to copy: pBuf2->pBuf1 if TRUE, pBuf1->pBuf2 if FALSE
+*
+* \param[in] n Number of bytes to copy.
+*
+* \post The source and destination buffers must not overlap.
+*
+* \remarks
+*
+********************************************************************************** */
+void FLib_MemCpyDir (void* pBuf1,
+ void* pBuf2,
+ bool_t dir,
+ uint32_t n)
+{
+ if (dir)
+ {
+ FLib_MemCpy (pBuf1, pBuf2, n);
+ }
+ else
+ {
+ FLib_MemCpy (pBuf2, pBuf1, n);
+ }
+}
+
+
+/*! *********************************************************************************
+* \brief The byte at index i from the source buffer is copied to index ((n-1) - i)
+* in the destination buffer (and vice versa).
+*
+* \param[in, out] pDst Pointer to the destination buffer.
+*
+* \param[in] pSrc Pointer to the source buffer.
+*
+* \param[in] cBytes Number of bytes to copy.
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+void FLib_MemCpyReverseOrder (void* pDst,
+ void* pSrc,
+ uint32_t cBytes)
+{
+ if(cBytes == 0)
+ {
+ return;
+ }
+ pDst = (uint8_t*)pDst + (uint32_t)(cBytes-1);
+ while (cBytes)
+ {
+ *((uint8_t*)pDst) = *((uint8_t*)pSrc);
+ pDst = (uint8_t*)pDst-1;
+ pSrc = (uint8_t*)pSrc+1;
+ cBytes--;
+ }
+}
+
+
+/*! *********************************************************************************
+* \brief This function compares two buffers.
+*
+* \param[in] pData1 First buffer to compare.
+*
+* \param[in] pData2 Second buffer to compare.
+*
+* \param[in] cBytes Number of bytes to compare.
+*
+* \return This function return TRUE if the buffers are equal and FALSE otherwise.
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+bool_t FLib_MemCmp (void* pData1, // IN: First memory block to compare
+ void* pData2, // IN: Second memory block to compare
+ uint32_t cBytes // IN: Number of bytes to compare.
+ )
+{
+#if gUseToolchainMemFunc_d
+ if( memcmp(pData1, pData2, cBytes) )
+ return FALSE;
+#else
+ while (cBytes)
+ {
+ if ( *((uint8_t *)pData1) != *((uint8_t *)pData2))
+ {
+ return FALSE;
+ }
+
+ pData2 = (uint8_t* )pData2+1;
+ pData1 = (uint8_t* )pData1+1;
+ cBytes--;
+ }
+#endif
+ return TRUE;
+}
+
+
+/*! *********************************************************************************
+* \brief This function resets all bytes in a specified buffer to a set value.
+*
+* \param[in,out] pDst Address of the buffer to set.
+*
+* \param[in] value Set value.
+*
+* \param[in] cBytes Number of bytes to set in the buffer (maximum 255 bytes).
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+void FLib_MemSet (void* pDst,
+ uint8_t value,
+ uint32_t cBytes)
+{
+#if gUseToolchainMemFunc_d
+ memset(pDst, value, cBytes);
+#else
+ while (cBytes)
+ {
+ ((uint8_t* )pDst)[--cBytes] = value;
+ }
+#endif
+}
+
+
+/*! *********************************************************************************
+* \brief This function copies a buffer,
+* possibly into the same overlapping memory as it is taken from
+*
+* \param[in, out] pDst Pointer to the destination buffer.
+*
+* \param[in] pSrc Pointer to the source buffer.
+*
+* \param[in] cBytes Number of bytes to copy.
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+void FLib_MemInPlaceCpy (void* pDst,
+ void* pSrc,
+ uint32_t cBytes)
+{
+ if (pDst != pSrc)
+ {
+ /* Do nothing if copying to same position */
+ if (pDst < pSrc)
+ {
+ /* If dst is before src in memory copy forward */
+#if gUseToolchainMemFunc_d
+ memcpy(pDst, pSrc, cBytes);
+#else
+ while (cBytes)
+ {
+ *((uint8_t*)pDst) = *((uint8_t*)pSrc);
+ pDst = ((uint8_t*)pDst)+1;
+ pSrc = ((uint8_t*)pSrc)+1;
+ cBytes--;
+ }
+#endif
+ }
+ else
+ {
+ /* If dst is after src in memory copy backward */
+ while(cBytes)
+ {
+ cBytes--;
+ ((uint8_t* )pDst)[cBytes] = ((uint8_t* )pSrc)[cBytes];
+ }
+ }
+ }
+}
+
+/*! *********************************************************************************
+* \brief This function copies a 16bit value to an unaligned a memory block.
+*
+* \param[in, out] pDst Pointer to the destination memory block.
+*
+* \param[in] val16 The value to be copied.
+*
+********************************************************************************** */
+void FLib_MemCopy16Unaligned (void* pDst,
+ uint16_t val16)
+{
+ uint8_t* pData = (uint8_t*)pDst;
+
+ *pData++ = (uint8_t)(val16);
+ *pData = (uint8_t)(val16 >> 8);
+
+ return;
+}
+
+
+/*! *********************************************************************************
+* \brief This function copies a 32bit value to an unaligned a memory block.
+*
+* \param[in, out] pDst Pointer to the destination memory block.
+*
+* \param[in] val32 The value to be copied.
+*
+********************************************************************************** */
+void FLib_MemCopy32Unaligned (void* pDst,
+ uint32_t val32)
+{
+ uint8_t* pData = (uint8_t*)pDst;
+
+ *pData++ = (uint8_t)(val32);
+ *pData++ = (uint8_t)(val32 >> 8);
+ *pData++ = (uint8_t)(val32 >> 16);
+ *pData++ = (uint8_t)(val32 >> 24);
+
+ return;
+}
+
+
+/*! *********************************************************************************
+* \brief This function copies a 64bit value to an unaligned a memory block.
+*
+* \param[in, out] pDst Pointer to the destination memory block.
+*
+* \param[in] val64 The value to be copied.
+*
+********************************************************************************** */
+void FLib_MemCopy64Unaligned (void* pDst,
+ uint64_t val64)
+{
+ uint8_t* pData = (uint8_t*)pDst;
+
+ *pData++ = (uint8_t)(val64);
+ *pData++ = (uint8_t)(val64 >> 8);
+ *pData++ = (uint8_t)(val64 >> 16);
+ *pData++ = (uint8_t)(val64 >> 24);
+ *pData++ = (uint8_t)(val64 >> 32);
+ *pData++ = (uint8_t)(val64 >> 40);
+ *pData++ = (uint8_t)(val64 >> 48);
+ *pData = (uint8_t)(val64 >> 56);
+
+ return;
+}
+
+
+/*! *********************************************************************************
+* \brief This function adds an offset to a pointer.
+*
+* \param[in,out] pPtr Pointer to the pointer to add the offset to
+*
+* \param[in] offset Offset to add to the specified pointer.
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+void FLib_AddOffsetToPointer (void** pPtr,
+ uint32_t offset)
+{
+ (*pPtr) = ((uint8_t* )*pPtr) + offset;
+}
+
+
+/*! *********************************************************************************
+* \brief This function returns the length of a NULL terminated string.
+*
+* \param[in] str A NULL terminated string
+*
+* \return the size of string in bytes
+*
+********************************************************************************** */
+uint32_t FLib_StrLen(char *str)
+{
+#if gUseToolchainMemFunc_d
+ return strlen(str);
+#else
+ register uint32_t len=0;
+
+ while(*str != '\0')
+ {
+ str++;
+ len++;
+ }
+
+ return len;
+#endif
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_CONN_FWK/Utils/FunctionLib/FunctionLib.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,266 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file FunctionLib.h
+* This is the Function Lib module header file
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _FUNCTION_LIB_H_
+#define _FUNCTION_LIB_H_
+
+#include "EmbeddedTypes.h"
+
+/*! *********************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+********************************************************************************** */
+
+#ifndef gUseToolchainMemFunc_d
+#define gUseToolchainMemFunc_d 0
+#endif
+
+#define FLib_MemSet16 FLib_MemSet
+
+/*! *********************************************************************************
+*************************************************************************************
+* Public prototypes
+*************************************************************************************
+********************************************************************************** */
+
+/*! *********************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+********************************************************************************** */
+
+/*! *********************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+********************************************************************************** */
+
+/*! *********************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+********************************************************************************** */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*! *********************************************************************************
+* \brief Copy the content of one memory block to another. The amount of data to copy
+* must be specified in number of bytes.
+*
+* \param[out] pDst Pointer to destination memory block
+* \param[in] pSrc Pointer to source memory block
+* \param[in] cBytes Number of bytes to copy
+*
+********************************************************************************** */
+void FLib_MemCpy (void* pDst,
+ void* pSrc,
+ uint32_t cBytes
+ );
+
+void FLib_MemCpyAligned32bit (void* to_ptr,
+ void* from_ptr,
+ register uint32_t number_of_bytes);
+
+void FLib_MemCpyDir (void* pBuf1,
+ void* pBuf2,
+ bool_t dir,
+ uint32_t n);
+
+
+/*! *********************************************************************************
+* \brief Copy bytes. The byte at index i from the source buffer is copied to index
+* ((n-1) - i) in the destination buffer (and vice versa).
+*
+* \param[out] pDst Pointer to destination memory block
+* \param[in] pSrc Pointer to source memory block
+* \param[in] cBytes Number of bytes to copy
+*
+********************************************************************************** */
+void FLib_MemCpyReverseOrder (void* pDst,
+ void* pSrc,
+ uint32_t cBytes
+ );
+
+
+/*! *********************************************************************************
+* \brief Compare two memory blocks. The number of bytes to compare must be specified.
+* If the blocks are equal byte by byte, the function returns TRUE,
+* and FALSE otherwise.
+*
+* \param[in] pData1 First memory block to compare
+* \param[in] pData2 Second memory block to compare
+* \param[in] cBytes Number of bytes to compare
+*
+* \return TRUE if memory areas are equal. FALSE othwerwise.
+*
+********************************************************************************** */
+bool_t FLib_MemCmp (void* pData1,
+ void* pData2,
+ uint32_t cBytes
+ );
+
+
+/*! *********************************************************************************
+* \brief Reset bytes in a memory block to a certain value. The value, and the number
+* of bytes to be set, are supplied as arguments.
+*
+* \param[in] pData Pointer to memory block to reset
+* \param[in] value Value that memory block will be set to
+* \param[in] cBytes Number of bytes to set
+*
+********************************************************************************** */
+ void FLib_MemSet (void* pData,
+ uint8_t value,
+ uint32_t cBytes
+ );
+
+
+/*! *********************************************************************************
+* \brief Copy bytes, possibly into the same overlapping memory as it is taken from
+*
+* \param[out] pDst Pointer to destination memory block
+* \param[in] pSrc Pointer to source memory block
+* \param[in] cBytes Number of bytes to copy
+*
+********************************************************************************** */
+void FLib_MemInPlaceCpy (void* pDst,
+ void* pSrc,
+ uint32_t cBytes
+ );
+
+
+/*! *********************************************************************************
+* \brief Copies a 16bit value to an unaligned a memory block.
+*
+* \param[out] pDst Pointer to destination memory block
+* \param[in] val16 The 16-bit value to be copied
+*
+********************************************************************************** */
+void FLib_MemCopy16Unaligned (void* pDst,
+ uint16_t val16
+ );
+
+
+/*! *********************************************************************************
+* \brief Copies a 32bit value to an unaligned a memory block.
+*
+* \param[out] pDst Pointer to destination memory block
+* \param[in] val32 The 32-bit value to be copied
+*
+********************************************************************************** */
+void FLib_MemCopy32Unaligned (void* pDst,
+ uint32_t val32
+ );
+
+
+/*! *********************************************************************************
+* \brief Copies a 64bit value to an unaligned a memory block.
+*
+* \param[out] pDst Pointer to destination memory block
+* \param[in] val64 The 64-bit value to be copied
+*
+********************************************************************************** */
+void FLib_MemCopy64Unaligned (void* pDst,
+ uint64_t val64
+ );
+
+
+/*! *********************************************************************************
+* \brief Add an offset to a pointer.
+*
+* \param[out] pPtr Pointer to the pointer to be updated
+* \param[in] offset The offset(in bytes) to be added
+*
+********************************************************************************** */
+void FLib_AddOffsetToPointer (void** pPtr,
+ uint32_t offset);
+
+#define FLib_AddOffsetToPtr(pPtr,offset) FLib_AddOffsetToPointer((void**)(pPtr),(offset))
+
+
+/*! *********************************************************************************
+* \brief This function returns the length of a NULL terminated string.
+*
+* \param[in] str A NULL terminated string
+*
+* \return the size of string in bytes
+*
+********************************************************************************** */
+uint32_t FLib_StrLen(char *str);
+
+
+/*! *********************************************************************************
+* \brief Compare two bytes.
+*
+* \param[in] c1 first byte to compare
+* \param[in] c2 second byte to compare
+*
+* \return TRUE if the two bytes are equal, and FALSE otherwise.
+*
+********************************************************************************** */
+#define FLib_Cmp2Bytes(c1, c2) (*((uint16_t*) (c1)) == *((uint16_t*) (c2)))
+
+
+/*! *********************************************************************************
+* \brief Returns the maximum value of arguments a and b.
+*
+* \return The maximum value of arguments a and b
+*
+* \remarks
+* The primitive should must be implemented as a macro, as it should be possible to
+* evaluate the result on compile time if the arguments are constants.
+*
+********************************************************************************** */
+#define FLib_GetMax(a,b) (((a) > (b)) ? (a) : (b))
+
+
+/*! *********************************************************************************
+* \brief Returns the minimum value of arguments a and b.
+*
+* \return The minimum value of arguments a and b
+*
+* \remarks
+* The primitive should must be implemented as a macro, as it should be possible to
+* evaluate the result on compile time if the arguments are constants.
+*
+********************************************************************************** */
+#define FLib_GetMin(a,b) (((a) < (b)) ? (a) : (b))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _FUNCTION_LIB_H_ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_CONN_FWK/Utils/GenericList/GenericList.c Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,583 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file GenericList.c
+* This is the source file for the linked lists part of the Utils package.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*! *********************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+********************************************************************************** */
+#include "GenericList.h"
+#include "mbedAbstraction.h"
+
+
+
+/*! *********************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+********************************************************************************** */
+/*! *********************************************************************************
+* \brief Initialises the list descriptor.
+*
+* \param[in] list - List handle to init.
+* max - Maximum number of elements in list. 0 for unlimited.
+*
+* \return void.
+*
+* \pre
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+
+void ListInit(listHandle_t list, uint32_t max)
+{
+ list->head = NULL;
+ list->tail = NULL;
+ list->max = max;
+ list->size = 0;
+}
+
+/*! *********************************************************************************
+* \brief Gets the list that contains the given element.
+*
+* \param[in] element - Handle of the element.
+*
+* \return NULL if element is orphan.
+* Handle of the list the element is inserted into.
+*
+* \pre
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+listHandle_t ListGetList(listElementHandle_t elementHandle)
+{
+ return elementHandle->list;
+}
+
+/*! *********************************************************************************
+* \brief Links element to the tail of the list.
+*
+* \param[in] list - ID of list to insert into.
+* element - element to add
+*
+* \return gListFull_c if list is full.
+* gListOk_c if insertion was successful.
+*
+* \pre
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+listStatus_t ListAddTail(listHandle_t list, listElementHandle_t element)
+{
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ if( (list->max != 0) && (list->max == list->size) )
+ {
+ OSA_ExitCritical(kCriticalDisableInt);
+ return gListFull_c;
+ }
+
+ if(list->size == 0)
+ {
+ list->head = element;
+ }
+ else
+ {
+ list->tail->next = element;
+ }
+ element->prev = list->tail;
+ element->next = NULL;
+ element->list = list;
+ list->tail = element;
+ list->size++;
+
+ OSA_ExitCritical(kCriticalDisableInt);
+ return gListOk_c;
+}
+
+/*! *********************************************************************************
+* \brief Links element to the head of the list.
+*
+* \param[in] list - ID of list to insert into.
+* element - element to add
+*
+* \return gListFull_c if list is full.
+* gListOk_c if insertion was successful.
+*
+* \pre
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+listStatus_t ListAddHead(listHandle_t list, listElementHandle_t element)
+{
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ if( (list->max != 0) && (list->max == list->size) )
+ {
+ OSA_ExitCritical(kCriticalDisableInt);
+ return gListFull_c;
+ }
+
+ if(list->size == 0)
+ {
+ list->tail = element;
+ }
+ else
+ {
+ list->head->prev = element;
+ }
+ element->next = list->head;
+ element->prev = NULL;
+ element->list = list;
+ list->head = element;
+ list->size++;
+
+ OSA_ExitCritical(kCriticalDisableInt);
+ return gListOk_c;
+}
+
+/*! *********************************************************************************
+* \brief Unlinks element from the head of the list.
+*
+* \param[in] list - ID of list to remove from.
+*
+* \return NULL if list is empty.
+* ID of removed element(pointer) if removal was successful.
+*
+* \pre
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+listElementHandle_t ListRemoveHead(listHandle_t list)
+{
+ listElementHandle_t element;
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ if(NULL == list || list->size == 0)
+ {
+ OSA_ExitCritical(kCriticalDisableInt);
+ return NULL; /*List is empty*/
+ }
+
+ element = list->head;
+ list->size--;
+ if(list->size == 0)
+ {
+ list->tail = NULL;
+ }
+ else
+ {
+ element->next->prev = NULL;
+ }
+ list->head = element->next; /*Is NULL if element is head*/
+ element->list = NULL;
+
+ OSA_ExitCritical(kCriticalDisableInt);
+ return element;
+}
+
+/*! *********************************************************************************
+* \brief Gets head element ID.
+*
+* \param[in] list - ID of list.
+*
+* \return NULL if list is empty.
+* ID of head element if list is not empty.
+*
+* \pre
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+listElementHandle_t ListGetHead(listHandle_t list)
+{
+ return list->head;
+}
+
+/*! *********************************************************************************
+* \brief Gets next element ID.
+*
+* \param[in] element - ID of the element.
+*
+* \return NULL if element is tail.
+* ID of next element if exists.
+*
+* \pre
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+listElementHandle_t ListGetNext(listElementHandle_t element)
+{
+ return element->next;
+}
+
+/*! *********************************************************************************
+* \brief Gets previous element ID.
+*
+* \param[in] element - ID of the element.
+*
+* \return NULL if element is head.
+* ID of previous element if exists.
+*
+* \pre
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+listElementHandle_t ListGetPrev(listElementHandle_t element)
+{
+ return element->prev;
+}
+
+/*! *********************************************************************************
+* \brief Unlinks an element from its list.
+*
+* \param[in] element - ID of the element to remove.
+*
+* \return gOrphanElement_c if element is not part of any list.
+* gListOk_c if removal was successful.
+*
+* \pre
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+listStatus_t ListRemoveElement(listElementHandle_t element)
+{
+ if(element->list == NULL)
+ {
+ return gOrphanElement_c; /*Element was previusly removed or never added*/
+ }
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ if(element->prev == NULL) /*Element is head or solo*/
+ {
+ element->list->head = element->next; /*is null if solo*/
+ }
+ if(element->next == NULL) /*Element is tail or solo*/
+ {
+ element->list->tail = element->prev; /*is null if solo*/
+ }
+ if(element->prev != NULL) /*Element is not head*/
+ {
+ element->prev->next = element->next;
+ }
+ if(element->next != NULL) /*Element is not tail*/
+ {
+ element->next->prev = element->prev;
+ }
+ element->list->size--;
+ element->list = NULL;
+
+ OSA_ExitCritical(kCriticalDisableInt);
+ return gListOk_c;
+}
+
+/*! *********************************************************************************
+* \brief Links an element in the previous position relative to a given member
+* of a list.
+*
+* \param[in] element - ID of a member of a list.
+* newElement - new element to insert before the given member.
+*
+* \return gOrphanElement_c if element is not part of any list.
+* gListFull_c if list is full.
+* gListOk_c if insertion was successful.
+*
+* \pre
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+listStatus_t ListAddPrevElement(listElementHandle_t element, listElementHandle_t newElement)
+{
+ if(element->list == NULL)
+ {
+ return gOrphanElement_c; /*Element was previusly removed or never added*/
+ }
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ if( (element->list->max != 0) && (element->list->max == element->list->size) )
+ {
+ OSA_ExitCritical(kCriticalDisableInt);
+ return gListFull_c;
+ }
+
+ if(element->prev == NULL) /*Element is list head*/
+ {
+ element->list->head = newElement;
+ }
+ else
+ {
+ element->prev->next = newElement;
+ }
+ newElement->list = element->list;
+ element->list->size++;
+ newElement->next = element;
+ newElement->prev = element->prev;
+ element->prev = newElement;
+
+ OSA_ExitCritical(kCriticalDisableInt);
+ return gListOk_c;
+}
+
+/*! *********************************************************************************
+* \brief Gets the current size of a list.
+*
+* \param[in] list - ID of the list.
+*
+* \return Current size of the list.
+*
+* \pre
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+uint32_t ListGetSize(listHandle_t list)
+{
+ return list->size;
+}
+
+/*! *********************************************************************************
+* \brief Gets the number of free places in the list.
+*
+* \param[in] list - ID of the list.
+*
+* \return Available size of the list.
+*
+* \pre
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+uint32_t ListGetAvailable(listHandle_t list)
+{
+ return (list->max - list->size);
+}
+
+/*! *********************************************************************************
+* \brief Creates, tests and deletes a list. Any error that occurs will trap the
+* CPU in a while(1) loop.
+*
+* \param[in] void.
+*
+* \return gListOk_c.
+*
+* \pre
+*
+* \post
+*
+* \remarks
+*
+********************************************************************************** */
+// To be removed or rewritten to remove MemManager dependency.
+#if 0
+listStatus_t ListTest()
+{
+ listHandle_t list;
+ listElementHandle_t element, newElement;
+ uint32_t i,freeBlocks;
+ const uint32_t max = 10;
+
+ freeBlocks = MEM_GetAvailableFwkBlocks(0);
+ /*create list*/
+ list = ListCreate(max);
+ LIST_ASSERT(list != NULL);
+
+ /*add elements*/
+ for(i=0; i<max; i++)
+ {
+ element = (listElementHandle_t)MEM_BufferFwkAlloc(sizeof(listElement_t));
+ LIST_ASSERT(element != NULL);
+ LIST_ASSERT(ListAddHead(list, element) == gListOk_c);
+ LIST_ASSERT(list->head == element)
+ ListRemoveHead(list);
+ LIST_ASSERT(ListAddTail(list, element) == gListOk_c);
+ LIST_ASSERT(list->tail == element);
+ if(ListGetSize(list) == 1)
+ {
+ LIST_ASSERT(list->head == element);
+ }
+ else
+ {
+ LIST_ASSERT(list->head != element);
+ }
+ }
+ LIST_ASSERT(ListGetSize(list) == max);
+
+ /*add one more element*/
+ element = (listElementHandle_t)MEM_BufferFwkAlloc(sizeof(listElement_t));
+ LIST_ASSERT(element != NULL);
+ LIST_ASSERT(ListAddTail(list, element) == gListFull_c);
+ list->max = 0;
+ LIST_ASSERT(ListAddTail(list, element) == gListOk_c);
+ LIST_ASSERT(ListGetSize(list) == max+1);
+ /*remove the extra element*/
+ element = ListRemoveHead(list);
+ LIST_ASSERT(element != NULL);
+ LIST_ASSERT(ListGetSize(list) == max);
+ LIST_ASSERT(MEM_BufferFree(element) == MEM_SUCCESS_c);
+ list->max = max;
+
+ /*parse elements*/
+ element = ListGetHead(list);
+ LIST_ASSERT(element != NULL);
+ for(i=0; i<(max-1); i++)
+ {
+ element = ListGetNext(element);
+ LIST_ASSERT(element != NULL);
+ }
+ LIST_ASSERT(element == list->tail);
+ LIST_ASSERT(ListGetNext(element) == NULL);
+
+ /*Reverse parse elements*/
+ for(i=0; i<(max-1); i++)
+ {
+ element = ListGetPrev(element);
+ LIST_ASSERT(element != NULL);
+ }
+ LIST_ASSERT(element == list->head);
+ LIST_ASSERT(ListGetPrev(element) == NULL);
+
+ /*Add prev*/
+ element = ListGetHead(list);
+ LIST_ASSERT(element != NULL);
+ newElement = (listElementHandle_t)MEM_BufferFwkAlloc(sizeof(listElement_t));
+ LIST_ASSERT(newElement != NULL);
+ LIST_ASSERT(ListAddPrevElement(element, newElement) == gListFull_c);
+ LIST_ASSERT(ListGetHead(list) == element);
+ list->max = 0;
+ LIST_ASSERT(ListAddPrevElement(element, newElement) == gListOk_c);
+ LIST_ASSERT(ListGetHead(list) == newElement);
+ newElement = (listElementHandle_t)MEM_BufferFwkAlloc(sizeof(listElement_t));
+ LIST_ASSERT(newElement != NULL);
+ element = list->head->next->next;
+ LIST_ASSERT(ListAddPrevElement(element, newElement) == gListOk_c);
+ LIST_ASSERT(list->head->next->next == newElement);
+ newElement = (listElementHandle_t)MEM_BufferFwkAlloc(sizeof(listElement_t));
+ LIST_ASSERT(newElement != NULL);
+ element = list->tail;
+ LIST_ASSERT(ListAddPrevElement(element, newElement) == gListOk_c);
+ LIST_ASSERT(list->tail->prev == newElement);
+ newElement = (listElementHandle_t)MEM_BufferFwkAlloc(sizeof(listElement_t));
+ LIST_ASSERT(newElement != NULL);
+ element = (listElementHandle_t)MEM_BufferFwkAlloc(sizeof(listElement_t));
+ LIST_ASSERT(element != NULL);
+ element->list = NULL;
+ LIST_ASSERT(ListAddPrevElement(element, newElement) == gOrphanElement_c);
+ MEM_BufferFree(newElement);
+ MEM_BufferFree(element);
+ LIST_ASSERT(ListGetSize(list) == max+3);
+
+ /*Remove element*/
+ element = ListGetHead(list);
+ LIST_ASSERT(element == list->head);
+ LIST_ASSERT(ListRemoveElement(element) == gListOk_c);
+ LIST_ASSERT(list->head != element);
+ LIST_ASSERT(ListRemoveElement(element) == gOrphanElement_c);
+ MEM_BufferFree(element);
+ element = ListGetHead(list)->next->next;
+ LIST_ASSERT(ListRemoveElement(element) == gListOk_c);
+ MEM_BufferFree(element);
+ element = list->tail;
+ LIST_ASSERT(ListRemoveElement(element) == gListOk_c);
+ LIST_ASSERT(list->tail != element);
+ MEM_BufferFree(element);
+ LIST_ASSERT(ListGetSize(list) == max);
+ list->max = max;
+
+ for(i=0; i<(max-1); i++)
+ {
+ element = ListRemoveHead(list);
+ LIST_ASSERT(element != NULL);
+ MEM_BufferFree(element);
+ }
+ element = ListGetHead(list);
+ LIST_ASSERT(element != NULL);
+ LIST_ASSERT(ListRemoveElement(element) == gListOk_c);
+ LIST_ASSERT(list->head == NULL);
+ LIST_ASSERT(list->tail == NULL);
+ LIST_ASSERT(element->list == NULL);
+ MEM_BufferFree(element);
+
+ /*List is empty here.*/
+ LIST_ASSERT(ListGetSize(list) == 0);
+ element = ListRemoveHead(list);
+ LIST_ASSERT(element == NULL);
+ element = ListGetHead(list);
+ LIST_ASSERT(element == NULL);
+
+ MEM_BufferFree(list);
+ /*Did we produce a memory leak?*/
+ LIST_ASSERT(freeBlocks == MEM_GetAvailableFwkBlocks(0));
+
+ return gListOk_c;
+}
+#else
+listStatus_t ListTest()
+{
+ return gListOk_c;
+}
+#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_CONN_FWK/Utils/GenericList/GenericList.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,110 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file GenericList.h
+* This is the header file for the linked lists part of the Utils package.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _GENERIC_LIST_H_
+#define _GENERIC_LIST_H_
+
+
+/*! *********************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+********************************************************************************** */
+
+#include "EmbeddedTypes.h"
+
+/*! *********************************************************************************
+*************************************************************************************
+* Public macro definitions
+*************************************************************************************
+********************************************************************************** */
+
+/*! *********************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+********************************************************************************** */
+typedef enum
+{
+ gListOk_c = 0,
+ gListFull_c,
+ gListEmpty_c,
+ gOrphanElement_c
+}listStatus_t;
+
+typedef struct list_tag
+{
+ struct listElement_tag *head;
+ struct listElement_tag *tail;
+ uint16_t size;
+ uint16_t max;
+}list_t, *listHandle_t;
+
+typedef struct listElement_tag
+{
+ struct listElement_tag *next;
+ struct listElement_tag *prev;
+ struct list_tag *list;
+}listElement_t, *listElementHandle_t;
+
+/*! *********************************************************************************
+*************************************************************************************
+* Public prototypes
+*************************************************************************************
+********************************************************************************** */
+void ListInit(listHandle_t list, uint32_t max);
+listHandle_t ListGetList(listElementHandle_t element);
+listStatus_t ListAddHead(listHandle_t list, listElementHandle_t element);
+listStatus_t ListAddTail(listHandle_t list, listElementHandle_t element);
+listElementHandle_t ListRemoveHead(listHandle_t list);
+listElementHandle_t ListGetHead(listHandle_t list);
+listElementHandle_t ListGetNext(listElementHandle_t element);
+listElementHandle_t ListGetPrev(listElementHandle_t element);
+listStatus_t ListRemoveElement(listElementHandle_t element);
+listStatus_t ListAddPrevElement(listElementHandle_t element, listElementHandle_t newElement);
+uint32_t ListGetSize(listHandle_t list);
+uint32_t ListGetAvailable(listHandle_t list);
+listStatus_t ListTest(void);
+
+/*! *********************************************************************************
+*************************************************************************************
+* Private macros
+*************************************************************************************
+********************************************************************************** */
+#ifdef DEBUG_ASSERT
+#define LIST_ASSERT(condition) if(!(condition))while(1);
+#else
+#define LIST_ASSERT(condition) (void)(condition);
+#endif
+
+#endif /*_GENERIC_LIST_H_*/
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/FSL_CONN_FWK/mbedAbstraction/mbedAbstraction.h Thu Jul 16 07:29:15 2015 +0000 @@ -0,0 +1,15 @@ +#ifndef __MBED_ABSTRACTION_H__ +#define __MBED_ABSTRACTION_H__ + + +#ifdef __ICCARM__ +#define OSA_EnterCritical(kCriticalDisableInt) __disable_interrupt() +#define OSA_ExitCritical(kCriticalDisableInt) __enable_interrupt() +#else +#define OSA_EnterCritical(kCriticalDisableInt) __disable_irq() +#define OSA_ExitCritical(kCriticalDisableInt) __enable_irq() +#endif + + + +#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/ASP.c Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,943 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file ASP.c
+* This is the source file for the ASP module.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+//#include "fsl_os_abstraction.h"
+
+#include "Phy.h"
+#include "PhyInterface.h"
+#include "MpmInterface.h"
+#include "AspInterface.h"
+
+#if 0
+#include "MemManager.h"
+#include "FunctionLib.h"
+#include "Panic.h"
+#endif
+
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+
+#if gFsciIncluded_c
+#include "FsciInterface.h"
+#include "FsciCommands.h"
+#include "FsciCommunication.h"
+#endif
+
+#if gAspCapability_d
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+#define mFAD_THR_ResetValue 0x82
+#define mANT_AGC_CTRL_ResetValue 0x40
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+//MCR20 DTS modes
+enum {
+ gDtsNormal_c,
+ gDtsTxOne_c,
+ gDtsTxZero_c,
+ gDtsTx2Mhz_c,
+ gDtsTx200Khz_c,
+ gDtsTx1MbpsPRBS9_c,
+ gDtsTxExternalSrc_c,
+ gDtsTxRandomSeq_c
+};
+
+/************************************************************************************
+*************************************************************************************
+* Private functions prototype
+*************************************************************************************
+************************************************************************************/
+phyStatus_t AspSetDtsMode( uint8_t mode );
+phyStatus_t AspEnableBER( void );
+void AspDisableBER( void );
+
+#if gFsciIncluded_c
+static void fsciAspReqHandler(void *pData, void* param, uint32_t interfaceId);
+static void AspSapMonitor(void *pData, void* param, uint32_t interfaceId);
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+//2405 2410 2415 2420 2425 2430 2435 2440 2445 2450 2455 2460 2465 2470 2475 2480
+static const uint16_t asp_pll_frac[16] = {0x2400, 0x4C00, 0x7400, 0x9C00, 0xC400, 0xEC00, 0x1400, 0x3C00, 0x6400, 0x8C00, 0xB400, 0xDC00, 0x0400, 0x2C00, 0x5400, 0x7C00};
+
+#if gFsciIncluded_c
+static uint8_t mAspFsciBinding[gPhyInstancesCnt_c];
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief Initialize the ASP module
+*
+* \param[in] phyInstance The instance of the PHY
+* \param[in] interfaceId The Serial Manager interface used
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 0
+void ASP_Init( instanceId_t phyInstance, uint8_t interfaceId )
+{
+#if gFsciIncluded_c
+ if( phyInstance < gPhyInstancesCnt_c )
+ {
+ mAspFsciBinding[phyInstance] = interfaceId;
+ FSCI_RegisterOpGroup( gFSCI_AppAspOpcodeGroup_c, gFsciMonitorMode_c, fsciAspReqHandler, NULL, gAspInterfaceId);
+ FSCI_RegisterOpGroup( gFSCI_AspSapId_c, gFsciMonitorMode_c, AspSapMonitor, NULL, gAspInterfaceId);
+ }
+#endif
+}
+
+/*! *********************************************************************************
+* \brief ASP SAP handler.
+*
+* \param[in] pMsg Pointer to the request message
+* \param[in] instanceId The instance of the PHY
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 1
+AspStatus_t APP_ASP_SapHandler(AppToAspMessage_t *pMsg, instanceId_t instanceId)
+{
+ AspStatus_t status = gAspSuccess_c;
+#if gFsciIncluded_c
+ FSCI_Monitor( gFSCI_AspSapId_c,
+ pMsg,
+ NULL,
+ gAspInterfaceId );
+#endif
+ switch( pMsg->msgType )
+ {
+ case aspMsgTypeGetTimeReq_c:
+ Asp_GetTimeReq((uint32_t*)&pMsg->msgData.aspGetTimeReq.time);
+ break;
+ case aspMsgTypeXcvrWriteReq_c:
+ status = Asp_XcvrWriteReq( pMsg->msgData.aspXcvrData.mode,
+ pMsg->msgData.aspXcvrData.addr,
+ pMsg->msgData.aspXcvrData.len,
+ pMsg->msgData.aspXcvrData.data);
+ break;
+ case aspMsgTypeXcvrReadReq_c:
+ status = Asp_XcvrReadReq( pMsg->msgData.aspXcvrData.mode,
+ pMsg->msgData.aspXcvrData.addr,
+ pMsg->msgData.aspXcvrData.len,
+ pMsg->msgData.aspXcvrData.data);
+ break;
+ case aspMsgTypeSetFADState_c:
+ status = Asp_SetFADState(pMsg->msgData.aspFADState);
+ break;
+ case aspMsgTypeSetFADThreshold_c:
+ status = Asp_SetFADThreshold(pMsg->msgData.aspFADThreshold);
+ break;
+ case aspMsgTypeSetANTXState_c:
+ status = Asp_SetANTXState(pMsg->msgData.aspANTXState);
+ break;
+ case aspMsgTypeGetANTXState_c:
+ *((uint8_t*)&status) = Asp_GetANTXState();
+ break;
+ case aspMsgTypeSetPowerLevel_c:
+ status = Asp_SetPowerLevel(pMsg->msgData.aspSetPowerLevelReq.powerLevel);
+ break;
+ case aspMsgTypeGetPowerLevel_c:
+ *((uint8_t*)&status) = Asp_GetPowerLevel(); //remove compiler warning
+ break;
+ case aspMsgTypeTelecSetFreq_c:
+ status = ASP_TelecSetFreq(pMsg->msgData.aspTelecsetFreq.channel);
+ break;
+ case aspMsgTypeTelecSendRawData_c:
+ status = ASP_TelecSendRawData((uint8_t*)&pMsg->msgData.aspTelecSendRawData);
+ break;
+ case aspMsgTypeTelecTest_c:
+ status = ASP_TelecTest(pMsg->msgData.aspTelecTest.mode);
+ break;
+ case aspMsgTypeSetLQIMode_c:
+ status = Asp_SetLQIMode(pMsg->msgData.aspLQIMode);
+ break;
+ case aspMsgTypeGetRSSILevel_c:
+ *((uint8_t*)&status) = Asp_GetRSSILevel(); //remove compiler warning
+ break;
+#if gMpmIncluded_d
+ case aspMsgTypeSetMpmConfig_c:
+ MPM_SetConfig(&pMsg->msgData.MpmConfig);
+ break;
+ case aspMsgTypeGetMpmConfig_c:
+ MPM_GetConfig(&pMsg->msgData.MpmConfig);
+ break;
+#endif
+ default:
+ status = gAspInvalidRequest_c;// OR gAspInvalidParameter_c
+ break;
+ }
+#if gFsciIncluded_c
+ FSCI_Monitor( gFSCI_AspSapId_c,
+ pMsg,
+ (void*)&status,
+ gAspInterfaceId );
+#endif
+ return status;
+}
+
+/*! *********************************************************************************
+* \brief Returns the current PHY time
+*
+* \param[in] time location where the PHY time will be stored
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 2
+void Asp_GetTimeReq(uint32_t *time)
+{
+ PhyTimeReadClock( time );
+}
+
+/*! *********************************************************************************
+* \brief Write XCVR registers
+*
+* \param[in] mode Direct/Indirect access
+* \param[in] addr XCVR address
+* \param[in] len number of bytes to write
+* \param[in] pData data o be written
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 3
+AspStatus_t Asp_XcvrWriteReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData)
+{
+ if (mode)
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t)addr, pData, len);
+ else
+ MCR20Drv_DirectAccessSPIMultiByteWrite((uint8_t)addr, pData, len);
+
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Read XCVR registers
+*
+* \param[in] mode Direct/Indirect access
+* \param[in] addr XCVR address
+* \param[in] len number of bytes to read
+* \param[in] pData location where data will be stored
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 4
+AspStatus_t Asp_XcvrReadReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData)
+{
+ if (mode)
+ MCR20Drv_IndirectAccessSPIMultiByteRead((uint8_t)addr, pData, len);
+ else
+ MCR20Drv_DirectAccessSPIMultiByteRead((uint8_t)addr, pData, len);
+
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set Tx output power level
+*
+* \param[in] powerLevel The new power level: 0x03-0x1F (see documentation for details)
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 5
+AspStatus_t Asp_SetPowerLevel( uint8_t powerLevel )
+{
+ if(powerLevel > gAspPowerLevel_16dBm)
+ return gAspInvalidParameter_c;
+
+ {
+ uint8_t res;
+
+ res = PhyPlmeSetPwrLevelRequest(powerLevel);
+
+ if( res == gPhySuccess_c )
+ {
+ return gAspSuccess_c;
+ }
+ else
+ {
+ return gAspDenied_c;
+ }
+ }
+}
+
+/*! *********************************************************************************
+* \brief Read the current Tx power level
+*
+* \return power level
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 6
+uint8_t Asp_GetPowerLevel()
+{
+ return MCR20Drv_DirectAccessSPIRead(PA_PWR);
+}
+
+/*! *********************************************************************************
+* \brief Set the state of Active Promiscuous functionality
+*
+* \param[in] state new state
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 7
+AspStatus_t Asp_SetActivePromState(bool_t state)
+{
+ PhySetActivePromiscuous(state);
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set the state of Fast Antenna Diversity functionality
+*
+* \param[in] state new state
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 8
+AspStatus_t Asp_SetFADState(bool_t state)
+{
+ if( gPhySuccess_c != PhyPlmeSetFADStateRequest(state) )
+ {
+ return gAspDenied_c;
+ }
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set the Fast Antenna Diversity threshold
+*
+* \param[in] threshold
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 9
+AspStatus_t Asp_SetFADThreshold(uint8_t threshold)
+{
+ if( gPhySuccess_c != PhyPlmeSetFADThresholdRequest(threshold) )
+ {
+ return gAspDenied_c;
+ }
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set the ANTX functionality
+*
+* \param[in] state
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 10
+AspStatus_t Asp_SetANTXState(bool_t state)
+{
+ if( gPhySuccess_c != PhyPlmeSetANTXStateRequest(state) )
+ {
+ return gAspDenied_c;
+ }
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Get the ANTX functionality
+*
+* \return current state
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 11
+uint8_t Asp_GetANTXState(void)
+{
+ return PhyPlmeGetANTXStateRequest();
+}
+
+/*! *********************************************************************************
+* \brief Set the ANTX pad state
+*
+* \param[in] antAB_on
+* \param[in] rxtxSwitch_on
+*
+* \return status
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 12
+uint8_t Asp_SetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on)
+{
+ return PhyPlmeSetANTPadStateRequest(antAB_on, rxtxSwitch_on);
+}
+
+/*! *********************************************************************************
+* \brief Set the ANTX pad strength
+*
+* \param[in] hiStrength
+*
+* \return status
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 13
+uint8_t Asp_SetANTPadStrengthRequest(bool_t hiStrength)
+{
+ return PhyPlmeSetANTPadStrengthRequest(hiStrength);
+}
+
+/*! *********************************************************************************
+* \brief Set the ANTX inverted pads
+*
+* \param[in] invAntA invert Ant_A pad
+* \param[in] invAntB invert Ant_B pad
+* \param[in] invTx invert Tx pad
+* \param[in] invRx invert Rx pad
+*
+* \return status
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 14
+uint8_t Asp_SetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx)
+{
+ return PhyPlmeSetANTPadInvertedRequest(invAntA, invAntB, invTx, invRx);
+}
+
+/*! *********************************************************************************
+* \brief Set the LQI mode
+*
+* \param[in] mode
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 15
+AspStatus_t Asp_SetLQIMode(bool_t mode)
+{
+ if( gPhySuccess_c != PhyPlmeSetLQIModeRequest(mode) )
+ {
+ return gAspDenied_c;
+ }
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Get the last RSSI level
+*
+* \return RSSI
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 16
+uint8_t Asp_GetRSSILevel(void)
+{
+ return PhyPlmeGetRSSILevelRequest();
+}
+
+/*! *********************************************************************************
+* \brief Set current channel
+*
+* \param[in] channel channel number (11-26)
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 17
+AspStatus_t ASP_TelecSetFreq(uint8_t channel)
+{
+ PhyPlmeForceTrxOffRequest();
+ if( gPhySuccess_c != PhyPlmeSetCurrentChannelRequest(channel,0) )
+ {
+ return gAspInvalidParameter_c;
+ }
+
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Send a raw data frame OTA
+*
+* \param[in] dataPtr raw data
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 18
+AspStatus_t ASP_TelecSendRawData(uint8_t* dataPtr)
+{
+ uint8_t phyReg;
+
+ dataPtr[0] += 2; /* Add FCS length to PSDU Length*/
+
+ // Validate the length
+ if(dataPtr[0] > gMaxPHYPacketSize_c)
+ return gAspTooLong_c;
+
+ //Force Idle
+ PhyPlmeForceTrxOffRequest();
+ AspSetDtsMode(gDtsNormal_c);
+ AspDisableBER();
+ // Load the TX PB: load the PSDU Lenght byte but not the FCS bytes
+ MCR20Drv_PB_SPIBurstWrite(dataPtr, dataPtr[0] + 1 - 2);
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set Telec test mode
+*
+* \param[in] mode Telec test mode
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 19
+AspStatus_t ASP_TelecTest(uint8_t mode)
+{
+ uint8_t phyReg;
+ static uint8_t aTxContModPattern[2];
+ uint8_t channel;
+ static bool_t fracSet = FALSE;
+
+ // Get current channel number
+ channel = PhyPlmeGetCurrentChannelRequest(0);
+
+ if( fracSet )
+ {
+ ASP_TelecSetFreq(channel);
+ fracSet = FALSE;
+ }
+
+ switch( mode )
+ {
+ case gTestForceIdle_c: //ForceIdle();
+ PhyPlmeForceTrxOffRequest();
+
+ AspSetDtsMode(gDtsNormal_c);
+ AspDisableBER();
+ break;
+
+ case gTestPulseTxPrbs9_c: // Continuously transmit a PRBS9 pattern.
+ // PLME_PRBS9_Load (); // Load the TX RAM
+ AspSetDtsMode(gDtsTxRandomSeq_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Start Tx packet mode with no interrupt on end
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousRx_c: // Sets the device into continuous RX mode
+ AspSetDtsMode(gDtsNormal_c);
+ //Enable continuous RX mode
+ AspEnableBER();
+ // Set length of data in DUAL_PAN_DWELL register
+ MCR20Drv_IndirectAccessSPIWrite(DUAL_PAN_DWELL, 127);
+ // Start Rx packet mode with no interrupt on end
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gRX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxMod_c: // Sets the device to continuously transmit a 10101010 pattern
+ AspSetDtsMode(gDtsNormal_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ //Prepare TX operation
+ aTxContModPattern[0] = 1;
+ aTxContModPattern[1] = 0xAA;
+ // Load the TX PB
+ MCR20Drv_PB_SPIBurstWrite(aTxContModPattern, aTxContModPattern[0] + 1);
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxNoMod_c: // Sets the device to continuously transmit an unmodulated CW
+ //Enable unmodulated TX
+ AspSetDtsMode(gDtsTxOne_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ MCR20Drv_DirectAccessSPIMultiByteWrite(PLL_FRAC0_LSB, (uint8_t *) &asp_pll_frac[channel - 11], 2);
+ fracSet = TRUE;
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTx2Mhz_c:
+ AspSetDtsMode(gDtsTx2Mhz_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTx200Khz_c:
+ AspSetDtsMode(gDtsTx200Khz_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTx1MbpsPRBS9_c:
+ AspSetDtsMode(gDtsTx1MbpsPRBS9_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxExternalSrc_c:
+ AspSetDtsMode(gDtsTxExternalSrc_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxNoModZero_c:
+ //Enable unmodulated TX
+ AspSetDtsMode(gDtsTxZero_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxNoModOne_c:
+ //Enable unmodulated TX
+ AspSetDtsMode(gDtsTxOne_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+ }
+
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Return the instance of the PHY associated with the FSCI interface
+*
+* \param[in] interfaceId FSCI interface
+*
+* \return insance
+*
+********************************************************************************** */
+#if gFsciIncluded_c
+#undef mFuncId_c
+#define mFuncId_c 20
+static uint32_t getPhyInstance( uint32_t interfaceId )
+{
+ uint32_t i;
+
+ for( i=0; i<gPhyInstancesCnt_c; i++ )
+ if( mAspFsciBinding[i] == interfaceId )
+ return i;
+
+ return 0;
+}
+
+/*! *********************************************************************************
+* \brief Handle ASP requests received from FSCI
+*
+* \param[in] pData monitored message
+* \param[in] param
+* \param[in] interfaceId FSCI interface
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 21
+static void fsciAspReqHandler(void *pData, void* param, uint32_t interfaceId)
+{
+ clientPacket_t *pClientPacket = ((clientPacket_t*)pData);
+ uint8_t *pMsg = pClientPacket->structured.payload;
+
+ pMsg -= sizeof(AppAspMsgType_t);
+ ((AppToAspMessage_t*)pMsg)->msgType = (AppAspMsgType_t)pClientPacket->structured.header.opCode;
+
+ APP_ASP_SapHandler( (AppToAspMessage_t*)pMsg, getPhyInstance( interfaceId ) );
+ MEM_BufferFree(pData);
+}
+
+/*! *********************************************************************************
+* \brief Monitor the ASP Requests and Responses
+*
+* \param[in] pData monitored message
+* \param[in] param
+* \param[in] interfaceId FSCI interface
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 22
+static void AspSapMonitor(void *pData, void* param, uint32_t interfaceId)
+{
+ clientPacket_t *pFsciPacket = MEM_BufferAlloc( sizeof(clientPacket_t) );
+ AppToAspMessage_t *pReq = (AppToAspMessage_t*)pData;
+ uint8_t *p;
+
+ if( NULL == pFsciPacket )
+ {
+ FSCI_Error( gFsciOutOfMessages_c, interfaceId );
+ return;
+ }
+
+ p = pFsciPacket->structured.payload;
+
+ if( NULL == param ) // Requests
+ {
+ pFsciPacket->structured.header.opGroup = gFSCI_AppAspOpcodeGroup_c;
+ pFsciPacket->structured.header.opCode = pReq->msgType;
+
+ switch( pReq->msgType )
+ {
+ case aspMsgTypeGetTimeReq_c:
+ break;
+ case aspMsgTypeXcvrWriteReq_c:
+ case aspMsgTypeXcvrReadReq_c:
+ *p++ = pReq->msgData.aspXcvrData.mode;
+ *((uint16_t*)p) = pReq->msgData.aspXcvrData.addr;
+ p += sizeof(uint16_t);
+ *p++ = pReq->msgData.aspXcvrData.len;
+ if( pReq->msgType == aspMsgTypeXcvrWriteReq_c )
+ {
+ FLib_MemCpy( p, pReq->msgData.aspXcvrData.data,
+ pReq->msgData.aspXcvrData.len );
+ p += pReq->msgData.aspXcvrData.len;
+ }
+ break;
+ case aspMsgTypeSetFADState_c:
+ FLib_MemCpy( p, &pReq->msgData.aspFADState, sizeof(pReq->msgData.aspFADState) );
+ p += sizeof(pReq->msgData.aspFADState);
+ break;
+ case aspMsgTypeSetFADThreshold_c:
+ FLib_MemCpy( p, &pReq->msgData.aspFADThreshold, sizeof(pReq->msgData.aspFADThreshold) );
+ p += sizeof(pReq->msgData.aspFADThreshold);
+ break;
+ case aspMsgTypeSetANTXState_c:
+ FLib_MemCpy( p, &pReq->msgData.aspANTXState, sizeof(pReq->msgData.aspANTXState) );
+ p += sizeof(pReq->msgData.aspANTXState);
+ break;
+ case aspMsgTypeGetANTXState_c:
+ /* Nothing to do here */
+ break;
+
+ case aspMsgTypeSetPowerLevel_c:
+ FLib_MemCpy( p, &pReq->msgData.aspSetPowerLevelReq, sizeof(pReq->msgData.aspSetPowerLevelReq) );
+ p += sizeof(pReq->msgData.aspSetPowerLevelReq);
+ break;
+ case aspMsgTypeGetPowerLevel_c:
+ /* Nothing to do here */
+ break;
+ case aspMsgTypeTelecSetFreq_c:
+ FLib_MemCpy( p, &pReq->msgData.aspTelecsetFreq, sizeof(pReq->msgData.aspTelecsetFreq) );
+ p += sizeof(pReq->msgData.aspTelecsetFreq);
+ break;
+ case aspMsgTypeTelecSendRawData_c:
+ FLib_MemCpy( p, &pReq->msgData.aspTelecSendRawData, sizeof(pReq->msgData.aspTelecSendRawData) );
+ p += sizeof(pReq->msgData.aspTelecSendRawData);
+ break;
+ case aspMsgTypeTelecTest_c:
+ FLib_MemCpy( p, &pReq->msgData.aspTelecTest, sizeof(pReq->msgData.aspTelecTest) );
+ p += sizeof(pReq->msgData.aspTelecTest);
+ break;
+ case aspMsgTypeSetLQIMode_c:
+ FLib_MemCpy(p, &pReq->msgData.aspLQIMode, sizeof(pReq->msgData.aspLQIMode) );
+ p += sizeof(pReq->msgData.aspLQIMode);
+ break;
+ case aspMsgTypeGetRSSILevel_c:
+ /* Nothing to do here */
+ break;
+ }
+ }
+ else // Confirms / Indications
+ {
+ pFsciPacket->structured.header.opGroup = gFSCI_AspAppOpcodeGroup_c;
+ pFsciPacket->structured.header.opCode = pReq->msgType;
+
+ *p++ = *((uint8_t*)param);/* copy status */
+
+ switch( pReq->msgType )
+ {
+ case aspMsgTypeGetTimeReq_c:
+ FLib_MemCpy( p, &pReq->msgData.aspGetTimeReq.time , sizeof(aspEventReq_t) );
+ p += sizeof(aspEventReq_t);
+ break;
+ case aspMsgTypeGetMpmConfig_c:
+ FLib_MemCpy( p, &pReq->msgData.MpmConfig , sizeof(mpmConfig_t) );
+ p += sizeof(mpmConfig_t);
+ break;
+ case aspMsgTypeXcvrReadReq_c:
+ *p++ = pReq->msgData.aspXcvrData.len; /* copy length */
+ FLib_MemCpy( p, pReq->msgData.aspXcvrData.data, pReq->msgData.aspXcvrData.len );
+ p += pReq->msgData.aspXcvrData.len;
+ break;
+ }
+
+ }
+
+ /* Send data over the serial interface */
+ pFsciPacket->structured.header.len = (fsciLen_t)(p - pFsciPacket->structured.payload);
+
+ if ( pFsciPacket->structured.header.len )
+ FSCI_transmitFormatedPacket( pFsciPacket, interfaceId );
+ else
+ MEM_BufferFree( pFsciPacket );
+}
+
+#endif /* gFsciIncluded_c */
+
+
+ /*! *********************************************************************************
+* \brief Set the Tx data source selector
+*
+* \param[in] mode
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+phyStatus_t AspSetDtsMode(uint8_t mode)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(TX_MODE_CTRL);
+ phyReg &= ~cTX_MODE_CTRL_DTS_MASK; // Clear DTS_MODE
+ phyReg |= mode; // Set new DTS_MODE
+ MCR20Drv_IndirectAccessSPIWrite(TX_MODE_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Enable XCVR test mode
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+phyStatus_t AspEnableBER()
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(DTM_CTRL1);
+ phyReg |= cDTM_CTRL1_DTM_EN;
+ MCR20Drv_IndirectAccessSPIWrite(DTM_CTRL1, phyReg);
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(TESTMODE_CTRL);
+ phyReg |= cTEST_MODE_CTRL_CONTINUOUS_EN | cTEST_MODE_CTRL_IDEAL_PFC_EN;
+ MCR20Drv_IndirectAccessSPIWrite(TESTMODE_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Disable XCVR test mode
+*
+********************************************************************************** */
+void AspDisableBER()
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(DTM_CTRL1);
+ phyReg &= ~cDTM_CTRL1_DTM_EN;
+ MCR20Drv_IndirectAccessSPIWrite(DTM_CTRL1, phyReg);
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(TESTMODE_CTRL);
+ phyReg &= ~(cTEST_MODE_CTRL_CONTINUOUS_EN | cTEST_MODE_CTRL_IDEAL_PFC_EN);
+ MCR20Drv_IndirectAccessSPIWrite(TESTMODE_CTRL, phyReg);
+}
+
+
+#endif /* gAspCapability_d */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/AspInterface.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,358 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file ASP.h
+* This is a header file for the ASP module.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef __ASP_H__
+#define __ASP_H__
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+//#include "fsl_os_abstraction.h"
+#include "PhyInterface.h"
+#include "MpmInterface.h"
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+/* Enable/Disable the ASP module */
+#ifndef gAspCapability_d
+#ifndef gPHY_802_15_4g_d
+#define gAspCapability_d (1)
+#else
+#define gAspCapability_d (0)
+#endif // gPHY_802_15_4g_d
+#endif // gAspCapability_d
+
+#define gAspInterfaceId (0)
+
+/* Allowed ASP Power Levels */
+#define gAspPowerLevel_m40dBm_c (uint8_t)gAspPowerLevel_m40dBm
+#define gAspPowerLevel_m38dBm_c (uint8_t)gAspPowerLevel_m38dBm
+#define gAspPowerLevel_m36dBm_c (uint8_t)gAspPowerLevel_m36dBm
+#define gAspPowerLevel_m34dBm_c (uint8_t)gAspPowerLevel_m34dBm
+#define gAspPowerLevel_m32dBm_c (uint8_t)gAspPowerLevel_m32dBm
+#define gAspPowerLevel_m30dBm_c (uint8_t)gAspPowerLevel_m30dBm
+#define gAspPowerLevel_m28dBm_c (uint8_t)gAspPowerLevel_m28dBm
+#define gAspPowerLevel_m26dBm_c (uint8_t)gAspPowerLevel_m26dBm
+#define gAspPowerLevel_m24dBm_c (uint8_t)gAspPowerLevel_m24dBm
+#define gAspPowerLevel_m22dBm_c (uint8_t)gAspPowerLevel_m22dBm
+#define gAspPowerLevel_m20dBm_c (uint8_t)gAspPowerLevel_m20dBm
+#define gAspPowerLevel_m18dBm_c (uint8_t)gAspPowerLevel_m18dBm
+#define gAspPowerLevel_m16dBm_c (uint8_t)gAspPowerLevel_m16dBm
+#define gAspPowerLevel_m14dBm_c (uint8_t)gAspPowerLevel_m14dBm
+#define gAspPowerLevel_m12dBm_c (uint8_t)gAspPowerLevel_m12dBm
+#define gAspPowerLevel_m10dBm_c (uint8_t)gAspPowerLevel_m10dBm
+#define gAspPowerLevel_m8dBm_c (uint8_t)gAspPowerLevel_m8dBm
+#define gAspPowerLevel_m6dBm_c (uint8_t)gAspPowerLevel_m6dBm
+#define gAspPowerLevel_m4dBm_c (uint8_t)gAspPowerLevel_m4dBm
+#define gAspPowerLevel_m2dBm_c (uint8_t)gAspPowerLevel_m2dBm
+#define gAspPowerLevel_0dBm_c (uint8_t)gAspPowerLevel_0dBm
+#define gAspPowerLevel_2dBm_c (uint8_t)gAspPowerLevel_2dBm
+#define gAspPowerLevel_4dBm_c (uint8_t)gAspPowerLevel_4dBm
+#define gAspPowerLevel_6dBm_c (uint8_t)gAspPowerLevel_6dBm
+#define gAspPowerLevel_8dBm_c (uint8_t)gAspPowerLevel_8dBm
+#define gAspPowerLevel_10dBm_c (uint8_t)gAspPowerLevel_10dBm
+#define gAspPowerLevel_12dBm_c (uint8_t)gAspPowerLevel_12dBm
+#define gAspPowerLevel_14dBm_c (uint8_t)gAspPowerLevel_14dBm
+#define gAspPowerLevel_16dBm_c (uint8_t)gAspPowerLevel_16dBm
+
+/* OpGroup codes used with FSCI */
+#define gFSCI_AspAppOpcodeGroup_c 0x94 /* ASP_APP_SapHandler */
+#define gFSCI_AppAspOpcodeGroup_c 0x95 /* APP_ASP_SapHandler */
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+/* ASP status messages */
+typedef enum{
+ gAspSuccess_c = 0x00,
+ gAspInvalidRequest_c = 0xC2,
+ gAspDenied_c = 0xE2,
+ gAspTooLong_c = 0xE5,
+ gAspInvalidParameter_c = 0xE8
+}AspStatus_t;
+
+/* Supported Power Levels */
+enum {
+ gAspPowerLevel_m40dBm = 0x03,
+ gAspPowerLevel_m38dBm = 0x04,
+ gAspPowerLevel_m36dBm = 0x05,
+ gAspPowerLevel_m34dBm = 0x06,
+ gAspPowerLevel_m32dBm = 0x07,
+ gAspPowerLevel_m30dBm = 0x08,
+ gAspPowerLevel_m28dBm = 0x09,
+ gAspPowerLevel_m26dBm = 0x0A,
+ gAspPowerLevel_m24dBm = 0x0B,
+ gAspPowerLevel_m22dBm = 0x0C,
+ gAspPowerLevel_m20dBm = 0x0D,
+ gAspPowerLevel_m18dBm = 0x0E,
+ gAspPowerLevel_m16dBm = 0x0F,
+ gAspPowerLevel_m14dBm = 0x10,
+ gAspPowerLevel_m12dBm = 0x11,
+ gAspPowerLevel_m10dBm = 0x12,
+ gAspPowerLevel_m8dBm = 0x13,
+ gAspPowerLevel_m6dBm = 0x14,
+ gAspPowerLevel_m4dBm = 0x15,
+ gAspPowerLevel_m2dBm = 0x16,
+ gAspPowerLevel_0dBm = 0x17,
+ gAspPowerLevel_2dBm = 0x18,
+ gAspPowerLevel_4dBm = 0x19,
+ gAspPowerLevel_6dBm = 0x1A,
+ gAspPowerLevel_8dBm = 0x1B,
+ gAspPowerLevel_10dBm = 0x1C,
+ gAspPowerLevel_12dBm = 0x1D,
+ gAspPowerLevel_14dBm = 0x1E,
+ gAspPowerLevel_16dBm = 0x1F
+};
+
+/* Radio test modes */
+enum {
+ gTestForceIdle_c = 0,
+ gTestPulseTxPrbs9_c = 1,
+ gTestContinuousRx_c = 2,
+ gTestContinuousTxMod_c = 3,
+ gTestContinuousTxNoMod_c = 4,
+ gTestContinuousTx2Mhz_c = 5,
+ gTestContinuousTx200Khz_c = 6,
+ gTestContinuousTx1MbpsPRBS9_c = 7,
+ gTestContinuousTxExternalSrc_c = 8,
+ gTestContinuousTxNoModZero_c = 9,
+ gTestContinuousTxNoModOne_c = 10
+};
+
+/* This enum matches with the FSCI OpCode used by ASP*/
+typedef enum {
+ aspMsgTypeGetTimeReq_c = 0x00,
+ aspMsgTypeGetInactiveTimeReq_c = 0x01,
+ aspMsgTypeGetMacStateReq_c = 0x02,
+ aspMsgTypeDozeReq_c = 0x03,
+ aspMsgTypeAutoDozeReq_c = 0x04,
+ aspMsgTypeAcomaReq_c = 0x05,
+ aspMsgTypeHibernateReq_c = 0x06,
+ aspMsgTypeWakeReq_c = 0x07,
+ aspMsgTypeEventReq_c = 0x08,
+ aspMsgTypeClkoReq_c = 0x09,
+ aspMsgTypeTrimReq_c = 0x0A,
+ aspMsgTypeDdrReq_c = 0x0B,
+ aspMsgTypePortReq_c = 0x0C,
+ aspMsgTypeSetMinDozeTimeReq_c = 0x0D,
+ aspMsgTypeSetNotifyReq_c = 0x0E,
+ aspMsgTypeSetPowerLevel_c = 0x0F,
+ aspMsgTypeGetPowerLevel_c = 0x1F,
+ aspMsgTypeTelecTest_c = 0x10,
+ aspMsgTypeTelecSetFreq_c = 0x11,
+ aspMsgTypeGetInactiveTimeCnf_c = 0x12,
+ aspMsgTypeGetMacStateCnf_c = 0x13,
+ aspMsgTypeDozeCnf_c = 0x14,
+ aspMsgTypeAutoDozeCnf_c = 0x15,
+ aspMsgTypeTelecSendRawData_c = 0x16,
+ aspMsgTypeSetFADState_c = 0x17,
+ aspMsgTypeSetFADThreshold_c = 0x18,
+ aspMsgTypeGetFADThreshold_c = 0x19,
+ aspMsgTypeGetFADState_c = 0x1A,
+ aspMsgTypeSetActivePromState_c = 0x1B,
+ aspMsgTypeXcvrWriteReq_c = 0x1C,
+ aspMsgTypeXcvrReadReq_c = 0x1D,
+ aspMsgTypeSetANTXState_c = 0x20,
+ aspMsgTypeGetANTXState_c = 0x21,
+ aspMsgTypeSetLQIMode_c = 0x22,
+ aspMsgTypeGetRSSILevel_c = 0x23,
+ aspMsgTypeSetMpmConfig_c = 0x24,
+ aspMsgTypeGetMpmConfig_c = 0x25
+}AppAspMsgType_t;
+
+typedef PACKED_STRUCT aspEventReq_tag
+{ /* AspEvent.Request */
+ uint32_t eventTime;
+} aspEventReq_t;
+
+typedef PACKED_STRUCT aspGetTimeReq_tag
+{ /* AspGetTime.Request */
+ uint32_t time;
+} aspGetTimeReq_t;
+
+typedef PACKED_STRUCT aspSetNotifyReq_tag
+{ /* AspSetNotify.Request */
+ uint8_t notifications;
+} aspSetNotifyReq_t;
+
+
+typedef PACKED_STRUCT aspSetPowerLevelReq_tag
+{ /* AspSetPowerLevel.Request */
+ uint8_t powerLevel;
+} aspSetPowerLevelReq_t;
+
+
+typedef PACKED_STRUCT aspGetPowerLevelReq_tag
+{ /* AspGetPowerLevel.Request */
+ uint8_t powerLevel;
+} aspGetPowerLevelReq_t;
+
+
+typedef PACKED_STRUCT aspTelecTest_tag
+{ /* AspTelecTest.Request */
+ uint8_t mode;
+} aspTelecTest_t;
+
+
+typedef PACKED_STRUCT aspTelecsetFreq_tag
+{ /* AspTelecSetFreq.Request */
+ uint8_t channel;
+} aspTelecsetFreq_t;
+
+
+typedef PACKED_STRUCT aspTelecSendRawData_tag
+{ /* AspTelecSendRawData.Request */
+ uint8_t length;
+ uint8_t* dataPtr;
+} aspTelecSendRawData_t;
+
+ /* AspSetFADThreshold.Request */
+typedef uint8_t aspFADThreshold_t;
+ /* AspSetLQIMode.Request */
+typedef uint8_t aspLQIMode_t;
+
+typedef PACKED_STRUCT aspXcvrReq_tag
+{ /* AspXcvrWrite.Request / AspXcvrRead.Request */
+ uint8_t mode;
+ uint16_t addr;
+ uint8_t len;
+ uint8_t data[4]; /* more than 4 bytes can be read/written */
+} aspXcvrReq_t;
+
+
+typedef PACKED_STRUCT AppToAspMessage_tag
+{
+ AppAspMsgType_t msgType;
+ PACKED_UNION
+ {
+ aspEventReq_t aspEventReq;
+ aspGetTimeReq_t aspGetTimeReq;
+ aspSetPowerLevelReq_t aspSetPowerLevelReq;
+ aspGetPowerLevelReq_t aspGetPowerLevelReq;
+ aspTelecTest_t aspTelecTest;
+ aspTelecsetFreq_t aspTelecsetFreq;
+ aspTelecSendRawData_t aspTelecSendRawData;
+ aspFADThreshold_t aspFADThreshold;
+ bool_t aspFADState;
+ bool_t aspANTXState;
+ aspLQIMode_t aspLQIMode;
+ bool_t aspActivePromState;
+ aspXcvrReq_t aspXcvrData;
+ mpmConfig_t MpmConfig;
+ }msgData;
+} AppToAspMessage_t;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+#if gAspCapability_d
+
+void ASP_Init( instanceId_t phyInstance, uint8_t interfaceId );
+
+AspStatus_t APP_ASP_SapHandler(AppToAspMessage_t *pMsg, instanceId_t instanceId);
+
+void Asp_GetTimeReq(uint32_t *time);
+
+AspStatus_t Asp_XcvrWriteReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData);
+AspStatus_t Asp_XcvrReadReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData);
+
+AspStatus_t Asp_SetPowerLevel(uint8_t powerLevel);
+uint8_t Asp_GetPowerLevel(void);
+
+AspStatus_t Asp_SetActivePromState(bool_t state);
+
+AspStatus_t Asp_SetFADState(bool_t state);
+AspStatus_t Asp_SetFADThreshold(uint8_t thresholdFAD);
+
+AspStatus_t Asp_SetANTXState(bool_t state);
+uint8_t Asp_GetANTXState(void);
+uint8_t Asp_SetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on);
+uint8_t Asp_SetANTPadStrengthRequest(bool_t hiStrength);
+uint8_t Asp_SetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx);
+
+AspStatus_t Asp_SetLQIMode(bool_t mode);
+uint8_t Asp_GetRSSILevel(void);
+
+AspStatus_t ASP_TelecSetFreq (uint8_t channel);
+AspStatus_t ASP_TelecSendRawData(uint8_t* dataPtr);
+AspStatus_t ASP_TelecTest (uint8_t mode);
+
+#else /* gAspCapability_d */
+
+#define ASP_Init(phyInstance,interfaceId)
+#define Asp_GetTimeReq(time)
+
+#define APP_ASP_SapHandler(pMsg) (gAspDenied_c)
+#define Asp_XcvrWriteReq(mode, addr, len, pData) (gAspDenied_c)
+#define Asp_XcvrReadReq(mode, addr, len, pData) (gAspDenied_c)
+#define Asp_SetPowerLevel(powerLevel) (gAspDenied_c)
+#define Asp_SetActivePromState(state) (gAspDenied_c)
+#define Asp_SetFADState(state) (gAspDenied_c)
+#define Asp_SetFADThreshold(thresholdFAD) (gAspDenied_c)
+#define Asp_SetANTXState(state) (gAspDenied_c)
+#define Asp_SetLQIMode(mode) (gAspDenied_c)
+#define ASP_TelecSetFreq(channel) (gAspDenied_c)
+#define ASP_TelecSendRawData(dataPtr) (gAspDenied_c)
+#define ASP_TelecTest(mode) (gAspDenied_c)
+
+#define Asp_GetPowerLevel() (0)
+#define Asp_GetANTXState() (0)
+#define Asp_GetRSSILevel() (0)
+#endif /* gAspCapability_d */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__ASP_H__ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/MCR20Drv/MCR20Drv.c Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,735 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MCR20Drv.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/*****************************************************************************
+* INCLUDED HEADERS *
+*---------------------------------------------------------------------------*
+* Add to this section all the headers that this module needs to include. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+
+#include "XcvrSpi.h"
+
+/*****************************************************************************
+* PRIVATE VARIABLES *
+*---------------------------------------------------------------------------*
+* Add to this section all the variables and constants that have local *
+* (file) scope. *
+* Each of this declarations shall be preceded by the 'static' keyword. *
+* These variables / constants cannot be accessed outside this module. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+static uint32_t mPhyIrqDisableCnt = 1;
+
+/*****************************************************************************
+* PUBLIC VARIABLES *
+*---------------------------------------------------------------------------*
+* Add to this section all the variables and constants that have global *
+* (project) scope. *
+* These variables / constants can be accessed outside this module. *
+* These variables / constants shall be preceded by the 'extern' keyword in *
+* the interface header. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+/*****************************************************************************
+* PRIVATE FUNCTIONS PROTOTYPES *
+*---------------------------------------------------------------------------*
+* Add to this section all the functions prototypes that have local (file) *
+* scope. *
+* These functions cannot be accessed outside this module. *
+* These declarations shall be preceded by the 'static' keyword. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+/*****************************************************************************
+* PRIVATE FUNCTIONS *
+*---------------------------------------------------------------------------*
+* Add to this section all the functions that have local (file) scope. *
+* These functions cannot be accessed outside this module. *
+* These definitions shall be preceded by the 'static' keyword. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+
+/*****************************************************************************
+* PUBLIC FUNCTIONS *
+*---------------------------------------------------------------------------*
+* Add to this section all the functions that have global (project) scope. *
+* These functions can be accessed outside this module. *
+* These functions shall have their declarations (prototypes) within the *
+* interface header file and shall be preceded by the 'extern' keyword. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_Init
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_Init
+(
+void
+)
+{
+ spi_master_init(gXcvrSpiInstance_c);
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrDeassertCS_d();
+ MCR20Drv_RST_B_Deassert();
+ //MCR20Drv_RESET();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_DirectAccessSPIWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_DirectAccessSPIWrite
+(
+uint8_t address,
+uint8_t value
+)
+{
+ uint16_t txData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (address & TransceiverSPI_DirectRegisterAddressMask);
+ txData |= value << 8;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t *)&txData, NULL, sizeof(txData));
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_DirectAccessSPIMultiByteWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_DirectAccessSPIMultiByteWrite
+(
+uint8_t startAddress,
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint8_t txData;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (startAddress & TransceiverSPI_DirectRegisterAddressMask);
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, byteArray, NULL, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_PB_SPIByteWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_PB_SPIByteWrite
+(
+uint8_t address,
+uint8_t value
+)
+{
+ uint32_t txData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_WriteSelect |
+ TransceiverSPI_PacketBuffAccessSelect |
+ TransceiverSPI_PacketBuffByteModeSelect;
+ txData |= (address) << 8;
+ txData |= (value) << 16;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, 3);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_PB_SPIBurstWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_PB_SPIBurstWrite
+(
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint8_t txData;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_WriteSelect |
+ TransceiverSPI_PacketBuffAccessSelect |
+ TransceiverSPI_PacketBuffBurstModeSelect;
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, 1);
+ spi_master_transfer(gXcvrSpiInstance_c, byteArray, NULL, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_DirectAccessSPIRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+
+uint8_t MCR20Drv_DirectAccessSPIRead
+(
+uint8_t address
+)
+{
+ uint8_t txData;
+ uint8_t rxData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (address & TransceiverSPI_DirectRegisterAddressMask) |
+ TransceiverSPI_ReadSelect;
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, &rxData, sizeof(rxData));
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+
+ return rxData;
+
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_DirectAccessSPIMultyByteRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint8_t MCR20Drv_DirectAccessSPIMultiByteRead
+(
+uint8_t startAddress,
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint8_t txData;
+ uint8_t phyIRQSTS1;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return 0;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (startAddress & TransceiverSPI_DirectRegisterAddressMask) |
+ TransceiverSPI_ReadSelect;
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, &phyIRQSTS1, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+
+ return phyIRQSTS1;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_PB_SPIBurstRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint8_t MCR20Drv_PB_SPIBurstRead
+(
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint8_t txData;
+ uint8_t phyIRQSTS1;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return 0;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_ReadSelect |
+ TransceiverSPI_PacketBuffAccessSelect |
+ TransceiverSPI_PacketBuffBurstModeSelect;
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, &phyIRQSTS1, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+
+ return phyIRQSTS1;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IndirectAccessSPIWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IndirectAccessSPIWrite
+(
+uint8_t address,
+uint8_t value
+)
+{
+ uint32_t txData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_IARIndexReg;
+ txData |= (address) << 8;
+ txData |= (value) << 16;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, 3);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IndirectAccessSPIMultiByteWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IndirectAccessSPIMultiByteWrite
+(
+uint8_t startAddress,
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint16_t txData;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_IARIndexReg;
+ txData |= (startAddress) << 8;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)byteArray, NULL, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IndirectAccessSPIRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint8_t MCR20Drv_IndirectAccessSPIRead
+(
+uint8_t address
+)
+{
+ uint16_t txData;
+ uint8_t rxData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_IARIndexReg | TransceiverSPI_ReadSelect;
+ txData |= (address) << 8;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, &rxData, sizeof(rxData));
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+
+ return rxData;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IndirectAccessSPIMultiByteRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IndirectAccessSPIMultiByteRead
+(
+uint8_t startAddress,
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint16_t txData;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (TransceiverSPI_IARIndexReg | TransceiverSPI_ReadSelect);
+ txData |= (startAddress) << 8;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_PortConfig
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IRQ_PortConfig
+(
+void
+)
+{
+#if 0
+ PORT_HAL_SetMuxMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)],
+ GPIO_EXTRACT_PIN(kGpioXcvrIrqPin),
+ kPortMuxAsGpio);
+ GPIO_DRV_InputPinInit(&mXcvrIrqPinCfg);
+#endif
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IsIrqPending
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint32_t MCR20Drv_IsIrqPending
+(
+void
+)
+{
+ if( !RF_isIRQ_Pending() )
+ {
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_Disable
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IRQ_Disable
+(
+void
+)
+{
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ if( mPhyIrqDisableCnt == 0 )
+ {
+ RF_IRQ_Disable();
+ }
+
+ mPhyIrqDisableCnt++;
+
+ OSA_ExitCritical(kCriticalDisableInt);
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_Enable
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IRQ_Enable
+(
+void
+)
+{
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ if( mPhyIrqDisableCnt )
+ {
+ mPhyIrqDisableCnt--;
+
+ if( mPhyIrqDisableCnt == 0 )
+ {
+ RF_IRQ_Enable();
+ }
+ }
+
+ OSA_ExitCritical(kCriticalDisableInt);
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_IsEnabled
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint32_t MCR20Drv_IRQ_IsEnabled
+(
+void
+)
+{
+
+#if 0
+ port_interrupt_config_t mode;
+
+ mode = PORT_HAL_GetPinIntMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)],
+ GPIO_EXTRACT_PIN(kGpioXcvrIrqPin));
+ return (mode != kPortIntDisabled);
+#endif
+ return 1;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_Clear
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IRQ_Clear
+(
+void
+)
+{
+ //GPIO_DRV_ClearPinIntFlag(kGpioXcvrIrqPin);
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_RST_Assert
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_RST_B_Assert
+(
+void
+)
+{
+ RF_RST_Set(0);
+ //GPIO_DRV_ClearPinOutput(kGpioXcvrResetPin);
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_RST_Deassert
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_RST_B_Deassert
+(
+void
+)
+{
+ RF_RST_Set(1);
+ //GPIO_DRV_SetPinOutput(kGpioXcvrResetPin);
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_SoftRST_Assert
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_SoftRST_Assert
+(
+void
+)
+{
+ MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x80));
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_SoftRST_Deassert
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_SoftRST_Deassert
+(
+void
+)
+{
+ MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x00));
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_Soft_RESET
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_Soft_RESET
+(
+void
+)
+{
+ //assert SOG_RST
+ MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x80));
+
+ //deassert SOG_RST
+ MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x00));
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_RESET
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_RESET
+(
+void
+)
+{
+ volatile uint32_t delay = 1000;
+ //assert RST_B
+ MCR20Drv_RST_B_Assert();
+
+ // TODO
+ while(delay--);
+
+ //deassert RST_B
+ MCR20Drv_RST_B_Deassert();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_Set_CLK_OUT_Freq
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_Set_CLK_OUT_Freq
+(
+uint8_t freqDiv
+)
+{
+ uint8_t clkOutCtrlReg = (freqDiv & cCLK_OUT_DIV_Mask) | cCLK_OUT_EN | cCLK_OUT_EXTEND;
+
+ if(freqDiv == gCLK_OUT_FREQ_DISABLE)
+ {
+ clkOutCtrlReg = (cCLK_OUT_EXTEND | gCLK_OUT_FREQ_4_MHz); //reset value with clock out disabled
+ }
+
+ MCR20Drv_DirectAccessSPIWrite((uint8_t) CLK_OUT_CTRL, clkOutCtrlReg);
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/FSL_IEEE_802_15_4/PHY/MCR20Drv/MCR20Drv.h Thu Jul 16 07:29:15 2015 +0000 @@ -0,0 +1,406 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file MCR20Drv.h +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef __MCR20_DRV_H__ +#define __MCR20_DRV_H__ + + +/***************************************************************************** + * INCLUDED HEADERS * + *---------------------------------------------------------------------------* + * Add to this section all the headers that this module needs to include. * + * Note that it is not a good practice to include header files into header * + * files, so use this section only if there is no other better solution. * + *---------------------------------------------------------------------------* + *****************************************************************************/ + +#include "EmbeddedTypes.h" +#include "mbedAbstraction.h" + +/***************************************************************************** + * PRIVATE MACROS * + *---------------------------------------------------------------------------* + * Add to this section all the access macros, registers mappings, bit access * + * macros, masks, flags etc ... + *---------------------------------------------------------------------------* + *****************************************************************************/ +#ifndef gMCR20_ClkOutFreq_d +#define gMCR20_ClkOutFreq_d gCLK_OUT_FREQ_4_MHz +#endif + +/***************************************************************************** + * PUBLIC FUNCTIONS * + *---------------------------------------------------------------------------* + * Add to this section all the global functions prototype preceded (as a * + * good practice) by the keyword 'extern' * + *---------------------------------------------------------------------------* + *****************************************************************************/ + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_Init + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +extern void MCR20Drv_Init +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_SPI_DMA_Init + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_SPI_DMA_Init +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_Start_PB_DMA_SPI_Write + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_Start_PB_DMA_SPI_Write +( + uint8_t * srcAddress, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_Start_PB_DMA_SPI_Read + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_Start_PB_DMA_SPI_Read +( + uint8_t * dstAddress, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_DirectAccessSPIWrite + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_DirectAccessSPIWrite +( + uint8_t address, + uint8_t value +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_DirectAccessSPIMultiByteWrite + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_DirectAccessSPIMultiByteWrite +( + uint8_t startAddress, + uint8_t * byteArray, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_PB_SPIBurstWrite + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_PB_SPIBurstWrite +( + uint8_t * byteArray, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_DirectAccessSPIRead + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +uint8_t MCR20Drv_DirectAccessSPIRead +( + uint8_t address +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_DirectAccessSPIMultyByteRead + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ + +uint8_t MCR20Drv_DirectAccessSPIMultiByteRead +( + uint8_t startAddress, + uint8_t * byteArray, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_PB_SPIByteWrite + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_PB_SPIByteWrite +( + uint8_t address, + uint8_t value +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_PB_SPIBurstRead + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +uint8_t MCR20Drv_PB_SPIBurstRead +( + uint8_t * byteArray, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IndirectAccessSPIWrite + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_IndirectAccessSPIWrite +( + uint8_t address, + uint8_t value +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IndirectAccessSPIMultiByteWrite + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_IndirectAccessSPIMultiByteWrite +( + uint8_t startAddress, + uint8_t * byteArray, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IndirectAccessSPIRead + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +uint8_t MCR20Drv_IndirectAccessSPIRead +( + uint8_t address +); +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IndirectAccessSPIMultiByteRead + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_IndirectAccessSPIMultiByteRead +( + uint8_t startAddress, + uint8_t * byteArray, + uint8_t numOfBytes +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IRQ_PortConfig + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_IRQ_PortConfig +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IsIrqPending + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +uint32_t MCR20Drv_IsIrqPending +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IRQ_Disable + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_IRQ_Disable +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IRQ_Enable + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_IRQ_Enable +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IRQ_IsEnabled + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +uint32_t MCR20Drv_IRQ_IsEnabled +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_IRQ_Clear + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_IRQ_Clear +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_RST_PortConfig + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_RST_B_PortConfig +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_RST_Assert + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_RST_B_Assert +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_RST_Deassert + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_RST_B_Deassert +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_SoftRST_Assert + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_SoftRST_Assert +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_SoftRST_Deassert + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_SoftRST_Deassert +( + void +); + + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_RESET + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_RESET +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_Soft_RESET + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_Soft_RESET +( + void +); + +/*--------------------------------------------------------------------------- + * Name: MCR20Drv_Set_CLK_OUT_Freq + * Description: - + * Parameters: - + * Return: - + *---------------------------------------------------------------------------*/ +void MCR20Drv_Set_CLK_OUT_Freq +( + uint8_t freqDiv +); + +#define ProtectFromMCR20Interrupt() MCR20Drv_IRQ_Disable() +#define UnprotectFromMCR20Interrupt() MCR20Drv_IRQ_Enable() + +#endif /* __MCR20_DRV_H__ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/MCR20Drv/MCR20Overwrites.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,309 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MCR20Overwrites.h
+* Description: Overwrites header file for MCR20 Register values
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef OVERWRITES_H_
+#define OVERWRITES_H_
+
+typedef struct overwrites_tag {
+ char address;
+ char data;
+}overwrites_t;
+
+
+/*****************************************************************************************************************/
+// This file is created exclusively for use with the transceiver 2.0 silicon
+// and is provided for the world to use. It contains a list of all
+// known overwrite values. Overwrite values are non-default register
+// values that configure the transceiver device to a more optimally performing
+// posture. It is expected that low level software (i.e. PHY) will
+// consume this file as a #include, and transfer the contents to the
+// the indicated addresses in the transceiver's memory space. This file has
+// at least one required entry, that being its own version current version
+// number, to be stored at transceiver's location 0x3B the
+// OVERWRITES_VERSION_NUMBER register. The RAM register is provided in
+// the transceiver address space to assist in future debug efforts. The
+// analyst may read this location (once device has been booted with
+// mysterious software) and have a good indication of what register
+// overwrites were performed (with all versions of the overwrites.h file
+// being archived forever at the Compass location shown above.
+//
+// The transceiver has an indirect register (IAR) space. Write access to this space
+// requires 3 or more writes:
+// 1st) the first write is an index value to the indirect (write Bit7=0, register access Bit 6=0) + 0x3E
+// 2nd) IAR Register #0x00 - 0xFF.
+// 3rd) The data to write
+// nth) Burst mode additional data if required.
+//
+// Write access to direct space requires only a single address, data pair.
+
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x0C}, //version 0C: new value for ACKDELAY targeting 198us (23 May, 2013, Larry Roshak)
+{0x23, 0x17} //PA_PWR new default Power Step is "23"
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
+{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
+{0x52, 0x55}, //AGC_THR1 RSSI tune up
+{0x53, 0x2D}, //AGC_THR2 RSSI tune up
+{0x66, 0x5F}, //ATT_RSSI1 tune up
+{0x67, 0x8F}, //ATT_RSSI2 tune up
+{0x68, 0x61}, //RSSI_OFFSET
+{0x78, 0x03}, //CHF_PMAGAIN
+{0x22, 0x50}, //CCA1_THRESH
+{0x4D, 0x13}, //CORR_NVAL moved from 0x14 to 0x13 for 0.5 dB improved Rx Sensitivity
+{0x39, 0x3D} //ACKDELAY new value targeting a delay of 198us (23 May, 2013, Larry Roshak)
+};
+
+
+/* begin of deprecated versions
+
+==VERSION 1==
+(version 1 is empty)
+
+==VERSION 2==
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02} //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+};
+
+==VERSION 3==
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1: override VCOALC_REF_TX to 3
+{0x92, 0x07} //VCO_CTRL2: override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+};
+
+==VERSION 4==
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x04} //version 04 is the current version: update PA_COILTUNING default
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1: override VCOALC_REF_TX to 3
+{0x92, 0x07} //VCO_CTRL2: override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71} //PA_TUNING: override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+};
+
+==VERSION 5==
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x05} //version 05: updates Channel Filter Register set (21 Dec 2012, on behalf of S. Soca)
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
+{0x92, 0x07} //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71} //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+{0x79, 0x2F} //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7A, 0x2F} //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7B, 0x24} //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7C, 0x24} //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7D, 0x24} //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7E, 0x24} //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x82, 0x24} //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x83, 0x24} //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7F, 0x32} //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x80, 0x1D} //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x81, 0x2D} //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+};
+
+==VERSION 6==
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x06} //version 06: disable PA calibration
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
+{0x92, 0x07} //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71} //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+{0x79, 0x2F} //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7A, 0x2F} //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7B, 0x24} //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7C, 0x24} //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7D, 0x24} //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7E, 0x24} //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x82, 0x24} //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x83, 0x24} //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7F, 0x32} //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x80, 0x1D} //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x81, 0x2D} //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x64, 0x28} //PA_CAL_DIS=1 Disabled PA calibration
+};
+
+==VERSION 7==
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x07} //version 07: updated registers for ED/RSSI
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
+{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
+{0x52, 0x73}, //AGC_THR1 RSSI tune up
+{0x53, 0x2D}, //AGC_THR2 RSSI tune up
+{0x66, 0x5F}, //ATT_RSSI1 tune up
+{0x67, 0x8F}, //ATT_RSSI2 tune up
+{0x68, 0x60}, //RSSI_OFFSET
+{0x69, 0x65} //RSSI_SLOPE
+};
+
+
+==VERSION 8==
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x08} //version 08: updated registers for ED/RSSI
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
+{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
+{0x52, 0x73}, //AGC_THR1 RSSI tune up
+{0x53, 0x2D}, //AGC_THR2 RSSI tune up
+{0x66, 0x5F}, //ATT_RSSI1 tune up
+{0x67, 0x8F}, //ATT_RSSI2 tune up
+{0x69, 0x65} //RSSI_SLOPE
+{0x68, 0x61}, //RSSI_OFFSET
+{0x78, 0x03} //CHF_PMAGAIN
+};
+
+
+==VERSION 9==
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x09} //version 09: updated registers for ED/RSSI and PowerStep
+{0x23, 0x17} //PA_PWR new default value
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
+{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
+{0x52, 0x55}, //AGC_THR1 RSSI tune up
+{0x53, 0x2D}, //AGC_THR2 RSSI tune up
+{0x66, 0x5F}, //ATT_RSSI1 tune up
+{0x67, 0x8F}, //ATT_RSSI2 tune up
+{0x68, 0x61}, //RSSI_OFFSET
+{0x78, 0x03} //CHF_PMAGAIN
+};
+
+==VERSION A==
+overwrites_t const overwrites_direct[] ={
+{0x3B, 0x0A} //version 0A: updated registers for CCA
+{0x23, 0x17} //PA_PWR new default Power Step is "23"
+};
+
+overwrites_t const overwrites_indirect[] ={
+{0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents)
+{0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3
+{0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1
+{0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid)
+{0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca)
+{0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca)
+{0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration
+{0x52, 0x55}, //AGC_THR1 RSSI tune up
+{0x53, 0x2D}, //AGC_THR2 RSSI tune up
+{0x66, 0x5F}, //ATT_RSSI1 tune up
+{0x67, 0x8F}, //ATT_RSSI2 tune up
+{0x68, 0x61}, //RSSI_OFFSET
+{0x78, 0x03} //CHF_PMAGAIN
+{0x22, 0x50} //CCA1_THRESH
+};
+
+end of deprecated versions */
+
+
+#endif //OVERWRITES_H_
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/MCR20Drv/MCR20Reg.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,730 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MCR20reg.h
+* MCR20 Registers
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef __MCR20_REG_H__
+#define __MCR20_REG_H__
+/*****************************************************************************
+ * INCLUDED HEADERS *
+ *---------------------------------------------------------------------------*
+ * Add to this section all the headers that this module needs to include. *
+ * Note that it is not a good practice to include header files into header *
+ * files, so use this section only if there is no other better solution. *
+ *---------------------------------------------------------------------------*
+ *****************************************************************************/
+
+/****************************************************************************/
+/* Transceiver SPI Registers */
+/****************************************************************************/
+
+#define TransceiverSPI_IARIndexReg (0x3E)
+
+#define TransceiverSPI_ReadSelect (1<<7)
+#define TransceiverSPI_WriteSelect (0<<7)
+#define TransceiverSPI_RegisterAccessSelect (0<<6)
+#define TransceiverSPI_PacketBuffAccessSelect (1<<6)
+#define TransceiverSPI_PacketBuffBurstModeSelect (0<<5)
+#define TransceiverSPI_PacketBuffByteModeSelect (1<<5)
+
+#define TransceiverSPI_DirectRegisterAddressMask (0x3F)
+
+#define IRQSTS1 0x00
+#define IRQSTS2 0x01
+#define IRQSTS3 0x02
+#define PHY_CTRL1 0x03
+#define PHY_CTRL2 0x04
+#define PHY_CTRL3 0x05
+#define RX_FRM_LEN 0x06
+#define PHY_CTRL4 0x07
+#define SRC_CTRL 0x08
+#define SRC_ADDRS_SUM_LSB 0x09
+#define SRC_ADDRS_SUM_MSB 0x0A
+#define CCA1_ED_FNL 0x0B
+#define EVENT_TMR_LSB 0x0C
+#define EVENT_TMR_MSB 0x0D
+#define EVENT_TMR_USB 0x0E
+#define TIMESTAMP_LSB 0x0F
+#define TIMESTAMP_MSB 0x10
+#define TIMESTAMP_USB 0x11
+#define T3CMP_LSB 0x12
+#define T3CMP_MSB 0x13
+#define T3CMP_USB 0x14
+#define T2PRIMECMP_LSB 0x15
+#define T2PRIMECMP_MSB 0x16
+#define T1CMP_LSB 0x17
+#define T1CMP_MSB 0x18
+#define T1CMP_USB 0x19
+#define T2CMP_LSB 0x1A
+#define T2CMP_MSB 0x1B
+#define T2CMP_USB 0x1C
+#define T4CMP_LSB 0x1D
+#define T4CMP_MSB 0x1E
+#define T4CMP_USB 0x1F
+#define PLL_INT0 0x20
+#define PLL_FRAC0_LSB 0x21
+#define PLL_FRAC0_MSB 0x22
+#define PA_PWR 0x23
+#define SEQ_STATE 0x24
+#define LQI_VALUE 0x25
+#define RSSI_CCA_CONT 0x26
+//-------------- 0x27
+#define ASM_CTRL1 0x28
+#define ASM_CTRL2 0x29
+#define ASM_DATA_0 0x2A
+#define ASM_DATA_1 0x2B
+#define ASM_DATA_2 0x2C
+#define ASM_DATA_3 0x2D
+#define ASM_DATA_4 0x2E
+#define ASM_DATA_5 0x2F
+#define ASM_DATA_6 0x30
+#define ASM_DATA_7 0x31
+#define ASM_DATA_8 0x32
+#define ASM_DATA_9 0x33
+#define ASM_DATA_A 0x34
+#define ASM_DATA_B 0x35
+#define ASM_DATA_C 0x36
+#define ASM_DATA_D 0x37
+#define ASM_DATA_E 0x38
+#define ASM_DATA_F 0x39
+//------------------- 0x3A
+#define OVERWRITE_VER 0x3B
+#define CLK_OUT_CTRL 0x3C
+#define PWR_MODES 0x3D
+#define IAR_INDEX 0x3E
+#define IAR_DATA 0x3F
+
+
+#define PART_ID 0x00
+#define XTAL_TRIM 0x01
+#define PMC_LP_TRIM 0x02
+#define MACPANID0_LSB 0x03
+#define MACPANID0_MSB 0x04
+#define MACSHORTADDRS0_LSB 0x05
+#define MACSHORTADDRS0_MSB 0x06
+#define MACLONGADDRS0_0 0x07
+#define MACLONGADDRS0_8 0x08
+#define MACLONGADDRS0_16 0x09
+#define MACLONGADDRS0_24 0x0A
+#define MACLONGADDRS0_32 0x0B
+#define MACLONGADDRS0_40 0x0C
+#define MACLONGADDRS0_48 0x0D
+#define MACLONGADDRS0_56 0x0E
+#define RX_FRAME_FILTER 0x0F
+#define PLL_INT1 0x10
+#define PLL_FRAC1_LSB 0x11
+#define PLL_FRAC1_MSB 0x12
+#define MACPANID1_LSB 0x13
+#define MACPANID1_MSB 0x14
+#define MACSHORTADDRS1_LSB 0x15
+#define MACSHORTADDRS1_MSB 0x16
+#define MACLONGADDRS1_0 0x17
+#define MACLONGADDRS1_8 0x18
+#define MACLONGADDRS1_16 0x19
+#define MACLONGADDRS1_24 0x1A
+#define MACLONGADDRS1_32 0x1B
+#define MACLONGADDRS1_40 0x1C
+#define MACLONGADDRS1_48 0x1D
+#define MACLONGADDRS1_56 0x1E
+#define DUAL_PAN_CTRL 0x1F
+#define DUAL_PAN_DWELL 0x20
+#define DUAL_PAN_STS 0x21
+#define CCA1_THRESH 0x22
+#define CCA1_ED_OFFSET_COMP 0x23
+#define LQI_OFFSET_COMP 0x24
+#define CCA_CTRL 0x25
+#define CCA2_CORR_PEAKS 0x26
+#define CCA2_CORR_THRESH 0x27
+#define TMR_PRESCALE 0x28
+//---------------- 0x29
+#define GPIO_DATA 0x2A
+#define GPIO_DIR 0x2B
+#define GPIO_PUL_EN 0x2C
+#define GPIO_PUL_SEL 0x2D
+#define GPIO_DS 0x2E
+//-------------- 0x2F
+#define ANT_PAD_CTRL 0x30
+#define MISC_PAD_CTRL 0x31
+#define BSM_CTRL 0x32
+//--------------- 0x33
+#define _RNG 0x34
+#define RX_BYTE_COUNT 0x35
+#define RX_WTR_MARK 0x36
+#define SOFT_RESET 0x37
+#define TXDELAY 0x38
+#define ACKDELAY 0x39
+#define SEQ_MGR_CTRL 0x3A
+#define SEQ_MGR_STS 0x3B
+#define SEQ_T_STS 0x3C
+#define ABORT_STS 0x3D
+#define CCCA_BUSY_CNT 0x3E
+#define SRC_ADDR_CHECKSUM1 0x3F
+#define SRC_ADDR_CHECKSUM2 0x40
+#define SRC_TBL_VALID1 0x41
+#define SRC_TBL_VALID2 0x42
+#define FILTERFAIL_CODE1 0x43
+#define FILTERFAIL_CODE2 0x44
+#define SLOT_PRELOAD 0x45
+//---------------- 0x46
+#define CORR_VT 0x47
+#define SYNC_CTRL 0x48
+#define PN_LSB_0 0x49
+#define PN_LSB_1 0x4A
+#define PN_MSB_0 0x4B
+#define PN_MSB_1 0x4C
+#define CORR_NVAL 0x4D
+#define TX_MODE_CTRL 0x4E
+#define SNF_THR 0x4F
+#define FAD_THR 0x50
+#define ANT_AGC_CTRL 0x51
+#define AGC_THR1 0x52
+#define AGC_THR2 0x53
+#define AGC_HYS 0x54
+#define AFC 0x55
+//--------------- 0x56
+//--------------- 0x57
+#define PHY_STS 0x58
+#define RX_MAX_CORR 0x59
+#define RX_MAX_PREAMBLE 0x5A
+#define RSSI 0x5B
+//--------------- 0x5C
+//--------------- 0x5D
+#define PLL_DIG_CTRL 0x5E
+#define VCO_CAL 0x5F
+#define VCO_BEST_DIFF 0x60
+#define VCO_BIAS 0x61
+#define KMOD_CTRL 0x62
+#define KMOD_CAL 0x63
+#define PA_CAL 0x64
+#define PA_PWRCAL 0x65
+#define ATT_RSSI1 0x66
+#define ATT_RSSI2 0x67
+#define RSSI_OFFSET 0x68
+#define RSSI_SLOPE 0x69
+#define RSSI_CAL1 0x6A
+#define RSSI_CAL2 0x6B
+//--------------- 0x6C
+//--------------- 0x6D
+#define XTAL_CTRL 0x6E
+#define XTAL_COMP_MIN 0x6F
+#define XTAL_COMP_MAX 0x70
+#define XTAL_GM 0x71
+//--------------- 0x72
+//--------------- 0x73
+#define LNA_TUNE 0x74
+#define LNA_AGCGAIN 0x75
+//--------------- 0x76
+//--------------- 0x77
+#define CHF_PMA_GAIN 0x78
+#define CHF_IBUF 0x79
+#define CHF_QBUF 0x7A
+#define CHF_IRIN 0x7B
+#define CHF_QRIN 0x7C
+#define CHF_IL 0x7D
+#define CHF_QL 0x7E
+#define CHF_CC1 0x7F
+#define CHF_CCL 0x80
+#define CHF_CC2 0x81
+#define CHF_IROUT 0x82
+#define CHF_QROUT 0x83
+//--------------- 0x84
+//--------------- 0x85
+#define RSSI_CTRL 0x86
+//--------------- 0x87
+//--------------- 0x88
+#define PA_BIAS 0x89
+#define PA_TUNING 0x8A
+//--------------- 0x8B
+//--------------- 0x8C
+#define PMC_HP_TRIM 0x8D
+#define VREGA_TRIM 0x8E
+//--------------- 0x8F
+//--------------- 0x90
+#define VCO_CTRL1 0x91
+#define VCO_CTRL2 0x92
+//--------------- 0x93
+//--------------- 0x94
+#define ANA_SPARE_OUT1 0x95
+#define ANA_SPARE_OUT2 0x96
+#define ANA_SPARE_IN 0x97
+#define MISCELLANEOUS 0x98
+//--------------- 0x99
+#define SEQ_MGR_OVRD0 0x9A
+#define SEQ_MGR_OVRD1 0x9B
+#define SEQ_MGR_OVRD2 0x9C
+#define SEQ_MGR_OVRD3 0x9D
+#define SEQ_MGR_OVRD4 0x9E
+#define SEQ_MGR_OVRD5 0x9F
+#define SEQ_MGR_OVRD6 0xA0
+#define SEQ_MGR_OVRD7 0xA1
+//--------------- 0xA2
+#define TESTMODE_CTRL 0xA3
+#define DTM_CTRL1 0xA4
+#define DTM_CTRL2 0xA5
+#define ATM_CTRL1 0xA6
+#define ATM_CTRL2 0xA7
+#define ATM_CTRL3 0xA8
+//--------------- 0xA9
+#define LIM_FE_TEST_CTRL 0xAA
+#define CHF_TEST_CTRL 0xAB
+#define VCO_TEST_CTRL 0xAC
+#define PLL_TEST_CTRL 0xAD
+#define PA_TEST_CTRL 0xAE
+#define PMC_TEST_CTRL 0xAF
+#define SCAN_DTM_PROTECT_1 0xFE
+#define SCAN_DTM_PROTECT_0 0xFF
+
+// IRQSTS1 bits
+#define cIRQSTS1_RX_FRM_PEND (1<<7)
+#define cIRQSTS1_PLL_UNLOCK_IRQ (1<<6)
+#define cIRQSTS1_FILTERFAIL_IRQ (1<<5)
+#define cIRQSTS1_RXWTRMRKIRQ (1<<4)
+#define cIRQSTS1_CCAIRQ (1<<3)
+#define cIRQSTS1_RXIRQ (1<<2)
+#define cIRQSTS1_TXIRQ (1<<1)
+#define cIRQSTS1_SEQIRQ (1<<0)
+
+typedef union regIRQSTS1_tag{
+ uint8_t byte;
+ struct{
+ uint8_t SEQIRQ:1;
+ uint8_t TXIRQ:1;
+ uint8_t RXIRQ:1;
+ uint8_t CCAIRQ:1;
+ uint8_t RXWTRMRKIRQ:1;
+ uint8_t FILTERFAIL_IRQ:1;
+ uint8_t PLL_UNLOCK_IRQ:1;
+ uint8_t RX_FRM_PEND:1;
+ }bit;
+} regIRQSTS1_t;
+
+// IRQSTS2 bits
+#define cIRQSTS2_CRCVALID (1<<7)
+#define cIRQSTS2_CCA (1<<6)
+#define cIRQSTS2_SRCADDR (1<<5)
+#define cIRQSTS2_PI (1<<4)
+#define cIRQSTS2_TMRSTATUS (1<<3)
+#define cIRQSTS2_ASM_IRQ (1<<2)
+#define cIRQSTS2_PB_ERR_IRQ (1<<1)
+#define cIRQSTS2_WAKE_IRQ (1<<0)
+
+typedef union regIRQSTS2_tag{
+ uint8_t byte;
+ struct{
+ uint8_t WAKE_IRQ:1;
+ uint8_t PB_ERR_IRQ:1;
+ uint8_t ASM_IRQ:1;
+ uint8_t TMRSTATUS:1;
+ uint8_t PI:1;
+ uint8_t SRCADDR:1;
+ uint8_t CCA:1;
+ uint8_t CRCVALID:1;
+ }bit;
+} regIRQSTS2_t;
+
+// IRQSTS3 bits
+#define cIRQSTS3_TMR4MSK (1<<7)
+#define cIRQSTS3_TMR3MSK (1<<6)
+#define cIRQSTS3_TMR2MSK (1<<5)
+#define cIRQSTS3_TMR1MSK (1<<4)
+#define cIRQSTS3_TMR4IRQ (1<<3)
+#define cIRQSTS3_TMR3IRQ (1<<2)
+#define cIRQSTS3_TMR2IRQ (1<<1)
+#define cIRQSTS3_TMR1IRQ (1<<0)
+
+typedef union regIRQSTS3_tag{
+ uint8_t byte;
+ struct{
+ uint8_t TMR1IRQ:1;
+ uint8_t TMR2IRQ:1;
+ uint8_t TMR3IRQ:1;
+ uint8_t TMR4IRQ:1;
+ uint8_t TMR1MSK:1;
+ uint8_t TMR2MSK:1;
+ uint8_t TMR3MSK:1;
+ uint8_t TMR4MSK:1;
+ }bit;
+} regIRQSTS3_t;
+
+// PHY_CTRL1 bits
+#define cPHY_CTRL1_TMRTRIGEN (1<<7)
+#define cPHY_CTRL1_SLOTTED (1<<6)
+#define cPHY_CTRL1_CCABFRTX (1<<5)
+#define cPHY_CTRL1_RXACKRQD (1<<4)
+#define cPHY_CTRL1_AUTOACK (1<<3)
+#define cPHY_CTRL1_XCVSEQ (7<<0)
+
+typedef union regPHY_CTRL1_tag{
+ uint8_t byte;
+ struct{
+ uint8_t XCVSEQ:3;
+ uint8_t AUTOACK:1;
+ uint8_t RXACKRQD:1;
+ uint8_t CCABFRTX:1;
+ uint8_t SLOTTED:1;
+ uint8_t TMRTRIGEN:1;
+ }bit;
+} regPHY_CTRL1_t;
+
+// PHY_CTRL2 bits
+#define cPHY_CTRL2_CRC_MSK (1<<7)
+#define cPHY_CTRL2_PLL_UNLOCK_MSK (1<<6)
+#define cPHY_CTRL2_FILTERFAIL_MSK (1<<5)
+#define cPHY_CTRL2_RX_WMRK_MSK (1<<4)
+#define cPHY_CTRL2_CCAMSK (1<<3)
+#define cPHY_CTRL2_RXMSK (1<<2)
+#define cPHY_CTRL2_TXMSK (1<<1)
+#define cPHY_CTRL2_SEQMSK (1<<0)
+
+typedef union regPHY_CTRL2_tag{
+ uint8_t byte;
+ struct{
+ uint8_t SEQMSK:1;
+ uint8_t TXMSK:1;
+ uint8_t RXMSK:1;
+ uint8_t CCAMSK:1;
+ uint8_t RX_WMRK_MSK:1;
+ uint8_t FILTERFAIL_MSK:1;
+ uint8_t PLL_UNLOCK_MSK:1;
+ uint8_t CRC_MSK:1;
+ }bit;
+} regPHY_CTRL2_t;
+
+// PHY_CTRL3 bits
+#define cPHY_CTRL3_TMR4CMP_EN (1<<7)
+#define cPHY_CTRL3_TMR3CMP_EN (1<<6)
+#define cPHY_CTRL3_TMR2CMP_EN (1<<5)
+#define cPHY_CTRL3_TMR1CMP_EN (1<<4)
+#define cPHY_CTRL3_ASM_MSK (1<<2)
+#define cPHY_CTRL3_PB_ERR_MSK (1<<1)
+#define cPHY_CTRL3_WAKE_MSK (1<<0)
+
+typedef union regPHY_CTRL3_tag{
+ uint8_t byte;
+ struct{
+ uint8_t WAKE_MSK:1;
+ uint8_t PB_ERR_MSK:1;
+ uint8_t ASM_MSK:1;
+ uint8_t RESERVED:1;
+ uint8_t TMR1CMP_EN:1;
+ uint8_t TMR2CMP_EN:1;
+ uint8_t TMR3CMP_EN:1;
+ uint8_t TMR4CMP_EN:1;
+ }bit;
+} regPHY_CTRL3_t;
+
+// RX_FRM_LEN bits
+#define cRX_FRAME_LENGTH (0x7F)
+
+// PHY_CTRL4 bits
+#define cPHY_CTRL4_TRCV_MSK (1<<7)
+#define cPHY_CTRL4_TC3TMOUT (1<<6)
+#define cPHY_CTRL4_PANCORDNTR0 (1<<5)
+#define cPHY_CTRL4_CCATYPE (3<<0)
+#define cPHY_CTRL4_CCATYPE_Shift_c (3)
+#define cPHY_CTRL4_TMRLOAD (1<<2)
+#define cPHY_CTRL4_PROMISCUOUS (1<<1)
+#define cPHY_CTRL4_TC2PRIME_EN (1<<0)
+
+typedef union regPHY_CTRL4_tag{
+ uint8_t byte;
+ struct{
+ uint8_t TC2PRIME_EN:1;
+ uint8_t PROMISCUOUS:1;
+ uint8_t TMRLOAD:1;
+ uint8_t CCATYPE:2;
+ uint8_t PANCORDNTR0:1;
+ uint8_t TC3TMOUT:1;
+ uint8_t TRCV_MSK:1;
+ }bit;
+} regPHY_CTRL4_t;
+
+// SRC_CTRL bits
+#define cSRC_CTRL_INDEX (0x0F)
+#define cSRC_CTRL_INDEX_Shift_c (4)
+#define cSRC_CTRL_ACK_FRM_PND (1<<3)
+#define cSRC_CTRL_SRCADDR_EN (1<<2)
+#define cSRC_CTRL_INDEX_EN (1<<1)
+#define cSRC_CTRL_INDEX_DISABLE (1<<0)
+
+typedef union regSRC_CTRL_tag{
+ uint8_t byte;
+ struct{
+ uint8_t INDEX_DISABLE:1;
+ uint8_t INDEX_EN:1;
+ uint8_t SRCADDR_EN:1;
+ uint8_t ACK_FRM_PND:1;
+ uint8_t INDEX:4;
+ }bit;
+} regSRC_CTRL_t;
+
+// ASM_CTRL1 bits
+#define cASM_CTRL1_CLEAR (1<<7)
+#define cASM_CTRL1_START (1<<6)
+#define cASM_CTRL1_SELFTST (1<<5)
+#define cASM_CTRL1_CTR (1<<4)
+#define cASM_CTRL1_CBC (1<<3)
+#define cASM_CTRL1_AES (1<<2)
+#define cASM_CTRL1_LOAD_MAC (1<<1)
+
+// ASM_CTRL2 bits
+#define cASM_CTRL2_DATA_REG_TYPE_SEL (7)
+#define cASM_CTRL2_DATA_REG_TYPE_SEL_Shift_c (5)
+#define cASM_CTRL2_TSTPAS (1<<1)
+
+// CLK_OUT_CTRL bits
+#define cCLK_OUT_CTRL_EXTEND (1<<7)
+#define cCLK_OUT_CTRL_HIZ (1<<6)
+#define cCLK_OUT_CTRL_SR (1<<5)
+#define cCLK_OUT_CTRL_DS (1<<4)
+#define cCLK_OUT_CTRL_EN (1<<3)
+#define cCLK_OUT_CTRL_DIV (7)
+
+// PWR_MODES bits
+#define cPWR_MODES_XTAL_READY (1<<5)
+#define cPWR_MODES_XTALEN (1<<4)
+#define cPWR_MODES_ASM_CLK_EN (1<<3)
+#define cPWR_MODES_AUTODOZE (1<<1)
+#define cPWR_MODES_PMC_MODE (1<<0)
+
+// RX_FRAME_FILTER bits
+#define cRX_FRAME_FLT_FRM_VER (0xC0)
+#define cRX_FRAME_FLT_FRM_VER_Shift_c (6)
+#define cRX_FRAME_FLT_ACTIVE_PROMISCUOUS (1<<5)
+#define cRX_FRAME_FLT_NS_FT (1<<4)
+#define cRX_FRAME_FLT_CMD_FT (1<<3)
+#define cRX_FRAME_FLT_ACK_FT (1<<2)
+#define cRX_FRAME_FLT_DATA_FT (1<<1)
+#define cRX_FRAME_FLT_BEACON_FT (1<<0)
+
+typedef union regRX_FRAME_FILTER_tag{
+ uint8_t byte;
+ struct{
+ uint8_t FRAME_FLT_BEACON_FT:1;
+ uint8_t FRAME_FLT_DATA_FT:1;
+ uint8_t FRAME_FLT_ACK_FT:1;
+ uint8_t FRAME_FLT_CMD_FT:1;
+ uint8_t FRAME_FLT_NS_FT:1;
+ uint8_t FRAME_FLT_ACTIVE_PROMISCUOUS:1;
+ uint8_t FRAME_FLT_FRM_VER:2;
+ }bit;
+} regRX_FRAME_FILTER_t;
+
+// DUAL_PAN_CTRL bits
+#define cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_MSK (0xF0)
+#define cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_Shift_c (4)
+#define cDUAL_PAN_CTRL_CURRENT_NETWORK (1<<3)
+#define cDUAL_PAN_CTRL_PANCORDNTR1 (1<<2)
+#define cDUAL_PAN_CTRL_DUAL_PAN_AUTO (1<<1)
+#define cDUAL_PAN_CTRL_ACTIVE_NETWORK (1<<0)
+
+// DUAL_PAN_STS bits
+#define cDUAL_PAN_STS_RECD_ON_PAN1 (1<<7)
+#define cDUAL_PAN_STS_RECD_ON_PAN0 (1<<6)
+#define cDUAL_PAN_STS_DUAL_PAN_REMAIN (0x3F)
+
+// CCA_CTRL bits
+#define cCCA_CTRL_AGC_FRZ_EN (1<<6)
+#define cCCA_CTRL_CONT_RSSI_EN (1<<5)
+#define cCCA_CTRL_LQI_RSSI_NOT_CORR (1<<4)
+#define cCCA_CTRL_CCA3_AND_NOT_OR (1<<3)
+#define cCCA_CTRL_POWER_COMP_EN_LQI (1<<2)
+#define cCCA_CTRL_POWER_COMP_EN_ED (1<<1)
+#define cCCA_CTRL_POWER_COMP_EN_CCA1 (1<<0)
+
+// GPIO_DATA bits
+#define cGPIO_DATA_7 (1<<7)
+#define cGPIO_DATA_6 (1<<6)
+#define cGPIO_DATA_5 (1<<5)
+#define cGPIO_DATA_4 (1<<4)
+#define cGPIO_DATA_3 (1<<3)
+#define cGPIO_DATA_2 (1<<2)
+#define cGPIO_DATA_1 (1<<1)
+#define cGPIO_DATA_0 (1<<0)
+
+// GPIO_DIR bits
+#define cGPIO_DIR_7 (1<<7)
+#define cGPIO_DIR_6 (1<<6)
+#define cGPIO_DIR_5 (1<<5)
+#define cGPIO_DIR_4 (1<<4)
+#define cGPIO_DIR_3 (1<<3)
+#define cGPIO_DIR_2 (1<<2)
+#define cGPIO_DIR_1 (1<<1)
+#define cGPIO_DIR_0 (1<<0)
+
+// GPIO_PUL_EN bits
+#define cGPIO_PUL_EN_7 (1<<7)
+#define cGPIO_PUL_EN_6 (1<<6)
+#define cGPIO_PUL_EN_5 (1<<5)
+#define cGPIO_PUL_EN_4 (1<<4)
+#define cGPIO_PUL_EN_3 (1<<3)
+#define cGPIO_PUL_EN_2 (1<<2)
+#define cGPIO_PUL_EN_1 (1<<1)
+#define cGPIO_PUL_EN_0 (1<<0)
+
+// GPIO_PUL_SEL bits
+#define cGPIO_PUL_SEL_7 (1<<7)
+#define cGPIO_PUL_SEL_6 (1<<6)
+#define cGPIO_PUL_SEL_5 (1<<5)
+#define cGPIO_PUL_SEL_4 (1<<4)
+#define cGPIO_PUL_SEL_3 (1<<3)
+#define cGPIO_PUL_SEL_2 (1<<2)
+#define cGPIO_PUL_SEL_1 (1<<1)
+#define cGPIO_PUL_SEL_0 (1<<0)
+
+// GPIO_DS bits
+#define cGPIO_DS_7 (1<<7)
+#define cGPIO_DS_6 (1<<6)
+#define cGPIO_DS_5 (1<<5)
+#define cGPIO_DS_4 (1<<4)
+#define cGPIO_DS_3 (1<<3)
+#define cGPIO_DS_2 (1<<2)
+#define cGPIO_DS_1 (1<<1)
+#define cGPIO_DS_0 (1<<0)
+
+// SPI_CTRL bits
+//#define cSPI_CTRL_MISO_HIZ_EN (1<<1)
+//#define cSPI_CTRL_PB_PROTECT (1<<0)
+
+// ANT_PAD_CTRL bits
+#define cANT_PAD_CTRL_ANTX_POL (0x0F)
+#define cANT_PAD_CTRL_ANTX_POL_Shift_c (4)
+#define cANT_PAD_CTRL_ANTX_CTRLMODE (1<<3)
+#define cANT_PAD_CTRL_ANTX_HZ (1<<2)
+#define cANT_PAD_CTRL_ANTX_EN (3)
+
+// MISC_PAD_CTRL bits
+#define cMISC_PAD_CTRL_MISO_HIZ_EN (1<<3)
+#define cMISC_PAD_CTRL_IRQ_B_OD (1<<2)
+#define cMISC_PAD_CTRL_NON_GPIO_DS (1<<1)
+#define cMISC_PAD_CTRL_ANTX_CURR (1<<0)
+
+// ANT_AGC_CTRL bits
+#define cANT_AGC_CTRL_FAD_EN_Shift_c (0)
+#define cANT_AGC_CTRL_FAD_EN_Mask_c (1<<cANT_AGC_CTRL_FAD_EN_Shift_c)
+#define cANT_AGC_CTRL_ANTX_Shift_c (1)
+#define cANT_AGC_CTRL_ANTX_Mask_c (1<<cANT_AGC_CTRL_ANTX_Shift_c)
+
+// BSM_CTRL bits
+#define cBSM_CTRL_BSM_EN (1<<0)
+
+// SOFT_RESET bits
+#define cSOFT_RESET_SOG_RST (1<<7)
+#define cSOFT_RESET_REGS_RST (1<<4)
+#define cSOFT_RESET_PLL_RST (1<<3)
+#define cSOFT_RESET_TX_RST (1<<2)
+#define cSOFT_RESET_RX_RST (1<<1)
+#define cSOFT_RESET_SEQ_MGR_RST (1<<0)
+
+// SEQ_MGR_CTRL bits
+#define cSEQ_MGR_CTRL_SEQ_STATE_CTRL (3)
+#define cSEQ_MGR_CTRL_SEQ_STATE_CTRL_Shift_c (6)
+#define cSEQ_MGR_CTRL_NO_RX_RECYCLE (1<<5)
+#define cSEQ_MGR_CTRL_LATCH_PREAMBLE (1<<4)
+#define cSEQ_MGR_CTRL_EVENT_TMR_DO_NOT_LATCH (1<<3)
+#define cSEQ_MGR_CTRL_CLR_NEW_SEQ_INHIBIT (1<<2)
+#define cSEQ_MGR_CTRL_PSM_LOCK_DIS (1<<1)
+#define cSEQ_MGR_CTRL_PLL_ABORT_OVRD (1<<0)
+
+// SEQ_MGR_STS bits
+#define cSEQ_MGR_STS_TMR2_SEQ_TRIG_ARMED (1<<7)
+#define cSEQ_MGR_STS_RX_MODE (1<<6)
+#define cSEQ_MGR_STS_RX_TIMEOUT_PENDING (1<<5)
+#define cSEQ_MGR_STS_NEW_SEQ_INHIBIT (1<<4)
+#define cSEQ_MGR_STS_SEQ_IDLE (1<<3)
+#define cSEQ_MGR_STS_XCVSEQ_ACTUAL (7)
+
+// ABORT_STS bits
+#define cABORT_STS_PLL_ABORTED (1<<2)
+#define cABORT_STS_TC3_ABORTED (1<<1)
+#define cABORT_STS_SW_ABORTED (1<<0)
+
+// FILTERFAIL_CODE2 bits
+#define cFILTERFAIL_CODE2_PAN_SEL (1<<7)
+#define cFILTERFAIL_CODE2_9_8 (3)
+
+// PHY_STS bits
+#define cPHY_STS_PLL_UNLOCK (1<<7)
+#define cPHY_STS_PLL_LOCK_ERR (1<<6)
+#define cPHY_STS_PLL_LOCK (1<<5)
+#define cPHY_STS_CRCVALID (1<<3)
+#define cPHY_STS_FILTERFAIL_FLAG_SEL (1<<2)
+#define cPHY_STS_SFD_DET (1<<1)
+#define cPHY_STS_PREAMBLE_DET (1<<0)
+
+// TESTMODE_CTRL bits
+#define cTEST_MODE_CTRL_HOT_ANT (1<<4)
+#define cTEST_MODE_CTRL_IDEAL_RSSI_EN (1<<3)
+#define cTEST_MODE_CTRL_IDEAL_PFC_EN (1<<2)
+#define cTEST_MODE_CTRL_CONTINUOUS_EN (1<<1)
+#define cTEST_MODE_CTRL_FPGA_EN (1<<0)
+
+// DTM_CTRL1 bits
+#define cDTM_CTRL1_ATM_LOCKED (1<<7)
+#define cDTM_CTRL1_DTM_EN (1<<6)
+#define cDTM_CTRL1_PAGE5 (1<<5)
+#define cDTM_CTRL1_PAGE4 (1<<4)
+#define cDTM_CTRL1_PAGE3 (1<<3)
+#define cDTM_CTRL1_PAGE2 (1<<2)
+#define cDTM_CTRL1_PAGE1 (1<<1)
+#define cDTM_CTRL1_PAGE0 (1<<0)
+
+// TX_MODE_CTRL
+#define cTX_MODE_CTRL_TX_INV (1<<4)
+#define cTX_MODE_CTRL_BT_EN (1<<3)
+#define cTX_MODE_CTRL_DTS2 (1<<2)
+#define cTX_MODE_CTRL_DTS1 (1<<1)
+#define cTX_MODE_CTRL_DTS0 (1<<0)
+
+#define cTX_MODE_CTRL_DTS_MASK (7)
+
+// CLK_OUT_CTRL bits
+#define cCLK_OUT_EXTEND (1<<7)
+#define cCLK_OUT_HIZ (1<<6)
+#define cCLK_OUT_SR (1<<5)
+#define cCLK_OUT_DS (1<<4)
+#define cCLK_OUT_EN (1<<3)
+#define cCLK_OUT_DIV_Mask (7<<0)
+
+#define gCLK_OUT_FREQ_32_MHz (0)
+#define gCLK_OUT_FREQ_16_MHz (1)
+#define gCLK_OUT_FREQ_8_MHz (2)
+#define gCLK_OUT_FREQ_4_MHz (3)
+#define gCLK_OUT_FREQ_1_MHz (4)
+#define gCLK_OUT_FREQ_250_KHz (5)
+#define gCLK_OUT_FREQ_62_5_KHz (6)
+#define gCLK_OUT_FREQ_32_78_KHz (7)
+#define gCLK_OUT_FREQ_DISABLE (8)
+
+
+
+
+#endif /* __MCR20_REG_H__ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/MCR20Drv/XcvrSpi.cpp Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,159 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file XcvrSpi.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/*****************************************************************************
+* INCLUDED HEADERS *
+*---------------------------------------------------------------------------*
+* Add to this section all the headers that this module needs to include. *
+* Note that it is not a good practice to include header files into header *
+* files, so use this section only if there is no other better solution. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+#include "mbed.h"
+#include "EmbeddedTypes.h"
+
+#if defined(TARGET_K64F)
+ SPI spi(PTD2, PTD3, PTD1);
+#elif defined(TARGET_NUCLEO_F401RE)
+ SPI spi(SPI_MOSI, SPI_MISO, SPI_SCK);
+#else
+ "SPI not defined for this platform"
+#endif
+
+DigitalOut RF_CS(D10);
+DigitalOut RF_RST(D5);
+DigitalOut RF_SLP_TR(D7); // Not used in FSL
+InterruptIn RF_IRQ (D2); // FSL //(D9); // Atmel Radio
+DigitalIn RF_IRQ_PIN (D2);
+
+extern "C" void PHY_InterruptHandler(void);
+
+extern "C" void RF_IRQ_Init(void) {
+ RF_IRQ.mode(PullUp);
+ RF_IRQ.fall(&PHY_InterruptHandler);
+}
+
+extern "C" void RF_IRQ_Enable(void) {
+ RF_IRQ.enable_irq();
+}
+extern "C" void RF_IRQ_Disable(void) {
+ RF_IRQ.disable_irq();
+}
+
+extern "C" bool_t RF_isIRQ_Pending(void) {
+ return !RF_IRQ_PIN.read();
+}
+
+extern "C" void RF_RST_Set(int state) {
+ RF_RST = state;
+}
+
+extern "C" void RF_SLP_TR_Set(int state) {
+ RF_SLP_TR = state;
+}
+
+extern "C" void RF_CS_while_active(void) {
+
+ while(!RF_CS);
+}
+
+/*****************************************************************************
+* PRIVATE MACROS *
+*---------------------------------------------------------------------------*
+* Add to this section all the access macros, registers mappings, bit access *
+* macros, masks, flags etc ...
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+/*****************************************************************************/
+/*****************************************************************************/
+extern "C" void spi_master_init(uint32_t instance)
+{
+
+}
+
+/*****************************************************************************/
+/*****************************************************************************/
+extern "C" void spi_master_configure_speed(uint32_t instance, uint32_t freq)
+{
+ //spi.frequency(8000000);
+ spi.frequency(freq);
+}
+
+/*****************************************************************************/
+/*****************************************************************************/
+extern "C" void spi_master_transfer(uint32_t instance,
+ uint8_t * sendBuffer,
+ uint8_t * receiveBuffer,
+ size_t transferByteCount)
+{
+ volatile uint8_t dummy;
+
+ if( !transferByteCount )
+ return;
+
+ if( !sendBuffer && !receiveBuffer )
+ return;
+
+ while( transferByteCount-- )
+ {
+ if( sendBuffer )
+ {
+ dummy = *sendBuffer;
+ sendBuffer++;
+ }
+ else
+ {
+ dummy = 0xFF;
+ }
+
+ dummy = spi.write(dummy);
+
+ if( receiveBuffer )
+ {
+ *receiveBuffer = dummy;
+ receiveBuffer++;
+ }
+ }
+}
+
+extern "C" void gXcvrAssertCS_d(void)
+{
+ RF_CS = 0;
+}
+
+extern "C" void gXcvrDeassertCS_d(void)
+{
+ RF_CS = 1;
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/FSL_IEEE_802_15_4/PHY/MCR20Drv/XcvrSpi.h Thu Jul 16 07:29:15 2015 +0000 @@ -0,0 +1,88 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file XcvrSpi.h +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef __XCVR_SPI_H__ +#define __XCVR_SPI_H__ + + +/***************************************************************************** + * INCLUDED HEADERS * + *---------------------------------------------------------------------------* + * Add to this section all the headers that this module needs to include. * + * Note that it is not a good practice to include header files into header * + * files, so use this section only if there is no other better solution. * + *---------------------------------------------------------------------------* + *****************************************************************************/ + +#include "EmbeddedTypes.h" +//#include "board.h" + + +/***************************************************************************** + * PUBLIC MACROS * + *---------------------------------------------------------------------------* + * Add to this section all the access macros, registers mappings, bit access * + * macros, masks, flags etc ... + *---------------------------------------------------------------------------* + *****************************************************************************/ +//#define gXcvrAssertCS_d() GPIO_DRV_ClearPinOutput(kGpioXcvrSpiCsPin) +//#define gXcvrDeassertCS_d() GPIO_DRV_SetPinOutput(kGpioXcvrSpiCsPin) + +#define gXcvrSpiInstance_c 0 + +/***************************************************************************** + * PUBLIC FUNCTIONS * + *---------------------------------------------------------------------------* + * Add to this section all the global functions prototype preceded (as a * + * good practice) by the keyword 'extern' * + *---------------------------------------------------------------------------* + *****************************************************************************/ +void RF_RST_Set(int state); +void RF_SLP_TR_Set(int state); +void RF_CS_while_active(void); +void RF_CS_Set(int state); +void RF_IRQ_Init(void); +void RF_IRQ_Disable(void); +void RF_IRQ_Enable(void); +bool_t RF_isIRQ_Pending(void); + +void gXcvrAssertCS_d(void); +void gXcvrDeassertCS_d(void); + +void spi_master_init(uint32_t instance); +void spi_master_configure_speed(uint32_t instance, uint32_t freq); +void spi_master_transfer(uint32_t instance, + uint8_t * sendBuffer, + uint8_t * receiveBuffer, + uint32_t transferByteCount); + +#endif /* __XCVR_SPI_H__ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/MPM.c Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,555 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MPM.c
+* This is the source file for the Multiple PAN Manager.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+#include "MpmInterface.h"
+#include "Phy.h"
+
+#if 0
+#include "FunctionLib.h"
+#include "MemManager.h"
+#include "Panic.h"
+#endif
+
+#if gMpmIncluded_d
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+uint8_t mRegisteredPANs;
+bool_t mMpmExclusiveAccess;
+panInfo_t mPanInfo[gMpmMaxPANs_c];
+panInfo_t *pActivePANs[gMpmPhyPanRegSets_c];
+
+/************************************************************************************
+*************************************************************************************
+* Private functions prototypes
+*************************************************************************************
+************************************************************************************/
+static void MPM_SetPanSettingsInPhy( uint8_t panIndex );
+static uint8_t MPM_AllocateResource( bool_t force, uint8_t panIdx );
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief This function determines the instance of the MAC associated with a PHY regSet
+*
+* \param[in] regSet The PHY registry set
+*
+* \return The instance of the MAC associated with a PHY registry set.
+*
+********************************************************************************** */
+uint32_t MPM_GetMacInstanceFromRegSet(uint32_t regSet)
+{
+ if( pActivePANs[regSet] )
+ return pActivePANs[regSet]->macInstance;
+
+ return 0;
+}
+
+/*! *********************************************************************************
+* \brief This function determines the PHY regSet for the specified panIndex
+*
+* \param[in] panIdx The index in mPanInfo[] table
+*
+* \return The PHY registry set.
+*
+********************************************************************************** */
+uint32_t MPM_GetRegSet( uint8_t panIdx )
+{
+ return mPanInfo[panIdx].phyRegSet;
+}
+
+/*! *********************************************************************************
+* \brief This function determines the PHY regSet for the specified panIndex
+*
+* \param[in] pibId The id of the PHY PIB
+* \param[in] pValue The value of the PHY PIB
+* \param[in] panIdx The index in mPanInfo[] table
+*
+* \return The status of the operation.
+*
+********************************************************************************** */
+phyStatus_t MPM_SetPIB(phyPibId_t pibId, void* pValue, uint8_t panIdx)
+{
+ switch(pibId)
+ {
+#if gMpmUseDifferentTxPwrLevel_c
+ case gPhyPibTransmitPower_c:
+ if( (*(uint8_t*)pValue < 3) || (*(uint8_t*)pValue > 31) )
+ {
+ return gPhyInvalidParameter_c;
+ }
+ mPanInfo[panIdx].pwrLevel = *(uint8_t*)pValue;
+ break;
+#endif
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ case gPhyPibCurrentChannel_c:
+ if( (*(uint8_t*)pValue < 11) || (*(uint8_t*)pValue > 26) )
+ {
+ return gPhyInvalidParameter_c;
+ }
+ mPanInfo[panIdx].channel = *(uint8_t*)pValue;
+ break;
+ case gPhyPibLongAddress_c:
+ mPanInfo[panIdx].longAddr = *(uint64_t*)pValue;
+ break;
+ case gPhyPibShortAddress_c:
+ mPanInfo[panIdx].shortAddr = *(uint16_t*)pValue;
+ break;
+ case gPhyPibPanId_c:
+ mPanInfo[panIdx].panId = *(uint16_t*)pValue;
+ break;
+ case gPhyPibPanCoordinator_c:
+ if( *(bool_t*)pValue )
+ mPanInfo[panIdx].flags |= gMpmFlagPanCoord_c;
+ else
+ mPanInfo[panIdx].flags &= ~gMpmFlagPanCoord_c;
+ break;
+#endif
+ case gPhyPibRxOnWhenIdle:
+ if( *(bool_t*)pValue )
+ mPanInfo[panIdx].flags |= gMpmFlagRxOnWhenIdle_c;
+ else
+ mPanInfo[panIdx].flags &= ~gMpmFlagRxOnWhenIdle_c;
+ break;
+ case gPhyPibPromiscuousMode_c:
+ if( *(bool_t*)pValue )
+ mPanInfo[panIdx].flags |= gMpmFlagPromiscuous_c;
+ else
+ mPanInfo[panIdx].flags &= ~gMpmFlagPromiscuous_c;
+ break;
+ default:
+ return gPhyUnsupportedAttribute_c;
+ }
+
+ return gPhySuccess_c;
+}
+
+phyStatus_t MPM_GetPIB(phyPibId_t pibId, void *pValue, uint8_t panIdx)
+{
+ switch(pibId)
+ {
+#if gMpmUseDifferentTxPwrLevel_c
+ case gPhyPibTransmitPower_c:
+ *(uint8_t*)pValue = mPanInfo[panIdx].pwrLevel;
+ break;
+#endif
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ case gPhyPibCurrentChannel_c:
+ *(uint8_t*)pValue = mPanInfo[panIdx].channel;
+ break;
+ case gPhyPibLongAddress_c:
+ *(uint64_t*)pValue = mPanInfo[panIdx].longAddr;
+ break;
+ case gPhyPibShortAddress_c:
+ *(uint16_t*)pValue = mPanInfo[panIdx].shortAddr;
+ break;
+ case gPhyPibPanId_c:
+ *(uint16_t*)pValue = mPanInfo[panIdx].panId;
+ break;
+ case gPhyPibPanCoordinator_c:
+ *(uint8_t*)pValue = !!(mPanInfo[panIdx].flags & gMpmFlagPanCoord_c);
+ break;
+#endif
+ case gPhyPibRxOnWhenIdle:
+ *(uint8_t*)pValue = !!(mPanInfo[panIdx].flags & gMpmFlagRxOnWhenIdle_c);
+ break;
+ case gPhyPibPromiscuousMode_c:
+ *(uint8_t*)pValue = !!(mPanInfo[panIdx].flags & gMpmFlagPromiscuous_c);
+ break;
+ default:
+ return gPhyUnsupportedAttribute_c;
+ }
+
+ return gPhySuccess_c;
+}
+
+
+/*! *********************************************************************************
+* \brief This function initializes the MPM module.
+*
+* \param[in] None.
+*
+* \return None
+*
+********************************************************************************** */
+void MPM_Init( void )
+{
+ uint32_t i;
+
+ mRegisteredPANs = 0;
+ mMpmExclusiveAccess = FALSE;
+ FLib_MemSet( mPanInfo, 0x00, sizeof(mPanInfo) );
+ FLib_MemSet( pActivePANs, 0x00, sizeof(pActivePANs) );
+
+ for(i=0; i<gMpmMaxPANs_c; i++)
+ mPanInfo[i].phyRegSet = gMpmInvalidRegSet_c;
+
+ PhyPpSetDualPanDwell( ((mDefaultDualPanDwellPrescaller_c << mDualPanDwellPrescallerShift_c) & mDualPanDwellPrescallerMask_c) |
+ ((mDefaultDualPanDwellTime_c << mDualPanDwellTimeShift_c ) & mDualPanDwellTimeMask_c) );
+}
+
+/*! *********************************************************************************
+* \brief This function prepare the Radio for a TX/CCA/ED operation
+*
+* \param[in] macInstance The instance of the MAC
+*
+* \return The status of the Operation
+*
+********************************************************************************** */
+phyStatus_t MPM_PrepareForTx( instanceId_t macInstance )
+{
+ uint8_t panIdx = MPM_GetPanIndex(macInstance);
+
+ if( TRUE == mMpmExclusiveAccess && mPanInfo[panIdx].locked <= 0 )
+ return gPhyChannelBusy_c;
+
+ /* Allocate HW Resources if necessary */
+ if( mPanInfo[panIdx].phyRegSet == gMpmInvalidRegSet_c )
+ {
+ if( gMpmInvalidRegSet_c == MPM_AllocateResource( TRUE, panIdx ) )
+ return gPhyChannelBusy_c;
+
+ MPM_SetPanSettingsInPhy( panIdx );
+ }
+
+ /* Disable DualPan Auto Mode, and select the Active PAN */
+ PhyPpSetDualPanAuto( FALSE );
+ PhyPpSetDualPanActiveNwk( mPanInfo[panIdx].phyRegSet );
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function checks if a PAN has the RxOnWhenIdle PIB set.
+* If an Rx needs to be started, it makes the propper settings in PHY.
+*
+* \param[in] None.
+*
+* \return phyStatus
+*
+********************************************************************************** */
+phyStatus_t MPM_PrepareForRx( instanceId_t macInstance )
+{
+ uint32_t i, count = 0;
+ uint32_t activePan;
+
+ if( gInvalidInstanceId_c != macInstance ) //Rx
+ {
+ i = MPM_GetPanIndex(macInstance);
+
+ if( !mMpmExclusiveAccess || mPanInfo[i].locked )
+ {
+ /* Allocate HW Resources if necessary */
+ if( mPanInfo[i].phyRegSet == gMpmInvalidRegSet_c )
+ {
+ if( gMpmInvalidRegSet_c == MPM_AllocateResource( TRUE, i ) )
+ return gPhyChannelBusy_c;
+
+ MPM_SetPanSettingsInPhy( i );
+ }
+
+ count++;
+ activePan = mPanInfo[i].phyRegSet;
+ }
+ }
+ else //RxOnWhenIdle
+ {
+ for( i=0; i<gMpmPhyPanRegSets_c; i++)
+ {
+ if( (NULL != pActivePANs[i]) &&
+ (pActivePANs[i]->flags & gMpmFlagRxOnWhenIdle_c) &&
+ ( !mMpmExclusiveAccess || pActivePANs[i]->locked ) )
+ {
+ activePan = i;
+ count++;
+ }
+ }
+ }
+
+ if( !count )
+ return gPhyChannelBusy_c;
+
+ /* Set the Active PAN and DualPan Auto mode if needed*/
+ PhyPpSetDualPanActiveNwk( activePan );
+ PhyPpSetDualPanAuto( count > 1 );
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function returns the PAN index for a MAC instance
+*
+* \param[in] macInstance The instance of the MAC
+*
+* \return The PAN index or -1 if it was not found
+*
+********************************************************************************** */
+int32_t MPM_GetPanIndex( instanceId_t macInstance )
+{
+ uint32_t i;
+
+ /* Get PAN Index for the macInstance */
+ for( i=0; i<mRegisteredPANs; i++ )
+ {
+ if( mPanInfo[i].macInstance == macInstance )
+ return i;
+ }
+
+ /* The instance of the MAC is not registered!
+ * Register the current MAC instance if there is enough space.
+ */
+ if( mRegisteredPANs < gMpmMaxPANs_c )
+ {
+ mPanInfo[mRegisteredPANs].macInstance = macInstance;
+
+ /* Try to allocate HW resource */
+ mPanInfo[mRegisteredPANs].phyRegSet = MPM_AllocateResource( FALSE, i );
+ mRegisteredPANs++;
+ }
+ else
+ {
+ i = -1;
+ }
+
+ return i;
+}
+
+
+/*! *********************************************************************************
+* \brief This function configures the MPM module
+*
+* \param[in] pCfg pointer to a configuration structure
+*
+* \remarks
+* The Dual PAN dwell time prescaller values: 0-3
+* The Dual PAN dwell time values 0-63.
+* The (dwellTime+1) represents multiples of the prescaller time base.
+*
+********************************************************************************** */
+void MPM_SetConfig( mpmConfig_t *pCfg )
+{
+ PhyPpSetDualPanAuto ( FALSE );
+ PhyPpSetDualPanDwell( pCfg->dwellTime );
+ MPM_AllocateResource( TRUE, MPM_GetPanIndex(pCfg->activeMAC) );
+ PhyPpSetDualPanAuto ( pCfg->autoMode );
+ if( PhyIsIdleRx(0) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ Radio_Phy_TimeRxTimeoutIndication(0);
+ }
+}
+
+/*! *********************************************************************************
+* \brief This function returns the MPM configuration
+*
+* \param[in] pCfg pointer to a configuration structure
+*
+* \return None.
+*
+********************************************************************************** */
+void MPM_GetConfig( mpmConfig_t *pCfg )
+{
+ pCfg->dwellTime = PhyPpGetDualPanDwell();
+ pCfg->activeMAC = MPM_GetMacInstanceFromRegSet( PhyPpGetDualPanActiveNwk() );
+ pCfg->autoMode = PhyPpGetDualPanAuto();
+}
+#endif /* #if gMpmIncluded_d */
+
+/*! *********************************************************************************
+* \brief This function Acquires a PAN for exclusive access.
+*
+* \param[in] macInstance The instance of the MAC
+*
+* \return The status of the operation
+*
+********************************************************************************** */
+phyStatus_t MPM_AcquirePAN( instanceId_t macInstance )
+{
+#if gMpmIncluded_d
+ int32_t panIndex = MPM_GetPanIndex(macInstance);
+
+ /* Check if another PAN is acquired */
+ if( TRUE == mMpmExclusiveAccess &&
+ mPanInfo[panIndex].locked <= 0 )
+ {
+ return gPhyBusy_c;
+ }
+
+ if( mPanInfo[panIndex].locked == 0 )
+ {
+ mMpmExclusiveAccess = TRUE;
+ if( PhyIsIdleRx(0) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ Radio_Phy_TimeRxTimeoutIndication(0);
+ }
+ }
+
+ mPanInfo[panIndex].locked++;
+#endif
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function Releases a PAN that was Acquired
+*
+* \param[in] macInstance The instance of the MAC
+*
+* \return The status of the operation
+*
+********************************************************************************** */
+phyStatus_t MPM_ReleasePAN( instanceId_t macInstance )
+{
+#if gMpmIncluded_d
+ uint8_t panIndex = MPM_GetPanIndex(macInstance);
+
+ mPanInfo[panIndex].locked--;
+ if( mPanInfo[panIndex].locked == 0 )
+ {
+ mMpmExclusiveAccess = FALSE;
+ if( PhyIsIdleRx(0) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ Radio_Phy_TimeRxTimeoutIndication(0);
+ }
+ }
+#endif
+ return gPhySuccess_c;
+}
+
+/************************************************************************************
+*************************************************************************************
+* Private functions
+*************************************************************************************
+************************************************************************************/
+#if gMpmIncluded_d
+/*! *********************************************************************************
+* \brief This function alocates a registry set to a PAN.
+*
+* \param[in] force If this parameter is TRUE, then another PAN can be preempted.
+* \param[in] panIdx The index into the MPM database
+*
+* \return The register set allocated for the specified PAN.
+*
+********************************************************************************** */
+static uint8_t MPM_AllocateResource( bool_t force, uint8_t panIdx )
+{
+ uint32_t i, regSet = gMpmInvalidRegSet_c;
+
+ if( mPanInfo[panIdx].phyRegSet != gMpmInvalidRegSet_c )
+ return mPanInfo[panIdx].phyRegSet;
+
+ for( i=0; i<gMpmPhyPanRegSets_c; i++ )
+ {
+ if( NULL == pActivePANs[i] )
+ {
+ regSet = i;
+ break;
+ }
+ else if( (force) &&
+ (pActivePANs[i]->flags == 0) &&
+ (pActivePANs[i]->locked <= 0) )
+ {
+ regSet = i;
+ }
+ }
+
+ if( regSet != gMpmInvalidRegSet_c )
+ {
+ if( NULL != pActivePANs[regSet] )
+ {
+ pActivePANs[regSet]->phyRegSet = gMpmInvalidRegSet_c;
+ }
+
+ pActivePANs[regSet] = &mPanInfo[panIdx];
+ pActivePANs[regSet]->phyRegSet = regSet;
+ }
+
+ return regSet;
+}
+
+/*! *********************************************************************************
+* \brief This function will store PAN settings in PHY.
+*
+* \param[in] panIdx The index into the MPM database
+*
+* \return None.
+*
+* \remarks Function assumes that the PAN is active!
+*
+********************************************************************************** */
+static void MPM_SetPanSettingsInPhy( uint8_t panIndex )
+{
+ panInfo_t *pPAN = &mPanInfo[panIndex];
+
+#if gMpmUseDifferentTxPwrLevel_c
+ PhyPlmeSetPIBRequest(gPhyPibTransmitPower_c, pPAN->pwrLevel, pPAN->phyRegSet, 0 );
+#endif
+
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ PhyPlmeSetPIBRequest(gPhyPibPromiscuousMode_c, !!(pPAN->flags & gMpmFlagPromiscuous_c), pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibRxOnWhenIdle, !!(pPAN->flags & gMpmFlagRxOnWhenIdle_c), pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibPanCoordinator_c, !!(pPAN->flags & gMpmFlagPanCoord_c), pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibPanId_c, pPAN->panId, pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibShortAddress_c, pPAN->shortAddr, pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibLongAddress_c, pPAN->longAddr, pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibCurrentChannel_c, pPAN->channel, pPAN->phyRegSet, 0 );
+#else
+ (void)pPAN;
+#endif
+}
+#endif /* gMpmIncluded_d */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/MpmInterface.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,194 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MpmInterface.h
+* This is a header file for the Multiple PAN Manager.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef __MPM_H__
+#define __MPM_H__
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+//#include "fsl_os_abstraction.h"
+#include "PhyInterface.h"
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+/* The maximun number of MAC instances that can be registered.
+ * If set to 0, the MPM is disabled!
+ */
+#if !defined(gMpmMaxPANs_c)
+#define gMpmMaxPANs_c 1
+#endif
+
+#define gMpmIncluded_d (gMpmMaxPANs_c > 1)
+
+#define gMpmPhyPanRegSets_c (2)
+#define gMpmUseDifferentTxPwrLevel_c (0)
+#define gMpmAcquireIsBlocking_d (0)
+#define gMpmInvalidRegSet_c (gMpmPhyPanRegSets_c)
+
+/* Dual Pan Dwell settings
+ +-----------------+---------------------+
+ | PRESCALER | RANGE |
+ | bits [1:0] | bits [7:2] |
+ +------+----------+---------------------+
+ |value | timebase | min - max |
+ +------+----------+---------------------+
+ | 00 | 0.5 ms | 0.5 - 32 ms |
+ | 01 | 2.5 ms | 2.5 - 160 ms |
+ | 10 | 10 ms | 10 - 640 ms |
+ | 11 | 50 ms | 50 - 3.2 seconds |
+ +------+----------+---------------------+
+*/
+
+ /* Dwell Time prescaller (0 to 3) */
+ #define mDefaultDualPanDwellPrescaller_c (0x00) // 0,5 ms
+ #define mDualPanDwellPrescallerMask_c (0x03)
+ #define mDualPanDwellPrescallerShift_c (0)
+
+ /* Dwell Time value (0 to 63) */
+ #define mDefaultDualPanDwellTime_c (0x06)
+ #define mDualPanDwellTimeMask_c (0xFC)
+ #define mDualPanDwellTimeShift_c (2)
+
+
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ #error The number of PANs exceeds the number of HW registry sets! This feature is not supported yet.
+#endif
+
+/* MPM flags */
+#define gMpmFlagPanCoord_c (1 << 0)
+#define gMpmFlagPromiscuous_c (1 << 1)
+#define gMpmFlagRxOnWhenIdle_c (1 << 2)
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+
+typedef PACKED_STRUCT mpmConfig_tag{
+ bool_t autoMode;
+ uint8_t dwellTime;
+ uint8_t activeMAC;
+}mpmConfig_t;
+
+typedef union panFlags_tag{
+ uint16_t all;
+ struct{
+ uint16_t panCoordinator: 1;
+ uint16_t promiscuous: 1;
+ uint16_t rxOnWhenIdle: 1;
+ uint16_t reserved: 13;
+ };
+}panFlags_t;
+
+typedef struct panInfo_tag{
+ uint8_t flags;
+ uint8_t macInstance;
+ uint8_t phyRegSet;
+ int8_t locked;
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ uint64_t longAddr;
+ uint16_t shortAddr;
+ uint16_t panId;
+ uint8_t channel;
+#endif
+#if gMpmUseDifferentTxPwrLevel_c
+ uint8_t pwrLevel;
+#endif
+}panInfo_t;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+#if gMpmIncluded_d
+
+void MPM_Init( void );
+void MPM_SetConfig( mpmConfig_t *pCfg );
+void MPM_GetConfig( mpmConfig_t *pCfg );
+
+int32_t MPM_GetPanIndex( instanceId_t macInstance );
+uint32_t MPM_GetRegSet(uint8_t panIdx);
+uint32_t MPM_GetMacInstanceFromRegSet(uint32_t regSet);
+#define MPM_isPanActive( panIdx ) (MPM_GetRegSet(panIdx) != gMpmInvalidRegSet_c)
+
+phyStatus_t MPM_PrepareForTx( instanceId_t macInstance );
+phyStatus_t MPM_PrepareForRx( instanceId_t macInstance );
+phyStatus_t MPM_GetPIB(phyPibId_t pibId, void *pValue, uint8_t panIdx);
+phyStatus_t MPM_SetPIB(phyPibId_t pibId, void *pValue, uint8_t panIdx);
+
+#else /* #if gMpmIncluded_d */
+
+#define MPM_Init()
+#define MPM_SetConfig( prescaller, dwellTime )
+
+#define MPM_GetPanIndex( macInstance ) 0
+#define MPM_GetRegSet( panIdx ) 0
+#define MPM_GetMacInstanceFromRegSet( regSet ) 0
+#define MPM_isPanActive( panIdx ) 1
+
+#define MPM_PrepareForTx( macInstance ) gPhySuccess_c
+#define MPM_PrepareForRx( macInstance ) gPhySuccess_c
+#define MPM_GetPIB( pibId, pibValue, panIdx ) gPhySuccess_c
+#define MPM_SetPIB( pibId, pibValue, panIdx ) gPhySuccess_c
+
+#endif /* #if gMpmIncluded_d */
+
+phyStatus_t MPM_AcquirePAN( instanceId_t macInstance );
+phyStatus_t MPM_ReleasePAN( instanceId_t macInstance );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__MPM_H__ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/Phy.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,1120 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file Phy.h
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef __PHY_H__
+#define __PHY_H__
+
+
+/*****************************************************************************
+ * INCLUDED HEADERS *
+ *---------------------------------------------------------------------------*
+ * Add to this section all the headers that this module needs to include. *
+ * Note that it is not a good practice to include header files into header *
+ * files, so use this section only if there is no other better solution. *
+ *---------------------------------------------------------------------------*
+ *****************************************************************************/
+
+#include "EmbeddedTypes.h"
+#include "PhyInterface.h"
+//#include "fsl_os_abstraction.h"
+
+/*****************************************************************************
+ * PUBLIC MACROS, DEFINITIONS *
+ *---------------------------------------------------------------------------*
+ * Add to this section all the access macros, registers mappings, bit access *
+ * macros, masks, flags etc ...
+ *---------------------------------------------------------------------------*
+ *****************************************************************************/
+
+ #ifdef __cplusplus
+ extern "C" {
+#endif
+
+#ifdef _DEBUG
+#ifdef gPHY_802_15_4g_d
+#define MAC_PHY_DEBUG
+#endif
+#endif
+
+#ifndef gSnifferCRCEnabled_d
+#define gSnifferCRCEnabled_d (0)
+#endif
+
+#ifndef gUseStandaloneCCABeforeTx_d
+#define gUseStandaloneCCABeforeTx_d (1)
+#endif
+
+#ifndef gUsePBTransferThereshold_d
+#define gUsePBTransferThereshold_d (0)
+#endif
+
+#ifndef gPhyRxRetryInterval_c
+#define gPhyRxRetryInterval_c (100) /* [symbols] */
+#endif
+
+#ifndef gPhyMsgQueueMax_c
+#define gPhyMsgQueueMax_c (10) /* [list entries] */
+#endif
+
+// PHY states
+enum {
+ gIdle_c,
+ gRX_c,
+ gTX_c,
+ gCCA_c,
+ gTR_c,
+ gCCCA_c,
+#ifdef gPHY_802_15_4g_d
+ gED_c
+#endif // gPHY_802_15_4g_d
+};
+
+// PHY channel state
+enum {
+ gChannelIdle_c,
+ gChannelBusy_c
+};
+
+// PANCORDNTR bit in PP
+enum {
+ gMacRole_DeviceOrCoord_c,
+ gMacRole_PanCoord_c
+};
+
+// Cca types
+enum {
+ gCcaED_c, // energy detect - CCA bit not active, not to be used for T and CCCA sequences
+ gCcaCCA_MODE1_c, // energy detect - CCA bit ACTIVE
+ gCcaCCA_MODE2_c, // 802.15.4 compliant signal detect - CCA bit ACTIVE
+ gCcaCCA_MODE3_c, //
+ gInvalidCcaType_c // illegal type
+};
+
+enum {
+ gNormalCca_c,
+ gContinuousCca_c
+};
+
+
+/*****************************************************************************
+* Public type definitions *
+*****************************************************************************/
+typedef struct macPhyInputQueue_tag
+{
+ uint32_t msgInIdx;
+ phyMessageHeader_t * pMsgIn[gPhyMsgQueueMax_c];
+} macPhyInputQueue_t;
+
+typedef struct Phy_PhyLocalStruct_tag
+{
+ PD_MAC_SapHandler_t PD_MAC_SapHandler;
+ PLME_MAC_SapHandler_t PLME_MAC_SapHandler;
+// event_t phyTaskEventId;
+// msgQueue_t macPhyInputQueue;
+ macPhyInputQueue_t macPhyInputQueue;
+ uint32_t maxFrameWaitTime;
+ volatile phyTxParams_t txParams;
+ union{
+ volatile phyRxParams_t rxParams;
+ volatile phyChannelParams_t channelParams;
+ };
+#ifdef gPHY_802_15_4g_d
+ volatile phyFlags_t flags;
+ phyTime_t startTime;
+ uint16_t phyUnavailableQueuePos;
+ uint16_t phyIndirectQueue[gPhyIndirectQueueSize_c];
+ uint16_t fcs;
+ uint8_t macPanID[2];
+ uint8_t macShortAddress[2];
+ uint8_t macLongAddress[8];
+#else
+ volatile uint8_t flags;
+#endif // gPHY_802_15_4g_d
+ uint8_t currentMacInstance;
+}Phy_PhyLocalStruct_t;
+
+
+/*****************************************************************************
+* Public macros *
+*****************************************************************************/
+
+#define PhyGetSeqState() PhyPpGetState()
+#define PhyPlmeForceTrxOffRequest() PhyAbort()
+
+
+/*****************************************************************************
+* Public prototypes *
+*****************************************************************************/
+
+// PHY Packet Processor
+
+/*---------------------------------------------------------------------------
+ * Name: PhyHwInit
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyHwInit
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetPromiscuous
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetPromiscuous
+(
+ bool_t mode
+);
+
+/*---------------------------------------------------------------------------
+* Name: PhySetActivePromState()
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void PhySetActivePromiscuous
+(
+bool_t state
+);
+
+/*---------------------------------------------------------------------------
+* Name: PhyGetActivePromiscuous()
+* Description: -
+* Parameters: -
+* Return: - TRUE/FALSE
+*---------------------------------------------------------------------------*/
+bool_t PhyGetActivePromiscuous
+(
+void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetPanId
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetPanId
+(
+ uint8_t *pPanId,
+ uint8_t pan
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetShortAddr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetShortAddr
+(
+ uint8_t *pShortAddr,
+ uint8_t pan
+);
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetLongAddr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetLongAddr
+(
+ uint8_t *pLongAddr,
+ uint8_t pan
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetMacRole
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetMacRole
+(
+ bool_t macRole,
+ uint8_t pan
+);
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsTxAckDataPending
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsTxAckDataPending
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsRxAckDataPending
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsRxAckDataPending
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetFpManually
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetFpManually
+(
+ bool_t FP
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsPollIndication
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsPollIndication
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetSAMState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetSAMState
+(
+ bool_t state
+);
+
+/*---------------------------------------------------------------------------
+ * Name: Phy_IndirectQueueChecksum
+ * Description: Function called to compute the checksum for a 16bit or 64bit address
+ * in the same way as the transceiver
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+#ifdef gPHY_802_15_4g_d
+uint16_t Phy_IndirectQueueChecksum
+(
+ bool_t addrType,
+ uint64_t address,
+ uint16_t panId
+);
+#endif // gPHY_802_15_4g_d
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPp_IndirectQueueInsert
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPp_IndirectQueueInsert
+(
+ uint8_t index,
+ uint16_t checkSum,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPp_RemoveFromIndirect
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPp_RemoveFromIndirect
+(
+ uint8_t index,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetState
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhySetState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+#ifdef gPHY_802_15_4g_d
+void PhySetState
+(
+ uint8_t phyState
+);
+#endif //gPHY_802_15_4g_d
+
+/*---------------------------------------------------------------------------
+ * Name: PhyAbort
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyAbort
+(
+ void
+);
+
+// PHY PLME & DATA primitives
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPdDataRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPdDataRequest
+(
+ pdDataReq_t *pTxPacket,
+ volatile phyRxParams_t *pRxParams,
+ volatile phyTxParams_t *pTxParams
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeRxRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeRxRequest
+(
+ phySlottedMode_t phyRxMode,
+ phyRxParams_t * pRxParams
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeCcaEdRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeCcaEdRequest
+(
+ phyCCAType_t ccaParam,
+ phyContCCAMode_t cccaMode
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetCurrentChannelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeSetCurrentChannelRequest
+(
+ uint8_t channel,
+ uint8_t pan
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetCurrentChannelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeGetCurrentChannelRequest
+(
+ uint8_t pan
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetPwrLevelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeSetPwrLevelRequest
+(
+ uint8_t pwrStep
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetPwrLevelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeGetPwrLevelRequest
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetPwrState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeSetPwrState
+(
+ uint8_t state
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetPIBRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeSetPIBRequest
+(
+ phyPibId_t pibId,
+ uint64_t pibValue,
+ uint8_t phyRegistrySet,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetPIBRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeGetPIBRequest
+(
+ phyPibId_t pibId,
+ uint64_t * pibValue,
+ uint8_t phyRegistrySet,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetCcaThreshold
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+
+phyStatus_t PhyPpSetCcaThreshold
+(
+ uint8_t ccaThreshold
+);
+
+// PHY Time
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeSetEventTrigger
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeSetEventTrigger
+(
+ phyTime_t startTime
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeSetEventTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeSetEventTimeout
+(
+ phyTime_t *pEndTime
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeGetEventTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint32_t PhyTimeGetEventTimeout( void );
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeReadClock
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeReadClock
+(
+ phyTime_t *pRetClk
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeDisableEventTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeDisableEventTimeout
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeDisableEventTrigger
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeDisableEventTrigger
+(
+ void
+);
+
+
+#ifdef gPHY_802_15_4g_d
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeDisableRxTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeDisableRxTimeout
+(
+ void
+);
+#endif // gPHY_802_15_4g_d
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeSetWakeUpTime
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeSetWakeUpTime
+(
+ uint32_t *pWakeUpTime
+);
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeInitEventTimer
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeInitEventTimer
+(
+ uint32_t *pAbsTime
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeIsWakeUpTimeExpired
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyTimeIsWakeUpTimeExpired
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeSetWaitTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeSetWaitTimeout
+(
+ phyTime_t *pWaitTimeout
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeDisableWaitTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeDisableWaitTimeout
+(
+ void
+);
+
+// PHY ISR
+
+/*---------------------------------------------------------------------------
+ * Name: PHY_InstallIsr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PHY_InstallIsr
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PHY_InterruptHandler
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PHY_InterruptHandler
+(
+ void
+);
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrPassRxParams()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyIsrPassRxParams
+(
+ volatile phyRxParams_t * pRxParam
+);
+
+#ifdef gPHY_802_15_4g_d
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrPassRxParams()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPassTxParams
+(
+ pdDataReq_t *pTxParam
+);
+#endif // gPHY_802_15_4g_d
+
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrPassTaskParams()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyIsrPassTaskParams
+(
+ instanceId_t instanceId
+);
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrTimeoutCleanup
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyIsrTimeoutCleanup
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrSeqCleanup
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyIsrSeqCleanup
+(
+ void
+);
+
+/*****************************************************************************
+* PhyGetRandomNo function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyGetRandomNo
+(
+ uint32_t *pRandomNo
+);
+
+/*****************************************************************************
+* PhyPpSetDualPanAuto function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyPpSetDualPanAuto
+(
+ bool_t mode
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanAuto function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+bool_t PhyPpGetDualPanAuto
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpSetDualPanDwell function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyPpSetDualPanDwell
+(
+ uint8_t
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanDwell function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+uint8_t PhyPpGetDualPanDwell
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanRemain function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The remaining time until a channel switch will occure
+*****************************************************************************/
+uint8_t PhyPpGetDualPanRemain
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpSetDualPanSamLvl function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyPpSetDualPanSamLvl
+(
+ uint8_t
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanSamLvl function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The level at which the HW queue is split for the two PANs
+*****************************************************************************/
+uint8_t PhyPpGetDualPanSamLvl
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpSetDualPanSamLvl function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyPpSetDualPanActiveNwk
+(
+ uint8_t
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanActiveNwk function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The current NWK on which the PHY is operating
+*****************************************************************************/
+uint8_t PhyPpGetDualPanActiveNwk
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpGetPanOfRxPacket function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The PAN on which the packet was received (can be receiced on both PANs)
+*****************************************************************************/
+uint8_t PhyPpGetPanOfRxPacket
+(
+ void
+);
+
+#ifdef gPHY_802_15_4g_d
+/*---------------------------------------------------------------------------
+ * Name: PhyPpPassTaskParams()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpPassTaskParams
+(
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetCSLRxEnabled()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetCSLRxEnabled
+(
+ bool_t cslRx,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPib_SetCSLTxEnabled()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetCSLTxEnabled
+(
+ bool_t cslTx,
+ instanceId_t instanceId
+);
+#endif // gPHY_802_15_4g_d
+
+/*****************************************************************************
+* PhyGetLastRxLqiValue function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The LQI value for the last received packet
+*****************************************************************************/
+uint8_t PhyGetLastRxLqiValue(void);
+
+/*****************************************************************************
+* PhyGetLastRxRssiValue function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The RSSI value for the last received packet
+*****************************************************************************/
+uint8_t PhyGetLastRxRssiValue(void);
+
+/*****************************************************************************
+* PhyPlmeSetFADStateRequest function
+*
+* Interface assumptions: state
+*
+* Return Value: gPhySuccess
+*
+* Description: Enable the FAD function (FAD_EN bit)
+*****************************************************************************/
+uint8_t PhyPlmeSetFADStateRequest(bool_t state);
+
+/*****************************************************************************
+* PhyPlmeSetFADThresholdRequest function
+*
+* Interface assumptions: FADThreshold
+*
+* Return Value: gPhySuccess
+*
+* Description: Correlator threshold at which the FAD will select the antenna
+*****************************************************************************/
+uint8_t PhyPlmeSetFADThresholdRequest(uint8_t FADThreshold);
+
+uint8_t PhyPlmeSetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on);
+uint8_t PhyPlmeSetANTPadStrengthRequest(bool_t hiStrength);
+uint8_t PhyPlmeSetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx);
+
+/*****************************************************************************
+* PhyPlmeSetANTXStateRequest function
+*
+* Interface assumptions: state
+*
+* Return Value: gPhySuccess
+*
+* Description: ANTX_IN - FAD Antenna start when FAD_EN = 1 or antenna selected
+* when FAD_EN=0
+*****************************************************************************/
+uint8_t PhyPlmeSetANTXStateRequest(bool_t state);
+
+/*****************************************************************************
+* PhyPlmeGetANTXStateRequest function
+*
+* Interface assumptions: none
+*
+* Return Value: Chosen antenna by the FAD (FAD_EN = 1) or copy of ANTX_IN
+*
+* Description: Antenna selected in FAD of non-FAD mode
+*****************************************************************************/
+uint8_t PhyPlmeGetANTXStateRequest(void);
+
+/*****************************************************************************
+* PhyPlmeSetLQIModeRequest function
+*
+* Interface assumptions: none
+*
+* Return Value: gPhySuccess
+*
+* Description: Choose LQI Mode: 1 - LQI Based on RSSI,
+* 0 - LQI Based on Correlation Peaks
+*****************************************************************************/
+uint8_t PhyPlmeSetLQIModeRequest(uint8_t lqiMode);
+
+/*****************************************************************************
+* PhyPlmeGetRSSILevelRequest function
+*
+* Interface assumptions: none
+*
+* Return Value: RSSI level
+*
+* Description: Returns the RSSI level value, refreshed every 125us
+*****************************************************************************/
+uint8_t PhyPlmeGetRSSILevelRequest(void);
+
+#ifdef gPHY_802_15_4g_d
+/*****************************************************************************
+* PhyPlmeDataPassTaskParams function
+*
+* Interface assumptions: none
+*
+* Return Value:
+*
+* Description:
+*****************************************************************************/
+void PhyPlmeDataPassTaskParams(instanceId_t instanceId);
+#endif // gPHY_802_15_4g_d
+
+/*****************************************************************************
+* PhySetRxOnWhenIdle function
+*
+* Interface assumptions: none
+*
+* Return Value: None.
+*
+* Description: Informs the PHY if it should start an RX when entering IDLE or not
+*****************************************************************************/
+void PhyPlmeSetRxOnWhenIdle( bool_t state, instanceId_t instanceId );
+
+/*****************************************************************************
+* PhyPlmeSetFrameWaitTime function
+*
+* Interface assumptions: none
+*
+* Return Value: None.
+*
+* Description: Set the amount of time in symbols to wait for an data frame
+* after receiving an ACK with FP=1
+*****************************************************************************/
+void PhyPlmeSetFrameWaitTime( uint32_t time, instanceId_t instanceId );
+
+/*****************************************************************************
+* Phy_SetSequenceTiming function
+*
+* Interface assumptions: none
+*
+* Return Value: None.
+*
+* Description:
+*
+*****************************************************************************/
+#ifndef gPHY_802_15_4g_d
+void Phy_SetSequenceTiming(phyTime_t startTime, uint32_t seqDuration);
+#else
+void Phy_SetSequenceTiming(phyTime_t startTime, uint32_t seqDuration, uint8_t nextState, instanceId_t instanceId);
+void Phy_SetRxTiming(uint32_t seqDuration, uint8_t nextState, instanceId_t instanceId);
+#endif // gPHY_802_15_4g_d
+
+uint8_t Phy_GetEnergyLevel(uint8_t energyLeveldB);
+
+// RADIO EVENTS
+
+void Radio_Phy_PdDataConfirm(instanceId_t instanceId, bool_t framePending);
+
+void Radio_Phy_TimeWaitTimeoutIndication(instanceId_t instanceId);
+
+void Radio_Phy_TimeRxTimeoutIndication(instanceId_t instanceId);
+
+void Radio_Phy_PdDataIndication(instanceId_t instanceId);
+
+void Radio_Phy_TimeStartEventIndication(instanceId_t instanceId);
+
+void Radio_Phy_PlmeCcaConfirm(phyStatus_t phyChannelStatus, instanceId_t instanceId);
+
+void Radio_Phy_PlmeEdConfirm(uint8_t energyLeveldB, instanceId_t instanceId);
+
+void Radio_Phy_PlmeSyncLossIndication(instanceId_t instanceId);
+
+void Radio_Phy_PlmeRxSfdDetect(instanceId_t instanceId, uint32_t param);
+
+void Radio_Phy_PlmeFilterFailRx(instanceId_t instanceId);
+
+#ifdef gPHY_802_15_4g_d
+void Radio_Phy_WaitTurnaround(instanceId_t instanceId);
+void Radio_Phy_WaitTurnaroundComplete(instanceId_t instanceId);
+#endif
+
+void Radio_Phy_UnexpectedTransceiverReset(instanceId_t instanceId);
+
+void Radio_Phy_DummyEvent(instanceId_t instanceId);
+
+bool_t PhyIsIdleRx( instanceId_t instanceId );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PHY_H__ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/FSL_IEEE_802_15_4/PHY/PhyConfig.h Thu Jul 16 07:29:15 2015 +0000 @@ -0,0 +1,64 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file PhyConfig.h +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _PHY_CONFIG_H_ +#define _PHY_CONFIG_H_ + +#ifndef gAspCapability_d +#define gAspCapability_d 1 +#endif + +#ifndef gMaxPhyTimers_c +#define gMaxPhyTimers_c 10 +#endif + +#ifndef gMpmMaxPANs_c +#define gMpmMaxPANs_c 1 +#endif + +#ifndef gPhyInstancesCnt_c +#define gPhyInstancesCnt_c 1 +#endif + +#ifndef gPhyTaskStackSize_c +#define gPhyTaskStackSize_c 600 +#endif + +#ifndef gPhyTaskPriority_c +#define gPhyTaskPriority_c OSA_PRIORITY_REAL_TIME +#endif + +#ifndef gAfcEnabled_d +#define gAfcEnabled_d 0 +#endif + +#endif //_PHY_CONFIG_H_
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/PhyDebug.c Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,137 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyDebug.c
+* MCR20: PHY debug and logging functions
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/************************************************************************************
+*************************************************************************************
+* Includes
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+//#include "PortConfig.h"
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+#include "Phy.h"
+#include "PhyDebug.h"
+
+
+#ifdef MAC_PHY_DEBUG
+
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+
+uint16_t nDebugIndex = 0, nDebugSize = DEBUG_LOG_ENTRIES * 4;
+uint8_t nDebugStorage[DEBUG_LOG_ENTRIES * 4];
+
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+void PhyDebugLogTime(uint8_t item)
+{
+ uint32_t time;
+ nDebugStorage[nDebugIndex + 0] = item;
+ MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) EVENT_TMR_LSB, (uint8_t *) &time, 3);
+
+ nDebugStorage[nDebugIndex + 3] = (uint8_t) (time >> 0);
+ nDebugStorage[nDebugIndex + 2] = (uint8_t) (time >> 8);
+ nDebugStorage[nDebugIndex + 1] = (uint8_t) (time >> 16);
+
+ nDebugIndex += 4;
+ if(nDebugIndex >= nDebugSize)
+ {
+ nDebugIndex = 0;
+ }
+}
+
+/***********************************************************************************/
+
+void PhyDebugLogParam1(uint8_t item, uint8_t param1)
+{
+ nDebugStorage[nDebugIndex + 0] = item;
+ nDebugStorage[nDebugIndex + 1] = param1;
+ nDebugStorage[nDebugIndex + 2] = 0;
+ nDebugStorage[nDebugIndex + 3] = 0;
+
+ nDebugIndex += 4;
+ if(nDebugIndex >= nDebugSize)
+ {
+ nDebugIndex = 0;
+ }
+}
+
+/***********************************************************************************/
+
+void PhyDebugLogParam2(uint8_t item, uint8_t param1, uint8_t param2)
+{
+ nDebugStorage[nDebugIndex + 0] = item;
+ nDebugStorage[nDebugIndex + 1] = param1;
+ nDebugStorage[nDebugIndex + 2] = param2;
+ nDebugStorage[nDebugIndex + 3] = 0;
+
+ nDebugIndex += 4;
+ if(nDebugIndex >= nDebugSize)
+ {
+ nDebugIndex = 0;
+ }
+}
+
+/***********************************************************************************/
+
+void PhyDebugLogParam3(uint8_t item, uint8_t param1, uint8_t param2, uint8_t param3)
+{
+ nDebugStorage[nDebugIndex + 0] = item;
+ nDebugStorage[nDebugIndex + 1] = param1;
+ nDebugStorage[nDebugIndex + 2] = param2;
+ nDebugStorage[nDebugIndex + 3] = param3;
+
+ nDebugIndex += 4;
+ if(nDebugIndex >= nDebugSize)
+ {
+ nDebugIndex = 0;
+ }
+}
+
+/***********************************************************************************/
+
+#endif /* MAC_PHY_DEBUG */
+
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/PhyDebug.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,145 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyDebug.h
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _PHY_DEBUG_H_
+#define _PHY_DEBUG_H_
+
+
+/************************************************************************************
+*************************************************************************************
+* Includes
+*************************************************************************************
+************************************************************************************/
+//#include "MacPhyDebug.h"
+
+
+// a value of zero disables the logging of that event
+#define PDBG_SET_EVENT_TRIGGER 0x01 // 2 parameters
+#define PDBG_SET_EVENT_TIMEOUT 0x02 // 3 parameters
+#define PDBG_DISABLE_EVENT_TIMEOUT 0x03
+#define PDBG_READ_CLOCK 0x04
+#define PDBG_INIT_EVENT_TIMER 0
+
+#define PDBG_WTRMRK_VECT_INTERRUPT 0x06
+#define PDBG_TIMERS_VECT_INTERRUPT 0x07
+#define PDBG_TX_VECT_INTERRUPT 0x08
+#define PDBG_RX_VECT_INTERRUPT 0x09
+
+#define PDBG_CCA_CONFIRM_IDLE 0x0A
+#define PDBG_CCA_CONFIRM_BUSY 0x0B
+#define PDBG_DATA_CONFIRM 0x0C
+#define PDBG_DATA_INDICATION 0x0D
+#define PDBG_ED_CONFIRM 0x0E
+#define PDBG_SYNC_LOSS_INDICATION 0x0F
+
+#define PDBG_UNLOCK_IRQ 0x10
+#define PDBG_WTRMARK_IRQ 0x11
+#define PDBG_START_INDICATION 0x12
+#define PDBG_TIMEOUT_INDICATION 0x13
+#define PDBG_TMR1_IRQ 0x14
+#define PDBG_TMR4_IRQ 0x15
+#define PDBG_FILTER_FAIL_IRQ 0x16
+#define PDBG_TX_IRQ 0x17
+#define PDBG_RX_IRQ 0x18 // 1 parameter
+#define PDBG_CCA_IRQ 0x19
+#define PDBG_SEQ_IRQ 0x1A // 1 parameter
+
+#define PDBG_PHY_INIT 0x20
+#define PDBG_PHY_ABORT 0x21
+#define PDBG_PP_SET_PROMISC 0
+#define PDBG_PP_SET_PANID_PAN0 0x23
+#define PDBG_PP_SET_SHORTADDR_PAN0 0x24
+#define PDBG_PP_SET_LONGADDR_PAN0 0x25
+#define PDBG_PP_SET_MACROLE_PAN0 0x26
+#define PDBG_PP_ADD_INDIRECT 0x27 // 1 parameter
+#define PDBG_PP_REMOVE_INDIRECT 0x28 // 1 parameter
+#define PDBG_PP_READ_LATEST_INDEX 0x29 // 1 parameter
+
+#define PDBG_DATA_REQUEST 0x30
+#define PDBG_PLME_RX_REQUEST 0x31
+#define PDBG_PLME_CCA_ED_REQUEST 0x32
+#define PDBG_PLME_SET_CHAN_REQUEST 0x33
+#define PDBG_PLME_SET_POWER_REQUEST 0x34
+#define PDBG_PLME_WAIT_REQUEST 0x35
+
+#define PDBG_PP_SET_PANID_PAN1 0x36
+#define PDBG_PP_SET_SHORTADDR_PAN1 0x37
+#define PDBG_PP_SET_LONGADDR_PAN1 0x38
+#define PDBG_PP_SET_MACROLE_PAN1 0x39
+
+//simple events - without timestamp
+//***** PDBG_MAC_FUNCTION_CALL PDBG_SIMPLE_EVENT // 3 parameters
+#define PDBG_READ_FSM PDBG_SIMPLE_EVENT + 0x01 // 1 parameter
+#define PDBG_FILTER_FAIL_CODE PDBG_SIMPLE_EVENT + 0x02 // 2 parameters
+
+
+#ifdef MAC_PHY_DEBUG
+
+#define DEBUG_LOG_ENTRIES 768
+
+#define PHY_DEBUG_LOG(item) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogTime(item);}
+#define PHY_DEBUG_LOG1(item,param) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogTime(PDBG_EXTENDED_EVENT | item);PhyDebugLogParam1(item,param);}
+#define PHY_DEBUG_LOG2(item,param1,param2) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogTime(PDBG_EXTENDED_EVENT | item);PhyDebugLogParam2(item,param1,param2);}
+#define PHY_DEBUG_LOG3(item,param1,param2,param3) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogTime(PDBG_EXTENDED_EVENT | item);PhyDebugLogParam3(item,param1,param2,param3);}
+
+#define PHY_DEBUG_LOG_SIMPLE1(item,param) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogParam1(item,param);}
+#define PHY_DEBUG_LOG_SIMPLE2(item,param1,param2) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogParam2(item,param1,param2);}
+#define PHY_DEBUG_LOG_SIMPLE3(item,param1,param2,param3) if(PDBG_RESERVED_EVENT!=item){PhyDebugLogParam3(item,param1,param2,param3);}
+
+void PhyUnexpectedTransceiverReset(void);
+
+void PhyDebugLogTime(uint8_t item);
+void PhyDebugLogParam1(uint8_t item, uint8_t param1);
+void PhyDebugLogParam2(uint8_t item, uint8_t param1, uint8_t param2);
+void PhyDebugLogParam3(uint8_t item, uint8_t param1, uint8_t param2, uint8_t param3);
+
+
+#else /* not def MAC_PHY_DEBUG */
+
+#define PhyUnexpectedTransceiverReset()
+
+#define PHY_DEBUG_LOG(item)
+#define PHY_DEBUG_LOG1(item,param)
+#define PHY_DEBUG_LOG2(item,param1,param2)
+#define PHY_DEBUG_LOG3(item,param1,param2,param3)
+
+#define PHY_DEBUG_LOG_SIMPLE1(item,param)
+#define PHY_DEBUG_LOG_SIMPLE2(item,param1,param2)
+#define PHY_DEBUG_LOG_SIMPLE3(item,param1,param2,param3)
+
+#endif /* MAC_PHY_DEBUG */
+
+
+#endif /* _PHY_DEBUG_H_ */
+
+
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/PhyISR.c Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,565 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyISR.c
+* PHY ISR Functions
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+#include "EmbeddedTypes.h"
+//#include "board.h"
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+#include "Phy.h"
+#include "PhyInterface.h"
+//#include "Gpio_IrqAdapter.h"
+
+//#include "fsl_os_abstraction.h"
+
+#include "XcvrSpi.h"
+
+/************************************************************************************
+*************************************************************************************
+* Private macros
+*************************************************************************************
+************************************************************************************/
+#if defined(MCU_MKL46Z4)
+ #define MCR20_Irq_Priority (0xC0)
+#else
+ #define MCR20_Irq_Priority (0x80)
+#endif
+
+#define PHY_IRQSTS1_INDEX_c 0x00
+#define PHY_IRQSTS2_INDEX_c 0x01
+#define PHY_IRQSTS3_INDEX_c 0x02
+#define PHY_CTRL1_INDEX_c 0x03
+#define PHY_CTRL2_INDEX_c 0x04
+#define PHY_CTRL3_INDEX_c 0x05
+#define PHY_RX_FRM_LEN_INDEX_c 0x06
+#define PHY_CTRL4_INDEX_c 0x07
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+extern Phy_PhyLocalStruct_t phyLocal[];
+static volatile phyRxParams_t * mpRxParams = NULL;
+static uint32_t mPhyTaskInstance;
+uint8_t mStatusAndControlRegs[8];
+uint8_t mPhyLastRxLQI = 0;
+uint8_t mPhyLastRxRSSI = 0;
+
+void (*gpfPhyPreprocessData)(uint8_t *pData) = NULL;
+
+#if gUsePBTransferThereshold_d
+static uint8_t mPhyWatermarkLevel;
+#define mPhyGetPBTransferThreshold(len) ((len) - 2)
+//#define mPhyGetPBTransferThreshold(len) ((len)*93/100)
+//#define mPhyGetPBTransferThreshold(len) (((len) < 20) ? ((len) - 2) : ((len) * 93 / 100))
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief Sets the current PHY instance waiting for an IRQ
+*
+* \param[in] instanceId instance of the PHY
+*
+********************************************************************************** */
+void PhyIsrPassTaskParams
+(
+ instanceId_t instanceId
+)
+{
+ mPhyTaskInstance = instanceId;
+}
+
+/*! *********************************************************************************
+* \brief Sets the location of the Rx parameters
+*
+* \param[in] pRxParam pointer to Rx parameters
+*
+********************************************************************************** */
+void PhyIsrPassRxParams
+(
+ volatile phyRxParams_t * pRxParam
+)
+{
+ mpRxParams = pRxParam;
+}
+
+/*! *********************************************************************************
+* \brief Clear and mask PHY IRQ, set sequence to Idle
+*
+********************************************************************************** */
+void PhyIsrSeqCleanup
+(
+ void
+)
+{
+ mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] &= 0xF0;
+ mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] &= (uint8_t) ~( cIRQSTS3_TMR3MSK ); // unmask TMR3 interrupt
+ mStatusAndControlRegs[PHY_CTRL1_INDEX_c] &= (uint8_t) ~( cPHY_CTRL1_XCVSEQ );
+ mStatusAndControlRegs[PHY_CTRL2_INDEX_c] |= (uint8_t) ( cPHY_CTRL2_CCAMSK | \
+ cPHY_CTRL2_RXMSK | \
+ cPHY_CTRL2_TXMSK | \
+ cPHY_CTRL2_SEQMSK );
+
+ // clear transceiver interrupts, mask SEQ, RX, TX and CCA interrupts and set the PHY sequencer back to IDLE
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 5);
+}
+
+/*! *********************************************************************************
+* \brief Clear and mask PHY IRQ, disable timeout, set sequence to Idle
+*
+********************************************************************************** */
+void PhyIsrTimeoutCleanup
+(
+ void
+)
+{
+ mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] &= 0xF0;
+ mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] |= (uint8_t) ( cIRQSTS3_TMR3MSK | \
+ cIRQSTS3_TMR3IRQ); // mask and clear TMR3 interrupt
+ mStatusAndControlRegs[PHY_CTRL1_INDEX_c] &= (uint8_t) ~( cPHY_CTRL1_XCVSEQ );
+ mStatusAndControlRegs[PHY_CTRL2_INDEX_c] |= (uint8_t) ( cPHY_CTRL2_CCAMSK | \
+ cPHY_CTRL2_RXMSK | \
+ cPHY_CTRL2_TXMSK | \
+ cPHY_CTRL2_SEQMSK );
+
+ // disable TMR3 comparator and timeout
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR3CMP_EN );
+ mStatusAndControlRegs[PHY_CTRL4_INDEX_c] &= (uint8_t) ~( cPHY_CTRL4_TC3TMOUT );
+
+ // clear transceiver interrupts, mask mask SEQ, RX, TX, TMR3 and CCA interrupts interrupts and set the PHY sequencer back to IDLE
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 8);
+}
+
+/*! *********************************************************************************
+* \brief Scales energy level to 0-255
+*
+* \param[in] energyLevel the energ level reported by HW
+*
+* \return uint8_t the energy level scaled in 0x00-0xFF
+*
+********************************************************************************** */
+uint8_t Phy_GetEnergyLevel
+(
+uint8_t energyLevel /* db */
+)
+{
+ if(energyLevel >= 90)
+ {
+ /* ED value is below minimum. Return 0x00. */
+ energyLevel = 0x00;
+ }
+ else if(energyLevel <= 26)
+ {
+ /* ED value is above maximum. Return 0xFF. */
+ energyLevel = 0xFF;
+ }
+ else
+ {
+ /* Energy level (-90 dBm to -26 dBm ) --> varies form 0 to 64 */
+ energyLevel = (90 - energyLevel);
+ /* Rescale the energy level values to the 0x00-0xff range (0 to 64 translates in 0 to 255) */
+ /* energyLevel * 3.9844 ~= 4 */
+ /* Multiply with 4=2^2 by shifting left.
+ The multiplication will not overflow beacause energyLevel has values between 0 and 63 */
+ energyLevel <<= 2;
+ }
+
+ return energyLevel;
+}
+
+/*! *********************************************************************************
+* \brief Scales LQI to 0-255
+*
+* \param[in] hwLqi the LQI reported by HW
+*
+* \return uint8_t the LQI scaled in 0x00-0xFF
+*
+********************************************************************************** */
+static uint8_t Phy_LqiConvert
+(
+uint8_t hwLqi
+)
+{
+ uint32_t tmpLQI;
+
+ /* LQI Saturation Level */
+ if (hwLqi >= 230)
+ {
+ return 0xFF;
+ }
+ else if (hwLqi <= 9)
+ {
+ return 0;
+ }
+ else
+ {
+ /* Rescale the LQI values from min to saturation to the 0x00 - 0xFF range */
+ /* The LQI value mst be multiplied by ~1.1087 */
+ /* tmpLQI = hwLqi * 7123 ~= hwLqi * 65536 * 0.1087 = hwLqi * 2^16 * 0.1087*/
+ tmpLQI = ((uint32_t)hwLqi * (uint32_t)7123 );
+ /* tmpLQI = (tmpLQI / 2^16) + hwLqi */
+ tmpLQI = (uint32_t)(tmpLQI >> 16) + (uint32_t)hwLqi;
+
+ return (uint8_t)tmpLQI;
+ }
+}
+
+/*! *********************************************************************************
+* \brief This function returns the LQI for the las received packet
+*
+* \return uint8_t LQI value
+*
+********************************************************************************** */
+uint8_t PhyGetLastRxLqiValue(void)
+{
+ return mPhyLastRxLQI;
+}
+
+/*! *********************************************************************************
+* \brief This function returns the RSSI for the las received packet
+*
+* \return uint8_t RSSI value
+*
+********************************************************************************** */
+uint8_t PhyGetLastRxRssiValue(void)
+{
+ return mPhyLastRxRSSI;
+}
+
+/*! *********************************************************************************
+* \brief PHY ISR
+*
+********************************************************************************** */
+void PHY_InterruptHandler(void)
+{
+ uint8_t xcvseqCopy;
+
+ /* The ISR may be called even if another PORTx pin has changed */
+ //if( !PORT_HAL_IsPinIntPending(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)], GPIO_EXTRACT_PIN(kGpioXcvrIrqPin)) )
+ if( !RF_isIRQ_Pending() )
+ {
+ return;
+ }
+
+ /* Disable and clear transceiver(IRQ_B) interrupt */
+ MCR20Drv_IRQ_Disable();
+ MCR20Drv_IRQ_Clear();
+
+ /* Read transceiver interrupt status and control registers */
+ mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] =
+ MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &mStatusAndControlRegs[1], 7);
+ xcvseqCopy = mStatusAndControlRegs[PHY_CTRL1_INDEX_c] & cPHY_CTRL1_XCVSEQ;
+ /* clear transceiver interrupts */
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 3);
+
+ if( (mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_WAKE_IRQ) &&
+ !(mStatusAndControlRegs[PHY_CTRL3_INDEX_c] & cPHY_CTRL3_WAKE_MSK) )
+ {
+#ifdef MAC_PHY_DEBUG
+ Radio_Phy_UnexpectedTransceiverReset(mPhyTaskInstance);
+#endif
+ MCR20Drv_IRQ_Enable();
+ return;
+ }
+
+ /* Flter Fail IRQ */
+ if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_FILTERFAIL_IRQ) &&
+ !(mStatusAndControlRegs[PHY_CTRL2_INDEX_c] & cPHY_CTRL2_FILTERFAIL_MSK) )
+ {
+#if gUsePBTransferThereshold_d
+ /* Reset the RX_WTR_MARK level since packet was dropped. */
+ mPhyWatermarkLevel = 0;
+ MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, mPhyWatermarkLevel);
+#endif
+ Radio_Phy_PlmeFilterFailRx(mPhyTaskInstance);
+ }
+ /* Rx Watermark IRQ */
+ else if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_RXWTRMRKIRQ) &&
+ !(mStatusAndControlRegs[PHY_CTRL2_INDEX_c] & cPHY_CTRL2_RX_WMRK_MSK) )
+ {
+#if gUsePBTransferThereshold_d
+ if( 0 == mPhyWatermarkLevel )
+ {
+ /* Check if this is a standalone RX because we could end up here during a TR sequence also. */
+ if( xcvseqCopy == gRX_c )
+ {
+ /* Set the thereshold packet length at which to start the PB Burst Read.*/
+ mPhyWatermarkLevel = mPhyGetPBTransferThreshold( mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c] );
+ MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, mPhyWatermarkLevel);
+ }
+#endif
+ Radio_Phy_PlmeRxSfdDetect(mPhyTaskInstance, mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c]);
+#if gUsePBTransferThereshold_d
+ }
+ else
+ {
+ /* Reset RX_WTR_MARK here, because if the FCS fails, no other IRQ will arrive
+ * and the RX will restart automatically. */
+ mPhyWatermarkLevel = 0;
+ MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, mPhyWatermarkLevel);
+
+ if( mpRxParams )
+ {
+ // Read data from PB
+ MCR20Drv_PB_SPIBurstRead(mpRxParams->pRxData->msgData.dataInd.pPsdu, (uint8_t)(mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c] - 2));
+ if( gpfPhyPreprocessData )
+ gpfPhyPreprocessData(mpRxParams->pRxData->msgData.dataInd.pPsdu);
+ }
+ }
+#endif
+ }
+
+ /* Timer 1 Compare Match */
+ if( (mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR1IRQ) &&
+ !(mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR1MSK))
+ {
+ // disable TMR1 comparator
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR1CMP_EN);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
+
+ Radio_Phy_TimeWaitTimeoutIndication(mPhyTaskInstance);
+ }
+
+ /* Sequencer interrupt, the autosequence has completed */
+ if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_SEQIRQ) &&
+ !(mStatusAndControlRegs[PHY_CTRL2_INDEX_c] & cPHY_CTRL2_SEQMSK) )
+ {
+ // PLL unlock, the autosequence has been aborted due to PLL unlock
+ if( mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_PLL_UNLOCK_IRQ )
+ {
+ PhyIsrSeqCleanup();
+ Radio_Phy_PlmeSyncLossIndication(mPhyTaskInstance);
+ MCR20Drv_IRQ_Enable();
+ return;
+ }
+
+ // TMR3 timeout, the autosequence has been aborted due to TMR3 timeout
+ if( (mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR3IRQ) &&
+ !(mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_RXIRQ) &&
+ (gTX_c != xcvseqCopy) )
+ {
+ PhyIsrTimeoutCleanup();
+
+ Radio_Phy_TimeRxTimeoutIndication(mPhyTaskInstance);
+ MCR20Drv_IRQ_Enable();
+ return;
+ }
+
+ PhyIsrSeqCleanup();
+
+ switch(xcvseqCopy)
+ {
+ case gTX_c:
+ if( (mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_CCA) &&
+ (mStatusAndControlRegs[PHY_CTRL1_INDEX_c] & cPHY_CTRL1_CCABFRTX) )
+ {
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelBusy_c, mPhyTaskInstance);
+ }
+ else
+ {
+ Radio_Phy_PdDataConfirm(mPhyTaskInstance, FALSE);
+ }
+ break;
+
+ case gTR_c:
+ if( (mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_CCA) &&
+ (mStatusAndControlRegs[PHY_CTRL1_INDEX_c] & cPHY_CTRL1_CCABFRTX) )
+ {
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelBusy_c, mPhyTaskInstance);
+ }
+ else
+ {
+ if(NULL != mpRxParams)
+ {
+ // reports value of 0x00 for -105 dBm of received input power and 0xFF for 0 dBm of received input power
+ mPhyLastRxRSSI = MCR20Drv_DirectAccessSPIRead((uint8_t) LQI_VALUE);
+ mpRxParams->linkQuality = Phy_LqiConvert(mPhyLastRxRSSI);
+ mPhyLastRxLQI = mpRxParams->linkQuality;
+ MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) TIMESTAMP_LSB, (uint8_t *)&mpRxParams->timeStamp, 3);
+ mpRxParams->psduLength = (uint8_t)(mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c]); //Including FCS (2 bytes)
+ }
+ if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_RX_FRM_PEND) == cIRQSTS1_RX_FRM_PEND )
+ {
+ Radio_Phy_PdDataConfirm(mPhyTaskInstance, TRUE);
+ }
+ else
+ {
+ Radio_Phy_PdDataConfirm(mPhyTaskInstance, FALSE);
+ }
+ }
+ break;
+
+ case gRX_c:
+ if( NULL != mpRxParams )
+ {
+ // reports value of 0x00 for -105 dBm of received input power and 0xFF for 0 dBm of received input power
+ mPhyLastRxRSSI = MCR20Drv_DirectAccessSPIRead((uint8_t) LQI_VALUE);
+ mpRxParams->linkQuality = Phy_LqiConvert(mPhyLastRxRSSI);
+ mPhyLastRxLQI = mpRxParams->linkQuality;
+ MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) TIMESTAMP_LSB, (uint8_t *)&mpRxParams->timeStamp, 3);
+ mpRxParams->psduLength = (uint8_t)(mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c]); //Including FCS (2 bytes)
+ }
+ Radio_Phy_PdDataIndication(mPhyTaskInstance);
+ break;
+
+ case gCCA_c:
+ if( (mStatusAndControlRegs[PHY_CTRL4_INDEX_c] & (cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c)) == (gCcaED_c << cPHY_CTRL4_CCATYPE_Shift_c) )
+ {
+ // Ed
+ Radio_Phy_PlmeEdConfirm(MCR20Drv_DirectAccessSPIRead((uint8_t) CCA1_ED_FNL), mPhyTaskInstance);
+ }
+ else
+ {
+ // CCA
+ if( mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_CCA )
+ {
+#if (gUseStandaloneCCABeforeTx_d == 1)
+ phyLocal[mPhyTaskInstance].txParams.numOfCca = 0;
+#endif
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelBusy_c, mPhyTaskInstance);
+ }
+ else
+ {
+#if (gUseStandaloneCCABeforeTx_d == 1)
+ if( phyLocal[mPhyTaskInstance].txParams.numOfCca > 0 )
+ {
+ mStatusAndControlRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+
+ if( --phyLocal[mPhyTaskInstance].txParams.numOfCca == 0 )
+ {
+ // perform TxRxAck sequence if required by phyTxMode
+ if( gPhyRxAckRqd_c == phyLocal[mPhyTaskInstance].txParams.ackRequired )
+ {
+ mStatusAndControlRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_RXACKRQD);
+ mStatusAndControlRegs[PHY_CTRL1] |= gTR_c;
+ }
+ else
+ {
+ mStatusAndControlRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_RXACKRQD);
+ mStatusAndControlRegs[PHY_CTRL1] |= gTX_c;
+ }
+ }
+ else
+ {
+ mStatusAndControlRegs[PHY_CTRL1] |= gCCA_c;
+ }
+
+ mStatusAndControlRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
+ // start the sequence immediately
+ MCR20Drv_DirectAccessSPIMultiByteWrite(PHY_CTRL1,
+ &mStatusAndControlRegs[PHY_CTRL1],
+ 2);
+ }
+ else
+#endif
+ {
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelIdle_c, mPhyTaskInstance);
+ }
+ }
+ }
+ break;
+
+ case gCCCA_c:
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelIdle_c, mPhyTaskInstance);
+ break;
+
+ default:
+ Radio_Phy_PlmeSyncLossIndication(mPhyTaskInstance);
+ break;
+ }
+ }
+ // timers interrupt
+ else
+ {
+ if( mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR2IRQ )
+ {
+ // disable TMR2 comparator and time triggered action
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR2CMP_EN);
+ mStatusAndControlRegs[PHY_CTRL1_INDEX_c] &= (uint8_t) ~( cPHY_CTRL1_TMRTRIGEN);
+
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, mStatusAndControlRegs[PHY_CTRL1_INDEX_c]);
+
+ Radio_Phy_TimeStartEventIndication(mPhyTaskInstance);
+ }
+
+ if( mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR3IRQ )
+ {
+ /* disable TMR3 comparator and timeout */
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR3CMP_EN);
+ mStatusAndControlRegs[PHY_CTRL4_INDEX_c] &= (uint8_t) ~( cPHY_CTRL4_TC3TMOUT);
+
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL4, mStatusAndControlRegs[PHY_CTRL4_INDEX_c]);
+
+ /* Ensure that we're not issuing TimeoutIndication while the Automated sequence is still in progress */
+ /* TMR3 can expire during R-T turnaround for example, case in which the sequence is not interrupted */
+ if( gIdle_c == xcvseqCopy )
+ {
+ Radio_Phy_TimeRxTimeoutIndication(mPhyTaskInstance);
+ }
+ }
+
+ /* Timer 4 Compare Match */
+ if( mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR4IRQ )
+ {
+ /* disable TMR4 comparator */
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR4CMP_EN);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
+ }
+ }
+
+ MCR20Drv_IRQ_Enable();
+}
+
+/*! *********************************************************************************
+* \brief This function installs the PHY ISR
+*
+********************************************************************************** */
+void PHY_InstallIsr( void )
+{
+ /*Initialise RF interrupt pin*/
+ RF_IRQ_Init();
+
+ //GpioInstallIsr(PHY_InterruptHandler, gGpioIsrPrioHigh_c, MCR20_Irq_Priority, kGpioXcvrIrqPin);
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/PhyInterface.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,352 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyInterface.h
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _PHY_INTERFACE_H
+#define _PHY_INTERFACE_H
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "PhyTypes.h"
+//#include "Messaging.h"
+#include "PhyConfig.h"
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+/* Constants */
+#ifndef gMaxPhyTimers_c
+#define gMaxPhyTimers_c (5)
+#endif
+
+#ifdef gPHY_802_15_4g_d
+#define gPhySeqStartAsap_c (0xFFFFFFFFFFFFFFFF)
+#else
+#define gPhySeqStartAsap_c (0xFFFFFFFF)
+#endif
+
+/* XCVR active/idle power modes */
+#define gPhyDefaultActivePwrMode_c gPhyPwrAutodoze_c /* Do not change! */
+#define gPhyDefaultIdlePwrMode_c gPhyPwrAutodoze_c
+
+/************************************************************************************
+*************************************************************************************
+* Public prototypes
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+
+typedef enum
+{
+#include "PhyMessages.h"
+}phyMessageId_t;
+
+typedef enum{
+ gPhyPwrIdle_c,
+ gPhyPwrAutodoze_c,
+ gPhyPwrDoze_c,
+ gPhyPwrHibernate_c,
+ gPhyPwrReset_c
+}phyPwrMode_t;
+
+typedef struct pdDataReq_tag
+{
+ phyTime_t startTime; // absolute
+ uint32_t txDuration; // relative
+ phySlottedMode_t slottedTx;
+ phyCCAType_t CCABeforeTx;
+ phyAckRequired_t ackRequired;
+ uint8_t psduLength;
+#ifdef gPHY_802_15_4g_d
+ phyPHR_t phyHeader;
+ uint8_t macDataIndex;
+ uint8_t fillFifoBlockLength;
+#endif // gPHY_802_15_4g_d
+ uint8_t * pPsdu;
+} pdDataReq_t;
+
+typedef struct pdDataCnf_tag
+{
+ phyStatus_t status;
+} pdDataCnf_t;
+
+typedef struct pdDataInd_tag
+{
+ phyTimeTimestamp_t timeStamp;
+ uint8_t ppduLinkQuality;
+ uint8_t psduLength;
+ uint8_t * pPsdu;
+#ifdef gPHY_802_15_4g_d
+ uint32_t crcValue;
+ bool_t crcValid;
+#endif
+} pdDataInd_t;
+
+typedef struct pdIndQueueInsertReq_tag
+{
+ uint8_t index;
+ uint16_t checksum;
+} pdIndQueueInsertReq_t;
+
+typedef struct pdIndQueueInsertCnf_tag
+{
+ phyStatus_t status;
+} pdIndQueueInsertCnf_t;
+
+typedef struct pdIndQueueRemoveReq_tag
+{
+ uint8_t index;
+} pdIndQueueRemoveReq_t;
+
+typedef struct plmeEdReq_tag
+{
+ phyTime_t startTime; // absolute
+} plmeEdReq_t;
+
+typedef struct plmeCcaReq_tag
+{
+ phyCCAType_t ccaType;
+ phyContCCAMode_t contCcaMode;
+} plmeCcaReq_t;
+
+typedef struct plmeCcaCnf_tag
+{
+ phyStatus_t status;
+} plmeCcaCnf_t;
+
+typedef struct plmeEdCnf_tag
+{
+ phyStatus_t status;
+ uint8_t energyLevel;
+ uint8_t energyLeveldB;
+} plmeEdCnf_t;
+
+typedef struct plmeSetTRxStateReq_tag
+{
+ phyState_t state;
+ phySlottedMode_t slottedMode;
+ phyTime_t startTime; // absolute
+ uint32_t rxDuration; // relative
+} plmeSetTRxStateReq_t;
+
+typedef struct phyTimeEvent_tag
+{
+ phyTimeTimestamp_t timestamp; // absolute
+ phyTimeCallback_t callback;
+ uint32_t parameter;
+}phyTimeEvent_t;
+
+typedef struct plmeSetTRxStateCnf_tag
+{
+ phyStatus_t status;
+} plmeSetTRxStateCnf_t;
+
+typedef struct plmeSetReq_tag
+{
+ phyPibId_t PibAttribute;
+ uint64_t PibAttributeValue;
+} plmeSetReq_t;
+
+typedef struct plmeSetCnf_tag
+{
+ phyStatus_t status;
+ phyPibId_t PibAttribute;
+} plmeSetCnf_t;
+
+typedef struct plmeGetReq_tag
+{
+ phyPibId_t PibAttribute;
+ uint64_t * pPibAttributeValue;
+} plmeGetReq_t;
+
+typedef struct plmeGetCnf_tag
+{
+ phyStatus_t status;
+ phyPibId_t PibAttribute;
+ uint64_t PibAttributeValue;
+} plmeGetCnf_t;
+
+typedef struct macToPlmeMessage_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+ union
+ {
+ plmeEdReq_t edReq;
+ plmeCcaReq_t ccaReq;
+ plmeSetTRxStateReq_t setTRxStateReq;
+ plmeSetReq_t setReq;
+ plmeGetReq_t getReq;
+ }msgData;
+} macToPlmeMessage_t;
+
+typedef struct macToPdDataMessage_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+ union
+ {
+ pdDataReq_t dataReq;
+ pdIndQueueInsertReq_t indQueueInsertReq;
+ pdIndQueueRemoveReq_t indQueueRemoveReq;
+ }msgData;
+} macToPdDataMessage_t;
+
+typedef struct plmeToMacMessage_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+ union
+ {
+ plmeCcaCnf_t ccaCnf;
+ plmeEdCnf_t edCnf;
+ plmeSetTRxStateCnf_t setTRxStateCnf;
+ plmeSetCnf_t setCnf;
+ plmeGetCnf_t getCnf;
+ }msgData;
+} plmeToMacMessage_t;
+
+typedef struct pdDataToMacMessage_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+ union
+ {
+ pdDataCnf_t dataCnf;
+ pdDataInd_t dataInd;
+ pdIndQueueInsertCnf_t indQueueInsertCnf;
+ }msgData;
+} pdDataToMacMessage_t;
+
+typedef struct phyMessageHeader_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+} phyMessageHeader_t;
+
+typedef struct phyRxParams_tag {
+ phyTime_t timeStamp;
+ uint8_t psduLength;
+ uint8_t linkQuality;
+#ifdef gPHY_802_15_4g_d
+ uint8_t headerLength;
+ uint8_t macDataIndex;
+ uint8_t unfillFifoBlockLength;
+ phyPHR_t phyHeader;
+#else
+ phySlottedMode_t phyRxMode;
+ pdDataToMacMessage_t *pRxData;
+#endif // gPHY_802_15_4g_d
+} phyRxParams_t;
+
+typedef struct phyChannelParams_tag {
+ union{
+ phyStatus_t channelStatus;
+ uint8_t energyLeveldB;
+ };
+#ifdef gPHY_802_15_4g_d
+ uint8_t ccaThreshold;
+ uint8_t ccaParam;
+#endif // gPHY_802_15_4g_d
+} phyChannelParams_t;
+
+typedef struct phyTxParams_tag {
+ uint8_t numOfCca;
+ phyAckRequired_t ackRequired;
+} phyTxParams_t;
+
+typedef phyStatus_t ( * PD_MAC_SapHandler_t)(pdDataToMacMessage_t * pMsg, instanceId_t instanceId);
+
+typedef phyStatus_t ( * PLME_MAC_SapHandler_t)(plmeToMacMessage_t * pMsg, instanceId_t instanceId);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+extern const uint8_t gPhyIndirectQueueSize_c;
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+void Phy_Init( void );
+
+instanceId_t BindToPHY( instanceId_t macInstance );
+
+// SAPs
+void Phy_RegisterSapHandlers(PD_MAC_SapHandler_t pPD_MAC_SapHandler, PLME_MAC_SapHandler_t pPLME_MAC_SapHandler, instanceId_t instanceId);
+
+phyStatus_t MAC_PD_SapHandler(macToPdDataMessage_t * pMsg, instanceId_t phyInstance);
+
+phyStatus_t MAC_PLME_SapHandler(macToPlmeMessage_t * pMsg, instanceId_t phyInstance);
+
+// PHY Time
+void PhyTime_Maintenance ( void );
+
+void PhyTime_RunCallback ( void );
+
+void PhyTime_ISR ( void );
+
+phyTimeStatus_t PhyTime_TimerInit ( void (*cb)(void) );
+
+phyTimeTimestamp_t PhyTime_GetTimestamp ( void );
+
+phyTimeTimerId_t PhyTime_ScheduleEvent( phyTimeEvent_t *pEvent );
+
+phyTimeStatus_t PhyTime_CancelEvent ( phyTimeTimerId_t timerId );
+
+phyTimeStatus_t PhyTime_CancelEventsWithParam ( uint32_t param );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _PHY_INTERFACE_H */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/FSL_IEEE_802_15_4/PHY/PhyMessages.h Thu Jul 16 07:29:15 2015 +0000 @@ -0,0 +1,106 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file PhyMessages.h +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _PHY_MESSAGES_H +#define _PHY_MESSAGES_H + + +/************************************************************************************ +************************************************************************************* +* Include +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public macros +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public prototypes +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public type definitions +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public memory declarations +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public functions +************************************************************************************* +************************************************************************************/ + +/* 802.15.4-2006 standard PHY PD and PLME API messages */ + gPdDataReq_c, + gPdDataCnf_c, + gPdDataInd_c, + + gPdIndQueueInsertReq_c, + gPdIndQueueInsertCnf_c, + gPdIndQueueRemoveReq_c, + + gPlmeCcaReq_c, + gPlmeCcaCnf_c, + + gPlmeEdReq_c, + gPlmeEdCnf_c, + + gPlmeSetTRxStateReq_c, + gPlmeSetTRxStateCnf_c, + + gPlmeSetReq_c, + gPlmeSetCnf_c, + + gPlmeGetReq_c, + gPlmeGetCnf_c, + + gPlmeTimeoutInd_c, + + gPlme_StartEventInd_c, + gPlme_SyncLossInd_c, + gPlme_RxSfdDetectInd_c, + gPlme_FilterFailInd_c, + gPlme_UnexpectedRadioResetInd_c, + + +#endif /* _PHY_MESSAGES_H */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/PhyPacketProcessor.c Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,1136 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyPacketProcessor.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+#include "EmbeddedTypes.h"
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+#include "MCR20Overwrites.h"
+
+#include "Phy.h"
+#include "MpmInterface.h"
+
+#if 0
+#include "board.h"
+#include "fsl_os_abstraction.h"
+#include "fsl_gpio_driver.h"
+
+extern const IRQn_Type g_portIrqId[HW_PORT_INSTANCE_COUNT];
+#endif
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+// Address mode indentifiers. Used for both network and MAC interfaces
+#define gPhyAddrModeNoAddr_c (0)
+#define gPhyAddrModeInvalid_c (1)
+#define gPhyAddrMode16BitAddr_c (2)
+#define gPhyAddrMode64BitAddr_c (3)
+
+#define PHY_MIN_RNG_DELAY 4
+
+/************************************************************************************
+*************************************************************************************
+* Private variables
+*************************************************************************************
+************************************************************************************/
+
+const uint8_t gPhyIdlePwrState = gPhyDefaultIdlePwrMode_c;
+const uint8_t gPhyActivePwrState = gPhyDefaultActivePwrMode_c;
+
+const uint8_t gPhyIndirectQueueSize_c = 12;
+static uint8_t mPhyCurrentSamLvl = 12;
+static uint8_t mPhyPwrState = gPhyPwrIdle_c;
+
+/************************************************************************************
+*************************************************************************************
+* Public Functions
+*************************************************************************************
+************************************************************************************/
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyGetRandomNo
+ * Description: - This function should be called only when the Radio is idle.
+ * The function may take a long time to run!
+ * It is recomended to use this function only to initializa a seed at startup!
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+
+void PhyGetRandomNo(uint32_t *pRandomNo)
+{
+ uint8_t i = 4, prevRN=0;
+ uint8_t* ptr = (uint8_t *)pRandomNo;
+ uint32_t startTime, endTime;
+ uint8_t phyReg;
+
+ MCR20Drv_IRQ_Disable();
+
+ if( PhyPpGetState() )
+ {
+ *pRandomNo = 0;
+ MCR20Drv_IRQ_Enable();
+ return;
+ }
+
+ while (i--)
+ {
+ PhyTimeReadClock(&startTime);
+
+ // Program a new sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ MCR20Drv_DirectAccessSPIWrite( PHY_CTRL1, phyReg | gRX_c);
+
+ // wait a variable number of symbols */
+ do
+ PhyTimeReadClock(&endTime);
+ while( ((endTime - startTime) & 0x00FFFFFF) < (PHY_MIN_RNG_DELAY + (prevRN>>5)));
+
+ // Abort the sequence
+ PhyAbort();
+
+ // Read new 8 bit random number
+ prevRN = MCR20Drv_IndirectAccessSPIRead((uint8_t)_RNG);
+ *ptr++ = prevRN;
+ }
+
+ MCR20Drv_IRQ_Enable();
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetDualPanAuto
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetDualPanAuto
+(
+ bool_t mode
+)
+{
+ uint8_t phyReg, phyReg2;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+
+ if( mode )
+ {
+ phyReg2 = phyReg | (cDUAL_PAN_CTRL_DUAL_PAN_AUTO);
+ }
+ else
+ {
+ phyReg2 = phyReg & (~cDUAL_PAN_CTRL_DUAL_PAN_AUTO);
+ }
+
+ /* Write the new value only if it has changed */
+ if (phyReg2 != phyReg)
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg2);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanAuto
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpGetDualPanAuto
+(
+ void
+)
+{
+ uint8_t phyReg = MCR20Drv_IndirectAccessSPIRead(DUAL_PAN_CTRL);
+ return (phyReg & cDUAL_PAN_CTRL_DUAL_PAN_AUTO) == cDUAL_PAN_CTRL_DUAL_PAN_AUTO;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetDualPanDwell
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetDualPanDwell // TODO: check seq state and return phyStatus_t
+(
+ uint8_t dwell
+)
+{
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_DWELL, dwell);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanDwell
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetDualPanDwell
+(
+ void
+)
+{
+ return MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_DWELL);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanRemain
+ * Description: -
+ * Parameters: -
+ * Return: - the remaining Dwell time
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetDualPanRemain()
+{
+ return (MCR20Drv_IndirectAccessSPIRead(DUAL_PAN_STS) & cDUAL_PAN_STS_DUAL_PAN_REMAIN);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetDualPanSamLvl
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetDualPanSamLvl // TODO: check seq state and return phyStatus_t
+(
+ uint8_t level
+)
+{
+ uint8_t phyReg;
+#ifdef PHY_PARAMETERS_VALIDATION
+ if( level > gPhyIndirectQueueSize_c )
+ return;
+#endif
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+
+ phyReg &= ~cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_MSK; // clear current lvl
+ phyReg |= level << cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_Shift_c; // set new lvl
+
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg);
+ mPhyCurrentSamLvl = level;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanSamLvl
+ * Description: -
+ * Parameters: -
+ * Return:
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetDualPanSamLvl()
+{
+ return mPhyCurrentSamLvl;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetDualPanActiveNwk
+ * Description: - Select Active PAN
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetDualPanActiveNwk // TODO: check seq state and return phyStatus_t
+(
+ uint8_t nwk
+)
+{
+ uint8_t phyReg, phyReg2;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+
+ if( 0 == nwk )
+ {
+ phyReg2 = phyReg & (~cDUAL_PAN_CTRL_ACTIVE_NETWORK);
+ }
+ else
+ {
+ phyReg2 = phyReg | cDUAL_PAN_CTRL_ACTIVE_NETWORK;
+ }
+
+ /* Write the new value only if it has changed */
+ if( phyReg2 != phyReg )
+ {
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg2);
+ }
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanActiveNwk
+ * Description: -
+ * Parameters: -
+ * Return: - the Active PAN
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetDualPanActiveNwk(void)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t)DUAL_PAN_CTRL );
+
+ return (phyReg & cDUAL_PAN_CTRL_CURRENT_NETWORK) > 0;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanNwkOfRxPacket
+ * Description: -
+ * Parameters: -
+ * Return: - the Active PAN
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetPanOfRxPacket(void)
+{
+ uint8_t phyReg;
+ uint8_t PanBitMask = 0;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_STS);
+
+ if( phyReg & cDUAL_PAN_STS_RECD_ON_PAN0 )
+ PanBitMask |= (1<<0);
+
+ if( phyReg & cDUAL_PAN_STS_RECD_ON_PAN1 )
+ PanBitMask |= (1<<1);
+
+ return PanBitMask;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetPromiscuous
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetPromiscuous
+(
+ bool_t mode
+)
+{
+ uint8_t rxFrameFltReg, phyCtrl4Reg;
+
+ rxFrameFltReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) RX_FRAME_FILTER);
+ phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL4);
+
+ if( mode )
+ {
+ /* FRM_VER[1:0] = b00. 00: Any FrameVersion accepted (0,1,2 & 3) */
+ /* All frame types accepted*/
+ phyCtrl4Reg |= cPHY_CTRL4_PROMISCUOUS;
+ rxFrameFltReg &= ~(cRX_FRAME_FLT_FRM_VER);
+ rxFrameFltReg |= (cRX_FRAME_FLT_ACK_FT | cRX_FRAME_FLT_NS_FT);
+ }
+ else
+ {
+ phyCtrl4Reg &= ~cPHY_CTRL4_PROMISCUOUS;
+ /* FRM_VER[1:0] = b11. Accept FrameVersion 0 and 1 packets, reject all others */
+ /* Beacon, Data and MAC command frame types accepted */
+ rxFrameFltReg &= ~(cRX_FRAME_FLT_FRM_VER);
+ rxFrameFltReg |= (0x03 << cRX_FRAME_FLT_FRM_VER_Shift_c);
+ rxFrameFltReg &= ~(cRX_FRAME_FLT_ACK_FT | cRX_FRAME_FLT_NS_FT);
+ }
+
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) RX_FRAME_FILTER, rxFrameFltReg);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyCtrl4Reg);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhySetActivePromiscuous()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhySetActivePromiscuous(bool_t state)
+{
+ uint8_t phyCtrl4Reg;
+ uint8_t phyFrameFilterReg;
+// bool_t currentState;
+
+ phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL4);
+ phyFrameFilterReg = MCR20Drv_IndirectAccessSPIRead(RX_FRAME_FILTER);
+
+// currentState = (phyFrameFilterReg & cRX_FRAME_FLT_ACTIVE_PROMISCUOUS) ? TRUE : FALSE;
+//
+// if( state == currentState )
+// return;
+
+ /* if Prom is set */
+ if( state )
+ {
+ if( phyCtrl4Reg & cPHY_CTRL4_PROMISCUOUS )
+ {
+ /* Disable Promiscuous mode */
+ phyCtrl4Reg &= ~(cPHY_CTRL4_PROMISCUOUS);
+
+ /* Enable Active Promiscuous mode */
+ phyFrameFilterReg |= cRX_FRAME_FLT_ACTIVE_PROMISCUOUS;
+ }
+ }
+ else
+ {
+ if( phyFrameFilterReg & cRX_FRAME_FLT_ACTIVE_PROMISCUOUS )
+ {
+ /* Disable Active Promiscuous mode */
+ phyFrameFilterReg &= ~(cRX_FRAME_FLT_ACTIVE_PROMISCUOUS);
+
+ /* Enable Promiscuous mode */
+ phyCtrl4Reg |= cPHY_CTRL4_PROMISCUOUS;
+ }
+ }
+
+ MCR20Drv_DirectAccessSPIWrite((uint8_t) PHY_CTRL4, phyCtrl4Reg);
+ MCR20Drv_IndirectAccessSPIWrite(RX_FRAME_FILTER, phyFrameFilterReg);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyGetActivePromiscuous()
+ * Description: - returns the state of ActivePromiscuous feature (Enabled/Disabled)
+ * Parameters: -
+ * Return: - TRUE/FALSE
+ *---------------------------------------------------------------------------*/
+bool_t PhyGetActivePromiscuous( void )
+{
+ uint8_t phyReg = MCR20Drv_IndirectAccessSPIRead(RX_FRAME_FILTER);
+
+ if( phyReg & cRX_FRAME_FLT_ACTIVE_PROMISCUOUS )
+ return TRUE;
+
+ return FALSE;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetPanId
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetPanId
+(
+ uint8_t *pPanId,
+ uint8_t pan
+)
+{
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pPanId)
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( 0 == pan )
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACPANID0_LSB, pPanId, 2);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACPANID1_LSB, pPanId, 2);
+
+ return gPhySuccess_c;
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetShortAddr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetShortAddr
+(
+ uint8_t *pShortAddr,
+ uint8_t pan
+)
+{
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pShortAddr)
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( pan == 0 )
+ {
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACSHORTADDRS0_LSB, pShortAddr, 2);
+ }
+ else
+ {
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACSHORTADDRS1_LSB, pShortAddr, 2);
+ }
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetLongAddr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetLongAddr
+(
+ uint8_t *pLongAddr,
+ uint8_t pan
+)
+{
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pLongAddr)
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( 0 == pan )
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACLONGADDRS0_0, pLongAddr, 8);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACLONGADDRS1_0, pLongAddr, 8);
+
+ return gPhySuccess_c;
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetMacRole
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetMacRole
+(
+ bool_t macRole,
+ uint8_t pan
+)
+{
+ uint8_t phyReg;
+
+ if( 0 == pan )
+ {
+ phyReg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL4);
+
+ if(gMacRole_PanCoord_c == macRole)
+ {
+ phyReg |= cPHY_CTRL4_PANCORDNTR0;
+ }
+ else
+ {
+ phyReg &= ~cPHY_CTRL4_PANCORDNTR0;
+ }
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyReg);
+ }
+ else
+ {
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+
+ if(gMacRole_PanCoord_c == macRole)
+ {
+ phyReg |= cDUAL_PAN_CTRL_PANCORDNTR1;
+ }
+ else
+ {
+ phyReg &= ~cDUAL_PAN_CTRL_PANCORDNTR1;
+ }
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg);
+ }
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsTxAckDataPending
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsTxAckDataPending
+(
+void
+)
+{
+ uint8_t srcCtrlReg;
+
+ srcCtrlReg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL);
+ if( srcCtrlReg & cSRC_CTRL_SRCADDR_EN )
+ {
+ uint8_t irqsts2Reg;
+
+ irqsts2Reg = MCR20Drv_DirectAccessSPIRead((uint8_t) IRQSTS2);
+
+ if(irqsts2Reg & cIRQSTS2_SRCADDR)
+ return TRUE;
+ else
+ return FALSE;
+ }
+ else
+ {
+ return ((srcCtrlReg & cSRC_CTRL_ACK_FRM_PND) == cSRC_CTRL_ACK_FRM_PND);
+ }
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsRxAckDataPending
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsRxAckDataPending
+(
+ void
+)
+{
+ uint8_t irqsts1Reg;
+ irqsts1Reg = MCR20Drv_DirectAccessSPIRead((uint8_t) IRQSTS1);
+ if(irqsts1Reg & cIRQSTS1_RX_FRM_PEND)
+ {
+ return TRUE;
+ }
+ return FALSE;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetFpManually
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetFpManually
+(
+ bool_t FP
+)
+{
+ uint8_t phyReg;
+ /* Disable the Source Address Matching feature and set FP manually */
+ phyReg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL);
+ phyReg &= ~(cSRC_CTRL_SRCADDR_EN);
+ if(FP)
+ phyReg |= cSRC_CTRL_ACK_FRM_PND;
+ else
+ phyReg &= ~(cSRC_CTRL_ACK_FRM_PND);
+ MCR20Drv_DirectAccessSPIWrite(SRC_CTRL, phyReg);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsPollIndication
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsPollIndication
+(
+ void
+)
+{
+ uint8_t irqsts2Reg;
+ irqsts2Reg = MCR20Drv_DirectAccessSPIRead((uint8_t) IRQSTS2);
+ if(irqsts2Reg & cIRQSTS2_PI)
+ {
+ return TRUE;
+ }
+ return FALSE;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetCcaThreshold
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetCcaThreshold(uint8_t ccaThreshold)
+{
+ MCR20Drv_IndirectAccessSPIWrite((uint8_t) CCA1_THRESH, (uint8_t) ccaThreshold);
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetSAMState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetSAMState
+(
+ bool_t state
+)
+{
+ uint8_t phyReg, newPhyReg;
+ /* Disable/Enables the Source Address Matching feature */
+ phyReg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL);
+ if( state )
+ newPhyReg = phyReg | cSRC_CTRL_SRCADDR_EN;
+ else
+ newPhyReg = phyReg & ~(cSRC_CTRL_SRCADDR_EN);
+
+ if( newPhyReg != phyReg )
+ MCR20Drv_DirectAccessSPIWrite(SRC_CTRL, newPhyReg);
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetFADStateRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeSetFADStateRequest(bool_t state)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_AGC_CTRL);
+ state ? (phyReg |= cANT_AGC_CTRL_FAD_EN_Mask_c) : (phyReg &= (~((uint8_t)cANT_AGC_CTRL_FAD_EN_Mask_c)));
+ MCR20Drv_IndirectAccessSPIWrite(ANT_AGC_CTRL, phyReg);
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_PAD_CTRL);
+ state ? (phyReg |= 0x02) : (phyReg &= ~cANT_PAD_CTRL_ANTX_EN);
+ MCR20Drv_IndirectAccessSPIWrite(ANT_PAD_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetFADThresholdRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeSetFADThresholdRequest(uint8_t FADThreshold)
+{
+ MCR20Drv_IndirectAccessSPIWrite(FAD_THR, FADThreshold);
+ return gPhySuccess_c;
+}
+
+uint8_t PhyPlmeSetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_PAD_CTRL);
+ antAB_on ? (phyReg |= 0x02) : (phyReg &= ~0x02);
+ rxtxSwitch_on ? (phyReg |= 0x01) : (phyReg &= ~0x01);
+ MCR20Drv_IndirectAccessSPIWrite(ANT_PAD_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+uint8_t PhyPlmeSetANTPadStrengthRequest(bool_t hiStrength)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(MISC_PAD_CTRL);
+ hiStrength ? (phyReg |= cMISC_PAD_CTRL_ANTX_CURR) : (phyReg &= ~cMISC_PAD_CTRL_ANTX_CURR);
+ MCR20Drv_IndirectAccessSPIWrite(MISC_PAD_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+uint8_t PhyPlmeSetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(MISC_PAD_CTRL);
+ invAntA ? (phyReg |= 0x10) : (phyReg &= ~0x10);
+ invAntB ? (phyReg |= 0x20) : (phyReg &= ~0x20);
+ invTx ? (phyReg |= 0x40) : (phyReg &= ~0x40);
+ invRx ? (phyReg |= 0x80) : (phyReg &= ~0x80);
+ MCR20Drv_IndirectAccessSPIWrite(MISC_PAD_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetANTXStateRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeSetANTXStateRequest(bool_t state)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_AGC_CTRL);
+ state ? (phyReg |= cANT_AGC_CTRL_ANTX_Mask_c) : (phyReg &= (~((uint8_t)cANT_AGC_CTRL_ANTX_Mask_c)));
+ MCR20Drv_IndirectAccessSPIWrite(ANT_AGC_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetANTXStateRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeGetANTXStateRequest(void)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_AGC_CTRL);
+
+ return ((phyReg & cANT_AGC_CTRL_ANTX_Mask_c) == cANT_AGC_CTRL_ANTX_Mask_c);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPp_IndirectQueueInsert
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPp_IndirectQueueInsert // TODO: to validate add to indirect queue parameters
+(
+ uint8_t index,
+ uint16_t checkSum,
+ instanceId_t instanceId
+)
+{
+ uint16_t srcAddressCheckSum = checkSum;
+ uint8_t srcCtrlReg;
+
+ if( index >= gPhyIndirectQueueSize_c )
+ return gPhyInvalidParameter_c;
+
+ srcCtrlReg = (uint8_t) ( (index & cSRC_CTRL_INDEX) << cSRC_CTRL_INDEX_Shift_c );
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) SRC_CTRL, srcCtrlReg);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) SRC_ADDRS_SUM_LSB, (uint8_t *) &srcAddressCheckSum, 2);
+
+ srcCtrlReg |= ( cSRC_CTRL_SRCADDR_EN | cSRC_CTRL_INDEX_EN );
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) SRC_CTRL, srcCtrlReg);
+
+ return gPhySuccess_c;
+
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPp_RemoveFromIndirect
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPp_RemoveFromIndirect
+(
+ uint8_t index,
+ instanceId_t instanceId
+)
+{
+ uint8_t srcCtrlReg;
+
+ if( index >= gPhyIndirectQueueSize_c )
+ return gPhyInvalidParameter_c;
+
+ srcCtrlReg = (uint8_t)( ( (index & cSRC_CTRL_INDEX) << cSRC_CTRL_INDEX_Shift_c )
+ |( cSRC_CTRL_SRCADDR_EN )
+ |( cSRC_CTRL_INDEX_DISABLE) );
+
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) SRC_CTRL, srcCtrlReg);
+
+ return gPhySuccess_c;
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetState
+(
+ void
+)
+{
+ return (uint8_t)( MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL1) & cPHY_CTRL1_XCVSEQ );
+}
+
+/*! *********************************************************************************
+* \brief Aborts the current sequence and force the radio to IDLE
+*
+********************************************************************************** */
+void PhyAbort(void)
+{
+ uint8_t phyRegs[8];
+ volatile uint8_t currentTime = 0;
+
+ ProtectFromMCR20Interrupt();
+
+ phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 7);
+
+ // Disable timer trigger (for scheduled XCVSEQ)
+ if( phyRegs[PHY_CTRL1] & cPHY_CTRL1_TMRTRIGEN )
+ {
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_TMRTRIGEN );
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ // give the FSM enough time to start if it was triggered
+ currentTime = (uint8_t) ( MCR20Drv_DirectAccessSPIRead(EVENT_TMR_LSB) + 2 );
+ while(MCR20Drv_DirectAccessSPIRead(EVENT_TMR_LSB) != (uint8_t) (currentTime));
+
+ phyRegs[PHY_CTRL1] = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ }
+
+ if( (phyRegs[PHY_CTRL1] & cPHY_CTRL1_XCVSEQ) != gIdle_c )
+ {
+ // Abort current SEQ
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ // wait for Sequence Idle (if not already)
+ while ((MCR20Drv_DirectAccessSPIRead(SEQ_STATE) & 0x1F) != 0);
+ }
+
+ // mask SEQ interrupt
+ phyRegs[PHY_CTRL2] |= (uint8_t) (cPHY_CTRL2_SEQMSK);
+ // stop timers
+ phyRegs[PHY_CTRL3] &= (uint8_t) ~(cPHY_CTRL3_TMR2CMP_EN | cPHY_CTRL3_TMR3CMP_EN);
+ phyRegs[PHY_CTRL4] &= (uint8_t) ~(cPHY_CTRL4_TC3TMOUT);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(PHY_CTRL2, &phyRegs[PHY_CTRL2], 4);
+
+ // clear all PP IRQ bits to avoid unexpected interrupts
+ phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
+ phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
+ cIRQSTS3_TMR2IRQ |
+ cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
+
+ PhyIsrPassRxParams(NULL);
+
+ UnprotectFromMCR20Interrupt();
+}
+
+
+/*! *********************************************************************************
+* \brief Initialize the 802.15.4 Radio registers
+*
+********************************************************************************** */
+
+void PhyHwInit( void )
+{
+ uint8_t index;
+ uint8_t phyReg;
+
+ /* Initialize the transceiver SPI driver */
+ MCR20Drv_Init();
+ /* Configure the transceiver IRQ_B port */
+ MCR20Drv_IRQ_PortConfig();
+ /* Initialize the SPI driver and install PHY ISR */
+ PHY_InstallIsr();
+
+ //Disable Tristate on COCO MISO for SPI reads
+ MCR20Drv_IndirectAccessSPIWrite((uint8_t) MISC_PAD_CTRL, (uint8_t) 0x02);
+
+ // PHY_CTRL4 unmask global TRX interrupts, enable 16 bit mode for TC2 - TC2 prime EN
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL4, (uint8_t) (cPHY_CTRL4_TC2PRIME_EN | \
+ (gCcaCCA_MODE1_c << cPHY_CTRL4_CCATYPE_Shift_c)));
+
+ // clear all PP IRQ bits to avoid unexpected interrupts immediately after init, disable all timer interrupts
+ MCR20Drv_DirectAccessSPIWrite(IRQSTS1, (uint8_t) (cIRQSTS1_PLL_UNLOCK_IRQ | \
+ cIRQSTS1_FILTERFAIL_IRQ | \
+ cIRQSTS1_RXWTRMRKIRQ | \
+ cIRQSTS1_CCAIRQ | \
+ cIRQSTS1_RXIRQ | \
+ cIRQSTS1_TXIRQ | \
+ cIRQSTS1_SEQIRQ));
+
+ MCR20Drv_DirectAccessSPIWrite(IRQSTS2, (uint8_t) (cIRQSTS2_ASM_IRQ | \
+ cIRQSTS2_PB_ERR_IRQ | \
+ cIRQSTS2_WAKE_IRQ));
+
+ MCR20Drv_DirectAccessSPIWrite(IRQSTS3, (uint8_t) (cIRQSTS3_TMR4MSK | \
+ cIRQSTS3_TMR3MSK | \
+ cIRQSTS3_TMR2MSK | \
+ cIRQSTS3_TMR1MSK | \
+ cIRQSTS3_TMR4IRQ | \
+ cIRQSTS3_TMR3IRQ | \
+ cIRQSTS3_TMR2IRQ | \
+ cIRQSTS3_TMR1IRQ));
+
+ // PHY_CTRL1 default HW settings + AUTOACK enabled
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, (uint8_t) (cPHY_CTRL1_AUTOACK));
+
+ // PHY_CTRL2 : disable all interrupts
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL2, (uint8_t) (cPHY_CTRL2_CRC_MSK | \
+ cPHY_CTRL2_PLL_UNLOCK_MSK | \
+ cPHY_CTRL2_FILTERFAIL_MSK | \
+ cPHY_CTRL2_RX_WMRK_MSK | \
+ cPHY_CTRL2_CCAMSK | \
+ cPHY_CTRL2_RXMSK | \
+ cPHY_CTRL2_TXMSK | \
+ cPHY_CTRL2_SEQMSK));
+
+ // PHY_CTRL3 : disable all timers and remaining interrupts
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, (uint8_t) (cPHY_CTRL3_ASM_MSK | \
+ cPHY_CTRL3_PB_ERR_MSK | \
+ cPHY_CTRL3_WAKE_MSK));
+ // SRC_CTRL
+ MCR20Drv_DirectAccessSPIWrite(SRC_CTRL, (uint8_t) (cSRC_CTRL_ACK_FRM_PND | \
+ (cSRC_CTRL_INDEX << cSRC_CTRL_INDEX_Shift_c)));
+ // RX_FRAME_FILTER
+ // FRM_VER[1:0] = b11. Accept FrameVersion 0 and 1 packets, reject all others
+ MCR20Drv_IndirectAccessSPIWrite(RX_FRAME_FILTER, (uint8_t)(cRX_FRAME_FLT_FRM_VER | \
+ cRX_FRAME_FLT_BEACON_FT | \
+ cRX_FRAME_FLT_DATA_FT | \
+ cRX_FRAME_FLT_CMD_FT ));
+ // Direct register overwrites
+ for (index = 0; index < sizeof(overwrites_direct)/sizeof(overwrites_t); index++)
+ MCR20Drv_DirectAccessSPIWrite(overwrites_direct[index].address, overwrites_direct[index].data);
+
+ // Indirect register overwrites
+ for (index = 0; index < sizeof(overwrites_indirect)/sizeof(overwrites_t); index++)
+ MCR20Drv_IndirectAccessSPIWrite(overwrites_indirect[index].address, overwrites_indirect[index].data);
+
+ // Clear HW indirect queue
+ for( index = 0; index < gPhyIndirectQueueSize_c; index++ )
+ PhyPp_RemoveFromIndirect( index, 0 );
+
+ PhyPlmeSetCurrentChannelRequest(0x0B, 0); //2405 MHz
+#if gMpmIncluded_d
+ PhyPlmeSetCurrentChannelRequest(0x0B, 1); //2405 MHz
+
+ // Split the HW Indirect hash table in two
+ PhyPpSetDualPanSamLvl( gPhyIndirectQueueSize_c/2 );
+#else
+ // Assign HW Indirect hash table to PAN0
+ PhyPpSetDualPanSamLvl( gPhyIndirectQueueSize_c );
+#endif
+
+ // set the power level to 0dBm
+ PhyPlmeSetPwrLevelRequest(0x17);
+ // set CCA threshold to -75 dBm
+ PhyPpSetCcaThreshold(0x4B);
+ // Set prescaller to obtain 1 symbol (16us) timebase
+ MCR20Drv_IndirectAccessSPIWrite(TMR_PRESCALE, 0x05);
+ // write default Rx watermark level
+ MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, 0);
+
+ //Enable the RxWatermark IRQ and FilterFail IRQ
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL2);
+ //phyReg &= (uint8_t)~(cPHY_CTRL2_FILTERFAIL_MSK);
+ phyReg &= (uint8_t)~(cPHY_CTRL2_RX_WMRK_MSK);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL2, phyReg);
+
+ /* enable autodoze mode. */
+ phyReg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PWR_MODES);
+ phyReg |= (uint8_t) cPWR_MODES_AUTODOZE;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PWR_MODES, phyReg);
+ MCR20Drv_Set_CLK_OUT_Freq(gMCR20_ClkOutFreq_d);
+
+ // Clear IRQn Pending Status
+ MCR20Drv_IRQ_Clear();
+ //NVIC_ClearPendingIRQ(g_portIrqId[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)]);
+ /* enable the transceiver IRQ_B interrupt request */
+ MCR20Drv_IRQ_Enable();
+}
+
+/*! *********************************************************************************
+* \brief Change the XCVR power state
+*
+* \param[in] state the new XCVR power state
+*
+* \return phyStatus_t
+*
+* \pre Before entering hibernate/reset states, the MCG clock source must be changed
+* to use an input other than the one generated by the XCVR!
+*
+* \post When XCVR is in hibernate, indirect registers cannot be accessed in burst mode
+* When XCVR is in reset, all registers are inaccessible!
+*
+* \remarks Putting the XCVR into hibernate/reset will stop the generated clock signal!
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeSetPwrState( uint8_t state )
+{
+ uint8_t phyPWR, xtalState;
+
+ /* Parameter validation */
+ if( state > gPhyPwrReset_c )
+ return gPhyInvalidParameter_c;
+
+ /* Check if the new power state = old power state */
+ if( state == mPhyPwrState )
+ return gPhyBusy_c;
+
+ /* Check if the XCVR is in reset power mode */
+ if( mPhyPwrState == gPhyPwrReset_c )
+ {
+ MCR20Drv_RST_B_Deassert();
+ /* Wait for transceiver to deassert IRQ pin */
+ while( MCR20Drv_IsIrqPending() );
+ /* Wait for transceiver wakeup from POR iterrupt */
+ while( !MCR20Drv_IsIrqPending() );
+ /* After reset, the radio is in Idle state */
+ mPhyPwrState = gPhyPwrIdle_c;
+ /* Restore default radio settings */
+ PhyHwInit();
+ }
+
+ if( state != gPhyPwrReset_c )
+ {
+ phyPWR = MCR20Drv_DirectAccessSPIRead( PWR_MODES );
+ xtalState = phyPWR & cPWR_MODES_XTALEN;
+ }
+
+ switch( state )
+ {
+ case gPhyPwrIdle_c:
+ phyPWR &= ~(cPWR_MODES_AUTODOZE);
+ phyPWR |= (cPWR_MODES_XTALEN | cPWR_MODES_PMC_MODE);
+ break;
+
+ case gPhyPwrAutodoze_c:
+ phyPWR |= (cPWR_MODES_XTALEN | cPWR_MODES_AUTODOZE | cPWR_MODES_PMC_MODE);
+ break;
+
+ case gPhyPwrDoze_c:
+ phyPWR &= ~(cPWR_MODES_AUTODOZE | cPWR_MODES_PMC_MODE);
+ phyPWR |= cPWR_MODES_XTALEN;
+ break;
+
+ case gPhyPwrHibernate_c:
+ phyPWR &= ~(cPWR_MODES_XTALEN | cPWR_MODES_AUTODOZE | cPWR_MODES_PMC_MODE);
+ break;
+
+ case gPhyPwrReset_c:
+ MCR20Drv_IRQ_Disable();
+ mPhyPwrState = gPhyPwrReset_c;
+ MCR20Drv_RST_B_Assert();
+ return gPhySuccess_c;
+ }
+
+ mPhyPwrState = state;
+ MCR20Drv_DirectAccessSPIWrite( PWR_MODES, phyPWR );
+
+ if( !xtalState && (phyPWR & cPWR_MODES_XTALEN))
+ {
+ /* wait for crystal oscillator to complet its warmup */
+ while( ( MCR20Drv_DirectAccessSPIRead(PWR_MODES) & cPWR_MODES_XTAL_READY ) != cPWR_MODES_XTAL_READY);
+ /* wait for radio wakeup from hibernate interrupt */
+ while( ( MCR20Drv_DirectAccessSPIRead(IRQSTS2) & (cIRQSTS2_WAKE_IRQ | cIRQSTS2_TMRSTATUS) ) != (cIRQSTS2_WAKE_IRQ | cIRQSTS2_TMRSTATUS) );
+
+ MCR20Drv_DirectAccessSPIWrite(IRQSTS2, cIRQSTS2_WAKE_IRQ);
+ }
+
+ return gPhySuccess_c;
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/PhyPlmeData.c Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,687 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyPlmeData.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+
+//#include "fsl_os_abstraction.h"
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+#include "Phy.h"
+#include "PhyTypes.h"
+#include "PhyInterface.h"
+#include "MemManager.h"
+#include "FunctionLib.h"
+
+
+
+/************************************************************************************
+*************************************************************************************
+* Private macros
+*************************************************************************************
+************************************************************************************/
+#define PHY_PARAMETERS_VALIDATION 1
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+ //2405 2410 2415 2420 2425 2430 2435 2440 2445 2450 2455 2460 2465 2470 2475 2480
+static const uint8_t pll_int[16] = {0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0D, 0x0D, 0x0D, 0x0D};
+static const uint16_t pll_frac[16] = {0x2800, 0x5000, 0x7800, 0xA000, 0xC800, 0xF000, 0x1800, 0x4000, 0x6800, 0x9000, 0xB800, 0xE000, 0x0800, 0x3000, 0x5800, 0x8000};
+
+extern Phy_PhyLocalStruct_t phyLocal[];
+static uint8_t gPhyCurrentChannelPAN0 = 0x0B;
+static uint8_t gPhyCurrentChannelPAN1 = 0x0B;
+
+
+/************************************************************************************
+*************************************************************************************
+* Private prototypes
+*************************************************************************************
+************************************************************************************/
+static void PhyRxRetry( uint32_t param );
+
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief This function will start a TX sequence. The packet will be sent OTA
+*
+* \param[in] pTxPacket pointer to the TX packet structure
+* \param[in] pRxParams pointer to RX parameters
+* \param[in] pTxParams pointer to TX parameters
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPdDataRequest( pdDataReq_t *pTxPacket,
+ volatile phyRxParams_t *pRxParams,
+ volatile phyTxParams_t *pTxParams )
+{
+ uint8_t phyRegs[5], phyCtrl4Reg;
+ uint8_t *pTmpPsdu; //*tmp;
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ // null pointer
+ if(NULL == pTxPacket)
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+ // if CCA required ...
+ if( (pTxPacket->CCABeforeTx == gPhyCCAMode3_c) || (pTxPacket->CCABeforeTx == gPhyEnergyDetectMode_c))
+ { // ... cannot perform other types than MODE1 and MODE2
+ return gPhyInvalidParameter_c;
+ }
+
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( gIdle_c != PhyPpGetState() )
+ {
+ return gPhyBusy_c;
+ }
+
+ // load data into PB
+ pTmpPsdu = MEM_BufferAlloc(gMaxPHYPacketSize_c + 1);
+ *pTmpPsdu = pTxPacket->psduLength + 2;
+ FLib_MemCpy(pTmpPsdu+1, &pTxPacket->pPsdu[0], pTxPacket->psduLength);
+ MCR20Drv_PB_SPIBurstWrite(pTmpPsdu, (uint8_t) (pTxPacket->psduLength + 1)); /* including psduLength */
+ MEM_BufferFree(pTmpPsdu);
+
+
+#if 0
+ // load data into PB
+ tmp = pTxPacket->pPsdu;
+
+ pTmpPsdu = (uint8_t *) ((&pTxPacket->pPsdu[0])-1);
+ *pTmpPsdu = pTxPacket->psduLength + 2; /* including 2 bytes of FCS */
+ MCR20Drv_PB_SPIBurstWrite( pTmpPsdu, (uint8_t) (pTxPacket->psduLength + 1)); /* including psduLength */
+
+ pTxPacket->pPsdu = tmp;
+#endif
+
+ phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
+
+ // perform CCA before TX if required
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_CCABFRTX);
+ phyCtrl4Reg &= (uint8_t) ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c);
+
+ if( pTxPacket->CCABeforeTx != gPhyNoCCABeforeTx_c )
+ {
+#if (gUseStandaloneCCABeforeTx_d == 0)
+ phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_CCABFRTX);
+#endif
+ phyCtrl4Reg |= (uint8_t) ((cPHY_CTRL4_CCATYPE & pTxPacket->CCABeforeTx) << (cPHY_CTRL4_CCATYPE_Shift_c));
+ }
+
+ // slotted operation
+ if( pTxPacket->slottedTx == gPhySlottedMode_c )
+ {
+ phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_SLOTTED);
+ }
+ else
+ {
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_SLOTTED);
+ }
+
+ // perform TxRxAck sequence if required by phyTxMode
+ if(pTxPacket->ackRequired == gPhyRxAckRqd_c)
+ {
+ PhyIsrPassRxParams(pRxParams);
+
+ phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_RXACKRQD);
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gTR_c;
+ }
+ else
+ {
+ PhyIsrPassRxParams(NULL);
+
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_RXACKRQD);
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gTX_c;
+ }
+
+#if gUseStandaloneCCABeforeTx_d
+ if( pTxPacket->CCABeforeTx != gPhyNoCCABeforeTx_c )
+ {
+ // start the CCA or ED sequence (this depends on CcaType used)
+ // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
+ if( pTxPacket->slottedTx == gPhySlottedMode_c )
+ pTxParams->numOfCca = 2;
+ else
+ pTxParams->numOfCca = 1;
+ pTxParams->ackRequired = pTxPacket->ackRequired;
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gCCA_c;
+ // at the end of the scheduled sequence, an interrupt will occur:
+ // CCA , SEQ or TMR3
+ }
+ else
+ {
+ pTxParams->numOfCca = 0;
+ }
+#endif
+
+ phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
+
+ // ensure that no spurious interrupts are raised
+ phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
+ phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
+ cIRQSTS3_TMR2IRQ |
+ cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyCtrl4Reg);
+
+ // start the TX or TRX sequence
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function will start a RX sequence
+*
+* \param[in] phyRxMode slotted/unslotted
+* \param[in] pRxParams pointer to RX parameters
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeRxRequest( phySlottedMode_t phyRxMode, phyRxParams_t * pRxParams )
+{
+ uint8_t phyRegs[5];
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pRxParams)
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( gIdle_c != PhyPpGetState() )
+ {
+ return gPhyBusy_c;
+ }
+
+ pRxParams->phyRxMode = phyRxMode;
+
+ if( NULL == pRxParams->pRxData )
+ {
+ pRxParams->pRxData = MEM_BufferAlloc(sizeof(pdDataToMacMessage_t) + gMaxPHYPacketSize_c);
+ }
+
+ if( NULL == pRxParams->pRxData )
+ {
+ phyTimeEvent_t event = {
+ .timestamp = PhyTime_GetTimestamp() + gPhyRxRetryInterval_c,
+ .parameter = (uint32_t)pRxParams,
+ .callback = PhyRxRetry,
+ };
+
+ PhyTime_ScheduleEvent( &event );
+ return gPhyTRxOff_c;
+ }
+
+ PhyIsrPassRxParams(pRxParams);
+
+ pRxParams->pRxData->msgData.dataInd.pPsdu =
+ (uint8_t*)&pRxParams->pRxData->msgData.dataInd.pPsdu +
+ sizeof(pRxParams->pRxData->msgData.dataInd.pPsdu);
+
+ phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
+
+ // slotted operation
+ if(gPhySlottedMode_c == phyRxMode)
+ {
+ phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_SLOTTED);
+ }
+ else
+ {
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_SLOTTED);
+ }
+
+ // program the RX sequence
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gRX_c;
+
+ phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
+
+ // ensure that no spurious interrupts are raised
+ phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
+ phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
+ cIRQSTS3_TMR2IRQ |
+ cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
+
+ // start the RX sequence
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function will start a CCA / CCCA sequence
+*
+* \param[in] ccaParam the type of CCA
+* \param[in] cccaMode continuous or single CCA
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeCcaEdRequest( phyCCAType_t ccaParam, phyContCCAMode_t cccaMode )
+{
+ uint8_t phyRegs[5];
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ // illegal CCA type
+ if( (ccaParam != gPhyCCAMode1_c) && (ccaParam != gPhyCCAMode2_c) && (ccaParam != gPhyCCAMode3_c) && (ccaParam != gPhyEnergyDetectMode_c))
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+ // cannot perform Continuous CCA using ED type
+ if( (ccaParam == gPhyEnergyDetectMode_c) && (cccaMode == gPhyContCcaEnabled) )
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( gIdle_c != PhyPpGetState() )
+ {
+ return gPhyBusy_c;
+ }
+
+ // write in PHY CTRL4 the desired type of CCA
+ phyRegs[0] = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyRegs[0] &= (uint8_t) ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c);
+ phyRegs[0] |= (uint8_t) ((cPHY_CTRL4_CCATYPE & ccaParam) << (cPHY_CTRL4_CCATYPE_Shift_c));
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t)PHY_CTRL4, phyRegs[0]);
+
+ phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
+
+ // continuous CCA
+ if(cccaMode == gPhyContCcaEnabled)
+ {
+ // start the continuous CCA sequence
+ // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gCCCA_c;
+ // at the end of the scheduled sequence, an interrupt will occur:
+ // CCA , SEQ or TMR3
+ }
+ // normal CCA (not continuous)
+ else
+ {
+ // start the CCA or ED sequence (this depends on CcaType used)
+ // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gCCA_c;
+ // at the end of the scheduled sequence, an interrupt will occur:
+ // CCA , SEQ or TMR3
+ }
+
+ phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
+
+ // ensure that no spurious interrupts are raised
+ phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
+ phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
+ cIRQSTS3_TMR2IRQ |
+ cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
+
+ // start the CCA/ED or CCCA sequence
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function will set the channel number for the specified PAN
+*
+* \param[in] channel new channel number
+* \param[in] pan the PAN registers (0/1)
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeSetCurrentChannelRequest
+(
+ uint8_t channel,
+ uint8_t pan
+)
+{
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if((channel < 11) || (channel > 26))
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( !pan )
+ {
+ gPhyCurrentChannelPAN0 = channel;
+ MCR20Drv_DirectAccessSPIWrite(PLL_INT0, pll_int[channel - 11]);
+ MCR20Drv_DirectAccessSPIMultiByteWrite(PLL_FRAC0_LSB, (uint8_t *) &pll_frac[channel - 11], 2);
+ }
+ else
+ {
+ gPhyCurrentChannelPAN1 = channel;
+ MCR20Drv_IndirectAccessSPIWrite(PLL_INT1, pll_int[channel - 11]);
+ MCR20Drv_IndirectAccessSPIMultiByteWrite(PLL_FRAC1_LSB, (uint8_t *) &pll_frac[channel - 11], 2);
+ }
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function will return the current channel for a specified PAN
+*
+* \param[in] pan the PAN registers (0/1)
+*
+* \return uint8_t current channel number
+*
+********************************************************************************** */
+uint8_t PhyPlmeGetCurrentChannelRequest
+(
+ uint8_t pan
+)
+{
+ if( !pan )
+ return gPhyCurrentChannelPAN0;
+ else
+ return gPhyCurrentChannelPAN1;
+}
+
+/*! *********************************************************************************
+* \brief This function will set the radio Tx power
+*
+* \param[in] pwrStep the Tx power
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeSetPwrLevelRequest
+(
+ uint8_t pwrStep
+)
+{
+#ifdef PHY_PARAMETERS_VALIDATION
+ if((pwrStep < 3) || (pwrStep > 31)) //-40 dBm to 16 dBm
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ MCR20Drv_DirectAccessSPIWrite(PA_PWR, (uint8_t)(pwrStep & 0x1F));
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetLQIModeRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeSetLQIModeRequest(uint8_t lqiMode)
+{
+ uint8_t currentMode;
+
+ currentMode = MCR20Drv_IndirectAccessSPIRead(CCA_CTRL);
+ lqiMode ? (currentMode |= cCCA_CTRL_LQI_RSSI_NOT_CORR) : (currentMode &= (~((uint8_t)cCCA_CTRL_LQI_RSSI_NOT_CORR)));
+ MCR20Drv_IndirectAccessSPIWrite(CCA_CTRL, currentMode);
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetRSSILevelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeGetRSSILevelRequest(void)
+{
+ return MCR20Drv_IndirectAccessSPIRead(RSSI);
+}
+
+/*! *********************************************************************************
+* \brief This function will set the value of PHY PIBs
+*
+* \param[in] pibId the Id of the PIB
+* \param[in] pibValue the new value of the PIB
+* \param[in] phyRegistrySet the PAN registers (0/1)
+* \param[in] instanceId the instance of the PHY
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeSetPIBRequest(phyPibId_t pibId, uint64_t pibValue, uint8_t phyRegistrySet, instanceId_t instanceId)
+{
+ phyStatus_t result = gPhySuccess_c;
+
+ switch(pibId)
+ {
+ case gPhyPibCurrentChannel_c:
+ {
+ result = PhyPlmeSetCurrentChannelRequest((uint8_t) pibValue, phyRegistrySet);
+ }
+ break;
+ case gPhyPibTransmitPower_c:
+ {
+ result = PhyPlmeSetPwrLevelRequest((uint8_t) pibValue);
+ }
+ break;
+ case gPhyPibLongAddress_c:
+ {
+ uint64_t longAddr = pibValue;
+ result = PhyPpSetLongAddr((uint8_t *) &longAddr, phyRegistrySet);
+ }
+ break;
+ case gPhyPibShortAddress_c:
+ {
+ uint16_t shortAddr = (uint16_t) pibValue;
+ result = PhyPpSetShortAddr((uint8_t *) &shortAddr, phyRegistrySet);
+ }
+ break;
+ case gPhyPibPanId_c:
+ {
+ uint16_t panId = (uint16_t) pibValue;
+ result = PhyPpSetPanId((uint8_t *) &panId, phyRegistrySet);
+ }
+ break;
+ case gPhyPibPanCoordinator_c:
+ {
+ bool_t macRole = (bool_t) pibValue;
+ result = PhyPpSetMacRole(macRole, phyRegistrySet);
+ }
+ break;
+ case gPhyPibCurrentPage_c:
+ {
+ /* Nothinh to do... */
+ }
+ break;
+ case gPhyPibPromiscuousMode_c:
+ {
+ PhyPpSetPromiscuous((uint8_t)pibValue);
+ }
+ break;
+ case gPhyPibRxOnWhenIdle:
+ {
+ PhyPlmeSetRxOnWhenIdle( (bool_t)pibValue, instanceId );
+ }
+ break;
+ case gPhyPibFrameWaitTime_c:
+ {
+ PhyPlmeSetFrameWaitTime( (uint32_t)pibValue, instanceId );
+ }
+ break;
+ case gPhyPibDeferTxIfRxBusy_c:
+ {
+ if( pibValue )
+ phyLocal[instanceId].flags |= gPhyFlagDeferTx_c;
+ else
+ phyLocal[instanceId].flags &= ~gPhyFlagDeferTx_c;
+ }
+ break;
+ default:
+ {
+ result = gPhyUnsupportedAttribute_c;
+ }
+ break;
+ }
+
+ return result;
+}
+
+/*! *********************************************************************************
+* \brief This function will return the value of PHY PIBs
+*
+* \param[in] pibId the Id of the PIB
+* \param[out] pibValue pointer to a location where the value will be stored
+* \param[in] phyRegistrySet the PAN registers (0/1)
+* \param[in] instanceId the instance of the PHY
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeGetPIBRequest(phyPibId_t pibId, uint64_t * pibValue, uint8_t phyRegistrySet, instanceId_t instanceId)
+{
+ phyStatus_t result = gPhySuccess_c;
+ switch(pibId)
+ {
+ case gPhyPibCurrentChannel_c:
+ {
+ *((uint8_t*)pibValue) = (uint64_t) PhyPlmeGetCurrentChannelRequest(phyRegistrySet);
+ }
+ break;
+ case gPhyPibTransmitPower_c:
+ {
+ *((uint8_t*)pibValue) = MCR20Drv_DirectAccessSPIRead(PA_PWR);
+ }
+ break;
+ case gPhyPibLongAddress_c:
+ {
+ if( !phyRegistrySet )
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACLONGADDRS0_0, (uint8_t*)pibValue, 8);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACLONGADDRS1_0, (uint8_t*)pibValue, 8);
+ }
+ break;
+ case gPhyPibShortAddress_c:
+ {
+ if( !phyRegistrySet )
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACSHORTADDRS0_LSB, (uint8_t*)pibValue, 2);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACSHORTADDRS1_LSB, (uint8_t*)pibValue, 2);
+ }
+ break;
+ case gPhyPibPanId_c:
+ {
+ if( !phyRegistrySet )
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACPANID0_LSB, (uint8_t*)pibValue, 2);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACPANID1_LSB, (uint8_t*)pibValue, 2);
+ }
+ break;
+ case gPhyPibPanCoordinator_c:
+ {
+ uint8_t phyReg;
+
+ if( !phyRegistrySet )
+ {
+ phyReg = MCR20Drv_DirectAccessSPIRead( PHY_CTRL4);
+ phyReg = (phyReg & cPHY_CTRL4_PANCORDNTR0) == cPHY_CTRL4_PANCORDNTR0;
+ }
+ else
+ {
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+ phyReg = (phyReg & cDUAL_PAN_CTRL_PANCORDNTR1) == cDUAL_PAN_CTRL_PANCORDNTR1;
+ }
+
+ *((uint8_t*)pibValue) = phyReg;
+ }
+ break;
+ case gPhyPibRxOnWhenIdle:
+ {
+ *((uint8_t*)pibValue) = !!(phyLocal[instanceId].flags & gPhyFlagRxOnWhenIdle_c);
+ }
+ break;
+ case gPhyPibFrameWaitTime_c:
+ {
+ *((uint8_t*)pibValue) = phyLocal[instanceId].maxFrameWaitTime;
+ }
+ break;
+ case gPhyPibDeferTxIfRxBusy_c:
+ {
+ *((uint8_t*)pibValue) = !!(phyLocal[instanceId].flags & gPhyFlagDeferTx_c);
+ }
+ break;
+ default:
+ {
+ result = gPhyUnsupportedAttribute_c;
+ }
+ break;
+ }
+
+ return result;
+
+}
+
+/************************************************************************************
+*************************************************************************************
+* Private functions
+*************************************************************************************
+************************************************************************************/
+static void PhyRxRetry( uint32_t param )
+{
+ PhyPlmeRxRequest( ((phyRxParams_t*)param)->phyRxMode, (phyRxParams_t*)param );
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/PhyStateMachine.c Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,1044 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyStateMachine.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+#ifdef gSrcTask_d
+#undef gSrcTask_d
+#endif
+
+#define gSrcTask_d PHY
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+#include "EmbeddedTypes.h"
+
+//#include "fsl_os_abstraction.h"
+
+#include "PhyInterface.h"
+#include "Phy.h"
+
+
+#include "MemManager.h"
+#if 0
+#include "Messaging.h"
+#include "Panic.h"
+#include "FunctionLib.h"
+#endif
+
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+
+#include "AspInterface.h"
+#include "MpmInterface.h"
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+#define mPhyMaxIdleRxDuration_c (0xF00000) /* [sym] */
+
+#define ProtectFromXcvrInterrupt() ProtectFromMCR20Interrupt()
+#define UnprotectFromXcvrInterrupt() UnprotectFromMCR20Interrupt()
+
+/************************************************************************************
+*************************************************************************************
+* Private type definitions
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Private prototypes
+*************************************************************************************
+************************************************************************************/
+static void Phy24Task(Phy_PhyLocalStruct_t *pPhyData);
+
+static phyStatus_t Phy_HandlePdDataReq( Phy_PhyLocalStruct_t *pPhyData, macToPdDataMessage_t * pMsg );
+
+static void Phy_EnterIdle( Phy_PhyLocalStruct_t *pPhyData );
+
+static void PLME_SendMessage(Phy_PhyLocalStruct_t *pPhyData, phyMessageId_t msgType);
+
+static void PD_SendMessage(Phy_PhyLocalStruct_t *pPhyData, phyMessageId_t msgType);
+
+
+static void MSG_InitQueue(macPhyInputQueue_t * pMacPhyQueue);
+static void MSG_Queue(macPhyInputQueue_t * pMacPhyQueue, void * pMsgIn);
+static void MSG_QueueHead(macPhyInputQueue_t * pMacPhyQueue, void * pMsgIn);
+static bool_t MSG_Pending(macPhyInputQueue_t * pMacPhyQueue);
+static void * MSG_DeQueue(macPhyInputQueue_t * pMacPhyQueue);
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+Phy_PhyLocalStruct_t phyLocal[gPhyInstancesCnt_c];
+extern volatile uint32_t mPhySeqTimeout;
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief This function creates the PHY task
+*
+********************************************************************************** */
+void Phy_Init(void)
+{
+ uint32_t i;
+
+ PhyHwInit();
+ ASP_Init( 0, gAspInterfaceId );
+ MPM_Init();
+
+ for( i=0; i<gPhyInstancesCnt_c; i++ )
+ {
+ phyLocal[i].flags = gPhyFlagDeferTx_c;
+ phyLocal[i].rxParams.pRxData = NULL;
+
+ /* Prepare input queues.*/
+ MSG_InitQueue( &phyLocal[i].macPhyInputQueue );
+ }
+
+ PhyIsrPassRxParams( NULL );
+ PhyPlmeSetPwrState( gPhyDefaultIdlePwrMode_c );
+}
+
+/*! *********************************************************************************
+* \brief This function binds a MAC instance to a PHY instance
+*
+* \param[in] instanceId The instance of the MAC
+*
+* \return The instance of the PHY.
+*
+********************************************************************************** */
+instanceId_t BindToPHY( instanceId_t macInstance )
+{
+ return 0;
+}
+
+/*! *********************************************************************************
+* \brief This function registers the MAC PD and PLME SAP handlers
+*
+* \param[in] pPD_MAC_SapHandler Pointer to the MAC PD handler function
+* \param[in] pPLME_MAC_SapHandler Pointer to the MAC PLME handler function
+* \param[in] instanceId The instance of the PHY
+*
+* \return The status of the operation.
+*
+********************************************************************************** */
+void Phy_RegisterSapHandlers( PD_MAC_SapHandler_t pPD_MAC_SapHandler,
+ PLME_MAC_SapHandler_t pPLME_MAC_SapHandler,
+ instanceId_t instanceId )
+{
+ phyLocal[instanceId].PD_MAC_SapHandler = pPD_MAC_SapHandler;
+ phyLocal[instanceId].PLME_MAC_SapHandler = pPLME_MAC_SapHandler;
+}
+
+/*! *********************************************************************************
+* \brief This function represents the PHY's task
+*
+* \param[in] taskParam The instance of the PHY
+*
+********************************************************************************** */
+static void Phy24Task(Phy_PhyLocalStruct_t *pPhyStruct)
+{
+ uint8_t state;
+ phyMessageHeader_t * pMsgIn;
+ phyStatus_t status = gPhySuccess_c;
+
+ ProtectFromXcvrInterrupt();
+ state = PhyGetSeqState();
+
+ /* Handling messages from upper layer */
+ while( MSG_Pending(&pPhyStruct->macPhyInputQueue) )
+ {
+ /* PHY doesn't free dynamic alocated messages! */
+ pMsgIn = MSG_DeQueue( &pPhyStruct->macPhyInputQueue );
+ pPhyStruct->currentMacInstance = pMsgIn->macInstance;
+
+ if( gRX_c == state )
+ {
+ if( (pPhyStruct->flags & gPhyFlagDeferTx_c) && (pMsgIn->msgType == gPdDataReq_c) )
+ {
+ macToPdDataMessage_t *pPD = (macToPdDataMessage_t*)pMsgIn;
+ uint8_t phyReg = MCR20Drv_DirectAccessSPIRead(SEQ_STATE) & 0x1F;
+ /* Check for an Rx in progress, and if the packet can be defered.
+ Packet cannot be defered */
+ if( (pPD->msgData.dataReq.CCABeforeTx != gPhyNoCCABeforeTx_c) &&
+ (pPD->msgData.dataReq.startTime == gPhySeqStartAsap_c) &&
+ (pPD->msgData.dataReq.slottedTx == gPhyUnslottedMode_c) &&
+ (phyReg <= 0x06 || phyReg == 0x15 || phyReg == 0x16) )
+ {
+ MSG_QueueHead( &pPhyStruct->macPhyInputQueue, pMsgIn );
+ UnprotectFromXcvrInterrupt();
+ return;
+ }
+ }
+
+// if( pPhyStruct->flags & gPhyFlagIdleRx_c )
+ {
+ PhyPlmeForceTrxOffRequest();
+ state = gIdle_c;
+ pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
+ }
+ }
+
+ if( gIdle_c != state )
+ {
+ /* try again later */
+ MSG_QueueHead( &pPhyStruct->macPhyInputQueue, pMsgIn );
+ UnprotectFromXcvrInterrupt();
+ return;
+ }
+
+#if gMpmIncluded_d
+ if( status == gPhySuccess_c )
+ {
+ status = MPM_PrepareForTx( pMsgIn->macInstance );
+ }
+#endif
+
+ if( status == gPhySuccess_c )
+ {
+ pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
+
+ switch( pMsgIn->msgType )
+ {
+ case gPdDataReq_c:
+ status = Phy_HandlePdDataReq( pPhyStruct, (macToPdDataMessage_t *)pMsgIn );
+ break;
+ case gPlmeCcaReq_c:
+ status = PhyPlmeCcaEdRequest(gPhyCCAMode1_c, gPhyContCcaDisabled);
+ break;
+ case gPlmeEdReq_c:
+ status = PhyPlmeCcaEdRequest(gPhyEnergyDetectMode_c, gPhyContCcaDisabled);
+ break;
+ default:
+ status = gPhyInvalidPrimitive_c;
+ }
+ }
+
+ /* Check status */
+ if( gPhySuccess_c == status )
+ {
+ UnprotectFromXcvrInterrupt();
+ return;
+ }
+ else
+ {
+ switch( pMsgIn->msgType )
+ {
+ case gPdDataReq_c:
+ if( ((macToPdDataMessage_t*)pMsgIn)->msgData.dataReq.CCABeforeTx == gPhyNoCCABeforeTx_c )
+ {
+ PD_SendMessage(pPhyStruct, gPdDataCnf_c);
+ break;
+ }
+ /* Fallthorough */
+ case gPlmeCcaReq_c:
+ pPhyStruct->channelParams.channelStatus = gPhyChannelBusy_c;
+ PLME_SendMessage(pPhyStruct, gPlmeCcaCnf_c);
+ break;
+ case gPlmeEdReq_c:
+ pPhyStruct->channelParams.energyLeveldB = 0;
+ PLME_SendMessage(pPhyStruct, gPlmeEdCnf_c);
+ break;
+ default:
+ PLME_SendMessage(pPhyStruct, gPlmeTimeoutInd_c);
+ }
+ }
+ }/* while( MSG_Pending(&pPhyStruct->macPhyInputQueue) ) */
+
+ UnprotectFromXcvrInterrupt();
+
+ /* Check if PHY can enter Idle state */
+ if( gIdle_c == state )
+ {
+ Phy_EnterIdle( pPhyStruct );
+ }
+}
+
+/*! *********************************************************************************
+* \brief This is the PD SAP message handler
+*
+* \param[in] pMsg Pointer to the PD request message
+* \param[in] instanceId The instance of the PHY
+*
+* \return The status of the operation.
+*
+********************************************************************************** */
+phyStatus_t MAC_PD_SapHandler(macToPdDataMessage_t *pMsg, instanceId_t phyInstance)
+{
+ phyStatus_t result = gPhySuccess_c;
+ uint8_t baseIndex = 0;
+
+ if( NULL == pMsg )
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+#if gMpmIncluded_d
+ if( pMsg->msgType == gPdIndQueueInsertReq_c || pMsg->msgType == gPdIndQueueRemoveReq_c )
+ {
+ baseIndex = MPM_GetRegSet( MPM_GetPanIndex( pMsg->macInstance ) ) *
+ (gPhyIndirectQueueSize_c/gMpmPhyPanRegSets_c);
+ }
+#endif
+
+ switch( pMsg->msgType )
+ {
+ case gPdIndQueueInsertReq_c:
+ result = PhyPp_IndirectQueueInsert(baseIndex + pMsg->msgData.indQueueInsertReq.index,
+ pMsg->msgData.indQueueInsertReq.checksum,
+ phyInstance);
+ break;
+
+ case gPdIndQueueRemoveReq_c:
+ result = PhyPp_RemoveFromIndirect(baseIndex + pMsg->msgData.indQueueRemoveReq.index,
+ phyInstance);
+ break;
+
+ case gPdDataReq_c:
+ MSG_Queue(&phyLocal[phyInstance].macPhyInputQueue, pMsg);
+ Phy24Task( &phyLocal[phyInstance] );
+ break;
+
+ default:
+ result = gPhyInvalidPrimitive_c;
+ }
+
+ return result;
+}
+
+/*! *********************************************************************************
+* \brief This is the PLME SAP message handler
+*
+* \param[in] pMsg Pointer to the PLME request message
+* \param[in] instanceId The instance of the PHY
+*
+* \return phyStatus_t The status of the operation.
+*
+********************************************************************************** */
+phyStatus_t MAC_PLME_SapHandler(macToPlmeMessage_t * pMsg, instanceId_t phyInstance)
+{
+ Phy_PhyLocalStruct_t *pPhyStruct = &phyLocal[phyInstance];
+ uint8_t phyRegSet = 0;
+#if gMpmIncluded_d
+ phyStatus_t result;
+ int32_t panIdx = MPM_GetPanIndex( pMsg->macInstance );
+
+ phyRegSet = MPM_GetRegSet( panIdx );
+#endif
+
+ if( NULL == pMsg )
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+ switch( pMsg->msgType )
+ {
+ case gPlmeEdReq_c:
+ case gPlmeCcaReq_c:
+ MSG_Queue(&phyLocal[phyInstance].macPhyInputQueue, pMsg);
+ Phy24Task( &phyLocal[phyInstance] );
+ break;
+
+ case gPlmeSetReq_c:
+#if gMpmIncluded_d
+ result = MPM_SetPIB(pMsg->msgData.setReq.PibAttribute,
+ &pMsg->msgData.setReq.PibAttributeValue,
+ panIdx );
+ if( !MPM_isPanActive(panIdx) )
+ {
+ return result;
+ }
+#endif
+ return PhyPlmeSetPIBRequest(pMsg->msgData.setReq.PibAttribute, pMsg->msgData.setReq.PibAttributeValue, phyRegSet, phyInstance);
+
+ case gPlmeGetReq_c:
+#if gMpmIncluded_d
+ if( gPhySuccess_c == MPM_GetPIB(pMsg->msgData.getReq.PibAttribute, pMsg->msgData.getReq.pPibAttributeValue, panIdx) )
+ {
+ break;
+ }
+#endif
+ return PhyPlmeGetPIBRequest( pMsg->msgData.getReq.PibAttribute, pMsg->msgData.getReq.pPibAttributeValue, phyRegSet, phyInstance);
+
+ case gPlmeSetTRxStateReq_c:
+ if(gPhySetRxOn_c == pMsg->msgData.setTRxStateReq.state)
+ {
+ if( PhyIsIdleRx(phyInstance) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ }
+ else if( gIdle_c != PhyGetSeqState() )
+ {
+ return gPhyBusy_c;
+ }
+#if gMpmIncluded_d
+ /* If another PAN has the RxOnWhenIdle PIB set, enable the DualPan Auto mode */
+ if( gPhySuccess_c != MPM_PrepareForRx( pMsg->macInstance ) )
+ return gPhyBusy_c;
+#endif
+ pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
+ Phy_SetSequenceTiming(pMsg->msgData.setTRxStateReq.startTime,
+ pMsg->msgData.setTRxStateReq.rxDuration);
+
+ return PhyPlmeRxRequest(pMsg->msgData.setTRxStateReq.slottedMode, (phyRxParams_t *) &pPhyStruct->rxParams);
+ }
+ else if (gPhyForceTRxOff_c == pMsg->msgData.setTRxStateReq.state)
+ {
+#if gMpmIncluded_d
+ if( !MPM_isPanActive(panIdx) )
+ return gPhySuccess_c;
+#endif
+ pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
+ PhyPlmeForceTrxOffRequest();
+ }
+ break;
+
+ default:
+ return gPhyInvalidPrimitive_c;
+ }
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function programs a new TX sequence
+*
+* \param[in] pMsg Pointer to the PD request message
+* \param[in] pPhyData pointer to PHY data
+*
+* \return The status of the operation.
+*
+********************************************************************************** */
+static phyStatus_t Phy_HandlePdDataReq( Phy_PhyLocalStruct_t *pPhyData, macToPdDataMessage_t * pMsg )
+{
+ phyStatus_t status = gPhySuccess_c;
+ uint32_t time;
+
+ if( NULL == pMsg->msgData.dataReq.pPsdu )
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+ ProtectFromXcvrInterrupt();
+
+ if( pMsg->msgData.dataReq.startTime != gPhySeqStartAsap_c )
+ {
+ PhyTimeSetEventTrigger( (uint16_t) pMsg->msgData.dataReq.startTime );
+ }
+
+ status = PhyPdDataRequest(&pMsg->msgData.dataReq , &pPhyData->rxParams, &pPhyData->txParams);
+
+ if( pMsg->msgData.dataReq.txDuration != gPhySeqStartAsap_c )
+ {
+ OSA_EnterCritical(kCriticalDisableInt);
+ PhyTimeReadClock( &time );
+ time += pMsg->msgData.dataReq.txDuration;
+ /* Compensate PHY overhead, including WU time */
+ time += 54;
+ PhyTimeSetEventTimeout( &time );
+ OSA_ExitCritical(kCriticalDisableInt);
+ }
+
+ UnprotectFromXcvrInterrupt();
+
+ if( gPhySuccess_c != status )
+ {
+ PhyTimeDisableEventTrigger();
+ PhyTimeDisableEventTimeout();
+ }
+
+ return status;
+}
+
+/*! *********************************************************************************
+* \brief This function sets the start time and the timeout value for a sequence.
+*
+* \param[in] startTime The absolute start time for the sequence.
+* If startTime is gPhySeqStartAsap_c, the start timer is disabled.
+* \param[in] seqDuration The duration of the sequence.
+* If seqDuration is 0xFFFFFFFF, the timeout is disabled.
+*
+********************************************************************************** */
+void Phy_SetSequenceTiming(uint32_t startTime, uint32_t seqDuration)
+{
+ uint32_t endTime;
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ if( gPhySeqStartAsap_c == startTime )
+ {
+ PhyTimeReadClock( &endTime );
+ }
+ else
+ {
+ PhyTimeSetEventTrigger( (uint16_t) startTime );
+ endTime = startTime & gPhyTimeMask_c;
+ }
+
+ if( 0xFFFFFFFF != seqDuration )
+ {
+ endTime += seqDuration;
+ endTime = endTime & gPhyTimeMask_c;
+
+ PhyTimeSetEventTimeout( &(endTime) );
+ }
+
+ OSA_ExitCritical(kCriticalDisableInt);
+}
+
+/*! *********************************************************************************
+* \brief This function starts the IdleRX if the PhyRxOnWhenIdle PIB is set
+*
+* \param[in] pPhyData pointer to PHY data
+*
+********************************************************************************** */
+void Phy_EnterIdle( Phy_PhyLocalStruct_t *pPhyData )
+{
+ if( (pPhyData->flags & gPhyFlagRxOnWhenIdle_c)
+#if gMpmIncluded_d
+ /* Prepare the Active PAN/PANs */
+ && (gPhySuccess_c == MPM_PrepareForRx(gInvalidInstanceId_c))
+#endif
+ )
+ {
+ pPhyData->flags |= gPhyFlagIdleRx_c;
+ Phy_SetSequenceTiming( gPhySeqStartAsap_c, mPhyMaxIdleRxDuration_c );
+ (void)PhyPlmeRxRequest( gPhyUnslottedMode_c, (phyRxParams_t*)&pPhyData->rxParams );
+ }
+ else
+ {
+ pPhyData->flags &= ~(gPhyFlagIdleRx_c);
+ }
+}
+
+/*! *********************************************************************************
+* \brief This function sets the value of the maxFrameWaitTime PIB
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] time The maxFrameWaitTime value
+*
+********************************************************************************** */
+void PhyPlmeSetFrameWaitTime( uint32_t time, instanceId_t instanceId )
+{
+ phyLocal[instanceId].maxFrameWaitTime = time;
+}
+
+/*! *********************************************************************************
+* \brief This function sets the state of the PhyRxOnWhenIdle PIB
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] state The PhyRxOnWhenIdle value
+*
+********************************************************************************** */
+void PhyPlmeSetRxOnWhenIdle( bool_t state, instanceId_t instanceId )
+{
+ uint8_t radioState = PhyGetSeqState();
+#if gMpmIncluded_d
+ /* Check if at least one PAN has RxOnWhenIdle set */
+ if( FALSE == state )
+ {
+ uint32_t i;
+
+ for( i=0; i<gMpmMaxPANs_c; i++ )
+ {
+ MPM_GetPIB( gPhyPibRxOnWhenIdle, &state, i );
+ if( state )
+ break;
+ }
+ }
+#endif
+ if( state )
+ {
+ phyLocal[instanceId].flags |= gPhyFlagRxOnWhenIdle_c;
+ if( radioState == gIdle_c)
+ {
+ Phy_EnterIdle( &phyLocal[instanceId] );
+ }
+#if gMpmIncluded_d
+ else if( (radioState == gRX_c) && (phyLocal[instanceId].flags & gPhyFlagIdleRx_c) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ Phy_EnterIdle( &phyLocal[instanceId] );
+ }
+#endif
+ }
+ else
+ {
+ phyLocal[instanceId].flags &= ~gPhyFlagRxOnWhenIdle_c;
+ if( (radioState == gRX_c) && (phyLocal[instanceId].flags & gPhyFlagIdleRx_c) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ phyLocal[instanceId].flags &= ~gPhyFlagIdleRx_c;
+ }
+ }
+}
+
+/*! *********************************************************************************
+* \brief This function starts the IdleRX if the PhyRxOnWhenIdle PIB is set
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+bool_t PhyIsIdleRx( instanceId_t instanceId )
+{
+ if( (phyLocal[instanceId].flags & gPhyFlagIdleRx_c) && (gRX_c == PhyGetSeqState()))
+ return TRUE;
+
+ return FALSE;
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a TX operation completed successfully.
+* If the received ACK has FP=1, then the radio will enter RX state for
+* maxFrameWaitTime duration.
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] framePending The value of the framePending bit for the received ACK
+*
+********************************************************************************** */
+void Radio_Phy_PdDataConfirm(instanceId_t instanceId, bool_t framePending)
+{
+ PhyTimeDisableEventTimeout();
+
+ if( framePending )
+ {
+ phyLocal[instanceId].flags |= gPhyFlagFramePending_c;
+ if( phyLocal[instanceId].maxFrameWaitTime > 0 )
+ {
+ /* Restart Rx asap if an ACK with FP=1 is received */
+ phyLocal[instanceId].flags &= ~(gPhyFlagIdleRx_c);
+ Phy_SetSequenceTiming( gPhySeqStartAsap_c, phyLocal[instanceId].maxFrameWaitTime );
+ PhyPlmeRxRequest( gPhyUnslottedMode_c, (phyRxParams_t *) &phyLocal[instanceId].rxParams );
+ }
+ }
+ else
+ {
+ phyLocal[instanceId].flags &= ~gPhyFlagFramePending_c;
+ }
+
+ PD_SendMessage(&phyLocal[instanceId], gPdDataCnf_c);
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that new data has been received
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_PdDataIndication(instanceId_t instanceId)
+{
+ PhyTimeDisableEventTimeout();
+
+ PD_SendMessage(&phyLocal[instanceId], gPdDataInd_c);
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that timer1 compare match occured
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_TimeWaitTimeoutIndication(instanceId_t instanceId)
+{
+ PhyTime_ISR();
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a CCA sequence has finished
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] phyChannelStatus The status of the channel: Idle/Busy
+*
+* \return None.
+*
+********************************************************************************** */
+void Radio_Phy_PlmeCcaConfirm(phyStatus_t phyChannelStatus, instanceId_t instanceId)
+{
+ PhyTimeDisableEventTimeout();
+
+ phyLocal[instanceId].channelParams.channelStatus = phyChannelStatus;
+
+ PLME_SendMessage(&phyLocal[instanceId], gPlmeCcaCnf_c);
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a ED sequence has finished
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] energyLevel The enetgy level on the channel.
+* \param[in] energyLeveldB The energy level in DB
+*
+********************************************************************************** */
+void Radio_Phy_PlmeEdConfirm(uint8_t energyLeveldB, instanceId_t instanceId)
+{
+ PhyTimeDisableEventTimeout();
+
+ phyLocal[instanceId].channelParams.energyLeveldB = energyLeveldB;
+
+ PLME_SendMessage(&phyLocal[instanceId], gPlmeEdCnf_c);
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that the programmed sequence has timed out
+* The Radio is forced to Idle.
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_TimeRxTimeoutIndication(instanceId_t instanceId)
+{
+ if( !(phyLocal[instanceId].flags & gPhyFlagIdleRx_c) )
+ PLME_SendMessage(&phyLocal[instanceId], gPlmeTimeoutInd_c);
+
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that the programmed sequence has started
+*
+* \param[in] instanceId The instance of the PHY
+*
+* \return None.
+*
+********************************************************************************** */
+void Radio_Phy_TimeStartEventIndication(instanceId_t instanceId)
+{
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_StartEventInd_c);
+ Phy24Task(&phyLocal[instanceId]);
+#endif
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a SFD was detected.
+* Also, if there is not enough time to receive the entire packet, the
+* RX timeout will be extended.
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] frameLen the length of the PSDU
+*
+********************************************************************************** */
+void Radio_Phy_PlmeRxSfdDetect(instanceId_t instanceId, uint32_t frameLen)
+{
+ if( phyLocal[instanceId].flags & gPhyFlagDeferTx_c )
+ {
+ uint32_t currentTime;
+ uint32_t time;
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ //Read currentTime and Timeout values [sym]
+ PhyTimeReadClock(¤tTime);
+
+ frameLen = frameLen * 2 + 12 + 22 + 2; //Convert to symbols and add IFS and ACK duration
+
+ if( mPhySeqTimeout > currentTime )
+ {
+ time = mPhySeqTimeout - currentTime;
+ }
+ else
+ {
+ time = (gPhyTimeMask_c - currentTime + mPhySeqTimeout) & gPhyTimeMask_c;
+ }
+
+ if( time > 4 )
+ {
+ mPhySeqTimeout = (currentTime + frameLen) & gPhyTimeMask_c;
+ MCR20Drv_DirectAccessSPIMultiByteWrite( T3CMP_LSB, (uint8_t *)&mPhySeqTimeout, 3);
+ }
+
+ OSA_ExitCritical(kCriticalDisableInt);
+ }
+
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_RxSfdDetectInd_c);
+ Phy24Task(&phyLocal[instanceId]);
+#endif
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a Sync Loss occured (PLL unlock)
+* The Radio is forced to Idle.
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_PlmeSyncLossIndication(instanceId_t instanceId)
+{
+ PhyPlmeForceTrxOffRequest();
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_SyncLossInd_c);
+#endif
+ Radio_Phy_TimeRxTimeoutIndication(instanceId);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a Filter Fail occured
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_PlmeFilterFailRx(instanceId_t instanceId)
+{
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_FilterFailInd_c);
+ Phy24Task(&phyLocal[instanceId]);
+#endif
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that an unexpected Transceiver Reset
+* occured and force the TRX to Off
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_UnexpectedTransceiverReset(instanceId_t instanceId)
+{
+ PhyPlmeForceTrxOffRequest();
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_UnexpectedRadioResetInd_c);
+#endif
+ Radio_Phy_TimeRxTimeoutIndication(instanceId);
+}
+
+/*! *********************************************************************************
+* \brief Senf a PLME message to upper layer
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] msgType The type of message to be sent
+*
+********************************************************************************** */
+static void PLME_SendMessage(Phy_PhyLocalStruct_t *pPhyStruct, phyMessageId_t msgType)
+{
+ plmeToMacMessage_t * pMsg = MEM_BufferAlloc(sizeof(plmeToMacMessage_t));
+
+ if(NULL == pMsg)
+ {
+ //panic(0,(uint32_t)PLME_SendMessage,0,msgType);
+ return;
+ }
+
+ pMsg->msgType = msgType;
+
+ switch(msgType)
+ {
+ case gPlmeCcaCnf_c:
+ pMsg->msgData.ccaCnf.status = pPhyStruct->channelParams.channelStatus;
+ break;
+
+ case gPlmeEdCnf_c:
+ pMsg->msgData.edCnf.status = gPhySuccess_c;
+ pMsg->msgData.edCnf.energyLeveldB = pPhyStruct->channelParams.energyLeveldB;
+ pMsg->msgData.edCnf.energyLevel = Phy_GetEnergyLevel(pPhyStruct->channelParams.energyLeveldB);
+ break;
+
+ default:
+ /* No aditional info needs to be filled */
+ break;
+ }
+
+ pPhyStruct->PLME_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
+}
+
+/*! *********************************************************************************
+* \brief Senf a PD message to upper layer
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] msgType The type of message to be sent
+*
+********************************************************************************** */
+static void PD_SendMessage(Phy_PhyLocalStruct_t *pPhyStruct, phyMessageId_t msgType)
+{
+ pdDataToMacMessage_t *pMsg;
+
+ if( msgType == gPdDataInd_c )
+ {
+ uint32_t temp;
+ uint16_t len = pPhyStruct->rxParams.psduLength - 2; //Excluding FCS (2 bytes);
+
+ pMsg = pPhyStruct->rxParams.pRxData;
+ pPhyStruct->rxParams.pRxData = NULL;
+
+#if !gUsePBTransferThereshold_d
+ MCR20Drv_PB_SPIBurstRead( (uint8_t *)(pMsg->msgData.dataInd.pPsdu), len );
+#endif
+
+ pMsg->msgType = gPdDataInd_c;
+ pMsg->msgData.dataInd.ppduLinkQuality = pPhyStruct->rxParams.linkQuality;
+ pMsg->msgData.dataInd.psduLength = len;
+
+ pMsg->msgData.dataInd.timeStamp = PhyTime_GetTimestamp(); //current timestamp (64bit)
+ temp = (uint32_t)(pMsg->msgData.dataInd.timeStamp & gPhyTimeMask_c); //convert to 24bit
+ pMsg->msgData.dataInd.timeStamp -= (temp - pPhyStruct->rxParams.timeStamp) & gPhyTimeMask_c;
+#if !(gMpmIncluded_d)
+ pPhyStruct->PD_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
+#else
+ {
+ uint32_t i, bitMask = PhyPpGetPanOfRxPacket();
+
+ for( i=0; i<gMpmPhyPanRegSets_c; i++ )
+ {
+ if( bitMask & (1 << i) )
+ {
+ bitMask &= ~(1 << i);
+ pPhyStruct->currentMacInstance = MPM_GetMacInstanceFromRegSet(i);
+
+ /* If the packet passed filtering on muliple PANs, send a copy to each one */
+ if( bitMask )
+ {
+ pdDataToMacMessage_t *pDataIndCopy;
+
+ pDataIndCopy = MEM_BufferAlloc(sizeof(pdDataToMacMessage_t) + len);
+
+ if( pDataIndCopy )
+ {
+ FLib_MemCpy(pDataIndCopy, pMsg, sizeof(pdDataToMacMessage_t) + len);
+ pPhyStruct->PD_MAC_SapHandler(pDataIndCopy, pPhyStruct->currentMacInstance);
+ }
+ }
+ else
+ {
+ pPhyStruct->PD_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
+ break;
+ }
+ }
+ }
+ }
+#endif
+ }
+ else
+ {
+ pMsg = MEM_BufferAlloc( sizeof(pdDataToMacMessage_t) );
+
+ if(NULL == pMsg)
+ {
+ //panic(0,(uint32_t)PD_SendMessage,0,gPdDataCnf_c);
+ return;
+ }
+
+ pMsg->msgType = gPdDataCnf_c;
+
+ if( pPhyStruct->flags & gPhyFlagFramePending_c )
+ {
+ pPhyStruct->flags &= ~(gPhyFlagFramePending_c);
+ pMsg->msgData.dataCnf.status = gPhyFramePending_c;
+ }
+ else
+ {
+ pMsg->msgData.dataCnf.status = gPhySuccess_c;
+ }
+
+ pPhyStruct->PD_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
+ }
+}
+
+void MSG_InitQueue(macPhyInputQueue_t * pMacPhyQueue)
+{
+ pMacPhyQueue->msgInIdx = 0;
+ FLib_MemSet(&pMacPhyQueue->pMsgIn[0], 0x00, gPhyMsgQueueMax_c * sizeof(void*));
+}
+
+/* Check if a message is pending in a queue. Returns */
+/* TRUE if any pending messages, and FALSE otherwise. */
+bool_t MSG_Pending(macPhyInputQueue_t * pMacPhyQueue)
+{
+ return (pMacPhyQueue->msgInIdx > 0);
+}
+
+/* Get a message from a queue. Returns NULL if no messages in queue. */
+void * MSG_DeQueue(macPhyInputQueue_t * pMacPhyQueue)
+{
+ phyMessageHeader_t * pMsgIn = NULL;
+ uint32_t i = 0;
+
+ if(MSG_Pending(pMacPhyQueue))
+ {
+ pMsgIn = pMacPhyQueue->pMsgIn[0];
+
+ while(i < pMacPhyQueue->msgInIdx)
+ {
+ pMacPhyQueue->pMsgIn[i] = pMacPhyQueue->pMsgIn[i+1];
+ i++;
+ }
+
+ pMacPhyQueue->msgInIdx--;
+ pMacPhyQueue->pMsgIn[pMacPhyQueue->msgInIdx] = NULL;
+ }
+
+ return pMsgIn;
+}
+
+
+void MSG_Queue(macPhyInputQueue_t * pMacPhyQueue, void * pMsgIn)
+{
+ if(pMacPhyQueue->msgInIdx < gPhyMsgQueueMax_c)
+ {
+ pMacPhyQueue->pMsgIn[pMacPhyQueue->msgInIdx] = pMsgIn;
+ pMacPhyQueue->msgInIdx++;
+ }
+}
+
+void MSG_QueueHead(macPhyInputQueue_t * pMacPhyQueue, void * pMsgIn)
+{
+ uint32_t i = gPhyMsgQueueMax_c - 1;
+
+ if(pMacPhyQueue->msgInIdx < gPhyMsgQueueMax_c)
+ {
+ while(i > 0)
+ {
+ pMacPhyQueue->pMsgIn[i] = pMacPhyQueue->pMsgIn[i-1];
+ i--;
+ }
+ pMacPhyQueue->pMsgIn[0] = pMsgIn;
+ pMacPhyQueue->msgInIdx++;
+ }
+}
+
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/PhyTime.c Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,702 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyTime.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+#include "EmbeddedTypes.h"
+//#include "fsl_os_abstraction.h"
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+#include "Phy.h"
+
+#include "FunctionLib.h"
+
+/************************************************************************************
+*************************************************************************************
+* Private macros
+*************************************************************************************
+************************************************************************************/
+#define gPhyTimeMinSetupTime_c (10) /* symbols */
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+void (*gpfPhyTimeNotify)(void) = NULL;
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+static phyTimeEvent_t mPhyTimers[gMaxPhyTimers_c];
+static phyTimeEvent_t *pNextEvent;
+volatile uint32_t mPhySeqTimeout;
+volatile uint64_t gPhyTimerOverflow;
+
+/************************************************************************************
+*************************************************************************************
+* Private prototypes
+*************************************************************************************
+************************************************************************************/
+static void PhyTime_OverflowCB( uint32_t param );
+static phyTimeEvent_t* PhyTime_GetNextEvent( void );
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief Sets the start time of a sequence
+*
+* \param[in] startTime the start time for a sequence
+*
+********************************************************************************** */
+void PhyTimeSetEventTrigger
+(
+ uint32_t startTime
+)
+{
+ uint8_t phyReg, phyCtrl3Reg;
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= cPHY_CTRL1_TMRTRIGEN; // enable autosequence start by TC2 match
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+
+ phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyCtrl3Reg &= ~(cPHY_CTRL3_TMR2CMP_EN);// disable TMR2 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T2PRIMECMP_LSB, (uint8_t *) &startTime, 2);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change other IRQs status
+ phyReg &= ~(cIRQSTS3_TMR2MSK); // unmask TMR2 interrupt
+ phyReg |= (cIRQSTS3_TMR2IRQ); // aknowledge TMR2 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ // TC2PRIME_EN must be enabled in PHY_CTRL4 register
+ phyCtrl3Reg |= cPHY_CTRL3_TMR2CMP_EN; // enable TMR2 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ OSA_ExitCritical(kCriticalDisableInt);
+}
+
+/*! *********************************************************************************
+* \brief Disable the time trigger for a sequence.
+*
+* \remarks The sequence will start asap
+*
+********************************************************************************** */
+void PhyTimeDisableEventTrigger
+(
+ void
+)
+{
+ uint8_t phyReg;
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg &= ~(cPHY_CTRL1_TMRTRIGEN); // disable autosequence start by TC2 match
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyReg &= ~(cPHY_CTRL3_TMR2CMP_EN);// disable TMR2 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change other IRQs status
+ phyReg |= (cIRQSTS3_TMR2MSK); // mask TMR2 interrupt
+ phyReg |= (cIRQSTS3_TMR2IRQ); // aknowledge TMR2 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ OSA_ExitCritical(kCriticalDisableInt);
+}
+
+/*! *********************************************************************************
+* \brief Sets the timeout value for a sequence
+*
+* \param[in] pEndTime the absolute time when a sequence should terminate
+*
+* \remarks If the sequence does not finish until the timeout, it will be aborted
+*
+********************************************************************************** */
+void PhyTimeSetEventTimeout
+(
+ uint32_t *pEndTime
+)
+{
+ uint8_t phyReg, phyCtrl3Reg;
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pEndTime)
+ {
+ return;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyCtrl3Reg &= ~(cPHY_CTRL3_TMR3CMP_EN);// disable TMR3 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyReg |= cPHY_CTRL4_TC3TMOUT; // enable autosequence stop by TC3 match
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyReg);
+
+ mPhySeqTimeout = *pEndTime & 0x00FFFFFF;
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T3CMP_LSB, (uint8_t *) pEndTime, 3);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change IRQ status
+// phyReg &= ~(cIRQSTS3_TMR3MSK); // unmask TMR3 interrupt
+ phyReg |= (cIRQSTS3_TMR3IRQ); // aknowledge TMR3 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ phyCtrl3Reg |= cPHY_CTRL3_TMR3CMP_EN; // enable TMR3 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ OSA_ExitCritical(kCriticalDisableInt);
+}
+
+/*! *********************************************************************************
+* \brief Return the timeout value for the current sequence
+*
+* \return uint32_t the timeout value
+*
+********************************************************************************** */
+uint32_t PhyTimeGetEventTimeout( void )
+{
+ return mPhySeqTimeout;
+}
+
+/*! *********************************************************************************
+* \brief Disables the sequence timeout
+*
+********************************************************************************** */
+void PhyTimeDisableEventTimeout
+(
+ void
+)
+{
+ uint8_t phyReg;
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyReg &= ~(cPHY_CTRL4_TC3TMOUT); // disable autosequence stop by TC3 match
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyReg &= ~(cPHY_CTRL3_TMR3CMP_EN);// disable TMR3 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change IRQ status
+ phyReg |= cIRQSTS3_TMR3IRQ; // aknowledge TMR3 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ OSA_ExitCritical(kCriticalDisableInt);
+}
+
+/*! *********************************************************************************
+* \brief Reads the absolute clock from the radio
+*
+* \param[out] pRetClk pointer to a location where the current clock will be stored
+*
+********************************************************************************** */
+void PhyTimeReadClock
+(
+ uint32_t *pRetClk
+)
+{
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pRetClk)
+ {
+ return;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) EVENT_TMR_LSB, (uint8_t *) pRetClk, 3);
+ *(((uint8_t *)pRetClk) + 3) = 0;
+
+ OSA_ExitCritical(kCriticalDisableInt);
+
+}
+
+/*! *********************************************************************************
+* \brief Initialize the Event Timer
+*
+* \param[in] pAbsTime pointer to the location where the new time is stored
+*
+********************************************************************************** */
+void PhyTimeInitEventTimer
+(
+ uint32_t *pAbsTime
+)
+{
+ uint8_t phyCtrl4Reg;
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pAbsTime)
+ {
+ return;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyCtrl4Reg |= cPHY_CTRL4_TMRLOAD; // self clearing bit
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T1CMP_LSB, (uint8_t *) pAbsTime, 3);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyCtrl4Reg);
+
+ OSA_ExitCritical(kCriticalDisableInt);
+}
+
+/*! *********************************************************************************
+* \brief Set TMR1 timeout value
+*
+* \param[in] pWaitTimeout the timeout value
+*
+********************************************************************************** */
+void PhyTimeSetWaitTimeout
+(
+ uint32_t *pWaitTimeout
+)
+{
+ uint8_t phyCtrl3Reg, irqSts3Reg;
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyCtrl3Reg &= ~(cPHY_CTRL3_TMR1CMP_EN);// disable TMR1 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T1CMP_LSB, (uint8_t *) pWaitTimeout, 3);
+
+ irqSts3Reg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ irqSts3Reg &= ~(cIRQSTS3_TMR1MSK); // unmask TMR1 interrupt
+ irqSts3Reg &= 0xF0; // do not change other IRQs status
+ irqSts3Reg |= (cIRQSTS3_TMR1IRQ); // aknowledge TMR1 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, irqSts3Reg);
+
+ phyCtrl3Reg |= cPHY_CTRL3_TMR1CMP_EN; // enable TMR1 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ OSA_ExitCritical(kCriticalDisableInt);
+
+}
+
+/*! *********************************************************************************
+* \brief Disable the TMR1 timeout
+*
+********************************************************************************** */
+void PhyTimeDisableWaitTimeout
+(
+ void
+)
+{
+ uint8_t phyReg;
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyReg &= ~(cPHY_CTRL3_TMR1CMP_EN);// disable TMR1 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change IRQ status
+ phyReg |= cIRQSTS3_TMR1IRQ; // aknowledge TMR1 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ OSA_ExitCritical(kCriticalDisableInt);
+}
+
+/*! *********************************************************************************
+* \brief Set TMR4 timeout value
+*
+* \param[in] pWakeUpTime absolute time
+*
+********************************************************************************** */
+void PhyTimeSetWakeUpTime
+(
+ uint32_t *pWakeUpTime
+)
+{
+ uint8_t phyCtrl3Reg, irqSts3Reg;
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+// phyCtrl3Reg &= ~(cPHY_CTRL3_TMR4CMP_EN);// disable TMR4 compare
+// MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T4CMP_LSB, (uint8_t *) pWakeUpTime, 3);
+
+ irqSts3Reg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ irqSts3Reg &= ~(cIRQSTS3_TMR4MSK); // unmask TMR4 interrupt
+ irqSts3Reg &= 0xF0; // do not change other IRQs status
+ irqSts3Reg |= (cIRQSTS3_TMR4IRQ); // aknowledge TMR4 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, irqSts3Reg);
+
+ phyCtrl3Reg |= cPHY_CTRL3_TMR4CMP_EN; // enable TMR4 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ OSA_ExitCritical(kCriticalDisableInt);
+}
+
+/*! *********************************************************************************
+* \brief Check if TMR4 IRQ occured, and aknowledge it
+*
+* \return TRUE if TMR4 IRQ occured
+*
+********************************************************************************** */
+bool_t PhyTimeIsWakeUpTimeExpired
+(
+ void
+)
+{
+ bool_t wakeUpIrq = FALSE;
+ uint8_t phyReg;
+
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyReg &= ~(cPHY_CTRL3_TMR4CMP_EN);// disable TMR4 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+
+ if( (phyReg & cIRQSTS3_TMR4IRQ) == cIRQSTS3_TMR4IRQ )
+ {
+ wakeUpIrq = TRUE;
+ }
+
+ phyReg &= ~(cIRQSTS3_TMR4MSK); // unmask TMR4 interrupt
+ phyReg &= 0xF0; // do not change other IRQs status
+ phyReg |= (cIRQSTS3_TMR4IRQ); // aknowledge TMR2 IRQ
+
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ OSA_ExitCritical(kCriticalDisableInt);
+
+ return wakeUpIrq;
+}
+
+
+/*! *********************************************************************************
+* \brief PHY Timer Interrupt Service Routine
+*
+********************************************************************************** */
+void PhyTime_ISR(void)
+{
+ if( pNextEvent->callback == PhyTime_OverflowCB )
+ {
+ gPhyTimerOverflow++;
+ }
+
+ if( gpfPhyTimeNotify )
+ {
+ gpfPhyTimeNotify();
+ }
+ else
+ {
+ PhyTime_RunCallback();
+ PhyTime_Maintenance();
+ }
+}
+
+/*! *********************************************************************************
+* \brief Initialize the PHY Timer module
+*
+* \return phyTimeStatus_t
+*
+********************************************************************************** */
+phyTimeStatus_t PhyTime_TimerInit( void (*cb)(void) )
+{
+ if( gpfPhyTimeNotify )
+ return gPhyTimeError_c;
+
+ gpfPhyTimeNotify = cb;
+ gPhyTimerOverflow = 0;
+ FLib_MemSet( mPhyTimers, 0, sizeof(mPhyTimers) );
+
+ /* Schedule Overflow Calback */
+ pNextEvent = &mPhyTimers[0];
+ pNextEvent->callback = PhyTime_OverflowCB;
+ pNextEvent->timestamp = (gPhyTimerOverflow+1) << gPhyTimeShift_c;
+ PhyTimeSetWaitTimeout( (uint32_t*)&pNextEvent->timestamp );
+
+ return gPhyTimeOk_c;
+}
+
+/*! *********************************************************************************
+* \brief Returns a 64bit timestamp value to be used by the MAC Layer
+*
+* \return phyTimeTimestamp_t PHY timestamp
+*
+********************************************************************************** */
+phyTimeTimestamp_t PhyTime_GetTimestamp(void)
+{
+ phyTimeTimestamp_t time = 0;
+
+ OSA_EnterCritical(kCriticalDisableInt);
+ PhyTimeReadClock( (uint32_t*)&time );
+ time |= (gPhyTimerOverflow << gPhyTimeShift_c);
+ OSA_ExitCritical(kCriticalDisableInt);
+
+ return time;
+}
+
+/*! *********************************************************************************
+* \brief Schedules an event
+*
+* \param[in] pEvent event to be scheduled
+*
+* \return phyTimeTimerId_t the id of the alocated timer
+*
+********************************************************************************** */
+phyTimeTimerId_t PhyTime_ScheduleEvent( phyTimeEvent_t *pEvent )
+{
+ phyTimeTimerId_t tmr;
+
+ /* Parameter validation */
+ if( NULL == pEvent->callback )
+ {
+ return gInvalidTimerId_c;
+ }
+
+ /* Search for a free slot (slot 0 is reserved for the Overflow calback) */
+ OSA_EnterCritical(kCriticalDisableInt);
+ for( tmr=1; tmr<gMaxPhyTimers_c; tmr++ )
+ {
+ if( mPhyTimers[tmr].callback == NULL )
+ {
+ mPhyTimers[tmr] = *pEvent;
+ break;
+ }
+ }
+ OSA_ExitCritical(kCriticalDisableInt);
+
+ if( tmr >= gMaxPhyTimers_c )
+ return gInvalidTimerId_c;
+
+ /* Program the next event */
+ if((NULL == pNextEvent) ||
+ (NULL != pNextEvent && mPhyTimers[tmr].timestamp < pNextEvent->timestamp))
+ {
+ PhyTime_Maintenance();
+ }
+
+ return tmr;
+}
+
+/*! *********************************************************************************
+* \brief Cancel an event
+*
+* \param[in] timerId the Id of the timer
+*
+* \return phyTimeStatus_t
+*
+********************************************************************************** */
+phyTimeStatus_t PhyTime_CancelEvent( phyTimeTimerId_t timerId )
+{
+ if( (timerId == 0) || (timerId >= gMaxPhyTimers_c) || (NULL == mPhyTimers[timerId].callback) )
+ {
+ return gPhyTimeNotFound_c;
+ }
+
+ OSA_EnterCritical(kCriticalDisableInt);
+ if( pNextEvent == &mPhyTimers[timerId] )
+ pNextEvent = NULL;
+
+ mPhyTimers[timerId].callback = NULL;
+ OSA_ExitCritical(kCriticalDisableInt);
+
+ return gPhyTimeOk_c;
+}
+
+/*! *********************************************************************************
+* \brief Cancel all event with the specified paameter
+*
+* \param[in] param event parameter
+*
+* \return phyTimeStatus_t
+*
+********************************************************************************** */
+phyTimeStatus_t PhyTime_CancelEventsWithParam ( uint32_t param )
+{
+ uint32_t i;
+ phyTimeStatus_t status = gPhyTimeNotFound_c;
+
+ OSA_EnterCritical(kCriticalDisableInt);
+ for( i=1; i<gMaxPhyTimers_c; i++ )
+ {
+ if( mPhyTimers[i].callback && (param == mPhyTimers[i].parameter) )
+ {
+ status = gPhyTimeOk_c;
+ mPhyTimers[i].callback = NULL;
+ if( pNextEvent == &mPhyTimers[i] )
+ pNextEvent = NULL;
+ }
+ }
+ OSA_ExitCritical(kCriticalDisableInt);
+
+ return status;
+}
+
+/*! *********************************************************************************
+* \brief Run the callback for the recently expired event
+*
+********************************************************************************** */
+void PhyTime_RunCallback( void )
+{
+ uint32_t param;
+ phyTimeCallback_t cb;
+
+ if( pNextEvent )
+ {
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ param = pNextEvent->parameter;
+ cb = pNextEvent->callback;
+ pNextEvent->callback = NULL;
+ pNextEvent = NULL;
+
+ OSA_ExitCritical(kCriticalDisableInt);
+
+ cb(param);
+ }
+}
+
+/*! *********************************************************************************
+* \brief Expire events too close to be scheduled.
+* Program the next event
+*
+********************************************************************************** */
+void PhyTime_Maintenance( void )
+{
+ phyTimeTimestamp_t currentTime;
+ phyTimeEvent_t *pEv;
+
+ PhyTimeDisableWaitTimeout();
+
+ while(1)
+ {
+ OSA_EnterCritical(kCriticalDisableInt);
+
+ pEv = PhyTime_GetNextEvent();
+ currentTime = PhyTime_GetTimestamp();
+
+ /* Program next event if exists */
+ if( pEv )
+ {
+ pNextEvent = pEv;
+
+ if( pEv->timestamp > (currentTime + gPhyTimeMinSetupTime_c) )
+ {
+ PhyTimeSetWaitTimeout( (uint32_t*)&pEv->timestamp );
+ pEv = NULL;
+ }
+ }
+
+ OSA_ExitCritical(kCriticalDisableInt);
+
+ if( !pEv )
+ break;
+
+ PhyTime_RunCallback();
+ }
+
+}
+
+
+/*! *********************************************************************************
+* \brief Timer Overflow callback
+*
+* \param[in] param
+*
+********************************************************************************** */
+static void PhyTime_OverflowCB( uint32_t param )
+{
+ (void)param;
+
+ /* Reprogram the next overflow callback */
+ mPhyTimers[0].callback = PhyTime_OverflowCB;
+ mPhyTimers[0].timestamp = (gPhyTimerOverflow+1) << 24;
+}
+
+/*! *********************************************************************************
+* \brief Search for the next event to be scheduled
+*
+* \return phyTimeEvent_t pointer to the next event to be scheduled
+*
+********************************************************************************** */
+static phyTimeEvent_t* PhyTime_GetNextEvent( void )
+{
+ phyTimeEvent_t *pEv = NULL;
+ uint32_t i;
+
+ /* Search for the next event to be serviced */
+ for( i=0; i<gMaxPhyTimers_c; i++ )
+ {
+ if( NULL != mPhyTimers[i].callback )
+ {
+ if( NULL == pEv )
+ {
+ pEv = &mPhyTimers[i];
+ }
+ /* Check which event expires first */
+ else if( mPhyTimers[i].timestamp < pEv->timestamp )
+ {
+ pEv = &mPhyTimers[i];
+ }
+ }
+ }
+
+ return pEv;
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/PHY/PhyTypes.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,363 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyTypes.h
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _PHY_TYPES_H
+#define _PHY_TYPES_H
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+/* WARNING!!! Only one frequency can be declared at a time! */
+#ifdef gPHY_802_15_4g_d
+ #ifndef gFreqBand_470__510MHz_d
+ #define gFreqBand_470__510MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_779__787MHz_d
+ #define gFreqBand_779__787MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_863__870MHz_d
+ #define gFreqBand_863__870MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_902__928MHz_d
+ #define gFreqBand_902__928MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_920__928MHz_d
+ #define gFreqBand_920__928MHz_d 1
+ #endif
+
+ #ifndef gFreqBand_863__876MHz_d
+ #define gFreqBand_863__876MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_915__921MHz_d
+ #define gFreqBand_915__921MHz_d 0
+ #endif
+
+ #if gFreqBand_470__510MHz_d
+ #define gFreqBandId_d gFreq470__510MHz_c
+
+ #elif gFreqBand_779__787MHz_d
+ #define gFreqBandId_d gFreq779__787MHz_c
+
+ #elif gFreqBand_863__870MHz_d
+ #define gFreqBandId_d gFreq863__870MHz_c
+
+ #elif gFreqBand_902__928MHz_d
+ #define gFreqBandId_d gFreq902__928MHz_c
+
+ #elif gFreqBand_920__928MHz_d
+ #define gFreqBandId_d gFreq920__928MHz_c
+
+ #elif gFreqBand_863__876MHz_d
+ #define gFreqBandId_d gFreq863__876MHz_c
+
+ #elif gFreqBand_915__921MHz_d
+ #define gFreqBandId_d gFreq915__921MHz_c
+
+ #else
+ #error "No frequency band declared!!!"
+ #endif
+#endif // gPHY_802_15_4g_d
+
+/// \note MUST REMAIN UNCHANGED:
+#ifdef gPHY_802_15_4g_d
+ #define gPhySymbolsPerOctet_c 8
+ #define gPhyMRFSKPHRLength_c 2 /* [bytes] */
+#if (gFreqBand_863__876MHz_d || gFreqBand_915__921MHz_d)
+ #define gPhyFSKPreambleLength_c 8 /* [bytes] */
+#else
+ #define gPhyFSKPreambleLength_c 16 /* [bytes] */
+#endif
+ #define gPhyMRFSKSFDLength_c 2 /* [bytes] */
+ #define gMinPHYPacketSize_c 5
+ #define gMaxPHYPacketSize_c 254 /* maximum number of bytes that the PHY can transmit or receive */
+ #define gPhyFCSSize_c 2 /* [bytes] */
+ #define gCCADurationDefault_c 13 /* [symbols] */
+ #define gPhySHRDuration_c (gPhySymbolsPerOctet_c * (gPhyFSKPreambleLength_c + gPhyMRFSKSFDLength_c)) /* [symbols] */
+ #define gPhyMaxFrameDuration_c (gPhySHRDuration_c + (gPhyMRFSKPHRLength_c + gMaxPHYPacketSize_c) * gPhySymbolsPerOctet_c) /* [symbols] 802.15.4g page 48 formula */
+#else
+ #define gCCATime_c 8 /* [symbols] */
+ #define gPhyTurnaroundTime_c 12 /* [symbols] RX-to-TX or TX-to-RX maximum turnaround time (in symbol periods)*/
+ #define gMinPHYPacketSize_c 5
+ #define gMaxPHYPacketSize_c (127) /* maximum number of bytes that the PHY can transmit or receive */
+ #define gPhySHRDuration_c (10) /* [symbols] */
+ #define gPhySymbolsPerOctet_c (2)
+ #define gPhyFCSSize_c (2) /* [bytes] */
+ #define gPhyMaxFrameDuration_c (gPhySHRDuration_c + (gMaxPHYPacketSize_c + 1) * gPhySymbolsPerOctet_c)
+ #define gUnitBackoffPeriod_c 20 /* [symbols] */
+#endif // gPHY_802_15_4g_d
+
+// Phy flags
+#define gPhyFlagRxOnWhenIdle_c (1 << 0)
+#define gPhyFlagFramePending_c (1 << 1)
+#define gPhyFlagIdleRx_c (1 << 2)
+#define gPhyFlagDeferTx_c (1 << 3)
+
+#ifdef gPHY_802_15_4g_d
+#ifndef gAfcRxTimeout_c
+#define gAfcRxTimeout_c gPhySHRDuration_c /* [symbols] */
+#endif
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public prototypes
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+typedef enum
+{
+ gPhyChannelBusy_c = 0x00, /*The CCA attempt has detected a busy channel.*/
+ gPhyBusyRx_c = 0x01, /*The transceiver is asked to change its state while receiving.*/
+ gPhyBusyTx_c = 0x02, /*The transceiver is asked to change its state while transmitting.*/
+ gPhyChannelIdle_c = 0x04, /*The CCA attempt has detected an idle channel.*/
+ gPhyInvalidParameter_c = 0x05, /*A SET request was issued with a parameter in the primitive that is out of the valid range.*/
+ gPhyRxOn_c = 0x06, /*The transceiver is in the receiver enabled state.*/
+ gPhySuccess_c = 0x07, /*A SET/GET, an ED operation, a data request, an indirect queue insert, or a transceiver state change was successful.*/
+ gPhyTRxOff_c = 0x08, /*The transceiver is in the transceiver disabled state.*/
+ gPhyTxOn_c = 0x09, /*The transceiver is in the transmitter enabled state.*/
+ gPhyUnsupportedAttribute_c = 0x0a, /*A SET/GET request was issued with the identifier of an attribute that is not supported.*/
+ gPhyReadOnly_c = 0x0b, /*A SET request was issued with the identifier of an attribute that is read-only.*/
+ gPhyIndexUsed_c = 0x11, /*The indirect queue insert operation has detected an used index.*/
+ gPhyNoAck_c = 0x14, /*No ACK was received for the last transmission.*/
+ gPhyFramePending_c = 0x15, /*The ACK of a Data Request frame indicates a pending frame in the coordinator�s indirect TX queue.*/
+ gPhyBusy_c = 0xF1, //
+ gPhyInvalidPrimitive_c = 0xF2 //
+}phyStatus_t;
+
+typedef enum
+{
+ gPhySlottedMode_c = 0x0c,
+ gPhyUnslottedMode_c = 0x0d
+}phySlottedMode_t;
+
+typedef enum
+{
+ gPhyEnergyDetectMode_c = 0x00,
+ gPhyCCAMode1_c = 0x01,
+ gPhyCCAMode2_c = 0x02,
+ gPhyCCAMode3_c = 0x03,
+ gPhyNoCCABeforeTx_c = 0x04
+}phyCCAType_t;
+
+typedef enum
+{
+ gPhyContCcaEnabled = 0x00,
+ gPhyContCcaDisabled
+}phyContCCAMode_t;
+
+typedef enum
+{
+ gPhyForceTRxOff_c = 0x03, /*The transceiver is to be switched off immediately.*/
+ gPhySetRxOn_c = 0x12, /*The transceiver is to be configured into the receiver enabled state.*/
+ gPhySetTRxOff_c = 0x13, /*The transceiver is to be configured into the transceiver disabled state.*/
+}phyState_t;
+
+typedef enum
+{
+ gPhyRxAckRqd_c = 0x00, /*A receive Ack frame is expected to follow the transmit frame (non-Ack frames are rejected)*/
+ gPhyNoAckRqd_c = 0x01, /*An ordinary receive frame (any type of frame) follows the transmit frame*/
+#ifdef gPHY_802_15_4g_d
+ gPhyEnhancedAckReq = 0x02
+#endif // gPHY_802_15_4g_d
+}phyAckRequired_t;
+
+typedef enum
+{
+ gPhyPibCurrentChannel_c = 0x00, /*The channel currently used.*/
+ gPhyPibCurrentPage_c = 0x01, /*The channel page currently used.*/
+ gPhyPibTransmitPower_c = 0x02, /*The power used for TX operations.*/
+ gPhyPibLongAddress_c = 0x03, /*The MAC long address to be used by the PHY�s source address matching feature.*/
+ gPhyPibShortAddress_c = 0x04, /*The MAC short address to be used by the PHY�s source address matching feature.*/
+ gPhyPibPanId_c = 0x05, /*The MAC PAN ID to be used by the PHY�s source address matching feature.*/
+ gPhyPibPanCoordinator_c = 0x06, /*Indicates if the device is a PAN coordinator or not.*/
+ gPhyPibSrcAddrEnable_c = 0x07, /*Enables or disables the PHY�s source address matching feature.*/
+ gPhyPibPromiscuousMode_c = 0x08, /*Selects between normal, promiscuous and active promiscuous mode.*/
+ gPhyPibAutoAckEnable_c = 0x09, /*Enables or disables automatic transmission of ACK frames.*/
+ gPhyPibFrameVersion_c = 0x0A, /*Used in checking for allowed frame versions (0x00 - any version accepted, 0x01 - accept Frame Version 0 packets (2003 compliant), 0x02 - accept Frame Version 1 packets (2006 compliant), 0x03 - accept Frame Version 0 and 1 packets).*/
+ gPhyPibFrameEnable_c = 0x0B, /*Used for enabling or disabling reception of MAC frames.*/
+ gPhyPibAckFramePending_c = 0x0C, /*Used to copy its contents to the outgoing ACK frame's Frame Pending field as a response to a received Data Request frame with Source Address Matching disabled.*/
+ gPhyPibRxOnWhenIdle = 0x0D, /*Enable RX when the radio is IDLE*/
+ gPhyPibFrameWaitTime_c = 0x0E, /*The number of symbols the Rx should be on after receiving an ACK with FP=1 */
+ gPhyPibDeferTxIfRxBusy_c = 0x0F,
+#ifdef gPHY_802_15_4g_d
+ gPhyPibPhyModeSupported_c = 0x10,
+ gPhyPibCurrentMode_c = 0x11,
+ gPhyPibFSKPreambleRepetitions_c = 0x12,
+ gPhyPibFSKScramblePSDU_c = 0x13,
+ gPhyPibCCADuration_c = 0x14,
+ gPhyPibCSLRxEnabled_c = 0x15,
+ gPhyPibCSLTxEnabled_c = 0x16,
+ gPhyPibFreqBandId_c = 0x17,
+ gPhyPibAckWaitDuration_c = 0x18
+#endif // gPHY_802_15_4g_d
+}phyPibId_t;
+
+typedef struct phyFlags_tag
+{
+ union{
+ uint32_t mask;
+ struct{
+ uint32_t rxOnWhenIdle :1;
+ uint32_t rxFramePending :1;
+ uint32_t idleRx :1;
+#ifdef gPHY_802_15_4g_d
+ uint32_t slotted :1;
+ uint32_t ccaBfrTX :1;
+ uint32_t rxAckRqd :1;
+ uint32_t autoAck :1;
+ uint32_t panCordntr :1;
+ uint32_t promiscuous :1;
+ uint32_t activePromiscuous :1;
+ uint32_t cslRxEnabled :1;
+ uint32_t cslTxEnabled :1;
+ uint32_t rxEnhAckRqd :1;
+ uint32_t ccaEdScan :1; // set for a CCA or ED request
+ uint32_t ccaComplete :1; // set when a CCA period is over
+ uint32_t waitTurnaroundComplete :1; // set when a Auto ACK send or receive sequence started
+ uint32_t reserved :16;
+#else
+ uint32_t phyState :3;
+ uint32_t reserved :26;
+#endif // gPHY_802_15_4g_d
+ };
+ };
+}phyFlags_t;
+
+#define gInvalidTimerId_c (gMaxPhyTimers_c)
+
+#ifdef gPHY_802_15_4g_d
+#define gPhyTimeShift_c (16) // 16bit hw timer
+#define gPhyTimeMask_c (0x000000000000FFFF)
+#else
+#define gPhyTimeShift_c (24) // 24bit hw timer
+#define gPhyTimeMask_c (0x00FFFFFF)
+#endif
+
+typedef uint8_t phyTimeTimerId_t;
+typedef uint64_t phyTimeTimestamp_t;
+
+#ifdef gPHY_802_15_4g_d
+typedef uint64_t phyTime_t;
+#else
+typedef uint32_t phyTime_t;
+#endif
+
+typedef void (*phyTimeCallback_t) ( uint32_t param );
+
+typedef enum
+{
+ gPhyTimeOk_c = 0x00,
+ gPhyTimeAlreadyPassed_c = 0x01,
+ gPhyTimeTooClose_c = 0x02,
+ gPhyTimeTooMany_c = 0x03,
+ gPhyTimeInvalidParameter_c = 0x04,
+ gPhyTimeNotFound_c = 0x05,
+ gPhyTimeError_c = 0x06
+}phyTimeStatus_t;
+
+#ifdef gPHY_802_15_4g_d
+typedef struct phyPHR_tag
+{
+ union{
+ uint16_t mask;
+ uint8_t byteAccess[2];
+ struct{
+ uint8_t modeSwitch :1;
+ uint8_t reserved :2;
+ uint8_t fcsType :1;
+ uint8_t dataWhitening :1;
+ uint8_t frameLengthRsvd :3; // Max psdu 254
+ uint8_t frameLength;
+ };
+ };
+}phyPHR_t;
+
+typedef enum{
+ gPhyMode1_c = 0x00,
+ gPhyMode2_c = 0x01,
+ gPhyMode3_c = 0x02,
+ gPhyMode4_c = 0x03,
+ gPhyMode1ARIB_c = 0x04,
+ gPhyMode2ARIB_c = 0x05,
+ gPhyMode3ARIB_c = 0x06,
+}phyMode_t;
+
+//802.15.4g MAC sub-1GHz frequency bands
+typedef enum{
+ gFreq470__510MHz_c = 0x02, // 470-510 (China)
+ gFreq779__787MHz_c = 0x03, // 779-787 (China)
+ gFreq863__870MHz_c = 0x04, // 863-870 (Europe)
+ gFreq902__928MHz_c = 0x07, // 902-928 (U.S.)
+ gFreq920__928MHz_c = 0x09, // 920-928 (Japan) - Includes ARIB modes
+ gFreq863__876MHz_c = 0x0E, // 863-876 (UK) custom mode
+ gFreq915__921MHz_c = 0x0F, // 915-921 (UK) custom mode
+}phyFreqBand_t;
+
+#ifndef gPhyModeDefault_d
+#define gPhyModeDefault_d gPhyMode1_c
+#endif
+
+#endif // gPHY_802_15_4g_d
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+#endif /* _PHY_TYPES_H */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/SMAC/SMAC.cpp Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,1416 @@
+/**************************************************************************************************
+* SMAC implementation.
+*
+* Freescale Semiconductor Inc.
+* (c) Copyright 2004-2014 Freescale Semiconductor, Inc.
+* ALL RIGHTS RESERVED.
+*
+***************************************************************************************************
+*
+* THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESSED OR
+* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+* IN NO EVENT SHALL FREESCALE OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+* THE POSSIBILITY OF SUCH DAMAGE.
+*
+***********************************************************************************************//*!
+**************************************************************************************************/
+#include "SMAC.h"
+#include "PhyInterface.h"
+#include "EmbeddedTypes.h"
+
+#include "SMAC_Config.h"
+
+#include "MemManager.h"
+#include "FunctionLib.h"
+#if 0
+#include "panic.h"
+#endif
+
+#include "cmsis_os.h"
+#include "rtos.h"
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+uint8_t gTotalChannels;
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+static smacStates_t smacState;
+/*volatile*/ static prssPacketPtr_t smacProccesPacketPtr;
+static phyRxParams_t smacLastDataRxParams;
+#if defined (gPHY_802_15_4g_d)
+static smacPacket_t smacPacketConfig;
+#endif
+static macToPdDataMessage_t * gSmacDataMessage;
+static macToPlmeMessage_t * gSmacMlmeMessage;
+
+static uint16_t u16PanID;
+static uint16_t u16ShortSrcAddress;
+
+static uint8_t u8AckRetryCounter = 0;
+static uint8_t u8CCARetryCounter = 0;
+
+static uint8_t mSmacInitialized;
+static uint8_t mSmacTimeoutAsked;
+static uint8_t u8BackoffTimerId;
+static txContextConfig_t txConfigurator;
+static uint8_t u8SmacSeqNo;
+//Sap Handlers Called by PHY
+phyStatus_t PD_SMAC_SapHandler(void* pMsg, instanceId_t smacInstanceId);
+phyStatus_t PLME_SMAC_SapHandler(void* pMsg, instanceId_t smacInstanceId);
+
+/************************************************************************************
+*************************************************************************************
+* Private functions
+*************************************************************************************
+************************************************************************************/
+static bool_t SMACPacketCheck(pdDataToMacMessage_t* pMsgFromPhy);
+static void BackoffTimeElapsed(void const *arg);
+
+osTimerDef (SmacTimer, BackoffTimeElapsed);
+/************************************************************************************
+*************************************************************************************
+* Interface functions
+*************************************************************************************
+************************************************************************************/
+uint8_t TMR_AllocateTimer
+(
+ void
+)
+{
+ //RtosTimer smac_timer(u8BackoffTimerId, osTimerOnce , NULL);
+ return 0;
+}
+
+uint8_t TMR_StartSingleShotTimer
+(
+ uint8_t timerID,
+ uint32_t timeInMilliseconds,
+ void (*pfTimerCallBack)(const void *),
+ void *param
+)
+{
+ //RtosTimer smac_timer(pfTimerCallBack, osTimerOnce , NULL);
+
+ osTimerId id = osTimerCreate (osTimer(SmacTimer), osTimerOnce, NULL);
+ osTimerStart (id, timeInMilliseconds);
+ return 0;
+}
+
+
+/***********************************************************************************/
+/******************************** SMAC Data primitives *****************************/
+/***********************************************************************************/
+
+/************************************************************************************
+* MCPSDataRequest
+*
+* This data primitive is used to send an over the air packet. This is an asynchronous
+* function, it means it asks SMAC to transmit one OTA packet, but when the function
+* returns it is not sent already.
+*
+************************************************************************************/
+smacErrors_t MCPSDataRequest
+(
+txPacket_t *psTxPacket //IN:Pointer to the packet to be transmitted
+)
+{
+ macToPdDataMessage_t *pMsg;
+ phyStatus_t u8PhyRes = gPhySuccess_c;
+
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+
+#if(TRUE == smacParametersValidation_d)
+ uint8_t u8MaxLen=0;
+
+ u8MaxLen = gMaxSmacSDULength_c;
+
+ if((NULL == psTxPacket) || (u8MaxLen < psTxPacket->u8DataLength))
+ {
+ return gErrorOutOfRange_c;
+ }
+#endif /* TRUE == smacParametersValidation_d */
+
+ if(mSmacStateIdle_c != smacState)
+ {
+ return gErrorBusy_c;
+ }
+
+ u8SmacSeqNo++;
+ u8AckRetryCounter = 0;
+ u8CCARetryCounter = 0;
+
+ psTxPacket->u8DataLength = psTxPacket->u8DataLength + gSmacHeaderBytes_c;
+
+ pMsg = (macToPdDataMessage_t*)MEM_BufferAlloc( sizeof(macToPdDataMessage_t) +
+ psTxPacket->u8DataLength);
+ if(pMsg == NULL )
+ {
+ return gErrorNoResourcesAvailable_c;
+ }
+ /* Fill with Phy related data */
+ pMsg->macInstance = smacInstance;
+ pMsg->msgType = gPdDataReq_c;
+ //SMAC doesn't use slotted mode
+ pMsg->msgData.dataReq.slottedTx = gPhyUnslottedMode_c;
+ //start transmission immediately
+ pMsg->msgData.dataReq.startTime = gPhySeqStartAsap_c;
+#ifdef gPHY_802_15_4g_d
+ //for sub-Gig phy handles duration in case of ACK
+ pMsg->msgData.dataReq.txDuration = 0xFFFFFFFF;
+#else
+ if(txConfigurator.autoAck &&
+ psTxPacket->smacHeader.destAddr != 0xFFFF &&
+ psTxPacket->smacHeader.panId != 0xFFFF)
+ {
+ //Turn@ + phy payload(symbols)+ Turn@ + ACK
+ pMsg->msgData.dataReq.txDuration = 12 + (6 + psTxPacket->u8DataLength + 2)*2 + 12 + 42;
+ if(txConfigurator.ccaBeforeTx)
+ {
+ pMsg->msgData.dataReq.txDuration += 0x08; //CCA Duration: 8 symbols
+ }
+ }
+ else
+ {
+ pMsg->msgData.dataReq.txDuration = 0xFFFFFFFF;
+ }
+#endif
+ pMsg->msgData.dataReq.psduLength = psTxPacket->u8DataLength;
+ pMsg->msgData.dataReq.pPsdu = (uint8_t*)&pMsg->msgData.dataReq.pPsdu +
+ sizeof(pMsg->msgData.dataReq.pPsdu);
+
+ FLib_MemCpy(pMsg->msgData.dataReq.pPsdu, &(psTxPacket->smacHeader), gSmacHeaderBytes_c);
+ FLib_MemCpy(pMsg->msgData.dataReq.pPsdu + gSmacHeaderBytes_c,
+ &(psTxPacket->smacPdu),
+ psTxPacket->u8DataLength - gSmacHeaderBytes_c);
+
+ if(txConfigurator.ccaBeforeTx)
+ {
+ //tell phy to perform CCA before transmission
+ pMsg->msgData.dataReq.CCABeforeTx = gPhyCCAMode1_c;
+ }
+ else
+ {
+ pMsg->msgData.dataReq.CCABeforeTx = gPhyNoCCABeforeTx_c;
+ }
+
+ if(txConfigurator.autoAck &&
+ psTxPacket->smacHeader.destAddr != 0xFFFF &&
+ psTxPacket->smacHeader.panId != 0xFFFF)
+ {
+ //set frame control option: ACK.
+ pMsg->msgData.dataReq.pPsdu[0] |= FRAME_CTRL_ACK_FIELD_SET;
+ pMsg->msgData.dataReq.ackRequired = gPhyRxAckRqd_c;
+ }
+ else
+ {
+ pMsg->msgData.dataReq.ackRequired = gPhyNoAckRqd_c;
+ }
+ //set sequence number;
+ pMsg->msgData.dataReq.pPsdu[2] = u8SmacSeqNo;
+ gSmacDataMessage = pMsg; //Store pointer for freeing later
+ u8PhyRes = MAC_PD_SapHandler(pMsg, 0);
+
+ psTxPacket->u8DataLength -= gSmacHeaderBytes_c;
+
+ if(u8PhyRes == gPhySuccess_c)
+ {
+ smacState= mSmacStateTransmitting_c;
+ return gErrorNoError_c;
+ }
+ else
+ {
+ MEM_BufferFree(gSmacDataMessage);
+ gSmacDataMessage = NULL;
+ return gErrorNoResourcesAvailable_c;
+ }
+}
+
+/************************************************************************************
+* MLMEConfigureTxContext
+*
+* This management primitive is used to configure the conditions under which SMAC will
+* perform a transmission OTA.
+*
+************************************************************************************/
+smacErrors_t MLMEConfigureTxContext(txContextConfig_t* pTxConfig)
+{
+ if( (pTxConfig->autoAck == FALSE && pTxConfig->retryCountAckFail !=0) ||
+ (pTxConfig->ccaBeforeTx == FALSE && pTxConfig->retryCountCCAFail !=0) )
+ {
+ return gErrorNoValidCondition_c;
+ }
+ if( pTxConfig->retryCountAckFail > gMaxRetriesAllowed_c ||
+ pTxConfig->retryCountCCAFail > gMaxRetriesAllowed_c)
+ {
+ return gErrorOutOfRange_c;
+ }
+ txConfigurator.autoAck = pTxConfig->autoAck;
+ txConfigurator.ccaBeforeTx = pTxConfig->ccaBeforeTx;
+ txConfigurator.retryCountAckFail = pTxConfig->retryCountAckFail;
+ txConfigurator.retryCountCCAFail = pTxConfig->retryCountCCAFail;
+
+ return gErrorNoError_c;
+}
+
+/************************************************************************************
+* MLMERXEnableRequest
+*
+* Function used to place the radio into receive mode
+*
+************************************************************************************/
+smacErrors_t MLMERXEnableRequest
+(
+rxPacket_t *gsRxPacket, //OUT: Pointer to the structure where the reception results
+// will be stored.
+smacTime_t stTimeout //IN: 64-bit timeout value, absolute value in symbols
+)
+{
+
+ uint8_t u8PhyRes = 0;
+ macToPlmeMessage_t lMsg;
+
+#if(TRUE == smacParametersValidation_d)
+ uint8_t u8MaxLen=0;
+
+ u8MaxLen = gMaxSmacSDULength_c;
+#endif /* TRUE == smacParametersValidation_d */
+
+#if(TRUE == smacParametersValidation_d)
+ if((NULL == gsRxPacket) || (u8MaxLen < gsRxPacket->u8MaxDataLength))
+ {
+ return gErrorOutOfRange_c;
+ }
+#endif /* TRUE == smacParametersValidation_d */
+
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+
+ if(mSmacStateIdle_c != smacState)
+ {
+ return gErrorBusy_c;
+ }
+ if(stTimeout)
+ {
+ lMsg.msgType = gPlmeSetTRxStateReq_c;
+ lMsg.msgData.setTRxStateReq.startTime = gPhySeqStartAsap_c;
+ lMsg.macInstance = smacInstance;
+ lMsg.msgData.setTRxStateReq.state = gPhySetRxOn_c;
+ mSmacTimeoutAsked = TRUE;
+ lMsg.msgData.setTRxStateReq.rxDuration = stTimeout;
+ }
+ else
+ {
+ lMsg.msgType = gPlmeSetReq_c;
+ lMsg.msgData.setReq.PibAttribute = gPhyPibRxOnWhenIdle;
+ lMsg.msgData.setReq.PibAttributeValue = (uint64_t)1;
+ }
+ u8PhyRes = MAC_PLME_SapHandler(&lMsg, 0);
+ if(u8PhyRes == gPhySuccess_c)
+ {
+ gsRxPacket->rxStatus = rxProcessingReceptionStatus_c;
+ smacProccesPacketPtr.smacRxPacketPointer = gsRxPacket;
+
+ smacState= mSmacStateReceiving_c;
+ return gErrorNoError_c;
+ }
+ else
+ {
+ return gErrorNoResourcesAvailable_c;
+ }
+}
+#if defined (gPHY_802_15_4g_d)
+/************************************************************************************
+* MLMESetPreambleLength
+*
+* Function used to change the preamble size in the OTA Packet
+*
+************************************************************************************/
+smacErrors_t MLMESetPreambleLength
+(
+uint16_t u16preambleLength
+)
+{
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+
+ if(mSmacStateIdle_c != smacState)
+ {
+ return gErrorBusy_c;
+ }
+ smacPacketConfig.u16PreambleLength = u16preambleLength;
+ gPhyPib.mPIBphyFSKPreambleRepetitions = u16preambleLength;
+ PhyPib_RFUpdatePreambleLength();
+
+ return gErrorNoError_c;
+
+}
+
+/************************************************************************************
+* MLMESetSyncWordSize
+*
+* Function used to change the synchronization word size. Values from 0 to 8 required.
+* IMPORTANT-> Use below arguments only (indicating a direct value from 1-8 will not work)
+* Inputs :
+* SyncConfig_SyncSize_1
+* SyncConfig_SyncSize_2
+* SyncConfig_SyncSize_3
+* SyncConfig_SyncSize_4
+* SyncConfig_SyncSize_5
+* SyncConfig_SyncSize_6
+* SyncConfig_SyncSize_7
+* SyncConfig_SyncSize_8
+*
+************************************************************************************/
+smacErrors_t MLMESetSyncWordSize
+(
+uint8_t u8syncWordSize
+)
+{
+
+ phyStatus_t status;
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+
+ if(mSmacStateIdle_c != smacState)
+ {
+ return gErrorBusy_c;
+ }
+
+ status = (phyStatus_t)Phy_SetSyncWordSize(u8syncWordSize);
+ if(status == gPhyInvalidParameter_c)
+ return gErrorOutOfRange_c;
+
+ smacPacketConfig.u8SyncWordSize = u8syncWordSize;
+
+ return gErrorNoError_c;
+
+}
+
+/************************************************************************************
+* MLMESetSyncWordValue
+*
+* Function used to change the synchronization word value.
+*
+*
+************************************************************************************/
+smacErrors_t MLMESetSyncWordValue
+(
+uint8_t *u8syncWordValue
+)
+{
+ uint8_t syncWordSizeTemp = smacPacketConfig.u8SyncWordSize;
+ uint8_t syncValueRegIndex = 0;
+
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+
+ if(mSmacStateIdle_c != smacState)
+ {
+ return gErrorBusy_c;
+ }
+
+ smacPacketConfig.u8SyncWordValue = u8syncWordValue;
+
+ while (syncWordSizeTemp--)
+ {
+ Phy_SetSyncWordValue(syncValueRegIndex, (uint8_t)*u8syncWordValue);
+ syncValueRegIndex++;
+ u8syncWordValue++;
+ }
+ while(syncValueRegIndex < 8)
+ {
+ Phy_SetSyncWordValue(syncValueRegIndex, 0x00);
+ syncValueRegIndex++;
+ }
+
+ return gErrorNoError_c;
+
+}
+
+/************************************************************************************
+* MLMEPacketConfig
+*
+*
+*
+************************************************************************************/
+smacErrors_t MLMEPacketConfig
+(
+packetConfig_t *pPacketCfg
+)
+{
+ smacErrors_t err = gErrorNoError_c;
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+
+ if(mSmacStateIdle_c != smacState)
+ {
+ return gErrorBusy_c;
+ }
+ err = MLMESetSyncWordSize(pPacketCfg->u8SyncWordSize);
+ err |= MLMESetSyncWordValue(pPacketCfg->pu8SyncWord);
+ err |= MLMESetPreambleLength(pPacketCfg->u16PreambleSize);
+ if(err != gErrorNoError_c)
+ return gErrorOutOfRange_c;
+
+ return gErrorNoError_c;
+}
+
+#endif
+
+/************************************************************************************
+* MLMESetChannelRequest
+*
+*
+*
+************************************************************************************/
+smacErrors_t MLMESetChannelRequest
+(
+channels_t newChannel
+)
+{
+ uint8_t errorVal;
+ smacErrors_t err = gErrorNoError_c;
+
+ macToPlmeMessage_t lMsg;
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+ if(mSmacStateIdle_c != smacState)
+ {
+ return gErrorBusy_c;
+ }
+ lMsg.msgType = gPlmeSetReq_c;
+ lMsg.macInstance = smacInstance;
+ lMsg.msgData.setReq.PibAttribute = gPhyPibCurrentChannel_c;
+ lMsg.msgData.setReq.PibAttributeValue = (uint64_t) newChannel;
+
+ errorVal = MAC_PLME_SapHandler(&lMsg, 0);
+ switch (errorVal)
+ {
+ case gPhyBusy_c:
+ err = gErrorBusy_c;
+ break;
+
+ case gPhyInvalidParameter_c:
+ err = gErrorOutOfRange_c;
+ break;
+
+ case gPhySuccess_c:
+ err = gErrorNoError_c;
+ break;
+
+ default:
+ err = gErrorOutOfRange_c;
+ break;
+ }
+
+ return err;
+}
+
+
+/************************************************************************************
+* MLMESetAdditionalRFOffset
+*
+*************************************************************************************/
+smacErrors_t MLMESetAdditionalRFOffset (uint32_t additionalRFOffset)
+{
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+
+#ifdef gIncludeCalibrationOption
+ gPhyPib.mPIBAdditionalRFFrequencyOffset = additionalRFOffset;
+ return gErrorNoError_c;
+#else
+ return gErrorNoResourcesAvailable_c;
+#endif
+}
+
+
+/************************************************************************************
+* MLMEGetAdditionalRFOffset
+*
+*************************************************************************************/
+uint32_t MLMEGetAdditionalRFOffset( void )
+{
+#ifdef gIncludeCalibrationOption
+ return gPhyPib.mPIBAdditionalRFFrequencyOffset;
+#else
+ return 0;
+#endif
+}
+
+#if defined (gPHY_802_15_4g_d)
+/************************************************************************************
+* MLMESetFreqBand
+*
+************************************************************************************/
+smacErrors_t MLMESetFreqBand
+(
+smacFrequencyBands_t freqBand,
+smacRFModes_t phyMode
+)
+{
+ return gErrorNoResourcesAvailable_c;
+}
+
+smacErrors_t MLMESetPhyMode(smacRFModes_t phyMode)
+{
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+ phyStatus_t err;
+ macToPlmeMessage_t lMsg;
+
+ if(mSmacStateIdle_c != smacState)
+ {
+ return gErrorBusy_c;
+ }
+ lMsg.macInstance = smacInstance;
+ lMsg.msgType = gPlmeSetReq_c;
+ lMsg.msgData.setReq.PibAttribute = gPhyPibCurrentMode_c;
+ lMsg.msgData.setReq.PibAttributeValue = (uint64_t)phyMode;
+ err = MAC_PLME_SapHandler(&lMsg, 0);
+ if(err == gPhyInvalidParameter_c)
+ return gErrorOutOfRange_c;
+ if(err == gPhyBusy_c)
+ return gErrorBusy_c;
+
+ gTotalChannels = gPhyPib.pPIBphyRfConstants->totalNumChannels;
+
+ return gErrorNoError_c;
+}
+
+#endif
+/************************************************************************************
+* MLMEGetChannelRequest
+*
+*
+*
+************************************************************************************/
+channels_t MLMEGetChannelRequest
+(
+void
+)
+{
+ channels_t currentChannel;
+ macToPlmeMessage_t lMsg;
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ //panic(0,0,0,0);
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+ lMsg.msgType = gPlmeGetReq_c;
+ lMsg.macInstance = smacInstance;
+ lMsg.msgData.getReq.PibAttribute = gPhyPibCurrentChannel_c;
+ lMsg.msgData.getReq.pPibAttributeValue = (uint64_t*)¤tChannel;
+ MAC_PLME_SapHandler(&lMsg, 0);
+ return currentChannel;
+}
+
+#if defined (gPHY_802_15_4g_d)
+/************************************************************************************
+* MLMERssi
+*
+*
+*
+************************************************************************************/
+uint8_t MLMERssi(void )
+{
+ uint8_t rssiVal;
+
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+
+ if(mSmacStateIdle_c != smacState)
+ {
+ return gErrorBusy_c;
+ }
+
+ rssiVal = Phy_GetRssi();
+ return rssiVal;
+}
+
+/************************************************************************************
+* MLMESetCCADuration
+*
+*
+*
+************************************************************************************/
+smacErrors_t MLMESetCCADuration(uint64_t usCCADuration )
+{
+ macToPlmeMessage_t lMsg;
+ phyStatus_t status;
+
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+
+ if(mSmacStateIdle_c != smacState)
+ {
+ return gErrorBusy_c;
+ }
+
+ usCCADuration = TIME_US_TO_TICKS(usCCADuration);
+ Phy_TimeDivider((phyTime_t*)&usCCADuration);
+
+ lMsg.msgType = gPlmeSetReq_c;
+ lMsg.msgData.setReq.PibAttribute = gPhyPibCCADuration_c;
+ lMsg.msgData.setReq.PibAttributeValue = usCCADuration;
+ status = MAC_PLME_SapHandler(&lMsg, 0);
+
+ if(status == gPhySuccess_c)
+ return gErrorNoError_c;
+ else
+ return gErrorNoResourcesAvailable_c;
+}
+
+/************************************************************************************
+* MLMESetInterPacketRxDelay
+*
+* IMPORTANT-> Use below arguments only (indicating a direct value from 1-12 will not work)
+* Inputs :
+*
+* InterPacketRxDelay_0
+* InterPacketRxDelay_1
+* InterPacketRxDelay_2
+* InterPacketRxDelay_3
+* InterPacketRxDelay_4
+* InterPacketRxDelay_5
+* InterPacketRxDelay_6
+* InterPacketRxDelay_7
+* InterPacketRxDelay_8
+* InterPacketRxDelay_9
+* InterPacketRxDelay_A
+* InterPacketRxDelay_B
+************************************************************************************/
+smacErrors_t MLMESetInterPacketRxDelay
+(
+uint8_t u8InterPacketRxDelay
+)
+{
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+
+ if(mSmacStateIdle_c != smacState)
+ {
+ return gErrorBusy_c;
+ }
+
+ if (gPhySuccess_c != Phy_SetInterPacketRxDelay(u8InterPacketRxDelay))
+ {
+ return gErrorOutOfRange_c;
+ }
+ return gErrorNoError_c;
+}
+
+#endif
+/************************************************************************************
+* MLMERXDisableRequest
+*
+* Returns the radio to idle mode from receive mode.
+*
+************************************************************************************/
+smacErrors_t MLMERXDisableRequest(void)
+{
+ macToPlmeMessage_t lMsg;
+ phyStatus_t err;
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif
+ if((mSmacStateReceiving_c != smacState) && (mSmacStateIdle_c != smacState))
+ {
+ return gErrorNoValidCondition_c;
+ }
+ lMsg.macInstance = smacInstance;
+ if(!mSmacTimeoutAsked)
+ {
+ lMsg.msgType = gPlmeSetReq_c;
+ lMsg.msgData.setReq.PibAttribute = gPhyPibRxOnWhenIdle;
+ lMsg.msgData.setReq.PibAttributeValue = (uint64_t)0;
+ err = MAC_PLME_SapHandler(&lMsg, 0);
+ if(err != gPhySuccess_c)
+ return gErrorBusy_c;
+ }
+ else
+ {
+ lMsg.msgType = gPlmeSetTRxStateReq_c;
+ lMsg.msgData.setTRxStateReq.state = gPhyForceTRxOff_c;
+ (void)MAC_PLME_SapHandler(&lMsg, 0);
+ mSmacTimeoutAsked = FALSE;
+ }
+ smacState= mSmacStateIdle_c;
+
+ return gErrorNoError_c;
+
+}
+
+/*@CMA, Conn Test Added*/
+/************************************************************************************
+* MLMETXDisableRequest
+*
+* Returns the radio to idle mode from Tx mode.
+*
+************************************************************************************/
+void MLMETXDisableRequest(void)
+{
+ macToPlmeMessage_t lMsg;
+ lMsg.macInstance = smacInstance;
+ lMsg.msgType = gPlmeSetTRxStateReq_c;
+ lMsg.msgData.setTRxStateReq.state = gPhyForceTRxOff_c;
+ (void)MAC_PLME_SapHandler(&lMsg, 0);
+ if(gSmacDataMessage != NULL)
+ {
+ (void)MEM_BufferFree(gSmacDataMessage);
+ gSmacDataMessage = NULL;
+ }
+ smacState= mSmacStateIdle_c;
+}
+
+/************************************************************************************
+* MLMELinkQuality
+*
+* This function returns an integer value that is the link quality from the last
+* received packet of the form: dBm = (-Link Quality/2).
+*
+************************************************************************************/
+uint8_t MLMELinkQuality(void)
+{
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return 0;
+ }
+#endif
+ return smacLastDataRxParams.linkQuality;
+}
+
+/************************************************************************************
+* MLMEPAOutputAdjust
+*
+*
+************************************************************************************/
+smacErrors_t MLMEPAOutputAdjust
+(
+uint8_t u8PaValue
+)
+{
+ macToPlmeMessage_t lMsg;
+ smacErrors_t err = gErrorNoError_c;
+ uint8_t errorVal;
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+
+ if(mSmacStateIdle_c != smacState)
+ {
+ return gErrorBusy_c;
+ }
+ lMsg.macInstance = smacInstance;
+ lMsg.msgType = gPlmeSetReq_c;
+ lMsg.msgData.setReq.PibAttribute = gPhyPibTransmitPower_c;
+ lMsg.msgData.setReq.PibAttributeValue = (uint64_t) u8PaValue;
+ errorVal = MAC_PLME_SapHandler(&lMsg, 0);
+ switch (errorVal)
+ {
+ case gPhyBusy_c:
+ err = gErrorBusy_c;
+ break;
+
+ case gPhyInvalidParameter_c:
+ err = gErrorOutOfRange_c;
+ break;
+
+ case gPhySuccess_c:
+ err = gErrorNoError_c;
+ break;
+
+ default:
+ err = gErrorOutOfRange_c;
+ break;
+ }
+
+ return err;
+}
+
+/************************************************************************************
+* MLMEScanRequest
+*
+* This function returns the RSSI value of the channel passes as a parameter
+*
+*
+************************************************************************************/
+smacErrors_t MLMEScanRequest(channels_t u8ChannelToScan)
+{
+ smacErrors_t err = gErrorNoError_c;
+ phyStatus_t u8PhyRes;
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+
+ if(mSmacStateIdle_c != smacState)
+ {
+ return gErrorBusy_c;
+ }
+ if(u8ChannelToScan != MLMEGetChannelRequest())
+ err = MLMESetChannelRequest(u8ChannelToScan);
+ if(err != gErrorNoError_c)
+ return err;
+
+ macToPlmeMessage_t* pMsg = (macToPlmeMessage_t*)MEM_BufferAlloc(sizeof(macToPlmeMessage_t));
+ pMsg->msgType = gPlmeEdReq_c;
+ pMsg->msgData.edReq.startTime = gPhySeqStartAsap_c;
+ pMsg->macInstance = smacInstance;
+ gSmacMlmeMessage = pMsg;
+ u8PhyRes = MAC_PLME_SapHandler(pMsg,0);
+ if(u8PhyRes != gPhySuccess_c)
+ {
+ MEM_BufferFree(gSmacMlmeMessage);
+ gSmacMlmeMessage = NULL;
+ return gErrorBusy_c;
+ }
+ smacState = mSmacStateScanningChannels_c;
+ return gErrorNoError_c;
+}
+
+
+/************************************************************************************
+* MLMECcaRequest
+*
+* This function performs Clear Channel Assessment on the active channel
+*
+*
+************************************************************************************/
+smacErrors_t MLMECcaRequest()
+{
+ phyStatus_t u8PhyRes;
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+
+ if(mSmacStateIdle_c != smacState)
+ {
+ return gErrorBusy_c;
+ }
+ macToPlmeMessage_t* pMsg = (macToPlmeMessage_t*)MEM_BufferAlloc(sizeof(macToPlmeMessage_t));
+ pMsg->msgType = gPlmeCcaReq_c;
+ pMsg->msgData.ccaReq.ccaType = gPhyCCAMode1_c;
+ pMsg->msgData.ccaReq.contCcaMode = gPhyContCcaDisabled;
+ pMsg->macInstance = smacInstance;
+ gSmacMlmeMessage = pMsg;
+ u8PhyRes = MAC_PLME_SapHandler(pMsg,0);
+ if(u8PhyRes != gPhySuccess_c)
+ {
+ MEM_BufferFree(gSmacMlmeMessage);
+ gSmacMlmeMessage = NULL;
+ return gErrorBusy_c;
+ }
+ smacState = mSmacStatePerformingCca_c;
+ return gErrorNoError_c;
+}
+/************************************************************************************
+* MLMEPhySoftReset
+*
+* This function performs a software reset on the radio, PHY and SMAC state machines.
+*
+*
+************************************************************************************/
+smacErrors_t MLMEPhySoftReset
+(
+void
+)
+{
+ macToPlmeMessage_t lMsg;
+#if(TRUE == smacInitializationValidation_d)
+ if(FALSE == mSmacInitialized)
+ {
+ return gErrorNoValidCondition_c;
+ }
+#endif /* TRUE == smacInitializationValidation_d */
+//
+// if(mSmacStateIdle_c != smacState)
+// {
+// return gErrorBusy_c;
+// }
+ lMsg.macInstance = smacInstance;
+ lMsg.msgType = gPlmeSetTRxStateReq_c;
+ lMsg.msgData.setTRxStateReq.state = gPhyForceTRxOff_c;
+ (void)MAC_PLME_SapHandler(&lMsg, 0);
+ smacState= mSmacStateIdle_c;
+
+ return gErrorNoError_c;
+}
+/************************************************************************************
+* PD_SMAC_SapHandler
+*
+* This SAP handles data confirm and data indication from PHY.
+*
+************************************************************************************/
+phyStatus_t PD_SMAC_SapHandler(void* pMsg, instanceId_t smacInstanceId)
+{
+ phyStatus_t status = gPhyInvalidPrimitive_c;
+ smacToAppDataMessage_t* pSmacMsg;
+ pdDataToMacMessage_t* pDataMsg = (pdDataToMacMessage_t*)pMsg;
+ (void)smacInstanceId;
+
+ switch(pDataMsg->msgType)
+ {
+ case gPdDataCnf_c:
+ //no data request was fired
+ if(NULL == gSmacDataMessage)
+ {
+ status = gPhySuccess_c;
+ }
+ else
+ {
+ //phy finished work with the data request packet so it can be freed
+ MEM_BufferFree(gSmacDataMessage);
+ gSmacDataMessage = NULL;
+
+ pSmacMsg = (smacToAppDataMessage_t*)MEM_BufferAlloc(sizeof(smacToAppDataMessage_t));
+ if(pSmacMsg == NULL)
+ {
+ status = gPhySuccess_c;
+ }
+ else
+ {
+ pSmacMsg->msgType = gMcpsDataCnf_c;
+ pSmacMsg->msgData.dataCnf.status = gErrorNoError_c;
+ // call App Sap
+ gSMAC_APP_MCPS_SapHandler(pSmacMsg,smacInstance);
+ }
+ smacState = mSmacStateIdle_c;
+ }
+ break;
+ case gPdDataInd_c:
+ if(FALSE == SMACPacketCheck(pDataMsg))
+ {
+ MEM_BufferFree(pDataMsg);
+ status = gPhySuccess_c;
+ }
+ else
+ {
+ smacLastDataRxParams.linkQuality = ((pdDataToMacMessage_t*)pMsg)->msgData.dataInd.ppduLinkQuality;
+ smacLastDataRxParams.timeStamp = (phyTime_t)((pdDataToMacMessage_t*)pMsg)->msgData.dataInd.timeStamp;
+ smacProccesPacketPtr.smacRxPacketPointer->rxStatus = rxSuccessStatus_c;
+
+ // in case no timeout was asked we need to unset RXOnWhenIdle Pib.
+ if(!mSmacTimeoutAsked)
+ {
+ (void)MLMERXDisableRequest();
+ }
+ smacProccesPacketPtr.smacRxPacketPointer->u8DataLength =
+ pDataMsg->msgData.dataInd.psduLength - gSmacHeaderBytes_c;
+ FLib_MemCpy(&smacProccesPacketPtr.smacRxPacketPointer->smacHeader,
+ ((smacHeader_t*)pDataMsg->msgData.dataInd.pPsdu),
+ gSmacHeaderBytes_c);
+ FLib_MemCpy(&smacProccesPacketPtr.smacRxPacketPointer->smacPdu,
+ ((smacPdu_t*)(pDataMsg->msgData.dataInd.pPsdu + gSmacHeaderBytes_c)),
+ smacProccesPacketPtr.smacRxPacketPointer->u8DataLength);
+
+ pSmacMsg = (smacToAppDataMessage_t*)MEM_BufferAlloc(sizeof(smacToAppDataMessage_t));
+ if(pSmacMsg == NULL)
+ {
+ status = gPhySuccess_c;
+ }
+ else
+ {
+ pSmacMsg->msgType = gMcpsDataInd_c;
+ pSmacMsg->msgData.dataInd.pRxPacket = smacProccesPacketPtr.smacRxPacketPointer;
+ pSmacMsg->msgData.dataInd.u8LastRxRssi = PhyGetLastRxRssiValue();
+ gSMAC_APP_MCPS_SapHandler(pSmacMsg,smacInstance);
+ }
+ smacState = mSmacStateIdle_c;
+ }
+ break;
+ default:
+ break;
+ }
+ MEM_BufferFree(pMsg);
+ return status;
+}
+
+/************************************************************************************
+* PLME_SMAC_SapHandler
+*
+* This SAP handles management for confirms and indications from PHY.
+*
+************************************************************************************/
+
+phyStatus_t PLME_SMAC_SapHandler(void* pMsg, instanceId_t smacInstanceId)
+{
+ MEM_BufferFree(gSmacMlmeMessage);
+ gSmacMlmeMessage = NULL;
+ uint32_t backOffTime;
+
+ plmeToMacMessage_t* pPlmeMsg = (plmeToMacMessage_t*)pMsg;
+
+ smacToAppMlmeMessage_t* pSmacToApp;
+ smacToAppDataMessage_t* pSmacMsg;
+ switch(pPlmeMsg->msgType)
+ {
+ case gPlmeCcaCnf_c:
+ if(pPlmeMsg->msgData.ccaCnf.status == gPhyChannelBusy_c &&
+ smacState == mSmacStateTransmitting_c)
+ {
+ if(txConfigurator.ccaBeforeTx)
+ {
+ if(txConfigurator.retryCountCCAFail > u8CCARetryCounter)
+ {
+ //increment cca fail counter
+ u8CCARetryCounter++;
+ //get random number for backoff time.
+ RNG_GetRandomNo(&backOffTime);
+ //start event timer. After time elapses, Data request will be fired.
+ TMR_StartSingleShotTimer(u8BackoffTimerId, ((backOffTime & gMaxBackoffTime_c) + gMinBackoffTime_c), BackoffTimeElapsed, NULL);
+ }
+ else
+ {
+ MEM_BufferFree(gSmacDataMessage);
+ gSmacDataMessage = NULL;
+
+ //retries failed so create message for the application
+ pSmacMsg = (smacToAppDataMessage_t*)MEM_BufferAlloc(sizeof(smacToAppDataMessage_t));
+ if(pSmacMsg != NULL)
+ {
+ //error type : Channel Busy
+ pSmacMsg->msgData.dataCnf.status = gErrorChannelBusy_c;
+ //type is Data Confirm
+ pSmacMsg->msgType = gMcpsDataCnf_c;
+ gSMAC_APP_MCPS_SapHandler(pSmacMsg, smacInstance);
+ }
+ //place SMAC into idle state
+ smacState = mSmacStateIdle_c;
+ }
+ }
+ MEM_BufferFree(pMsg);
+ return gPhySuccess_c;
+ }
+ //if SMAC isn't in TX then definitely it is a CCA confirm
+ //allocate a message for the application
+ pSmacToApp = (smacToAppMlmeMessage_t*)MEM_BufferAlloc(sizeof(smacToAppMlmeMessage_t));
+ if(pSmacToApp != NULL)
+ {
+ //type is CCA Confirm
+ pSmacToApp->msgType = gMlmeCcaCnf_c;
+ //Channel status translated into SMAC messages: idle channel means no error.
+ if(pPlmeMsg->msgData.ccaCnf.status == gPhyChannelIdle_c)
+ {
+ pSmacToApp->msgData.ccaCnf.status = gErrorNoError_c;
+ }
+ else
+ {
+ pSmacToApp->msgData.ccaCnf.status = gErrorChannelBusy_c;
+ }
+ }
+ break;
+ case gPlmeEdCnf_c:
+ //allocate a message for the application
+ pSmacToApp = (smacToAppMlmeMessage_t*)MEM_BufferAlloc(sizeof(smacToAppMlmeMessage_t));
+ if(pSmacToApp != NULL)
+ {
+ //message type is ED Confirm
+ pSmacToApp->msgType = gMlmeEdCnf_c;
+ if(pPlmeMsg->msgData.edCnf.status == gPhySuccess_c)
+ {
+ pSmacToApp->msgData.edCnf.status = gErrorNoError_c;
+ pSmacToApp->msgData.edCnf.energyLevel = pPlmeMsg->msgData.edCnf.energyLevel;
+ pSmacToApp->msgData.edCnf.energyLeveldB = pPlmeMsg->msgData.edCnf.energyLeveldB;
+ pSmacToApp->msgData.edCnf.scannedChannel = MLMEGetChannelRequest();
+ }
+ else
+ {
+ pSmacToApp->msgData.edCnf.status = gErrorBusy_c;
+ }
+ }
+ break;
+ case gPlmeTimeoutInd_c:
+ if(smacState == mSmacStateTransmitting_c)
+ {
+ if(txConfigurator.autoAck)
+ {
+ //re-arm retries for channel busy at retransmission.
+ u8CCARetryCounter = 0;
+
+ if(txConfigurator.retryCountAckFail > u8AckRetryCounter)
+ {
+ u8AckRetryCounter++;
+
+ RNG_GetRandomNo(&backOffTime);
+ //start event timer. After time elapses, Data request will be fired.
+ TMR_StartSingleShotTimer(u8BackoffTimerId, ((backOffTime & gMaxBackoffTime_c) + gMinBackoffTime_c), BackoffTimeElapsed, NULL);
+ }
+ else
+ {
+ (void)MEM_BufferFree(gSmacDataMessage);
+ gSmacDataMessage = NULL;
+
+ //retries failed so create message for the application
+ pSmacMsg = (smacToAppDataMessage_t*)MEM_BufferAlloc(sizeof(smacToAppDataMessage_t));
+ if(pSmacMsg != NULL)
+ {
+ //set error code: No Ack
+ pSmacMsg->msgData.dataCnf.status = gErrorNoAck_c;
+ //type is Data Confirm
+ pSmacMsg->msgType = gMcpsDataCnf_c;
+
+ gSMAC_APP_MCPS_SapHandler(pSmacMsg, smacInstance);
+ }
+ //place SMAC into idle state
+ smacState = mSmacStateIdle_c;
+ }
+ }
+ MEM_BufferFree(pMsg);
+ return gPhySuccess_c;
+ }
+ //if no ack timeout was received then it is definitely a RX timeout
+ pSmacToApp = (smacToAppMlmeMessage_t*)MEM_BufferAlloc(sizeof(smacToAppMlmeMessage_t));
+ if(pSmacToApp != NULL)
+ {
+ if(smacState == mSmacStateReceiving_c)
+ {
+ smacProccesPacketPtr.smacRxPacketPointer->rxStatus = rxTimeOutStatus_c;
+ }
+ pSmacToApp->msgType = gMlmeTimeoutInd_c;
+ }
+ break;
+ case gPlme_UnexpectedRadioResetInd_c:
+ pSmacToApp = (smacToAppMlmeMessage_t*)MEM_BufferAlloc(sizeof(smacToAppMlmeMessage_t));
+ if(pSmacToApp != NULL)
+ pSmacToApp->msgType = gMlme_UnexpectedRadioResetInd_c;
+ break;
+ default:
+ //MEM_BufferFree(pSmacToApp);
+ MEM_BufferFree(pMsg);
+ return gPhySuccess_c;
+ }
+ smacState = mSmacStateIdle_c;
+ //send message to upper layer if it is not NULL
+ if(pSmacToApp != NULL)
+ (gSMAC_APP_MLME_SapHandler)(pSmacToApp,0);
+ MEM_BufferFree(pMsg);
+ return gPhySuccess_c;
+}
+
+/************************************************************************************
+* Smac_RegisterSapHandlers
+*
+* This function helps the user register the handlers for the messages that come from
+* SMAC.
+*
+************************************************************************************/
+
+void Smac_RegisterSapHandlers(
+ SMAC_APP_MCPS_SapHandler_t pSMAC_APP_MCPS_SapHandler,
+ SMAC_APP_MLME_SapHandler_t pSMAC_APP_MLME_SapHandler,
+ instanceId_t smacInstanceId
+ )
+{
+ gSMAC_APP_MCPS_SapHandler = pSMAC_APP_MCPS_SapHandler;
+ gSMAC_APP_MLME_SapHandler = pSMAC_APP_MLME_SapHandler;
+ (void)smacInstanceId;
+}
+
+/************************************************************************************
+* SMACFillHeader
+*
+* This function helps the user fill the SMAC header(short hardcoded MAC header) with
+* the desired short destination address.
+*
+************************************************************************************/
+
+void SMACFillHeader(smacHeader_t* pSmacHeader, uint16_t destAddr)
+{
+ pSmacHeader->frameControl = gSmacDefaultFrameCtrl;
+ pSmacHeader->panId = u16PanID;
+ pSmacHeader->seqNo = gSmacDefaultSeqNo;
+ pSmacHeader->srcAddr = u16ShortSrcAddress;
+ pSmacHeader->destAddr = destAddr;
+}
+
+/************************************************************************************
+* InitSmac
+*
+* Basic SMAC initialisation.
+*
+************************************************************************************/
+void InitSmac(void)
+{
+ /* SMAC Initialization */
+ smacState = mSmacStateIdle_c;
+ smacLastDataRxParams.linkQuality = 0;
+ smacLastDataRxParams.timeStamp = 0;
+ uint32_t u32RandomNo;
+#if defined(gPHY_802_15_4g_d)
+ gTotalChannels = gPhyPib.pPIBphyRfConstants->totalNumChannels;
+#else
+ gTotalChannels = 26;
+#endif
+
+
+#if(TRUE == smacInitializationValidation_d)
+ mSmacInitialized = TRUE;
+#endif
+ txConfigurator.autoAck = FALSE;
+ txConfigurator.ccaBeforeTx = FALSE;
+ txConfigurator.retryCountAckFail = 0;
+ txConfigurator.retryCountCCAFail = 0;
+ u8BackoffTimerId = (uint8_t)TMR_AllocateTimer();
+ RNG_Init();
+ RNG_GetRandomNo(&u32RandomNo);
+ u8SmacSeqNo = (uint8_t)u32RandomNo;
+ //Notify the PHY what function to call for communicating with SMAC
+ Phy_RegisterSapHandlers((PD_MAC_SapHandler_t)PD_SMAC_SapHandler, (PLME_MAC_SapHandler_t)PLME_SMAC_SapHandler, 0);
+ u16PanID = gDefaultPanID_c;
+ u16ShortSrcAddress = gNodeAddress_c;
+ (void)SMACSetShortSrcAddress(u16ShortSrcAddress);
+ (void)SMACSetPanID(u16PanID);
+}
+
+/************************************************************************************
+* SMACSetShortSrcAddress
+*
+* This function sets the short source address so that PHY can perform filtering
+*
+************************************************************************************/
+
+smacErrors_t SMACSetShortSrcAddress(uint16_t nwShortAddress)
+{
+ macToPlmeMessage_t lMsg;
+ lMsg.msgType = gPlmeSetReq_c;
+ lMsg.msgData.setReq.PibAttribute = gPhyPibShortAddress_c;
+ lMsg.msgData.setReq.PibAttributeValue = (uint64_t)nwShortAddress;
+
+ phyStatus_t u8PhyRes = MAC_PLME_SapHandler(&lMsg,0);
+ if(u8PhyRes == gPhyBusy_c || u8PhyRes == gPhyBusyTx_c || u8PhyRes == gPhyBusyRx_c)
+ return gErrorBusy_c;
+ if(u8PhyRes != gPhySuccess_c)
+ return gErrorNoResourcesAvailable_c;
+ u16ShortSrcAddress = nwShortAddress;
+ return gErrorNoError_c;
+}
+
+/************************************************************************************
+* SMACSetPanID
+*
+* This function sets the pan ID so that PHY can perform filtering
+*
+************************************************************************************/
+
+smacErrors_t SMACSetPanID(uint16_t nwShortPanID)
+{
+ macToPlmeMessage_t lMsg;
+ lMsg.msgType = gPlmeSetReq_c;
+ lMsg.msgData.setReq.PibAttribute = gPhyPibPanId_c;
+ lMsg.msgData.setReq.PibAttributeValue = (uint64_t)nwShortPanID;
+
+ phyStatus_t u8PhyRes = MAC_PLME_SapHandler(&lMsg,0);
+ if(u8PhyRes == gPhyBusy_c || u8PhyRes == gPhyBusyTx_c || u8PhyRes == gPhyBusyRx_c)
+ return gErrorBusy_c;
+ if(u8PhyRes != gPhySuccess_c)
+ return gErrorNoResourcesAvailable_c;
+ u16PanID = nwShortPanID;
+ return gErrorNoError_c;
+}
+
+void BackoffTimeElapsed(void const *arg)
+{
+ uint8_t u8PhyRes = MAC_PD_SapHandler(gSmacDataMessage, 0);
+ if(u8PhyRes != gPhySuccess_c)
+ {
+ smacState = mSmacStateIdle_c;
+ MEM_BufferFree(gSmacDataMessage);
+ gSmacDataMessage = NULL;
+ }
+}
+
+/************************************************************************************
+* SMACPacketCheck
+*
+* This function returns TRUE if Phy payload can be of SMAC packet type
+*
+************************************************************************************/
+
+bool_t SMACPacketCheck(pdDataToMacMessage_t* pMsgFromPhy)
+{
+ //check if packet is of type Data
+ if( (pMsgFromPhy->msgData.dataInd.pPsdu[0] & 0x07) != 0x01 )
+ return FALSE;
+ //check if PSDU length is at least of smac header size.
+ if( (pMsgFromPhy->msgData.dataInd.psduLength < gSmacHeaderBytes_c) )
+ return FALSE;
+
+ return TRUE;
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/SMAC/SMAC.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,118 @@
+/**************************************************************************************************
+* SMAC implementation.
+*
+* Freescale Semiconductor Inc.
+* (c) Copyright 2004-2010 Freescale Semiconductor, Inc.
+* ALL RIGHTS RESERVED.
+*
+***************************************************************************************************
+*
+* THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESSED OR
+* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+* IN NO EVENT SHALL FREESCALE OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+* THE POSSIBILITY OF SUCH DAMAGE.
+*
+***********************************************************************************************//*!
+**************************************************************************************************/
+
+#ifndef SMAC_H_
+#define SMAC_H_
+
+/************************************************************************************
+*************************************************************************************
+* Includes
+*************************************************************************************
+************************************************************************************/
+
+#include "SMAC_Interface.h"
+#include "Phy.h"
+#include "PhyInterface.h"
+//#include "TimersManager.h"
+#include "RNG_Interface.h"
+
+#if defined (gPHY_802_15_4g_d)
+#include "PhyPib.h"
+#include "PhyExtended.h"
+#include "PhyTime.h"
+#endif
+/************************************************************************************
+*************************************************************************************
+* Private Prototypes
+*************************************************************************************
+************************************************************************************/
+void SmacSetRxTimeout(smacTime_t timeoutSymbols);
+
+#if defined (gPHY_802_15_4g_d)
+
+#define smacPreambleSizeOf16_c (16)
+#define smacPreambleSizeOf3_c (3)
+
+#endif
+/*smacParametersValidation_d:
+TRUE : SMAC primitives validate their incoming parameters.
+FALSE: SMAC primitives do their stuff without validating their incoming
+parameters
+*Note: Setting this as FALSE will compile a smaller foot print SMAC.
+*/
+#define smacParametersValidation_d TRUE
+
+/*smacInitializationValidation_d:
+TRUE : SMAC primitives validate whether SMAC is initialized or not.
+FALSE: SMAC primitives don't care about SMAC's initialization.
+*Note: Setting this as FALSE will compile a smaller foot print SMAC.
+*/
+#define smacInitializationValidation_d TRUE
+
+#define FRAME_CTRL_ACK_FIELD_SET (1 << 5)
+/************************************************************************************
+*************************************************************************************
+* Module Type definitions
+*************************************************************************************
+************************************************************************************/
+typedef enum smacStates_tag {
+ mSmacStateIdle_c,
+ mSmacStateTransmitting_c,
+ mSmacStateReceiving_c,
+ mSmacStateScanningChannels_c,
+ mSmacStatePerformingCca_c,
+ mSmacStatePerformingEd_c,
+ mSmacStatePerformingTest_c,
+ mSmacStateHibernate_c,
+ mSmacStateDoze_c
+} smacStates_t;
+
+typedef union prssPacketPtr_tag
+{
+ uint8_t* smacScanResultsPointer;
+ rxPacket_t *smacRxPacketPointer;
+ pdDataReq_t *smacTxPacketPointer;
+}prssPacketPtr_t;
+
+/***********************************************************************************
+* Phy to SMAC SAP prototype
+************************************************************************************/
+typedef phyStatus_t ( * PD_SMAC_SapHandler_t)(pdDataToMacMessage_t * pMsg, instanceId_t instanceId);
+
+typedef phyStatus_t ( * PLME_SMAC_SapHandler_t)(plmeToMacMessage_t * pMsg, instanceId_t instanceId);
+
+/***********************************************************************************
+* SMAC to App SAP handlers
+************************************************************************************/
+static SMAC_APP_MCPS_SapHandler_t gSMAC_APP_MCPS_SapHandler;
+static SMAC_APP_MLME_SapHandler_t gSMAC_APP_MLME_SapHandler;
+/************************************************************************************
+*************************************************************************************
+* Private definitions
+*************************************************************************************
+************************************************************************************/
+
+#define smacInstance 0
+
+#endif /* SMAC_H_ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/FSL_IEEE_802_15_4/SMAC/SMAC_Channels.h Thu Jul 16 07:29:15 2015 +0000 @@ -0,0 +1,224 @@ +/*! +* Copyright (c) 2014, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file SMAC_Channels.h +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _SMAC_CHANNELS_H +#define _SMAC_CHANNELS_H + + +/************************************************************************************ +************************************************************************************* +* Include +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public macros +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public prototypes +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public type definitions +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public memory declarations +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public functions +************************************************************************************* +************************************************************************************/ + +/* 802.15.4-2006 maximum channel enumeration */ +#if defined (gPHY_802_15_4g_d) +gChannel0_c = 0, +gChannel1_c, +gChannel2_c, +gChannel3_c, +gChannel4_c, +gChannel5_c, +gChannel6_c, +gChannel7_c, +gChannel8_c, +gChannel9_c, +gChannel10_c, +gChannel11_c, +gChannel12_c, +gChannel13_c, +gChannel14_c, +gChannel15_c, +gChannel16_c, +gChannel17_c, +gChannel18_c, +gChannel19_c, +gChannel20_c, +gChannel21_c, +gChannel22_c, +gChannel23_c, +gChannel24_c, +gChannel25_c, +gChannel26_c, +gChannel27_c, +gChannel28_c, +gChannel29_c, +gChannel30_c, +gChannel31_c, +gChannel32_c, +gChannel33_c, +gChannel34_c, +gChannel35_c, +gChannel36_c, +gChannel37_c, +gChannel38_c, +gChannel39_c, +gChannel40_c, +gChannel41_c, +gChannel42_c, +gChannel43_c, +gChannel44_c, +gChannel45_c, +gChannel46_c, +gChannel47_c, +gChannel48_c, +gChannel49_c, +gChannel50_c, +gChannel51_c, +gChannel52_c, +gChannel53_c, +gChannel54_c, +gChannel55_c, +gChannel56_c, +gChannel57_c, +gChannel58_c, +gChannel59_c, +gChannel60_c, +gChannel61_c, +gChannel62_c, +gChannel63_c, +gChannel64_c, +gChannel65_c, +gChannel66_c, +gChannel67_c, +gChannel68_c, +gChannel69_c, +gChannel70_c, +gChannel71_c, +gChannel72_c, +gChannel73_c, +gChannel74_c, +gChannel75_c, +gChannel76_c, +gChannel77_c, +gChannel78_c, +gChannel79_c, +gChannel80_c, +gChannel81_c, +gChannel82_c, +gChannel83_c, +gChannel84_c, +gChannel85_c, +gChannel86_c, +gChannel87_c, +gChannel88_c, +gChannel89_c, +gChannel90_c, +gChannel91_c, +gChannel92_c, +gChannel93_c, +gChannel94_c, +gChannel95_c, +gChannel96_c, +gChannel97_c, +gChannel98_c, +gChannel99_c, +gChannel100_c, +gChannel101_c, +gChannel102_c, +gChannel103_c, +gChannel104_c, +gChannel105_c, +gChannel106_c, +gChannel107_c, +gChannel108_c, +gChannel109_c, +gChannel110_c, +gChannel111_c, +gChannel112_c, +gChannel113_c, +gChannel114_c, +gChannel115_c, +gChannel116_c, +gChannel117_c, +gChannel118_c, +gChannel119_c, +gChannel120_c, +gChannel121_c, +gChannel122_c, +gChannel123_c, +gChannel124_c, +gChannel125_c, +gChannel126_c, +gChannel127_c, +gChannel128_c +#else + +gChannel11_c = 0x0B, +gChannel12_c, +gChannel13_c, +gChannel14_c, +gChannel15_c, +gChannel16_c, +gChannel17_c, +gChannel18_c, +gChannel19_c, +gChannel20_c, +gChannel21_c, +gChannel22_c, +gChannel23_c, +gChannel24_c, +gChannel25_c, +gChannel26_c +#endif + +#endif /* _SMAC_CHANNELS_H */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/FSL_IEEE_802_15_4/SMAC/SMAC_Config.h Thu Jul 16 07:29:15 2015 +0000 @@ -0,0 +1,47 @@ +/************************************************************************************************** +* This header contains SMAC basic configuration. +* +* Freescale Semiconductor Inc. +* (c) Copyright 2004-2010 Freescale Semiconductor, Inc. +* ALL RIGHTS RESERVED. +* +*************************************************************************************************** +* +* THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESSED OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL FREESCALE OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING +* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +* THE POSSIBILITY OF SUCH DAMAGE. +* +***********************************************************************************************//*! +**************************************************************************************************/ + +#ifndef SMAC_CONFIG_H_ +#define SMAC_CONFIG_H_ + +/* BEGIN SMAC Config Options Definition */ + +#define gNodeAddress_c (0xBEAD) +#define gDefaultPanID_c (0xFACE) +#define CCA_BEFORE_TX (FALSE) +#define gMaxRetriesAllowed_c ( 0x05 ) +//Make sure gMaxBackoffTime_c is of value (1<<n)-1. Ex: (1<<3)-1 = 7, (1<<4)-1 = 15; +#define gMaxBackoffTime_c ( 0x1F ) +#define gMinBackoffTime_c ( 0x00 ) +/* END SMAC Config Options Definition */ + +/* BEGIN Configuration Parameters Definition */ +#define gMaxOutputPower_c ( 0x1F ) +#define gMinOutputPower_c ( 0x03 ) +#define gDefaultOutputPower_c ( 0x0F ) +#define gDefaultChannelNumber_c gChannel11_c +#define gDefaultAddress_c (gBroadcastAddress_c) +/* END Configuration Parameters Definition */ + +#endif /* SMAC_CONFIG_H_ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/FSL_IEEE_802_15_4/SMAC/SMAC_Interface.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,722 @@
+/**************************************************************************************************
+* SMAC Interface header file
+*
+* Freescale Semiconductor Inc.
+* (c) Copyright 2004-2014 Freescale Semiconductor, Inc.
+* ALL RIGHTS RESERVED.
+*
+***************************************************************************************************
+*
+* THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESSED OR
+* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+* IN NO EVENT SHALL FREESCALE OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+* THE POSSIBILITY OF SUCH DAMAGE.
+*
+***********************************************************************************************//*!
+**************************************************************************************************/
+
+#ifndef SMAC_INTERFACE_H_
+#define SMAC_INTERFACE_H_
+
+/************************************************************************************
+*************************************************************************************
+* Includes
+*************************************************************************************
+************************************************************************************/
+#include "EmbeddedTypes.h"
+#include "PhyTypes.h"
+/************************************************************************************
+*************************************************************************************
+* Interface macro definitions
+*************************************************************************************
+************************************************************************************/
+
+#define gSmacHeaderBytes_c ( sizeof(smacHeader_t) )
+#define gMaxSmacSDULength_c (gMaxPHYPacketSize_c -(sizeof(smacHeader_t) + 2) )
+#define gMinSmacSDULength_c (0)
+
+#define gBroadcastAddress_c (0xFFFF)
+#define gSmacDefaultFrameCtrl (0x8841)
+#define gSmacDefaultSeqNo (0xAB)
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+// extern bool_t smacStandalone;
+extern uint8_t gTotalChannels;
+
+/************************************************************************************
+*************************************************************************************
+* Interface Type definitions
+*************************************************************************************
+************************************************************************************/
+
+typedef enum smacMessageDefs_tag
+{
+ gMcpsDataReq_c,
+ gMcpsDataCnf_c,
+ gMcpsDataInd_c,
+
+ gMcpsIndQueueInsertReq_c,
+ gMcpsIndQueueInsertCnf_c,
+ gMcpsIndQueueRemoveReq_c,
+
+ gMlmeCcaReq_c,
+ gMlmeCcaCnf_c,
+
+ gMlmeEdReq_c,
+ gMlmeEdCnf_c,
+
+ gMlmeSetTRxStateReq_c,
+ gMlmeSetTRxStateCnf_c,
+
+ gMlmeSetReq_c,
+ gMlmeSetCnf_c,
+
+ gMlmeGetReq_c,
+ gMlmeGetCnf_c,
+
+ gMlmeTimeoutInd_c,
+
+ gMlme_StartEventInd_c,
+ gMlme_SyncLossInd_c,
+ gMlme_RxSfdDetectInd_c,
+ gMlme_FilterFailInd_c,
+ gMlme_UnexpectedRadioResetInd_c,
+}smacMessageDefs_t;
+
+typedef uint64_t smacTime_t;
+
+typedef struct smacPdu_tag
+{
+ uint8_t smacPdu[1];
+}smacPdu_t;
+
+typedef PACKED_STRUCT smacHeader_tag
+{
+ uint16_t frameControl;
+ uint8_t seqNo;
+ uint16_t panId;
+ uint16_t destAddr;
+ uint16_t srcAddr;
+}smacHeader_t;
+
+typedef struct txPacket_tag
+{
+ uint8_t u8DataLength;
+ smacHeader_t smacHeader;
+ smacPdu_t smacPdu;
+}txPacket_t;
+
+typedef struct txContextConfig_tag
+{
+ bool_t ccaBeforeTx;
+ bool_t autoAck;
+ uint8_t retryCountCCAFail;
+ uint8_t retryCountAckFail;
+}txContextConfig_t;
+
+typedef enum rxStatus_tag
+{
+ rxInitStatus,
+ rxProcessingReceptionStatus_c,
+ rxSuccessStatus_c,
+ rxTimeOutStatus_c,
+ rxAbortedStatus_c,
+ rxMaxStatus_c
+} rxStatus_t;
+
+typedef struct rxPacket_tag
+{
+ uint8_t u8MaxDataLength;
+ rxStatus_t rxStatus;
+ uint8_t u8DataLength;
+ smacHeader_t smacHeader;
+ smacPdu_t smacPdu;
+}rxPacket_t;
+
+typedef enum txStatus_tag
+{
+ txSuccessStatus_c,
+ txFailureStatus_c,
+ txMaxStatus_c
+} txStatus_t;
+
+typedef enum smacErrors_tag
+{
+ gErrorNoError_c = 0,
+ gErrorBusy_c,
+ gErrorChannelBusy_c,
+ gErrorNoAck_c,
+ gErrorOutOfRange_c,
+ gErrorNoResourcesAvailable_c,
+ gErrorNoValidCondition_c,
+ gErrorCorrupted_c,
+ gErrorMaxError_c
+} smacErrors_t;
+
+#if defined (gPHY_802_15_4g_d)
+
+typedef enum smacRFModes_tag
+{
+ gRFMode1_c = gPhyMode1_c,
+ gRFMode2_c = gPhyMode2_c,
+ gRFMode3_c = gPhyMode3_c,
+ gRFMode4_c = gPhyMode4_c,
+ gRFMode5_c = gPhyMode1ARIB_c, /*ARIB mode 1*/
+ gRFMode6_c = gPhyMode2ARIB_c, /*ARIB mode 2*/
+ gRFMaxMode_c
+} smacRFModes_t;
+
+typedef enum smacFrequencyBands_tag
+{
+ gSMAC_863_870MHz_c = gFreq863__870MHz_c, /* 863-870 (Europe) */
+ gSMAC_902_928MHz_c = gFreq902__928MHz_c, /* 902-928 (US) */
+ gSMAC_920_928MHz_c = gFreq920__928MHz_c, /* 920-928 (Japan) */
+ gSMAC_169_400__169_475MHz_c = gFreq169_400__169_475MHz_c /* 169-475 */
+}smacFrequencyBands_t;
+
+#endif
+typedef struct smacPacket_tag
+{
+ uint8_t u8SyncWordSize;
+ uint8_t *u8SyncWordValue;
+ uint16_t u16PreambleLength;
+}smacPacket_t;
+
+typedef enum scanModes_tag
+{
+ gScanModeCCA_c = 0,
+ gScanModeED_c,
+ gMaxScanMode_c
+} scanModes_t;
+
+#if defined (gPHY_802_15_4g_d)
+
+typedef struct packetConfig_tag
+{
+ uint16_t u16PreambleSize;
+ uint8_t u8SyncWordSize;
+ uint8_t *pu8SyncWord;
+} packetConfig_t;
+
+#endif
+
+/*@CMA, Connectivity Test_Start*/
+typedef enum channels_tag
+{
+#include "SMAC_Channels.h"
+} channels_t;
+
+typedef enum smacTestMode_tag
+{
+ gTestModeForceIdle_c = 0,
+ gTestModeContinuousTxModulated_c,
+ gTestModeContinuousTxUnmodulated_c,
+ gTestModePRBS9_c,
+ gTestModeContinuousRxBER_c,
+ gMaxTestMode_c
+} smacTestMode_t;
+
+typedef struct smacDataCnf_tag
+{
+ smacErrors_t status;
+} smacDataCnf_t;
+
+typedef struct smacDataInd_tag
+{
+ //phyTimeTimestamp_t timeStamp;
+ uint8_t ppduLinkQuality;
+ uint8_t u8LastRxRssi;
+ rxPacket_t * pRxPacket;
+} smacDataInd_t;
+
+typedef struct smacEdReq_tag
+{
+ channels_t scanChannel;
+ smacTime_t startTime; // absolute
+} smacEdReq_t;
+
+typedef struct smacCcaReq_tag
+{
+ scanModes_t ccaType;
+} smacCcaReq_t;
+
+typedef struct smacCcaCnf_tag
+{
+ smacErrors_t status;
+} smacCcaCnf_t;
+
+typedef struct smacEdCnf_tag
+{
+ smacErrors_t status;
+ uint8_t energyLevel;
+ uint8_t energyLeveldB;
+ channels_t scannedChannel;
+} smacEdCnf_t;
+
+typedef struct smacToAppMlmeMessage_tag
+{
+ smacMessageDefs_t msgType;
+ uint8_t appInstanceId;
+ union
+ {
+ smacCcaCnf_t ccaCnf;
+ smacEdCnf_t edCnf;
+ }msgData;
+} smacToAppMlmeMessage_t;
+
+typedef struct smacToAppDataMessage_tag
+{
+ smacMessageDefs_t msgType;
+ uint8_t appInstanceId;
+ union
+ {
+ smacDataCnf_t dataCnf;
+ smacDataInd_t dataInd;
+ }msgData;
+} smacToAppDataMessage_t;
+
+typedef smacErrors_t ( * SMAC_APP_MCPS_SapHandler_t)(smacToAppDataMessage_t * pMsg, instanceId_t instanceId);
+
+typedef smacErrors_t ( * SMAC_APP_MLME_SapHandler_t)(smacToAppMlmeMessage_t * pMsg, instanceId_t instanceId);
+
+/************************************************************************************
+*************************************************************************************
+* External Prototypes
+*************************************************************************************
+************************************************************************************/
+extern void InitSmac(void);
+
+/***********************************************************************************
+* Smac_RegisterSapHandlers
+* This function registers the data and management components callbacks to the application
+* After calling this function and providing two function pointers, SMAC will call
+* one of these two, for each async request, based on request type (data or management)
+*
+* Interface assumptions:
+* The SMAC and radio driver have been initialized and are ready to be used.
+*
+* Return value:
+* None
+************************************************************************************/
+extern void Smac_RegisterSapHandlers(SMAC_APP_MCPS_SapHandler_t pSMAC_APP_MCPS_SapHandler,
+ SMAC_APP_MLME_SapHandler_t pSMAC_APP_MLME_SapHandler,
+ instanceId_t smacInstanceId);
+
+/***********************************************************************************
+* App to Smac SAP HANDLERS
+************************************************************************************/
+//smacErrors_t AppToSmac_Data_SapHandler(AppToSmacDataMessage_t* pMsg, uint8_t MACInstance);
+//smacErrors_t AppToSmac_Mlme_SapHandler(AppToSmacMlmeMessage_t* pMsg, uint8_t MACInstance);
+/***********************************************************************************/
+
+/******************************** SMAC Data primitives *****************************/
+/***********************************************************************************/
+
+/************************************************************************************
+* MCPSDataRequest
+*
+* This data primitive is used to send an over the air packet. This is an asyncronous
+* function, it means it ask SMAC to transmit one OTA packet, but when the function
+* returns it is not sent already.
+*
+* Interface assumptions:
+* The SMAC and radio driver have been initialized and are ready to be used.
+*
+* Return value:
+* gErrorNoError_c: Everything is ok and the transmission will be performed.
+* gErrorOutOfRange_c: One of the members in the pTxMessage structure is out of
+* range (no valid bufer size or data buffer pointer is NULL)
+* gErrorNoResourcesAvailable_c: the radio is performing another action.
+* gErrorNoValidCondition_c: The SMAC has not been initialized
+*
+************************************************************************************/
+extern smacErrors_t MCPSDataRequest(txPacket_t *psTxPacket);
+
+
+/************************************************************************************
+* MLMEConfigureTxContext
+*
+* This management primitive sets up the transmission conditions used by MCPSDataRequest
+*
+* Interface assumptions:
+* SMAC is initialized
+*
+* Return value:
+* gErrorNoError_c: Everything is set accordingly.
+* gErrorOutOfRange_c: More than gMaxRetriesAllowed_c are required
+* gErrorNoValidCondition_c: Retries are required but neither Ack nor CCA are requested
+*
+************************************************************************************/
+extern smacErrors_t MLMEConfigureTxContext(txContextConfig_t* pTxConfig);
+/************************************************************************************
+* MLMERXEnableRequest
+*
+* Function used to place the radio into receive mode
+*
+* Interface assumptions:
+* The SMAC and radio driver have been initialized and are ready to be used.
+*
+* Arguments:
+*
+* rxPacket_t *gsRxPacket: Pointer to the structure where the reception results will be stored.
+* smacTime_t stTimeout: 64-bit timeout value, absolute time in symbols
+*
+* Return Value:
+* gErrorNoError_c: Everything is ok and the reception will be performed.
+* gErrorOutOfRange_c: One of the members in the pRxMessage structure is out of range (no valid bufer size or data buffer pointer is NULL).
+* gErrorBusy_c: the radio is performing another action.
+* gErrorNoValidCondition_c: The SMAC has not been initialized.
+*************************************************************************************/
+extern smacErrors_t MLMERXEnableRequest(rxPacket_t *gsRxPacket, smacTime_t stTimeout);
+
+
+/************************************************************************************
+* MLMERXDisableRequest
+*
+* Returns the radio to idle mode from receive mode.
+*
+* Interface assumptions:
+* The SMAC and radio driver have been initialized and are ready to be used.
+*
+* Arguments:
+* None
+*
+* Return Value:
+* gErrorNoValidCondition_c If the Radio is not in Rx state.
+* gErrorNoError_c When the message was aborted or disabled.
+*************************************************************************************/
+extern smacErrors_t MLMERXDisableRequest(void);
+
+/************************************************************************************
+* MLMELinkQuality
+*
+* This function returns an integer value that is the link quality from the last received
+* packet of the form: dBm = (-Link Quality/2).
+*
+* Interface assumptions:
+* The SMAC and radio driver have been initialized and are ready to be used.
+*
+* Arguments:
+* None
+*
+* Return Value:
+* uint8_t: 8 bit value representing the link quality value in dBm.
+* Returns the result in smacLastDataRxParams.linkQuality.
+*************************************************************************************/
+extern uint8_t MLMELinkQuality(void);
+
+/************************************************************************************
+* MLMESetInterPacketRxDelay
+*
+* This sets the inter packet delay for the packet handler
+*
+* Interface assumptions:
+* The SMAC and radio driver have been initialized and are ready to be used.
+*
+* Arguments:
+* uint8_t u8InterPacketRxDelay: interpacket delay in ms
+*
+* Return Value:
+* gErrorNoValidCondition_c If the Radio is not in Rx state.
+* gErrorNoError_c When the message was aborted or disabled.
+*
+*************************************************************************************/
+#if defined(gPHY_802_15_4g_d)
+extern smacErrors_t MLMESetInterPacketRxDelay(uint8_t u8InterPacketRxDelay);
+#endif
+
+/***********************************************************************************/
+/******************************** SMAC Radio primitives ****************************/
+/***********************************************************************************/
+
+/************************************************************************************
+* MLMESetChannelRequest
+*
+* This sets the frequency on which the radio will transmit or receive on.
+*
+* Interface assumptions:
+* The SMAC and radio driver have been initialized and are ready to be used.
+*
+* Arguments:
+* channels_t newChannel: channel to be set
+*
+* Return Value:
+* gErrorNoError_c: The channel set has been performed
+* gErrorOutOfRange_c : channel requested is not valid
+* gErrorBusy_c: when SMAC is busy in other radio activity as transmitting or receiving data. Or performing a channel scan.
+*************************************************************************************/
+extern smacErrors_t MLMESetChannelRequest (channels_t newChannel);
+
+#ifdef gIncludeCalibrationOption
+/************************************************************************************
+* MLMESetAdditionalRFOffset
+*
+* This sets the frequency offset in respect to the current channel. Used for calibration.
+*
+* Interface assumptions:
+* The SMAC and radio driver have been initialized and are ready to be used.
+*
+* Arguments:
+* uint32_t additionalRFOffset: offset used in frequency Calculation
+*
+* Return Value:
+* gErrorNoError_c: The PIB is set
+* gErrorNoValidCondition_c: SMAC is not initialized
+*************************************************************************************/
+extern smacErrors_t MLMESetAdditionalRFOffset (uint32_t additionalRFOffset);
+
+/************************************************************************************
+* MLMEGetAdditionalRFOffset
+*
+* This gets the frequency offset in respect to the current channel. Used for calibration.
+*
+* Interface assumptions:
+* The SMAC and radio driver have been initialized and are ready to be used.
+*
+* Arguments:
+* None
+*
+* Return Value:
+* calibration offset
+*************************************************************************************/
+extern uint32_t MLMEGetAdditionalRFOffset( void );
+
+#endif
+/************************************************************************************
+* MLMEGetChannelRequest
+*
+* This function returns the current channel, if an error is detected it returns gChannelOutOfRange_c.
+*
+* Interface assumptions:
+* The SMAC and radio driver have been initialized and are ready to be used.
+*
+* Arguments:
+* None
+*
+* Return Value:
+* channels_t (uint8_t): The current RF channel.
+* gChannelOutOfRange_c: If current channel could not be detected
+*************************************************************************************/
+extern channels_t MLMEGetChannelRequest(void);
+
+
+/************************************************************************************
+* MLMERssi
+*
+* This call starts an energy detect (ED) cycle and returns the energy value (-power/2)
+* via the returned argument. For example, if the Energy Detect returns 80 then the
+* interpreted value is -80/2 or -40 dBm
+*
+* Interface assumptions:
+* The SMAC and radio driver have been initialized and are ready to be used.
+*
+* Arguments:
+* None
+*
+* Return Value:
+* uint8_t: An unsigned 8-bit value representing the energy on the current channel.
+*************************************************************************************/
+#if defined(gPHY_802_15_4g_d)
+extern uint8_t MLMERssi(void);
+#endif
+
+/************************************************************************************
+* MLMESetCCADuration
+*
+* This call sets the amount of time necessary to perform CCA or ED
+* Interface assumptions:
+* The SMAC and radio driver have been initialized and are ready to be used.
+*
+* Arguments:
+* uint64_t usCCADuration: duration in microseconds
+*
+* Return Value:
+* gErrorNoError_c in case of success, error code otherwise.
+*************************************************************************************/
+#if defined(gPHY_802_15_4g_d)
+extern smacErrors_t MLMESetCCADuration(uint64_t usCCADuration );
+#endif
+/************************************************************************************
+* MLMEPacketConfig
+*
+* This function sets the following parameters for OTA packets in radio�s registers:
+* Preamble size, synchronization word size, and synchronization word value.
+*
+* Interface assumptions:
+* The SMAC and radio driver have been initialized and are ready to be used.
+*
+* Arguments:
+* packetConfig_t *pPacketCfg
+*
+* Return Value:
+* gErrorBusy_c: when SMAC is busy in other radio activity as transmitting or receiving data.
+* Or performing a channel scan.
+* gErrorNoError_c: the packet has been configured
+*************************************************************************************/
+#if defined(gPHY_802_15_4g_d)
+extern smacErrors_t MLMEPacketConfig(packetConfig_t *pPacketCfg);
+#endif
+/************************************************************************************
+* MLMERadioInit
+*
+* This function initializes the Radio parameters.
+*
+* Interface assumptions:
+* None
+*
+* Arguments:
+* None
+*
+* Return Value:
+* gErrorNoError_c: the Radio initialization has been done successfully
+*************************************************************************************/
+#if defined(gPHY_802_15_4g_d)
+extern smacErrors_t MLMERadioInit(void);
+#endif
+/************************************************************************************
+* MLMEPhySoftReset
+*
+* This function performs a software reset on the radio, PHY and SMAC state machines.
+*
+* Interface assumptions:
+* None
+*
+* Arguments:
+* None
+*
+* Return Value:
+* gErrorNoError_c: If the action is performed.
+*************************************************************************************/
+extern smacErrors_t MLMEPhySoftReset(void);
+
+/************************************************************************************
+* MLMEPAOutputAdjust
+*
+*
+*************************************************************************************/
+extern smacErrors_t MLMEPAOutputAdjust(uint8_t u8PaValue);
+
+/************************************************************************************
+* MLMESetPreambleLength
+*
+*
+*************************************************************************************/
+#if defined(gPHY_802_15_4g_d)
+extern smacErrors_t MLMESetPreambleLength(uint16_t u16preambleLength);
+#endif
+/************************************************************************************
+* MLMESetSyncWordValue
+*
+*
+*************************************************************************************/
+#if defined(gPHY_802_15_4g_d)
+extern smacErrors_t MLMESetSyncWordValue(uint8_t *u8syncWordValue);
+#endif
+/************************************************************************************
+* MLMESetSyncWordSize
+*
+*
+*************************************************************************************/
+#if defined(gPHY_802_15_4g_d)
+extern smacErrors_t MLMESetSyncWordSize(uint8_t u8syncWordSize);
+#endif
+/************************************************************************************
+* MLMESetFreqBand
+*
+*
+*
+************************************************************************************/
+#if defined(gPHY_802_15_4g_d)
+extern smacErrors_t MLMESetFreqBand(smacFrequencyBands_t freqBand, smacRFModes_t phyMode);
+#endif
+/************************************************************************************
+* MLMESetPhyMode
+*
+*
+*
+************************************************************************************/
+#if defined(gPHY_802_15_4g_d)
+extern smacErrors_t MLMESetPhyMode(smacRFModes_t phyMode);
+#endif
+/***********************************************************************************/
+/***************************** SMAC Management primitives **************************/
+/***********************************************************************************/
+
+/************************************************************************************
+* MLMEScanRequest
+*
+* This function scans the channel passed as parameter using CCA or ED mode
+* returns the RSSI in that channel.
+*
+* Interface assumptions:
+* The SMAC and radio driver have been initialized and are ready to be used.
+*
+* Arguments:
+* channels_t u8ChannelToScan: channel to scan
+* uint8_t *u8ChannelScanResult: to return the RSSI value
+*
+* Return Value:
+* gErrorNoError_c: If the action was performed correctly.
+* gErrorBusy_c: If SMAC is busy.
+*************************************************************************************/
+extern smacErrors_t MLMEScanRequest(channels_t u8ChannelToScan);
+
+/*@CMA, Conn Test Added*/
+/************************************************************************************
+* MLMECcaRequest
+*
+* This function performs Clear Channel Assessment on the active channel
+*
+* Return value:
+* gErrorNoError_c: SMAC will perform Cca
+* gErrorBusy_c: SMAC is busy
+************************************************************************************/
+extern smacErrors_t MLMECcaRequest(void);
+
+/************************************************************************************
+* MLMETXDisableRequest
+*
+* Returns the radio to idle mode from Tx mode.
+*
+************************************************************************************/
+extern void MLMETXDisableRequest(void);
+
+/***********************************************************************************
+******************************** SMAC MCU primitives *******************************
+***********************************************************************************/
+
+/************************************************************************************
+*SMAC auxiliary functions
+*************************************************************************************/
+
+/************************************************************************************
+*SMACFillHeader
+*This is a replacement for the u8DestAddress in the txPacket_t structure
+*To set the destination address simply call this function with a pointer to
+*txPacket->smacHeader and a uint16_t variable resembling the address.
+*Also, to change the default source address and panID, modify gDefaultPanID_c and
+*gNodeAddress_c from SMAC_Config.h or call SMACSetShortSrcAddress and SMACSetPanID.
+*************************************************************************************/
+extern void SMACFillHeader(smacHeader_t* pSmacHeader, uint16_t destAddr);
+
+/***********************************************************************************/
+extern smacErrors_t SMACSetShortSrcAddress(uint16_t nwShortAddress);
+
+/***********************************************************************************/
+extern smacErrors_t SMACSetPanID(uint16_t nwShortPanID);
+
+/***********************************************************************************/
+
+
+
+#endif /* SMAC_INTERFACE_H_ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/Source/Application_Interface.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,209 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file Application_Interface.h
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef __SMAC_APPLICATION_CONF_H__
+#define __SMAC_APPLICATION_CONF_H__
+
+#include "MemManager.h"
+#include "ConnectivityMenus.h" /*Defines the Application menus*/
+
+#include "SMAC_Interface.h" /*@CMA Conn Test*/
+#include "FunctionLib.h"
+#include "AspInterface.h"
+#ifdef gPHY_802_15_4g_d
+#include "PhyTime.h"
+#endif
+
+#include "mbed.h"
+#include "rtos.h"
+
+
+
+/* BEGIN Configuration Parameters Definition */
+typedef enum ConnectivityStates_tag
+{
+ gConnInitState_c,
+ gConnIdleState_c,
+ gConnSelectTest_c,
+ gConnContinuousTxRxState_c,
+ gConnPerState_c,
+ gConnRangeState_c,
+ gConnRegEditState_c,
+ gConnSetChannelState_c,
+ gConnSetPowerState_c,
+ gConnSetTxTestState_c,
+ gConnSetRxTestState_c,
+ gConnSetTrimCoarseState_c,
+ gConnSetTrimFineState_c,
+ gConnContinuousTxState_c,
+ gConnPerTxState_c,
+ gConnRangeTxState_c,
+ gConnContinuousRxState_c,
+ gConnPerRxState_c,
+ gConnRangeRxState_c,
+ gConnBitrateSelectState_c,
+ gConnCSenseAndTCtrl_c,
+ gConnEDMeasCalib_c,
+ gConnMaxState_c
+}ConnectivityStates_t;
+
+
+typedef enum ContinuousTxRxTestStates_tag
+{
+ gCTxRxStateInit_c,
+ gCTxRxStateIdle_c,
+ gCTxRxStateSelectTest_c,
+ gCTxRxStateRunnigEdTest_c,
+ gCTxRxStateRunningEdTestGotResult_c,
+ gCTxRxStateRunningPRBS9Test_c,
+ gCTxRxStateRunnigScanTest_c,
+ gCTxRxStateRunnigRxTest_c,
+ gCTxRxStateRunningTXModSelectOpt,
+ gCTxRxStateRunnigCcaTest_c,
+ gCTxRxMaxState_c
+}ContinuousTxRxTestStates_t;
+
+typedef enum PerTxStates_tag
+{
+ gPerTxStateInit_c = 0,
+ gPerTxStateIdle_c,
+ gPerTxStateSelectPacketNum_c,
+ gPerTxStateInputPacketDelay_c,
+ gPerTxStateStartTest_c,
+ gPerTxStateRunningTest_c,
+ gPerTxStateSendingLastFrames_c,
+ gPerTxStateMaxState_c
+}PerTxStates_t;
+
+typedef enum PerRxStates_tag
+{
+ gPerRxStateInit_c = 0,
+ gPerRxStateIdle_c,
+ gPerRxWaitStartTest_c,
+ gPerRxStateStartTest_c,
+ gPerRxStateRunningTest_c,
+ gPerRxStateReceivingLastFrames_c,
+ gPerrxStateMaxState_c
+}PerRxStates_t;
+
+typedef enum RangeTxStates_tag
+{
+ gRangeTxStateInit_c = 0,
+ gRangeTxStateIdle_c,
+ gRangeTxWaitStartTest_c,
+ gRangeTxStateStartTest_c,
+ gRangeTxStateRunningTest_c,
+ gRangeTxStatePrintTestResults_c,
+ gRangeTxStateMaxState_c
+}RangeTxStates_t;
+
+typedef enum RangeRxStates_tag
+{
+ gRangeRxStateInit_c = 0,
+ gRangeRxStateIdle_c,
+ gRangeRxWaitStartTest_c,
+ gRangeRxStateStartTest_c,
+ gRangeRxStateRunningTest_c,
+ gRangeRxStatePrintTestResults_c,
+ gRangeRxStateMaxState_c
+}RangeRxStates_t;
+
+typedef enum CSenseTCtrlStates_tag
+{
+ gCsTcStateInit_c = 0,
+ gCsTcStateSelectTest_c,
+ gCsTcStateCarrierSenseStart_c,
+ gCsTcStateCarrierSenseSelectType_c,
+ gCsTcStateCarrierSensePerformingTest_c,
+ gCsTcStateCarrierSenseEndTest_c,
+ gCsTcStateTransmissionControlStart_c,
+ gCsTcStateTransmissionControlSelectNumOfPackets_c,
+ gCsTcStateTransmissionControlSelectInterpacketDelay_c,
+ gCsTcStateTransmissionControlPerformingTest_c,
+ gCsTcStateTransmissionControlEndTest_c,
+ gCsTcStateMaxState_c
+}CSenseTCtrlStates_t;
+
+typedef enum overrideRegistersStates_tag
+{
+ gORStateInit_c = 0,
+ gORStateStart_c,
+ gORWaitForTheAddress_c,
+ gORWaitForTheValue_c,
+ gORStateIdle_c,
+ gORStateMaxState_c
+}oRStates_t;
+
+typedef enum readRegistersStates_tag
+{
+ gRRStateInit_c = 0,
+ gRRStateStart_c,
+ gRRWaitForTheAddress_c,
+ gRRStateMaxState_c
+}rRStates_t;
+
+typedef enum EditRegsStates_tag
+{
+ gERStateInit_c = 0,
+ gERWaitSelection_c,
+ gERStateOverrideReg_c,
+ gERStateReadReg_c,
+ gERStateDumpAllRegs_c,
+ gERStateOverrideRadioSpiReg_c,
+ gERStateReadRadioSpiReg_c,
+ gERStateMaxState_c
+}EditRegsStates_t;
+
+typedef enum dumpRegistersStates_t
+{
+ gDRStateInit_c = 0,
+ gDRStateDumpRegs_c
+}dRStates_t;
+/* END Configuration Parameters Definition */
+
+#define gDefaultOperationMode_c mTxOperation_c
+#define gDefaultPayload_c 20
+#define mTotalFinalFrames_c 25
+
+#ifdef gPHY_802_15_4g_d
+ #define gMaxChannel_c ((channels_t)(gTotalChannels - 1))
+ #define gMinChannel_c (gChannel0_c)
+#else
+ #define gMaxChannel_c ((channels_t)gTotalChannels)
+ #define gMinChannel_c (gChannel11_c)
+#endif
+
+extern smacErrors_t smacToAppMlmeSap(smacToAppMlmeMessage_t* pMsg, instanceId_t instance);
+extern smacErrors_t smacToAppMcpsSap(smacToAppDataMessage_t* pMsg, instanceId_t instance);
+extern void InitApp();
+
+#endif /* __SMAC_APP_CONFIG_H__ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/Source/ConnectivityMenus.c Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,274 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file ConnectivityMenus.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#include "ConnectivityMenus.h"
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+
+char * const cu8FreescaleLogo[]={
+ "\f\r\n",
+ "\n\r\n\r\n\r #\n",
+ "\r ###\n",
+ "\r ### *\n",
+ "\r # ***\n",
+ "\r *** #\n",
+ "\r * ###\n",
+ "\r ###\n",
+ "\r * #\n",
+ "\r ***\n",
+ "\r *** #\n",
+ "\r # * ###\n",
+ "\r ### ###\n",
+ "\r ### * # F R E E S C A L E\n",
+ "\r # ***\n",
+ "\r *** S E M I C O N D U C T O R\n",
+ "\r # *\n",
+ "\r ### 2 0 1 5\n",
+ "\r ###\n",
+ "\r # Connectivity Test Demo\n\n",
+ "\r\n -Press enter to start",
+ NULL
+};
+
+/*@CMA, Conn Test. New string*/
+char * const cu8MainMenu[]={
+ "\f\r Connectivity Test Interface short cuts\n",
+ "\r------------------------------------------\n",
+ "\r -Press [t] for Tx operation\n",
+ "\r -Press [r] for Rx operation\n",
+ "\r -Press [q] for channel up\n",
+ "\r -Press [w] for channel down\n",
+ "\r -Press [a] for Power up\n",
+ "\r -Press [s] for Power down\n",
+ "\r -Press [n] to increase the Payload\n",
+ "\r -Press [m] to decrease the Payload\n",
+ "\r -Press [k] to increase CCA Threshold in Carrier Sense Test\n",
+ "\r -Press [l] to decrease CCA Threshold in Carrier Sense Test\n",
+ "\r These keys can be used all over the application to change \n",
+ "\r the test parameters\n",
+ "\r ________________________________\n",
+ "\r | |\n",
+ "\r | Select the Test to perform |\n",
+ "\r |________________________________|\n",
+ "\r -Press [1] Continuous tests\n",
+ "\r -Press [2] Packet Error Rate test\n",
+ "\r -Press [3] Range test\n",
+ "\r -Press [4] Carrier Sense and Transmission Control menu\n",
+ "\r -Press [5] Radio registers edit\n",
+ "\r -Press [p] Reset MCU\n\r\n",
+ NULL
+};
+
+/*@CMA, Conn Test. New string*/
+char * const cu8ShortCutsBar[]={
+ "\f\r\n",
+ "\r----------------------------------------------------\n",
+ "\r [t] Tx [q] Ch+ [a] Pw+ [n] Pyld+ [l] CCAThr-\n",
+ "\r [r] Rx [w] Ch- [s] Pw- [m] Pyld- [k] CCAThr+\n",
+ "\r----------------------------------------------------\n\r",
+ NULL
+};
+
+char * const cu8ContinuousTestMenu[]={
+ "\r __________________________ \n",
+ "\r| |\n",
+ "\r| Continuous Test Menu |\n",
+ "\r|__________________________|\n\r\n",
+ "\r-Press [1] Idle\n",
+ "\r-Press [2] Burst PRBS Transmission using packet mode\n",
+ "\r-Press [3] Continuous Modulated Transmission\n",
+ "\r-Press [4] Continuous Unmodulated Transmission\n",
+ "\r-Press [5] Continuous Reception\n",
+ "\r-Press [6] Continuous Energy Detect\n",
+ "\r-Press [7] Continuous Scan\n",
+ "\r-Press [8] Continuous Cca\n"
+ "\r-Press [p] Previous Menu\n\r\n",
+ "\rNow Running: ",
+ NULL
+};
+
+char * const cu8PerTxTestMenu[]={
+ "\r ____________________________ \n",
+ "\r | |\n",
+ "\r | PER Tx Test Menu |\n",
+ "\r |____________________________|\n\r\n",
+ "\r Choose the amount of packets to send:\n",
+ "\r [0] - 1 Packet [1] - 25 Packets\n",
+ "\r [2] - 100 Packets [3] - 500 Packets\n",
+ "\r [4] - 1000 Packets [5] - 2000 Packets\n",
+ "\r [6] - 5000 Packets [7] - 10000 Packets\n",
+ "\r [8] - 65535 Packets\n\r\n",
+ "\r-Press [p] Previous Menu\n\r\n",
+ NULL
+};
+
+char * const cu8PerRxTestMenu[]={
+ "\r ______________________ \n",
+ "\r | |\n",
+ "\r | PER Rx Test Menu |\n",
+ "\r |______________________|\n\r\n",
+ "\r -Press [space bar] to start/stop Receiving Packets\n",
+ "\r -Press [p] Previous Menu\n\r\n",
+ NULL
+};
+
+char * const cu8RangeTxTestMenu[]={
+ "\r ________________________ \n",
+ "\r | |\n",
+ "\r | Range Tx Test Menu |\n",
+ "\r |________________________|\n\r\n",
+ "\r -Press [space bar] to start/stop Transmiting Packets\n",
+ "\r -Press [p] Previous Menu\n\r\n",
+ NULL
+};
+
+char * const cu8RangeRxTestMenu[]={
+ "\r ________________________ \n",
+ "\r | |\n",
+ "\r | Range Rx Test Menu |\n",
+ "\r |________________________|\n\r\n",
+ "\r -Press [space bar] to start/stop Receiving Packets\n",
+ "\r -Press [p] Previous Menu\n\r\n",
+ NULL
+};
+
+/*@CMA, Conn Test. New menu*/
+char * const cu8RadioRegistersEditMenu[]={
+ "\r ____________________________ \n",
+ "\r | |\n",
+ "\r | Radio Registers Edit Menu |\n",
+ "\r |____________________________|\n\r\n",
+ "\r -Press [1] Write Direct Registers\n",
+ "\r -Press [2] Read Direct Registers\n",
+ "\r -Press [3] Write Indirect Registers\n",
+ "\r -Press [4] Read Indirect Registers\n",
+ "\r -Press [5] Dump All Registers\n",
+ "\r -Press [p] Previous Menu\n\r\n",
+ NULL
+};
+
+char * const cu8RadioCSTCSelectMenu[]={
+ "\r ___________________________________________________________ \n",
+ "\r | |\n",
+ "\r | Radio Carrier Sense and Transmission Control Select Menu |\n",
+ "\r |___________________________________________________________|\n\r\n",
+ "\r -Press [1] Carrier Sense Test with un-modulation input signal\n",
+ "\r -Press [2] Transmission Control Test\n",
+ "\r -Press [p] Previous Menu\n\r\n",
+ NULL
+};
+
+char * const cu8CsTcTestMenu[]={
+ "\r ____________________________ \n",
+ "\r | |\n",
+ "\r | Tr Ctrl Test Menu |\n",
+ "\r |____________________________|\n\r\n",
+ "\r Choose the amount of packets to send:\n",
+ "\r [0] - 1 Packet [1] - 25 Packets\n",
+ "\r [2] - 100 Packets [3] - 500 Packets\n",
+ "\r [4] - 1000 Packets [5] - 2000 Packets\n",
+ "\r [6] - 5000 Packets [7] - 10000 Packets\n",
+ "\r [8] - 65535 Packets\n\r\n",
+ "\r-Press [p] Previous Menu\n\r\n",
+ NULL
+};
+
+char * const cu8SelectTags[] ={
+ " Channel select ",
+ " Power select ",
+ " Test Tx select ",
+ " Test Rx select ",
+ "Trim coarse tune",
+ " Trim fine tune "
+};
+
+char * const cu8TxTestTags[] ={
+ " PER Tx ",
+ " Range Tx ",
+ " Cont. Idle ",
+ " Cont. PRBS9 ",
+ "Cont. Modulated ",
+ "Cont. Unmodulatd"
+};
+
+char * const cu8RxTestTags[] ={
+ " PER Rx ",
+ " Range Rx ",
+ "Cont. Reception ",
+ " Cont. Scan ",
+ "Cont.Energy Det."
+};
+
+char * const cu8TxModTestTags[] ={
+ "0's\r\n",
+ "1's\r\n",
+ "\b\b\b\b\b PN9\r\n"
+};
+
+char * const cu8ContinuousTestTags[] ={
+ "Idle mode",
+ "Continuous Tx Modulated - All ",
+ "Continuous Tx Unmodulated",
+ "Continuous PRBS9"
+};
+
+/************************************************************************************
+*************************************************************************************
+* Private prototypes
+*************************************************************************************
+************************************************************************************/
+
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+
+
+/************************************************************************************
+*************************************************************************************
+* Interface functions
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* private functions
+*************************************************************************************
+************************************************************************************/
+
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/Source/ConnectivityMenus.h Thu Jul 16 07:29:15 2015 +0000 @@ -0,0 +1,71 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file ConnectivityMenus.h +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#include "EmbeddedTypes.h" /*Include special data types*/ + +/************************************************************************************ +************************************************************************************* +* Public memory declarations +************************************************************************************* +************************************************************************************/ +extern char * const cu8FreescaleLogo[]; +extern char * const cu8MainMenu[]; +extern char * const cu8ShortCutsBar[]; +extern char * const cu8ContinuousTestMenu[]; +extern char * const cu8PerTxTestMenu[]; +extern char * const cu8PerRxTestMenu[]; +extern char * const cu8RangeTxTestMenu[]; +extern char * const cu8RangeRxTestMenu[]; +extern char * const cu8RadioRegistersEditMenu[]; +extern char * const cu8RadioCSTCSelectMenu[]; +extern char * const cu8CsTcTestMenu[]; +extern char * const cu8ContinuousTestTags[]; +extern char * const cu8SelectTags[]; +extern char * const cu8TxTestTags[]; +extern char * const cu8RxTestTags[]; +extern char * const cu8TxModTestTags[]; +/************************************************************************************ +************************************************************************************* +* Module macros +************************************************************************************* +************************************************************************************/ + +#define isAsciiHex(Data) (((Data >= '0') && (Data <= '9')) \ + || ((Data >= 'A') && (Data <= 'F')) \ + || ((Data >= 'a') && (Data <= 'f'))) + +/************************************************************************************ +************************************************************************************* +* Interface functions prototypes +************************************************************************************* +************************************************************************************/ +void PrintMenu(char * const pu8Menu[], uint8_t port);
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/Source/Connectivity_TestApp.cpp Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,2537 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file Connectivity_TestApp.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "Application_Interface.h"
+#include "Connectivity_Test_Platform.h"
+/************************************************************************************
+*************************************************************************************
+* Private type definitions
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Macros
+*************************************************************************************
+************************************************************************************/
+#define gPrbs9BufferLength_c ( 65 )
+#define gContTxModSelectPN9_c ( 2 )
+#define gContTxModSelectOnes_c ( 1 )
+#define gContTxModSelectZeros_c ( 0 )
+#define SelfNotificationEvent() mainTask->signal_set(gCTSelf_EVENT_c);
+
+#define gUART_RX_EVENT_c (1<<0)
+#define gMcps_Cnf_EVENT_c (1<<1)
+#define gMcps_Ind_EVENT_c (1<<2)
+#define gMlme_EdCnf_EVENT_c (1<<3)
+#define gMlme_CcaCnf_EVENT_c (1<<4)
+#define gMlme_TimeoutInd_EVENT_c (1<<5)
+#define gRangeTest_EVENT_c (1<<6)
+#define gCTSelf_EVENT_c (1<<7)
+#define gTimePassed_EVENT_c (1<<8)
+
+#define gEventsAll_c (gUART_RX_EVENT_c | gMcps_Ind_EVENT_c | gMcps_Cnf_EVENT_c | \
+ gMlme_TimeoutInd_EVENT_c | gMlme_EdCnf_EVENT_c | gMlme_CcaCnf_EVENT_c | \
+ gRangeTest_EVENT_c | gCTSelf_EVENT_c | gTimePassed_EVENT_c)
+
+#define Delay_ms(a)
+#define FlaggedDelay_ms(a) TMR_StartSingleShotTimer(AppDelayTmr, a, DelayTimeElapsed, NULL)
+
+#ifdef gPHY_802_15_4g_d
+#define GetTimestampUS() PhyTime_GetTimestampUs()
+#define GetTransmissionTime(payload, bitrate) ((((gPhyFSKPreambleLength_c + \
+ gPhyMRFSKPHRLength_c + gPhyMRFSKSFDLength_c + \
+ sizeof(smacHeader_t) + payload + gPhyFCSSize_c )*8000 )/ bitrate))
+#else
+#define GetTimestampUS() (16*PhyTime_GetTimestamp())
+#define GetTransmissionTime(payload, bitrate) (((6 + sizeof(smacHeader_t) + payload + 2)*32))
+//bitrate is fixed for 2.4 GHz
+#define crtBitrate (0)
+#endif
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+
+uint32_t gTaskEventFlags;
+
+/*smac related variables*/
+bool_t bTxDone;
+bool_t bRxDone;
+bool_t bScanDone;
+bool_t gCCaGotResult;
+bool_t gIsChannelIdle;
+bool_t bEdDone;
+bool_t failedPRBS9;
+uint8_t u8LastRxRssiValue;
+bool_t evTestParameters;
+uint8_t au8ScanResults[129];
+
+/*serial manager related variables*/
+uint8_t gu8UartData;
+bool_t evDataFromUART;
+uint8_t mAppSer;
+
+/*connectivity test state machine variables*/
+operationModes_t testOpMode;
+operationModes_t prevOpMode;
+
+channels_t testChannel;
+uint8_t testPower;
+uint8_t testPayloadLen;
+uint8_t contTxModBitValue;
+uint8_t ccaThresh;
+bool_t shortCutsEnabled;
+ConnectivityStates_t connState;
+ContinuousTxRxTestStates_t cTxRxState;
+PerTxStates_t perTxState;
+PerRxStates_t perRxState;
+RangeTxStates_t rangeTxState;
+RangeRxStates_t rangeRxState;
+EditRegsStates_t eRState;
+oRStates_t oRState;
+rRStates_t rRState;
+dRStates_t dRState;
+CSenseTCtrlStates_t cstcState;
+uint8_t ChannelToScan;
+smacTestMode_t contTestRunning;
+
+/*asp related variables*/
+AppToAspMessage_t aspTestRequestMsg;
+
+extern uint8_t u8Prbs9Buffer[gPrbs9BufferLength_c];
+
+Serial uart(USBTX,USBRX);
+Thread *mainTask;
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+static uint8_t gau8RxDataBuffer[gMaxSmacSDULength_c + sizeof(txPacket_t)];
+static uint8_t gau8TxDataBuffer[gMaxSmacSDULength_c + sizeof(rxPacket_t)];
+
+static txPacket_t * gAppTxPacket;
+static rxPacket_t * gAppRxPacket;
+
+static uint8_t timePassed;
+Timeout RangeTestTmr;
+Timer AppDelayTmr;
+/************************************************************************************
+*************************************************************************************
+* Private prototypes
+*************************************************************************************
+************************************************************************************/
+#if CT_Feature_Calibration
+extern void StoreTrimValueToFlash (uint32_t trimValue, CalibrationOptionSelect_t option);
+#endif
+
+/*platform independent functions*/
+static void SerialUIStateMachine(void);
+static bool_t SerialContinuousTxRxTest(void);
+static bool_t PacketErrorRateTx(void);
+static bool_t PacketErrorRateRx(void);
+static void SetRadioRxOnNoTimeOut(void);
+static void HandleEvents(int32_t evSignals);
+static void PrintTestParameters(bool_t bEraseLine);
+
+static void PrintPerRxFinalLine(uint16_t u16Received, uint16_t u16Total);
+extern uint32_t HexString2Dec(uint8_t * au8String);
+static bool_t stringComp(uint8_t * au8leftString, uint8_t * au8RightString, uint8_t bytesToCompare);
+/********************************/
+
+static void RangeTest_Timer_CallBack ();
+static bool_t RangeTx(void);
+static bool_t RangeRx(void);
+
+static bool_t EditRegisters(void);
+#if CT_Feature_Direct_Registers || CT_Feature_Indirect_Registers
+bool_t OverrideRegisters(void);
+bool_t ReadRegisters(void);
+bool_t DumpRegisters(void);
+bool_t bIsRegisterDirect = TRUE;
+#endif
+
+static bool_t CSenseAndTCtrl(void);
+static void TransmissionControlHandler(void);
+static void CarrierSenseHandler(void);
+static smacErrors_t TestMode ( smacTestMode_t mode);
+static void PacketHandler_Prbs9(void);
+static void DelayTimeElapsed();
+static void IncrementChannelOnEdEvent();
+extern void ReadRFRegs(registerAddressSize_t, registerAddressSize_t);
+extern void PrintTestParameters(bool_t bEraseLine);
+
+/*************************************/
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+void InitProject(void);
+void InitSmac(void);
+void main_task(void const *argument);
+extern void ResetMCU(void);
+void UartRxCallBack(void * param);
+void PrintMenu(char * const pu8Menu[], uint8_t port);
+
+/************************************************************************************
+*
+* InitProject
+*
+************************************************************************************/
+void InitProject(void)
+{
+ /*Global Data init*/
+ testPayloadLen = gMaxSmacSDULength_c;
+
+ testOpMode = gDefaultOperationMode_c;
+ testChannel = gDefaultChannelNumber_c;
+ testPower = gDefaultOutputPower_c;
+ testPayloadLen = gDefaultPayload_c;
+ contTestRunning = gTestModeForceIdle_c;
+ shortCutsEnabled = FALSE;
+ connState = gConnInitState_c;
+ cTxRxState = gCTxRxStateInit_c;
+ perTxState = gPerTxStateInit_c;
+ perRxState = gPerRxStateInit_c;
+ rangeTxState = gRangeTxStateInit_c;
+ rangeRxState = gRangeRxStateInit_c;
+ prevOpMode = gDefaultOperationMode_c;
+ oRState = gORStateInit_c;
+ rRState = gRRStateInit_c;
+ dRState = gDRStateInit_c;
+ ccaThresh = gDefaultCCAThreshold_c;
+ bEdDone = FALSE;
+ evDataFromUART = FALSE;
+
+ InitProject_custom();
+}
+
+/************************************************************************************
+*************************************************************************************
+* SAP functions
+*************************************************************************************
+************************************************************************************/
+
+//(Management) Sap handler for managing timeout indication and ED confirm
+smacErrors_t smacToAppMlmeSap(smacToAppMlmeMessage_t* pMsg, instanceId_t instance)
+{
+ switch(pMsg->msgType)
+ {
+ case gMlmeEdCnf_c:
+ au8ScanResults[pMsg->msgData.edCnf.scannedChannel] = pMsg->msgData.edCnf.energyLeveldB;
+ gTaskEventFlags |= gMlme_EdCnf_EVENT_c;
+ break;
+ case gMlmeCcaCnf_c:
+ gTaskEventFlags |= gMlme_CcaCnf_EVENT_c;
+ if(pMsg->msgData.ccaCnf.status == gErrorNoError_c)
+ gIsChannelIdle = TRUE;
+ else
+ gIsChannelIdle = FALSE;
+ break;
+ case gMlmeTimeoutInd_c:
+ gTaskEventFlags |= gMlme_TimeoutInd_EVENT_c;
+ break;
+ default:
+ break;
+ }
+ MEM_BufferFree(pMsg);
+ return gErrorNoError_c;
+}
+//(Data) Sap handler for managing data confirm and data indication
+smacErrors_t smacToAppMcpsSap(smacToAppDataMessage_t* pMsg, instanceId_t instance)
+{
+ switch(pMsg->msgType)
+ {
+ case gMcpsDataInd_c:
+ if(pMsg->msgData.dataInd.pRxPacket->rxStatus == rxSuccessStatus_c)
+ {
+ u8LastRxRssiValue = pMsg->msgData.dataInd.u8LastRxRssi;
+ gTaskEventFlags |= gMcps_Ind_EVENT_c;
+ }
+ break;
+ case gMcpsDataCnf_c:
+ if(pMsg->msgData.dataCnf.status == gErrorNoError_c)
+ {
+ gTaskEventFlags |= gMcps_Cnf_EVENT_c;
+
+ }
+ break;
+ default:
+ break;
+ }
+
+ MEM_BufferFree(pMsg);
+ return gErrorNoError_c;
+}
+
+static void HandleEvents(int32_t evSignals)
+{
+ if(evSignals & gUART_RX_EVENT_c)
+ {
+ if(shortCutsEnabled)
+ {
+ ShortCutsParser(gu8UartData);
+ }
+ else
+ {
+ evDataFromUART = TRUE;
+ }
+ }
+ if(evSignals & gMcps_Cnf_EVENT_c)
+ {
+ bTxDone = TRUE;
+ }
+ if(evSignals & gMcps_Ind_EVENT_c)
+ {
+ bRxDone = TRUE;
+ }
+ if(evSignals & gMlme_TimeoutInd_EVENT_c)
+ {
+ }
+ if(evSignals & gRangeTest_EVENT_c)
+ {
+ bRxDone=TRUE;
+ }
+ if(evSignals & gMlme_EdCnf_EVENT_c)
+ {
+ if (cTxRxState == gCTxRxStateRunnigScanTest_c)
+ {
+ IncrementChannelOnEdEvent();
+ }
+ if (cTxRxState == gCTxRxStateRunnigEdTest_c)
+ {
+ cTxRxState = gCTxRxStateRunningEdTestGotResult_c;
+ }
+ if (connState == gConnCSenseAndTCtrl_c)
+ {
+ bScanDone = TRUE;
+ }
+ bEdDone = TRUE;
+ }
+ if(evSignals & gMlme_CcaCnf_EVENT_c)
+ {
+ gCCaGotResult = TRUE;
+ uart.printf("Channel %d is", (uint32_t)testChannel);
+ if(gIsChannelIdle)
+ uart.printf("Idle\r\n");
+ else
+ uart.printf("Busy\r\n");
+ }
+ if(evSignals & gCTSelf_EVENT_c)
+ {
+ }
+}
+
+
+/*************************************************************************/
+/*Main Task: Application entry point*/
+/*************************************************************************/
+void main_task(void const *argument)
+{
+ static bool_t bIsInitialized = FALSE;
+ static bool_t bUserInteraction = FALSE;
+ //Initialize Memory Manager, Timer Manager and LEDs.
+ if( !bIsInitialized )
+ {
+
+ MEM_Init();
+ //initialize PHY
+ Phy_Init();
+
+ InitApp();
+
+ /*Prints the Welcome screens in the terminal*/
+ PrintMenu(cu8FreescaleLogo, mAppSer);
+
+ connState = gConnIdleState_c;
+ bIsInitialized = TRUE;
+ }
+ if(!bUserInteraction)
+ {
+ while(1)
+ {
+ //(void)OSA_EventWait(&gTaskEvent, gEventsAll_c, FALSE, OSA_WAIT_FOREVER ,&gTaskEventFlags);
+ Thread::signal_wait(gEventsAll_c);
+ if(gTaskEventFlags & gUART_RX_EVENT_c)
+ {
+ if(gu8UartData == '\r')
+ {
+ SelfNotificationEvent();
+ bUserInteraction = TRUE;
+ break;
+ }
+ else
+ {
+ PrintMenu(cu8FreescaleLogo, mAppSer);
+ }
+ }
+ }
+ }
+ if(bUserInteraction)
+ {
+ while(1)
+ {
+ //(void)OSA_EventWait(&gTaskEvent, gEventsAll_c, FALSE, OSA_WAIT_FOREVER ,&gTaskEventFlags);
+ Thread::signal_wait(gEventsAll_c);
+ HandleEvents(gTaskEventFlags);
+ SerialUIStateMachine();
+ }
+ }
+}
+
+/*************************************************************************/
+/*InitApp: Initializes application mdoules and data*/
+/*************************************************************************/
+void InitApp()
+{
+
+ gAppTxPacket = (txPacket_t*)gau8TxDataBuffer; //Map TX packet to buffer
+ gAppRxPacket = (rxPacket_t*)gau8RxDataBuffer; //Map Rx packet to buffer
+ gAppRxPacket->u8MaxDataLength = gMaxSmacSDULength_c;
+
+ uart.baud(115200);
+
+ //Initialise SMAC
+ InitSmac();
+ //Tell SMAC who to call when it needs to pass a message to the application thread.
+ Smac_RegisterSapHandlers((SMAC_APP_MCPS_SapHandler_t)smacToAppMcpsSap,(SMAC_APP_MLME_SapHandler_t)smacToAppMlmeSap,0);
+
+ InitProject();
+
+ InitApp_custom();
+
+ ASP_Init(0, mAppSer);
+
+ SMACFillHeader(&(gAppTxPacket->smacHeader), gBroadcastAddress_c); //@CMA, Conn Test. Start with broadcast address default
+ (void)MLMEPAOutputAdjust(testPower);
+ (void)MLMESetChannelRequest(testChannel); //@CMA, Conn Test. Start Foperation at default channel
+}
+
+/************************************************************************************
+*
+* Connectivity Test State Machine
+*
+************************************************************************************/
+void SerialUIStateMachine(void)
+{
+ if((gConnSelectTest_c == connState) && evTestParameters)
+ {
+#if CT_Feature_Calibration
+ (void)MLMESetAdditionalRFOffset(gOffsetIncrement);
+#endif
+ (void)MLMESetChannelRequest(testChannel);
+ (void)MLMEPAOutputAdjust(testPower);
+ PrintTestParameters(TRUE);
+ evTestParameters = FALSE;
+ }
+ switch(connState)
+ {
+ case gConnIdleState_c:
+ PrintMenu(cu8MainMenu, mAppSer);
+ PrintTestParameters(FALSE);
+ shortCutsEnabled = TRUE;
+ connState = gConnSelectTest_c;
+ break;
+ case gConnSelectTest_c:
+ if(evDataFromUART){
+ if('1' == gu8UartData)
+ {
+ cTxRxState = gCTxRxStateInit_c;
+ connState = gConnContinuousTxRxState_c;
+ }
+ else if('2' == gu8UartData)
+ {
+ perTxState = gPerTxStateInit_c;
+ perRxState = gPerRxStateInit_c;
+ connState = gConnPerState_c;
+ }
+ else if('3' == gu8UartData)
+ {
+ rangeTxState = gRangeTxStateInit_c;
+ rangeRxState = gRangeRxStateInit_c;
+ connState = gConnRangeState_c;
+ }
+ else if('4' == gu8UartData)
+ {
+ cstcState = gCsTcStateInit_c;
+ connState = gConnCSenseAndTCtrl_c;
+ }
+#if CT_Feature_Direct_Registers || CT_Feature_Indirect_Registers
+ else if('5' == gu8UartData)
+ {
+ eRState = gERStateInit_c;
+ connState = gConnRegEditState_c;
+ }
+#endif
+#if CT_Feature_Bitrate_Select
+ else if('6' == gu8UartData)
+ {
+ bsState = gBSStateInit_c;
+ connState = gConnBitrateSelectState_c;
+ }
+#endif
+#if CT_Feature_Calibration
+ else if('7' == gu8UartData)
+ {
+ connState = gConnEDMeasCalib_c;
+ edCalState= gEdCalStateInit_c;
+ }
+#endif
+ else if('!' == gu8UartData)
+ {
+ ResetMCU();
+ }
+ evDataFromUART = FALSE;
+ SelfNotificationEvent();
+ }
+ break;
+ case gConnContinuousTxRxState_c:
+ if(SerialContinuousTxRxTest())
+ {
+ connState = gConnIdleState_c;
+ SelfNotificationEvent();
+ }
+ break;
+ case gConnPerState_c:
+ if(mTxOperation_c == testOpMode)
+ {
+ if(PacketErrorRateTx())
+ {
+ connState = gConnIdleState_c;
+ SelfNotificationEvent();
+ }
+ }
+ else
+ {
+ if(PacketErrorRateRx())
+ {
+ connState = gConnIdleState_c;
+ SelfNotificationEvent();
+ }
+ }
+ break;
+ case gConnRangeState_c:
+ if(mTxOperation_c == testOpMode)
+ {
+ if(RangeTx())
+ {
+ connState = gConnIdleState_c;
+ SelfNotificationEvent();
+ }
+ }
+ else
+ {
+ if(RangeRx())
+ {
+ connState = gConnIdleState_c;
+ SelfNotificationEvent();
+ }
+ }
+ break;
+ case gConnRegEditState_c:
+ if(EditRegisters())
+ {
+ connState = gConnIdleState_c;
+ SelfNotificationEvent();
+ }
+ break;
+#if CT_Feature_Bitrate_Select
+ case gConnBitrateSelectState_c:
+ if(Bitrate_Select())
+ {
+ connState = gConnIdleState_c;
+ }
+ break;
+#endif
+ case gConnCSenseAndTCtrl_c:
+ if(CSenseAndTCtrl())
+ {
+ connState = gConnIdleState_c;
+ SelfNotificationEvent();
+ }
+ break;
+#if CT_Feature_Calibration
+ case gConnEDMeasCalib_c:
+ if(EDCalibrationMeasurement())
+ {
+ connState = gConnIdleState_c;
+ SelfNotificationEvent();
+ }
+ break;
+#endif
+ default:
+ break;
+
+ }
+ if(prevOpMode != testOpMode)
+ {
+ perTxState = gPerTxStateInit_c;
+ perRxState = gPerRxStateInit_c;
+ rangeTxState = gRangeTxStateInit_c;
+ rangeRxState = gRangeRxStateInit_c;
+ prevOpMode = testOpMode;
+ SelfNotificationEvent();
+ }
+}
+
+/************************************************************************************
+*
+* Continuous Tests State Machine
+*
+************************************************************************************/
+bool_t SerialContinuousTxRxTest(void)
+{
+ bool_t bBackFlag = FALSE;
+ uint8_t u8Index, u8TempEnergyValue, u8TempScanValue;
+
+ if(evTestParameters)
+ {
+ (void)TestMode(gTestModeForceIdle_c);
+#if CT_Feature_Calibration
+ (void)MLMESetAdditionalRFOffset(gOffsetIncrement);
+#endif
+ (void)MLMESetChannelRequest(testChannel);
+ (void)MLMEPAOutputAdjust(testPower);
+
+ if(gTestModePRBS9_c == contTestRunning)
+ {
+ cTxRxState = gCTxRxStateRunningPRBS9Test_c;
+ }
+ (void)TestMode(contTestRunning);
+
+ if(gCTxRxStateSelectTest_c == cTxRxState)
+ {
+ PrintTestParameters(TRUE);
+ }
+ else
+ {
+ PrintTestParameters(FALSE);
+ uart.printf("\r\n");
+ }
+
+ if(gCTxRxStateRunnigRxTest_c == cTxRxState)
+ {
+ bRxDone = FALSE;
+ gAppRxPacket->u8MaxDataLength = gMaxSmacSDULength_c;
+ (void)MLMERXEnableRequest(gAppRxPacket, 0);
+ }
+ evTestParameters = FALSE;
+ }
+
+ switch(cTxRxState)
+ {
+ case gCTxRxStateIdle_c:
+ if((evDataFromUART) && ('\r' == gu8UartData))
+ {
+ cTxRxState = gCTxRxStateInit_c;
+ evDataFromUART = FALSE;
+ SelfNotificationEvent();
+ }
+ break;
+ case gCTxRxStateInit_c:
+ PrintMenu(cu8ShortCutsBar, mAppSer);
+ PrintMenu(cu8ContinuousTestMenu, mAppSer);
+ //Phy in StandBy, smacstate in Idle.
+ (void)TestMode(gTestModeForceIdle_c);
+ while(MLMESetChannelRequest(testChannel));
+ uart.printf(cu8ContinuousTestTags[contTestRunning]);
+ if(contTestRunning == gTestModeContinuousTxModulated_c)
+ {
+ uart.printf(cu8TxModTestTags[contTxModBitValue]);
+ }
+ (void)TestMode(contTestRunning);
+ uart.printf("\r\n\r\n");
+ PrintTestParameters(FALSE);
+ shortCutsEnabled = TRUE;
+ cTxRxState = gCTxRxStateSelectTest_c;
+ break;
+ case gCTxRxStateSelectTest_c:
+ if(evDataFromUART)
+ {
+ if('1' == gu8UartData)
+ {
+ contTestRunning = gTestModeForceIdle_c;
+ cTxRxState = gCTxRxStateInit_c;
+ SelfNotificationEvent();
+ }
+ else if('2' == gu8UartData)
+ {
+ shortCutsEnabled = FALSE;
+ (void)TestMode(gTestModeForceIdle_c);
+ contTestRunning = gTestModePRBS9_c;
+ MLMESetChannelRequest(testChannel);
+ uart.printf("\f\r\nPress [p] to stop the Continuous PRBS9 test\r\n");
+ (void)TestMode(contTestRunning);
+ cTxRxState = gCTxRxStateRunningPRBS9Test_c;
+ }
+ else if('3' == gu8UartData)
+ {
+ contTestRunning = gTestModeContinuousTxModulated_c;
+ cTxRxState = gCTxRxStateRunningTXModSelectOpt;
+ // uart.printf( "\f\r\n To use this mode shunt pins 3-4 on J18");
+ uart.printf("\f\r\nPress 2 for PN9, 1 to modulate values of 1 and 0 to modulate values of 0");
+
+ }
+ else if('4' == gu8UartData)
+ {
+ if(gTestModeContinuousTxUnmodulated_c != contTestRunning)
+ {
+ contTestRunning = gTestModeContinuousTxUnmodulated_c;
+ cTxRxState = gCTxRxStateInit_c;
+ SelfNotificationEvent();
+ }
+ }
+ else if('5' == gu8UartData)
+ {
+ shortCutsEnabled = FALSE;
+ (void)TestMode(gTestModeForceIdle_c);
+ MLMESetChannelRequest(testChannel);
+ contTestRunning = gTestModeForceIdle_c;
+ uart.printf("\f\r\nPress [p] to stop receiving broadcast packets \r\n");
+ bRxDone = FALSE;
+ gAppRxPacket->u8MaxDataLength = gMaxSmacSDULength_c;
+ (void)MLMERXEnableRequest(gAppRxPacket, 0);
+ cTxRxState = gCTxRxStateRunnigRxTest_c;
+ }
+ else if('6' == gu8UartData)
+ {
+ (void)TestMode(gTestModeForceIdle_c);
+ contTestRunning = gTestModeForceIdle_c;
+ uart.printf("\f\r\nPress [p] to stop the Continuous ED test\r\n");
+ cTxRxState = gCTxRxStateRunnigEdTest_c;
+ Thread::wait(200);
+ }
+ else if('7' == gu8UartData)
+ {
+ (void)TestMode(gTestModeForceIdle_c);
+ contTestRunning = gTestModeForceIdle_c;
+ ChannelToScan= gDefaultChannelNumber_c;
+ uart.printf("\f\r\nPress [p] to stop the Continuous SCAN test\r\n");
+ bScanDone = FALSE;
+ cTxRxState = gCTxRxStateRunnigScanTest_c;
+ SelfNotificationEvent();
+ }
+ else if('8' == gu8UartData)
+ {
+ (void)TestMode(gTestModeForceIdle_c);
+ uart.printf("\f\r\nPress [p] to stop the Continuous CCA test\r\n");
+ contTestRunning = gTestModeForceIdle_c;
+ cTxRxState = gCTxRxStateRunnigCcaTest_c;
+ Thread::wait(100);
+ MLMECcaRequest();
+ }
+#if CT_Feature_BER_Test
+ else if ('9' == gu8UartData)
+ {
+ uart.printf( "\f\r\nPress [p] to stop the Continuous BER test\r\n");
+ contTestRunning = gTestModeContinuousRxBER_c;
+ cTxRxState = gCTxRxStateInit_c;
+ SelfNotificationEvent();
+ }
+#endif
+ else if('p' == gu8UartData)
+ {
+ (void)TestMode(gTestModeForceIdle_c);
+ (void)MLMESetChannelRequest(testChannel);
+ AppDelayTmr.stop();
+ timePassed = FALSE;
+ bBackFlag = TRUE;
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ case gCTxRxStateRunningTXModSelectOpt:
+ if(evDataFromUART)
+ {
+ if(gu8UartData == '2')
+ contTxModBitValue = gContTxModSelectPN9_c;
+ else
+ if(gu8UartData == '1')
+ contTxModBitValue = gContTxModSelectOnes_c;
+ else
+ if(gu8UartData == '0')
+ contTxModBitValue = gContTxModSelectZeros_c;
+
+ evDataFromUART = FALSE;
+ cTxRxState = gCTxRxStateInit_c;
+ SelfNotificationEvent();
+ }
+ break;
+ case gCTxRxStateRunningPRBS9Test_c:
+ if(bTxDone || failedPRBS9)
+ {
+ failedPRBS9 = FALSE;
+ bTxDone = FALSE;
+ PacketHandler_Prbs9();
+ }
+ if(evDataFromUART && 'p' == gu8UartData)
+ {
+ contTestRunning = gTestModeForceIdle_c;
+ (void)TestMode(gTestModeForceIdle_c);
+ (void)MLMESetChannelRequest(testChannel);
+ AppDelayTmr.stop();
+ timePassed = FALSE;
+ uart.printf("\r\n\r\n Press [enter] to go back to the Continuous test menu ");
+ cTxRxState = gCTxRxStateIdle_c;
+ evDataFromUART = FALSE;
+ shortCutsEnabled = TRUE;
+ }
+ break;
+ case gCTxRxStateRunnigRxTest_c:
+ if(bRxDone)
+ {
+ if (gAppRxPacket->rxStatus == rxSuccessStatus_c)
+ {
+ uart.printf("New Packet: ");
+ for(u8Index = 0; u8Index < (gAppRxPacket->u8DataLength); u8Index++){
+ uart.printf( (const char *)(&(gAppRxPacket->smacPdu.smacPdu[u8Index])));
+ }
+ uart.printf(" \r\n");
+ }
+ bRxDone = FALSE;
+ gAppRxPacket->u8MaxDataLength = gMaxSmacSDULength_c;
+ (void)MLMERXEnableRequest(gAppRxPacket, 0);
+ }
+ if((evDataFromUART) && ('p' == gu8UartData))
+ {
+ (void)MLMERXDisableRequest();
+ (void)TestMode(gTestModeForceIdle_c);
+ uart.printf("\r\n\r\n Press [enter] to go back to the Continuous test menu ");
+ cTxRxState = gCTxRxStateIdle_c;
+ evDataFromUART = FALSE;
+ }
+ break;
+ case gCTxRxStateRunnigEdTest_c:
+ if(timePassed)
+ {
+ timePassed = FALSE;
+ Thread::wait(100);
+ MLMEScanRequest(testChannel);
+ }
+ if((evDataFromUART) && ('p' == gu8UartData))
+ {
+ uart.printf("\r\n\r\n Press [enter] to go back to the Continuous test menu ");
+ cTxRxState = gCTxRxStateIdle_c;
+ evDataFromUART = FALSE;
+ timePassed = FALSE;
+ AppDelayTmr.stop();
+ }
+
+ break;
+ case gCTxRxStateRunningEdTestGotResult_c:
+ uart.printf("Energy on the Channel %d : ", (uint32_t)testChannel);
+ u8TempEnergyValue = au8ScanResults[testChannel];
+ if(u8TempEnergyValue != 0)
+ uart.printf( "-");
+ uart.printf("%d dBm\r\n ",(uint32_t)u8TempEnergyValue);
+ cTxRxState = gCTxRxStateRunnigEdTest_c;
+ break;
+ case gCTxRxStateRunnigCcaTest_c:
+ if(timePassed && gCCaGotResult)
+ {
+ gCCaGotResult = FALSE;
+ timePassed = FALSE;
+ MLMECcaRequest();
+ Thread::wait(100);
+ }
+ if((evDataFromUART) && ('p' == gu8UartData))
+ {
+ uart.printf("\r\n\r\n Press [enter] to go back to the Continuous test menu ");
+ cTxRxState = gCTxRxStateIdle_c;
+ evDataFromUART = FALSE;
+ timePassed = FALSE;
+ AppDelayTmr.stop();
+ }
+ break;
+ case gCTxRxStateRunnigScanTest_c:
+ if(bScanDone && timePassed)
+ {
+ //Enters here until all channels have been scanned. Then starts to print.
+ uart.printf("Results : ");
+ for(u8Index = gMinChannel_c; u8Index <= gMaxChannel_c ; u8Index++)
+ {
+ u8TempScanValue= au8ScanResults[u8Index];
+ if(u8TempScanValue != 0)
+ uart.printf("-");
+ uart.printf("%d, ", (uint32_t) u8TempScanValue);
+ }
+ uart.printf("\b \r\n");
+ bScanDone = FALSE;
+ ChannelToScan = gDefaultChannelNumber_c; // Restart channel count
+ timePassed = FALSE;
+ }
+
+ if((evDataFromUART) && ('p' == gu8UartData))
+ {
+ uart.printf("\r\n\r\n Press [enter] to go back to the Continuous test menu ");
+ cTxRxState = gCTxRxStateIdle_c;
+ evDataFromUART = FALSE;
+ }
+ else
+ {
+ if(ChannelToScan == gDefaultChannelNumber_c)
+ {
+ smacErrors_t err = MLMEScanRequest((channels_t)ChannelToScan);
+ if(err == gErrorNoError_c)
+ ChannelToScan++;
+ }
+ //Each of the other channels is scanned after SMAC notifies us that
+ //it has obtained the energy value on the currently scanned channel
+ //(channel scanning is performed asynchronously). See IncrementChannelOnEdEvent().
+ }
+ break;
+ default:
+ break;
+ }
+ return bBackFlag;
+}
+
+/************************************************************************************
+*
+* PER Handler for board that is performing TX
+*
+************************************************************************************/
+bool_t PacketErrorRateTx(void)
+{
+ const uint16_t u16TotalPacketsOptions[] = {1,25,100,500,1000,2000,5000,10000,65535};
+ static uint16_t u16TotalPackets;
+ static uint16_t u16SentPackets;
+ static uint32_t miliSecDelay;
+ static uint32_t u32MinDelay = 4;
+ uint8_t u8Index;
+ bool_t bBackFlag = FALSE;
+
+ if(evTestParameters)
+ {
+ (void)MLMERXDisableRequest();
+#if CT_Feature_Calibration
+ (void)MLMESetAdditionalRFOffset(gOffsetIncrement);
+#endif
+ (void)MLMESetChannelRequest(testChannel);
+ (void)MLMEPAOutputAdjust(testPower);
+ PrintTestParameters(TRUE);
+ evTestParameters = FALSE;
+ }
+
+ switch(perTxState)
+ {
+ case gPerTxStateInit_c:
+ PrintMenu(cu8ShortCutsBar, mAppSer);
+ PrintMenu(cu8PerTxTestMenu, mAppSer);
+ PrintTestParameters(FALSE);
+ shortCutsEnabled = TRUE;
+ perTxState = gPerTxStateSelectPacketNum_c;
+ miliSecDelay = 0;
+ u32MinDelay = 4;
+ (void)MLMERXDisableRequest();
+ break;
+ case gPerTxStateSelectPacketNum_c:
+ if(evDataFromUART)
+ {
+ if((gu8UartData >= '0') && (gu8UartData <= '8'))
+ {
+ u16TotalPackets = u16TotalPacketsOptions[gu8UartData - '0'];
+ shortCutsEnabled = FALSE;
+ u32MinDelay += (GetTransmissionTime(testPayloadLen, crtBitrate) / 1000);
+ uart.printf("\r\n\r\n Please type TX interval in miliseconds ( > %d ms ) and press [ENTER]\r\n", u32MinDelay);
+ perTxState = gPerTxStateInputPacketDelay_c;
+ }
+ else if('p' == gu8UartData)
+ {
+ bBackFlag = TRUE;
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ case gPerTxStateInputPacketDelay_c:
+ if(evDataFromUART)
+ {
+ if(gu8UartData == '\r')
+ {
+ if(miliSecDelay < u32MinDelay)
+ {
+ uart.printf("\r\n\tError: TX Interval too small\r\n");
+ perTxState = gPerTxStateInit_c;
+ SelfNotificationEvent();
+ }
+ else
+ {
+ perTxState = gPerTxStateStartTest_c;
+ SelfNotificationEvent();
+ }
+ }
+ else if((gu8UartData >= '0') && (gu8UartData <='9'))
+ {
+ miliSecDelay = miliSecDelay*10 + (gu8UartData - '0');
+ uart.printf("%d", (uint32_t)(gu8UartData - '0'));
+ }
+ else if('p' == gu8UartData)
+ {
+ perTxState = gPerTxStateInit_c;
+ SelfNotificationEvent();
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ case gPerTxStateStartTest_c:
+ gAppTxPacket->u8DataLength = testPayloadLen;
+ u16SentPackets = 0;
+
+ gAppTxPacket->smacPdu.smacPdu[0] = (u16TotalPackets >> 8);
+ gAppTxPacket->smacPdu.smacPdu[1] = (uint8_t)u16TotalPackets;
+ gAppTxPacket->smacPdu.smacPdu[2] = ((u16SentPackets+1) >> 8);
+ gAppTxPacket->smacPdu.smacPdu[3] = (uint8_t)(u16SentPackets+1);
+ FLib_MemCpy(&(gAppTxPacket->smacPdu.smacPdu[4]), (void*)"SMAC PER Demo",13);
+ if(17 < testPayloadLen)
+ {
+ for(u8Index=17;u8Index<testPayloadLen;u8Index++)
+ {
+ gAppTxPacket->smacPdu.smacPdu[u8Index] = (u8Index%10)+'0';
+ }
+ }
+ bTxDone = FALSE;
+ (void)MCPSDataRequest(gAppTxPacket);
+ u16SentPackets++;
+ uart.printf("\f\r\n Running PER Tx, Sending %d Packets",(uint32_t)u16TotalPackets);
+ perTxState = gPerTxStateRunningTest_c;
+ Thread::wait(miliSecDelay);
+ break;
+ case gPerTxStateRunningTest_c:
+ if(bTxDone && timePassed)
+ {
+ uart.printf("\r\n Packet %d ",(uint32_t)u16SentPackets);
+ if(u16SentPackets == u16TotalPackets)
+ {
+ uart.printf("\r\n\r\nSending last %d frames \r\n",(uint32_t)mTotalFinalFrames_c);
+ FLib_MemCpy(&(gAppTxPacket->smacPdu.smacPdu[4]), (void *)"DONE",4);
+ gAppTxPacket->u8DataLength = 8;
+ u16SentPackets = 0;
+ u16TotalPackets = mTotalFinalFrames_c;
+ gAppTxPacket->u8DataLength = 8;
+ perTxState = gPerTxStateSendingLastFrames_c;
+ }
+ else
+ {
+ gAppTxPacket->smacPdu.smacPdu[2] = ((u16SentPackets+1) >> 8);
+ gAppTxPacket->smacPdu.smacPdu[3] = (uint8_t)(u16SentPackets+1);
+ gAppTxPacket->u8DataLength = testPayloadLen;
+ }
+ bTxDone = FALSE;
+ (void)MCPSDataRequest(gAppTxPacket);
+ u16SentPackets++;
+ timePassed = FALSE;
+ Thread::wait(miliSecDelay);
+ }
+ if(evDataFromUART && gu8UartData == ' ')
+ {
+ uart.printf("\r\n\r\n-Test interrupted by user. Press [ENTER] to continue\r\n\r\n");
+ perTxState = gPerTxStateIdle_c;
+ }
+ break;
+ case gPerTxStateSendingLastFrames_c:
+ if(bTxDone && timePassed)
+ {
+ bTxDone = FALSE;
+ timePassed = FALSE;
+ uart.printf("\r\n Final Packet %d",(uint32_t)u16SentPackets);
+ if(u16SentPackets == u16TotalPackets)
+ {
+ uart.printf( "\r\n PER Tx DONE \r\n");
+ uart.printf( "\r\n\r\n Press [enter] to go back to the PER Tx test menu ");
+ perTxState = gPerTxStateIdle_c;
+ AppDelayTmr.stop();
+ timePassed = FALSE;
+ }
+ else
+ {
+ gAppTxPacket->u8DataLength = 8;
+ (void)MCPSDataRequest(gAppTxPacket);
+ u16SentPackets++;
+ Thread::wait(miliSecDelay);
+ }
+ }
+ if(evDataFromUART && gu8UartData == ' ')
+ {
+ uart.printf("\r\n\r\n-Test interrupted by user. Press [ENTER] to continue\r\n\r\n");
+ perTxState = gPerTxStateIdle_c;
+ }
+ break;
+ case gPerTxStateIdle_c:
+ if((evDataFromUART) && ('\r' == gu8UartData))
+ {
+ perTxState = gPerTxStateInit_c;
+ evDataFromUART = FALSE;
+ SelfNotificationEvent();
+ }
+ break;
+ default:
+ break;
+ }
+
+ return bBackFlag;
+}
+
+/************************************************************************************
+*
+* PER Handler for board that is performing RX
+*
+************************************************************************************/
+bool_t PacketErrorRateRx(void)
+{
+ static uint16_t u16ReceivedPackets;
+ static uint16_t u16PacketsIndex;
+ static uint16_t u16TotalPackets;
+ static uint16_t u16FinalPacketsCount;
+ static uint32_t u32RssiSum;
+ static uint8_t u8AverageRssi;
+ uint8_t u8TempRssivalue;
+
+ bool_t bBackFlag = FALSE;
+ if(evTestParameters)
+ {
+#if CT_Feature_Calibration
+ (void)MLMESetAdditionalRFOffset(gOffsetIncrement);
+#endif
+ (void)MLMESetChannelRequest(testChannel);
+ (void)MLMEPAOutputAdjust(testPower);
+ PrintTestParameters(TRUE);
+ evTestParameters = FALSE;
+ }
+ switch(perRxState)
+ {
+ case gPerRxStateInit_c:
+ u16TotalPackets = 0;
+ u16ReceivedPackets = 0;
+ u16PacketsIndex = 0;
+ u32RssiSum = 0;
+ PrintMenu(cu8ShortCutsBar, mAppSer);
+ PrintMenu(cu8PerRxTestMenu, mAppSer);
+ PrintTestParameters(FALSE);
+ shortCutsEnabled = TRUE;
+ perRxState = gPerRxWaitStartTest_c;
+ break;
+ case gPerRxWaitStartTest_c:
+ if(evDataFromUART)
+ {
+ if(' ' == gu8UartData)
+ {
+ uart.printf("\f\n\rPER Test Rx Running\r\n\r\n");
+ SetRadioRxOnNoTimeOut();
+ shortCutsEnabled = FALSE;
+ perRxState = gPerRxStateStartTest_c;
+ }
+ else if('p' == gu8UartData)
+ {
+ bBackFlag = TRUE;
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ case gPerRxStateStartTest_c:
+ if(bRxDone)
+ {
+ if (gAppRxPacket->rxStatus == rxSuccessStatus_c)
+ {
+ if(stringComp((uint8_t*)"SMAC PER Demo",&gAppRxPacket->smacPdu.smacPdu[4],13))
+ {
+ u16TotalPackets = ((uint16_t)gAppRxPacket->smacPdu.smacPdu[0] <<8) + gAppRxPacket->smacPdu.smacPdu[1];
+ u16PacketsIndex = ((uint16_t)gAppRxPacket->smacPdu.smacPdu[2] <<8) + gAppRxPacket->smacPdu.smacPdu[3];
+ u16ReceivedPackets++;
+ u8TempRssivalue= u8LastRxRssiValue; //@CMA, Conn Test. New line
+ u32RssiSum += u8TempRssivalue;
+ u8AverageRssi = (uint8_t)(u32RssiSum/u16ReceivedPackets);
+ uart.printf("Packet %d . Packet index: %d . Rssi during RX: - %d\r\n",(uint32_t)u16ReceivedPackets, (uint32_t)u16PacketsIndex, (uint32_t)u8LastRxRssiValue);
+ if(u16PacketsIndex == u16TotalPackets)
+ {
+ u16FinalPacketsCount = 0;
+ perRxState = gPerRxStateReceivingLastFrames_c;
+ }
+ }
+ else if(stringComp((uint8_t*)"DONE",&gAppRxPacket->smacPdu.smacPdu[4],4))
+ {
+ u16FinalPacketsCount = 0;
+ perRxState = gPerRxStateReceivingLastFrames_c;
+ }
+ }
+ else
+ {
+ if(u16TotalPackets)
+ {
+ u16PacketsIndex++;
+ if(u16PacketsIndex == u16TotalPackets)
+ {
+ u16FinalPacketsCount = 0;
+ perRxState = gPerRxStateReceivingLastFrames_c;
+ }
+ }
+ }
+
+ SetRadioRxOnNoTimeOut();
+ }
+ if(evDataFromUART)
+ {
+ if(' ' == gu8UartData)
+ {
+ (void)MLMERXDisableRequest();
+ uart.printf("\r\nAverage Rssi during PER: -");
+ uart.printf("%d",(uint32_t)u8AverageRssi);
+ uart.printf(" dBm\r\n");
+ uart.printf( "\n\rPER Test Rx Stopped\r\n\r\n");
+ PrintPerRxFinalLine(u16ReceivedPackets,u16TotalPackets);
+ perRxState = gPerRxStateIdle_c;
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ case gPerRxStateReceivingLastFrames_c:
+ if(bRxDone)
+ {
+ u16FinalPacketsCount++;
+ if(mTotalFinalFrames_c == u16FinalPacketsCount)
+ {
+ uart.printf("\r\nAverage Rssi during PER: -");
+ uart.printf("%d",(uint32_t)u8AverageRssi);
+ uart.printf(" dBm\r\n");
+ uart.printf( "\n\rPER Test Finished\r\n\r\n");
+ PrintPerRxFinalLine(u16ReceivedPackets,u16TotalPackets);
+ perRxState = gPerRxStateIdle_c;
+ }
+ else
+ {
+ SetRadioRxOnNoTimeOut();
+ }
+ }
+ if(evDataFromUART)
+ {
+ if(' ' == gu8UartData)
+ {
+ (void)MLMERXDisableRequest();
+ uart.printf("\r\nAverage Rssi during PER: -");
+ uart.printf("%d",(uint32_t)u8AverageRssi);
+ uart.printf(" dBm\r\n");
+ uart.printf( "\n\rPER Test Rx Stopped\r\n\r\n");
+ PrintPerRxFinalLine(u16ReceivedPackets,u16TotalPackets);
+ perRxState = gPerRxStateIdle_c;
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ case gPerRxStateIdle_c:
+ if((evDataFromUART) && ('\r' == gu8UartData))
+ {
+ perRxState = gPerRxStateInit_c;
+ SelfNotificationEvent();
+ }
+ evDataFromUART = FALSE;
+ break;
+ default:
+ break;
+ }
+ return bBackFlag;
+}
+
+/************************************************************************************
+*
+* Range Test Handler for board that is performing TX
+*
+************************************************************************************/
+bool_t RangeTx(void)
+{
+ bool_t bBackFlag = FALSE;
+ static uint32_t u32RSSISum;
+ static uint16_t u16ReceivedPackets;
+ static uint16_t u16PacketsDropped;
+ uint8_t u8AverageRSSI;
+ uint8_t u8CurrentRSSI;
+
+ if(evTestParameters)
+ {
+#if CT_Feature_Calibration
+ (void)MLMESetAdditionalRFOffset(gOffsetIncrement);
+#endif
+ (void)MLMESetChannelRequest(testChannel);
+ (void)MLMEPAOutputAdjust(testPower);
+ PrintTestParameters(TRUE);
+ evTestParameters = FALSE;
+ }
+
+ switch(rangeTxState)
+ {
+ case gRangeTxStateInit_c:
+ u32RSSISum = 0;
+ u16ReceivedPackets = 0;
+ u16PacketsDropped = 0;
+ PrintMenu(cu8ShortCutsBar, mAppSer);
+ PrintMenu(cu8RangeTxTestMenu, mAppSer);
+ PrintTestParameters(FALSE);
+ shortCutsEnabled = TRUE;
+ rangeTxState = gRangeTxWaitStartTest_c;
+ break;
+ case gRangeTxWaitStartTest_c:
+ if(evDataFromUART)
+ {
+ if(' ' == gu8UartData)
+ {
+ shortCutsEnabled = FALSE;
+ uart.printf( "\f\r\nRange Test Tx Running\r\n");
+ rangeTxState = gRangeTxStateStartTest_c;
+ Thread::wait(200);
+ }
+ else if('p' == gu8UartData)
+ {
+ bBackFlag = TRUE;
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ case gRangeTxStateStartTest_c:
+ if(!timePassed) //waiting 200 ms
+ break;
+ timePassed = FALSE;
+ bTxDone = FALSE;
+ gAppTxPacket->u8DataLength = 16;
+ gAppTxPacket->smacPdu.smacPdu[0] = 0;
+ FLib_MemCpy(&(gAppTxPacket->smacPdu.smacPdu[1]), (void*)"SMAC Range Demo",15);
+ MLMERXDisableRequest();
+ //RangeTestTmr.stop(); //@CMA, Conn Test. Stop Rx timer
+ (void)MCPSDataRequest(gAppTxPacket);
+ rangeTxState = gRangeTxStateRunningTest_c;
+ break;
+ case gRangeTxStateRunningTest_c:
+ if(bTxDone)
+ {
+ RangeTestTmr.attach_us(RangeTest_Timer_CallBack, 80000); //@CMA, Conn Test. Start Timer
+ SetRadioRxOnNoTimeOut();
+ rangeTxState = gRangeTxStatePrintTestResults_c;
+ }
+ break;
+ case gRangeTxStatePrintTestResults_c:
+ if(bRxDone)
+ {
+ if(gAppRxPacket->rxStatus == rxSuccessStatus_c)
+ {
+ if(stringComp((uint8_t*)"SMAC Range Demo",&gAppRxPacket->smacPdu.smacPdu[1],15))
+ {
+ u8CurrentRSSI = (gAppRxPacket->smacPdu.smacPdu[0]);
+ u32RSSISum += u8CurrentRSSI;
+ u16ReceivedPackets++;
+ u8AverageRSSI = (uint8_t)(u32RSSISum/u16ReceivedPackets);
+ uart.printf( "\r\n RSSI = -");
+ uart.printf("%d", (uint32_t)u8CurrentRSSI);
+ uart.printf(" dBm");
+ }
+ else
+ {
+ RangeTestTmr.attach_us(RangeTest_Timer_CallBack, 80000); //@CMA, Conn Test. Start Timer
+ SetRadioRxOnNoTimeOut();
+ }
+ }
+ else
+ {
+ u16PacketsDropped++;
+ uart.printf( "\r\nPacket Dropped");
+ bRxDone= FALSE; //@CMA, Conn Test. Added
+ }
+ if(evDataFromUART && (' ' == gu8UartData))
+ {
+ uart.printf( "\n\r\n\rRange Test Tx Stopped\r\n\r\n");
+ u8AverageRSSI = (uint8_t)(u32RSSISum/u16ReceivedPackets);
+ uart.printf( "Average RSSI -");
+ uart.printf("%d", (uint32_t)u8AverageRSSI);
+ uart.printf(" dBm");
+ uart.printf( "\r\nPackets dropped ");
+ uart.printf("%d", (uint32_t)u16PacketsDropped);
+ uart.printf( "\r\n\r\n Press [enter] to go back to the Range Tx test menu");
+ rangeTxState = gRangeTxStateIdle_c;
+ (void)MLMERXDisableRequest();
+ AppDelayTmr.stop();
+ timePassed = FALSE;
+ }
+ else
+ {
+ rangeTxState = gRangeTxStateStartTest_c;
+ Thread::wait(200);
+ }
+ evDataFromUART = FALSE;
+ }
+
+ break;
+ case gRangeTxStateIdle_c:
+ if((evDataFromUART) && ('\r' == gu8UartData))
+ {
+ rangeTxState = gRangeTxStateInit_c;
+ SelfNotificationEvent();
+ }
+ evDataFromUART = FALSE;
+ break;
+ default:
+ break;
+ }
+ return bBackFlag;
+}
+
+/************************************************************************************
+*
+* Range Test Handler for board that is performing RX
+*
+************************************************************************************/
+bool_t RangeRx(void)
+{
+ bool_t bBackFlag = FALSE;
+ static uint32_t u32RSSISum;
+ static uint16_t u16ReceivedPackets;
+ uint8_t u8AverageRSSI, u8TempRSSIvalue;
+ uint8_t u8CurrentRSSI;
+
+ if(evTestParameters)
+ {
+#if CT_Feature_Calibration
+ (void)MLMESetAdditionalRFOffset(gOffsetIncrement);
+#endif
+ (void)MLMESetChannelRequest(testChannel);
+ (void)MLMEPAOutputAdjust(testPower);
+ PrintTestParameters(TRUE);
+ evTestParameters = FALSE;
+ }
+
+ switch(rangeRxState)
+ {
+ case gRangeRxStateInit_c:
+ u32RSSISum = 0;
+ u16ReceivedPackets = 0;
+ PrintMenu(cu8ShortCutsBar, mAppSer);
+ PrintMenu(cu8RangeRxTestMenu, mAppSer);
+ PrintTestParameters(FALSE);
+ shortCutsEnabled = TRUE;
+ rangeRxState = gRangeRxWaitStartTest_c;
+ break;
+ case gRangeRxWaitStartTest_c:
+ if(evDataFromUART)
+ {
+ if(' ' == gu8UartData)
+ {
+ shortCutsEnabled = FALSE;
+ uart.printf( "\f\r\nRange Test Rx Running\r\n");
+ rangeRxState = gRangeRxStateStartTest_c;
+ }
+ else if('p' == gu8UartData)
+ {
+ bBackFlag = TRUE;
+ }
+ evDataFromUART = FALSE;
+ SelfNotificationEvent();
+ }
+ break;
+ case gRangeRxStateStartTest_c:
+ SetRadioRxOnNoTimeOut();
+ rangeRxState = gRangeRxStateRunningTest_c;
+ break;
+ case gRangeRxStateRunningTest_c:
+ if(evDataFromUART && (' ' == gu8UartData))
+ {
+ (void)MLMERXDisableRequest();
+ uart.printf( "\n\r\n\rRange Test Rx Stopped\r\n\r\n");
+ u8AverageRSSI = (uint8_t)(u32RSSISum/u16ReceivedPackets);
+ uart.printf( "Average RSSI ");
+ if(u8AverageRSSI != 0)
+ {
+ uart.printf("-");
+ }
+ uart.printf("%d", (uint32_t)u8AverageRSSI);
+ uart.printf(" dBm");
+ uart.printf( "\r\n\r\n Press [enter] to go back to the Range Rx test menu");
+ rangeRxState = gRangeRxStateIdle_c;
+ }
+ evDataFromUART = FALSE;
+ if(bRxDone)
+ {
+ if(gAppRxPacket->rxStatus == rxSuccessStatus_c)
+ {
+ if(stringComp((uint8_t*)"SMAC Range Demo",&gAppRxPacket->smacPdu.smacPdu[1],15))
+ {
+ bRxDone = FALSE;
+ Thread::wait(4);
+ }
+ else
+ {
+ SetRadioRxOnNoTimeOut();
+ }
+ }
+ else
+ {
+ SetRadioRxOnNoTimeOut();
+ }
+ }
+ if(timePassed)
+ {
+ timePassed = FALSE;
+ bTxDone = FALSE;
+ u8TempRSSIvalue= u8LastRxRssiValue;
+ gAppTxPacket->smacPdu.smacPdu[0] = u8TempRSSIvalue;
+ FLib_MemCpy(&(gAppTxPacket->smacPdu.smacPdu[1]), (void *)"SMAC Range Demo",15);
+ gAppTxPacket->u8DataLength = 16;
+ (void)MCPSDataRequest(gAppTxPacket);
+ rangeRxState = gRangeRxStatePrintTestResults_c;
+ }
+ break;
+ case gRangeRxStatePrintTestResults_c:
+ if(bTxDone)
+ {
+ u8CurrentRSSI= u8LastRxRssiValue;
+ u32RSSISum += u8CurrentRSSI;
+ u16ReceivedPackets++;
+ u8AverageRSSI = (uint8_t)(u32RSSISum/u16ReceivedPackets);
+ uart.printf( "\r\n RSSI = -");
+ uart.printf("%d", (uint32_t)u8CurrentRSSI);
+ uart.printf(" dBm");
+ rangeRxState = gRangeRxStateStartTest_c;
+ SelfNotificationEvent();
+ }
+ break;
+ case gRangeRxStateIdle_c:
+ if((evDataFromUART) && ('\r' == gu8UartData))
+ {
+ rangeRxState = gRangeRxStateInit_c;
+ SelfNotificationEvent();
+ }
+ evDataFromUART = FALSE;
+ break;
+ default:
+ break;
+ }
+ return bBackFlag;
+}
+
+/************************************************************************************
+*
+* Handler for viewing/modifying XCVR registers
+*
+************************************************************************************/
+bool_t EditRegisters(void)
+{
+ bool_t bBackFlag = FALSE;
+ if(evTestParameters)
+ {
+#if CT_Feature_Calibration
+ (void)MLMESetAdditionalRFOffset(gOffsetIncrement);
+#endif
+ (void)MLMESetChannelRequest(testChannel);
+ (void)MLMEPAOutputAdjust(testPower);
+ PrintTestParameters(TRUE);
+ evTestParameters = FALSE;
+ }
+
+ switch(eRState)
+ {
+ case gERStateInit_c:
+ PrintMenu(cu8ShortCutsBar, mAppSer);
+ PrintMenu(cu8RadioRegistersEditMenu, mAppSer);
+ PrintTestParameters(FALSE);
+ shortCutsEnabled = TRUE;
+ eRState = gERWaitSelection_c;
+ break;
+ case gERWaitSelection_c:
+ if(evDataFromUART)
+ {
+#if CT_Feature_Direct_Registers
+ if('1' == gu8UartData)
+ {
+ bIsRegisterDirect = TRUE;
+ oRState = gORStateInit_c;
+ eRState = gERStateOverrideReg_c;
+ SelfNotificationEvent();
+ }
+ else if('2' == gu8UartData)
+ {
+ bIsRegisterDirect = TRUE;
+ rRState = gRRStateInit_c;
+ eRState = gERStateReadReg_c;
+ SelfNotificationEvent();
+ }
+#if CT_Feature_Indirect_Registers
+ else if('3' == gu8UartData)
+ {
+ bIsRegisterDirect = FALSE;
+ oRState = gORStateInit_c;
+ eRState = gERStateOverrideReg_c;
+ SelfNotificationEvent();
+ }
+ else if('4' == gu8UartData)
+ {
+ bIsRegisterDirect = FALSE;
+ rRState = gRRStateInit_c;
+ eRState = gERStateReadReg_c;
+ SelfNotificationEvent();
+ }
+ else if('5' == gu8UartData)
+ {
+ dRState = gDRStateInit_c;
+ eRState = gERStateDumpAllRegs_c;
+ SelfNotificationEvent();
+ }
+#else
+ else if('3' == gu8UartData)
+ {
+ dRState = gDRStateInit_c;
+ eRState = gERStateDumpAllRegs_c;
+ SelfNotificationEvent();
+ }
+#endif
+ else
+#endif
+ if('p' == gu8UartData)
+ {
+ bBackFlag = TRUE;
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ case gERStateOverrideReg_c:
+ if(OverrideRegisters())
+ {
+ eRState = gERStateInit_c;
+ SelfNotificationEvent();
+ }
+ break;
+ case gERStateReadReg_c:
+ if(ReadRegisters())
+ {
+ eRState = gERStateInit_c;
+ SelfNotificationEvent();
+ }
+ break;
+ case gERStateDumpAllRegs_c:
+ if(DumpRegisters()) {
+ eRState = gERStateInit_c;
+ SelfNotificationEvent();
+ }
+ break;
+ default:
+ break;
+ }
+ return bBackFlag;
+}
+
+/************************************************************************************
+*
+* Dump registers
+*
+************************************************************************************/
+bool_t DumpRegisters(void)
+{
+ bool_t bBackFlag = FALSE;
+
+ switch(dRState)
+ {
+ case gDRStateInit_c:
+ uart.printf( "\f\r\rDump Registers\r\n");
+ uart.printf( "\r\n-Press [space] to dump registers\r\n");
+ uart.printf( "\r\n-Press [p] Previous Menu\r\n");
+ shortCutsEnabled = FALSE;
+ dRState = gDRStateDumpRegs_c;
+ SelfNotificationEvent();
+ break;
+ case gDRStateDumpRegs_c:
+ if(evDataFromUART){
+ if(gu8UartData == 'p')
+ {
+ bBackFlag = TRUE;
+ }
+ else if (gu8UartData == ' ')
+ {
+ uart.printf( "\r\n -Dumping registers... \r\n");
+ const registerLimits_t* interval = registerIntervals;
+
+ while(!((*interval).regStart == 0 && (*interval).regEnd == 0))
+ {
+ uart.printf( "\r\n -Access type: ");
+ if( (*interval).bIsRegisterDirect )
+ uart.printf("direct\r\n");
+ else
+ uart.printf("indirect\r\n");
+ bIsRegisterDirect = (*interval).bIsRegisterDirect;
+ ReadRFRegs((*interval).regStart, (*interval).regEnd);
+ interval++;
+ }
+ dRState = gDRStateInit_c;
+ SelfNotificationEvent();
+ }
+ }
+ evDataFromUART = FALSE;
+ break;
+ default:
+ break;
+ }
+ return bBackFlag;
+}
+
+/************************************************************************************
+*
+* Read and print register values with addresses from u8RegStartAddress
+* to u8RegStopAddress
+*
+************************************************************************************/
+void ReadRFRegs(registerAddressSize_t rasRegStartAddress, registerAddressSize_t rasRegStopAddress)
+{
+
+ static uint16_t rasRegAddress;
+ registerSize_t rsRegValue;
+ uart.printf( " --------------------------------------- ");
+ for(rasRegAddress = rasRegStartAddress; rasRegAddress <= rasRegStopAddress; rasRegAddress+=(gRegisterSize_c))
+ {
+ uart.printf( "\r\n| Address : 0x");
+ uart.printf("%x", (uint8_t*)&rasRegAddress);
+ aspTestRequestMsg.msgType = aspMsgTypeXcvrReadReq_c;
+ aspTestRequestMsg.msgData.aspXcvrData.addr = (uint16_t)rasRegAddress;
+ aspTestRequestMsg.msgData.aspXcvrData.len = gRegisterSize_c;
+ aspTestRequestMsg.msgData.aspXcvrData.mode = !bIsRegisterDirect;
+
+ APP_ASP_SapHandler(&aspTestRequestMsg, 0);
+ rsRegValue = *((registerSize_t*)aspTestRequestMsg.msgData.aspXcvrData.data);
+ uart.printf( " Data value : 0x");
+ uart.printf("%x", (uint8_t*)&rsRegValue);
+ uart.printf( " |");
+ }
+ uart.printf( "\r\n --------------------------------------- \r\n");
+}
+
+/************************************************************************************
+*
+* Read register
+*
+************************************************************************************/
+bool_t ReadRegisters(void)
+{
+ bool_t bBackFlag = FALSE;
+ static uint8_t au8RxString[5];
+ static uint8_t u8Index;
+ static registerAddressSize_t rasRegAddress;
+ static registerSize_t rsRegValue;
+ static char auxToPrint[2];
+
+ switch(rRState)
+ {
+ case gRRStateInit_c:
+ uart.printf( "\f\r\rRead Registers\r\n");
+ uart.printf( "\r\n-Press [p] Previous Menu\r\n");
+ shortCutsEnabled = FALSE;
+ rRState = gRRStateStart_c;
+ SelfNotificationEvent();
+ break;
+ case gRRStateStart_c:
+ uart.printf( "\r\n -write the Register address in Hex and [enter]: 0x");
+ u8Index = 0;
+ rRState = gRRWaitForTheAddress_c;
+ break;
+ case gRRWaitForTheAddress_c:
+ if(evDataFromUART)
+ {
+ if((!isAsciiHex(gu8UartData)) && ('\r' != gu8UartData))
+ {
+ if('p' == gu8UartData)
+ {
+ bBackFlag = TRUE;
+ }
+ else
+ {
+ uart.printf( "\r\n -Invalid Character!! ");
+ rRState = gRRStateStart_c;
+ SelfNotificationEvent();
+ }
+ }
+ else if((gRegisterAddressASCII_c == u8Index) && ('\r' != gu8UartData))
+ {
+ uart.printf( "\r\n -Value out of Range!! ");
+ rRState = gRRStateStart_c;
+ SelfNotificationEvent();
+ }
+ else if(isAsciiHex(gu8UartData))
+ {
+ au8RxString[u8Index++] = gu8UartData;
+ auxToPrint[0] = gu8UartData;
+ auxToPrint[1] = '\0';
+ uart.printf( auxToPrint);
+ }
+ else
+ {
+ au8RxString[u8Index] = 0;
+ rasRegAddress = (registerAddressSize_t)HexString2Dec(au8RxString);
+ aspTestRequestMsg.msgType = aspMsgTypeXcvrReadReq_c;
+ aspTestRequestMsg.msgData.aspXcvrData.addr = (uint16_t)rasRegAddress;
+ aspTestRequestMsg.msgData.aspXcvrData.len = gRegisterSize_c;
+ aspTestRequestMsg.msgData.aspXcvrData.mode = !bIsRegisterDirect;
+ APP_ASP_SapHandler(&aspTestRequestMsg, 0);
+ rsRegValue = *((registerSize_t*)aspTestRequestMsg.msgData.aspXcvrData.data);
+
+ uart.printf( "\r\n -Register value : 0x");
+ uart.printf("%x", (uint8_t*)&rsRegValue);
+ uart.printf( "\r\n");
+
+ rRState = gRRStateStart_c;
+ SelfNotificationEvent();
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ default:
+ break;
+ }
+ return bBackFlag;
+}
+
+/************************************************************************************
+*
+* Override Register
+*
+************************************************************************************/
+bool_t OverrideRegisters(void)
+{
+ bool_t bBackFlag = FALSE;
+ static uint8_t au8RxString[5];
+ static uint8_t u8Index;
+ static registerAddressSize_t rasRegAddress;
+ static registerSize_t rsRegValue;
+ static char auxToPrint[2];
+
+ switch(oRState)
+ {
+ case gORStateInit_c:
+ uart.printf("\f\r\nWrite Registers\r\n");
+ uart.printf("\r\n-Press [p] Previous Menu\r\n");
+ shortCutsEnabled = FALSE;
+ oRState = gORStateStart_c;
+ SelfNotificationEvent();
+ break;
+ case gORStateStart_c:
+ uart.printf("\r\n -write the Register address in Hex and [enter]: 0x");
+ u8Index = 0;
+ oRState = gORWaitForTheAddress_c;
+ break;
+ case gORWaitForTheAddress_c:
+ if(evDataFromUART){
+ if((!isAsciiHex(gu8UartData)) && ('\r' != gu8UartData))
+ {
+ if('p' == gu8UartData)
+ {
+ bBackFlag = TRUE;
+ }
+ else
+ {
+ uart.printf("\r\n -Invalid Character!! ");
+ oRState = gORStateStart_c;
+ SelfNotificationEvent();
+ }
+ }
+ else if((gRegisterAddressASCII_c == u8Index) && ('\r' != gu8UartData))
+ {
+ uart.printf("\r\n -Value out of Range!! ");
+ oRState = gORStateStart_c;
+ SelfNotificationEvent();
+ }
+ else if(isAsciiHex(gu8UartData))
+ {
+ au8RxString[u8Index++] = gu8UartData;
+ auxToPrint[0] = gu8UartData;
+ auxToPrint[1] = '\0';
+ uart.printf(auxToPrint);
+ }
+ else
+ {
+ au8RxString[u8Index] = 0;
+ rasRegAddress = (registerAddressSize_t)HexString2Dec(au8RxString);
+ uart.printf("\r\n -write the Register value to override in Hex and [enter]: 0x");
+ u8Index = 0;
+ oRState = gORWaitForTheValue_c;
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ case gORWaitForTheValue_c:
+ if(evDataFromUART)
+ {
+ if((!isAsciiHex(gu8UartData)) && ('\r' != gu8UartData))
+ {
+ if('p' == gu8UartData)
+ {
+ bBackFlag = TRUE;
+ }
+ else
+ {
+ uart.printf("\r\n -Invalid Character!! ");
+ oRState = gORStateStart_c;
+ SelfNotificationEvent();
+ }
+ }
+ else if((2 == u8Index) && ('\r' != gu8UartData))
+ {
+ uart.printf("\r\n -Value out of Range!! ");
+ oRState = gORStateStart_c;
+ SelfNotificationEvent();
+ }
+ else if(isAsciiHex(gu8UartData))
+ {
+ au8RxString[u8Index++] = gu8UartData;
+ auxToPrint[0] = gu8UartData;
+ auxToPrint[1] = '\0';
+ uart.printf(auxToPrint);
+ }
+ else
+ {
+ au8RxString[u8Index] = 0;
+ rsRegValue = (registerSize_t)HexString2Dec(au8RxString);
+ aspTestRequestMsg.msgType = aspMsgTypeXcvrWriteReq_c;
+ aspTestRequestMsg.msgData.aspXcvrData.addr = (uint16_t)rasRegAddress;
+ aspTestRequestMsg.msgData.aspXcvrData.len = gRegisterAddress_c;
+ aspTestRequestMsg.msgData.aspXcvrData.mode = !bIsRegisterDirect;
+ FLib_MemCpy(aspTestRequestMsg.msgData.aspXcvrData.data, &rsRegValue, gRegisterSize_c);
+ APP_ASP_SapHandler(&aspTestRequestMsg, 0);
+
+ uart.printf("\r\n Register overridden \r\n");
+ u8Index = 0;
+ oRState = gORStateStart_c;
+ SelfNotificationEvent();
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ default:
+ break;
+ }
+ return bBackFlag;
+}
+
+/************************************************************************************
+*
+* Handler for Carrier Sense Test and Transmission Control Test
+*
+************************************************************************************/
+bool_t CSenseAndTCtrl(void)
+{
+ bool_t bBackFlag = FALSE;
+ static uint8_t testSelector = 0;
+
+ if(evTestParameters){
+ (void)MLMESetChannelRequest(testChannel);
+#if CT_Feature_Calibration
+ (void)MLMESetAdditionalRFOffset(gOffsetIncrement);
+#endif
+ (void)MLMEPAOutputAdjust(testPower);
+ PrintTestParameters(TRUE);
+ evTestParameters = FALSE;
+ }
+
+ switch(cstcState)
+ {
+ case gCsTcStateInit_c:
+ TestMode(gTestModeForceIdle_c);
+ PrintMenu(cu8ShortCutsBar, mAppSer);
+ PrintMenu(cu8RadioCSTCSelectMenu, mAppSer);
+ PrintTestParameters(FALSE);
+ shortCutsEnabled = TRUE;
+ bTxDone = FALSE;
+ bScanDone = FALSE;
+ timePassed = FALSE;
+
+ cstcState = gCsTcStateSelectTest_c;
+ break;
+ case gCsTcStateSelectTest_c:
+ if(evDataFromUART)
+ {
+ if('1' == gu8UartData)
+ {
+ cstcState = gCsTcStateCarrierSenseStart_c;
+ testSelector = 1;
+ SelfNotificationEvent();
+ }
+ else if ('2' == gu8UartData)
+ {
+ cstcState = gCsTcStateTransmissionControlStart_c;
+ testSelector = 2;
+ SelfNotificationEvent();
+ }
+ else if( 'p' == gu8UartData)
+ {
+ cstcState = gCsTcStateInit_c;
+ testSelector = 0;
+ bBackFlag = TRUE;
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ default:
+ if(testSelector == 1)
+ CarrierSenseHandler();
+ else if(testSelector == 2)
+ TransmissionControlHandler();
+ break;
+ }
+ return bBackFlag;
+}
+
+/************************************************************************************
+*
+* Handler for Transmission Control Test called by above function
+*
+************************************************************************************/
+void TransmissionControlHandler(void)
+{
+ const uint16_t u16TotalPacketsOptions[] = {1,25,100,500,1000,2000,5000,10000,65535};
+ static uint16_t u16TotalPackets;
+ static uint16_t u16PacketCounter = 0;
+ static uint16_t miliSecDelay = 0;
+ static phyTime_t startTime;
+ int8_t fillIndex = 0;
+ uint8_t* smacPduPtr;
+ uint32_t totalTimeMs;
+
+ switch(cstcState)
+ {
+ case gCsTcStateTransmissionControlStart_c:
+ PrintMenu(cu8ShortCutsBar, mAppSer);
+ PrintMenu(cu8CsTcTestMenu, mAppSer);
+ PrintTestParameters(FALSE);
+ miliSecDelay = 0;
+ u16TotalPackets = 0;
+ u16PacketCounter = 0;
+ fillIndex = testPayloadLen / gPrbs9BufferLength_c;
+
+ while(fillIndex > 0)
+ {
+ fillIndex--;
+ smacPduPtr = gAppTxPacket->smacPdu.smacPdu + fillIndex * gPrbs9BufferLength_c;
+ FLib_MemCpy(smacPduPtr, u8Prbs9Buffer, gPrbs9BufferLength_c);
+ }
+ smacPduPtr = gAppTxPacket->smacPdu.smacPdu + ((testPayloadLen / gPrbs9BufferLength_c)*gPrbs9BufferLength_c);
+ FLib_MemCpy(smacPduPtr, u8Prbs9Buffer, (testPayloadLen % gPrbs9BufferLength_c));
+
+ gAppTxPacket->u8DataLength = testPayloadLen;
+
+ cstcState = gCsTcStateTransmissionControlSelectNumOfPackets_c;
+ break;
+ case gCsTcStateTransmissionControlSelectNumOfPackets_c:
+ if(evDataFromUART)
+ {
+ if((gu8UartData >= '0') && (gu8UartData <= '8'))
+ {
+ u16TotalPackets = u16TotalPacketsOptions[gu8UartData - '0'];
+ cstcState = gCsTcStateTransmissionControlSelectInterpacketDelay_c;
+ uart.printf("\r\n\r\n Please type InterPacket delay in miliseconds and press [ENTER]");
+ uart.printf("\r\n(During test, exit by pressing [SPACE])\r\n\r\n");
+ SelfNotificationEvent();
+ }
+ else if('p' == gu8UartData)
+ {
+ cstcState = gCsTcStateInit_c;
+ SelfNotificationEvent();
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ case gCsTcStateTransmissionControlSelectInterpacketDelay_c:
+ if(evDataFromUART)
+ {
+ if(gu8UartData == '\r' && miliSecDelay != 0)
+ {
+ cstcState = gCsTcStateTransmissionControlPerformingTest_c;
+ startTime = GetTimestampUS();
+ (void)MLMEScanRequest(testChannel);
+ }
+ else if((gu8UartData >= '0') && (gu8UartData <='9'))
+ {
+ miliSecDelay = miliSecDelay*10 + (gu8UartData - '0');
+ uart.printf("%d",(uint32_t)(gu8UartData - '0'));
+ }
+ else if('p' == gu8UartData)
+ {
+ cstcState = gCsTcStateInit_c;
+ SelfNotificationEvent();
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ case gCsTcStateTransmissionControlPerformingTest_c:
+ if(bScanDone)
+ {
+ bScanDone = FALSE;
+ (void)MCPSDataRequest(gAppTxPacket);
+ }
+ if(bTxDone)
+ {
+ bTxDone = FALSE;
+ u16PacketCounter++;
+ uart.printf("\r\n\tPacket number: ");
+ uart.printf("%d", (uint32_t)(u16PacketCounter));
+ uart.printf("; RSSI value: -");
+ uart.printf("%d",(uint32_t)au8ScanResults[testChannel]);
+ uart.printf(" dBm\r\n");
+ if(u16PacketCounter < u16TotalPackets)
+ {
+ totalTimeMs = (uint32_t)(GetTimestampUS() - startTime);
+ totalTimeMs -= GetTransmissionTime(testPayloadLen, crtBitrate);
+ totalTimeMs = (totalTimeMs % 1000 < 500) ? totalTimeMs/1000 : (totalTimeMs/1000)+1;
+ if(totalTimeMs > miliSecDelay)
+ {
+ uart.printf( " Overhead + Transmission + ED = ~");
+ uart.printf("%d", totalTimeMs);
+ uart.printf("ms\r\n Interpacket delay too small (Press [ENTER] to continue)\r\n");
+ cstcState = gCsTcStateTransmissionControlEndTest_c;
+ SelfNotificationEvent();
+ break;
+ }
+ Thread::wait(miliSecDelay - totalTimeMs);
+ }
+ else
+ {
+ uart.printf("\r\n\r\nFinished transmitting ");
+ uart.printf("%d", (uint32_t)u16TotalPackets);
+ uart.printf(" packets!\r\n\r\n");
+ uart.printf("\r\n -Press [ENTER] to end Transmission Control Test");
+ cstcState = gCsTcStateTransmissionControlEndTest_c;
+ }
+ }
+ if(timePassed)
+ {
+ timePassed = FALSE;
+ startTime = GetTimestampUS();
+ (void)MLMEScanRequest(testChannel);
+ }
+ if(evDataFromUART && gu8UartData == ' ')
+ {
+ uart.printf("\r\n\r\n-Test interrupted by user. Press [ENTER] to continue\r\n\r\n");
+ cstcState = gCsTcStateTransmissionControlEndTest_c;
+ }
+ break;
+ case gCsTcStateTransmissionControlEndTest_c:
+ if(evDataFromUART && gu8UartData == '\r')
+ {
+ cstcState = gCsTcStateInit_c;
+ SelfNotificationEvent();
+ }
+ evDataFromUART = FALSE;
+ break;
+ }
+}
+/************************************************************************************
+*
+* Handler for Carrier Sense Test
+*
+************************************************************************************/
+void CarrierSenseHandler(void)
+{
+ int8_t fillIndex = 0;
+ uint8_t* smacPduPtr;
+ switch(cstcState)
+ {
+ case gCsTcStateCarrierSenseStart_c:
+#if CT_Feature_Calibration
+ if( gMode1Bitrate_c == crtBitrate )
+ {
+ (void)MLMESetAdditionalRFOffset(gOffsetIncrement + 30);
+ }
+ else
+ {
+ (void)MLMESetAdditionalRFOffset(gOffsetIncrement + 60);
+ }
+#endif
+ (void)MLMESetChannelRequest(testChannel);
+
+ uart.printf( "\r\n\r\n Press [SPACE] to begin/interrupt test");
+ uart.printf( "\r\n Press [p] to return to previous menu");
+// PrintTestParameters(FALSE);
+ shortCutsEnabled = FALSE;
+ uart.printf("\r\n");
+
+ fillIndex = testPayloadLen / gPrbs9BufferLength_c;
+ while(fillIndex > 0)
+ {
+ fillIndex--;
+ smacPduPtr = gAppTxPacket->smacPdu.smacPdu + fillIndex * gPrbs9BufferLength_c;
+ FLib_MemCpy(smacPduPtr, u8Prbs9Buffer, gPrbs9BufferLength_c);
+ }
+ smacPduPtr = gAppTxPacket->smacPdu.smacPdu + ((testPayloadLen / gPrbs9BufferLength_c)*gPrbs9BufferLength_c);
+ FLib_MemCpy(smacPduPtr, u8Prbs9Buffer, (testPayloadLen % gPrbs9BufferLength_c));
+
+ gAppTxPacket->u8DataLength = testPayloadLen;
+
+ cstcState = gCsTcStateCarrierSenseSelectType_c;
+ break;
+ case gCsTcStateCarrierSenseSelectType_c:
+ if(evDataFromUART)
+ {
+ if(' ' == gu8UartData)
+ {
+ cstcState = gCsTcStateCarrierSensePerformingTest_c;
+ (void)MLMEScanRequest(testChannel);
+ }
+ else if ('p' == gu8UartData)
+ {
+#if CT_Feature_Calibration
+ (void)MLMESetAdditionalRFOffset(gOffsetIncrement);
+#endif
+ (void)MLMESetChannelRequest(testChannel);
+ cstcState = gCsTcStateInit_c;
+ SelfNotificationEvent();
+ }
+ evDataFromUART = FALSE;
+ }
+ break;
+ case gCsTcStateCarrierSensePerformingTest_c:
+ if(bScanDone)
+ {
+ bScanDone = FALSE;
+ uart.printf( "\r\n\tSampling done. RSSI value: -");
+ uart.printf("%d", (uint32_t) au8ScanResults[testChannel]);
+ uart.printf( "dBm");
+ if(au8ScanResults[testChannel] > ccaThresh)
+ {
+ (void)MCPSDataRequest(gAppTxPacket);
+ }
+ else
+ {
+ (void)MLMEScanRequest(testChannel);
+ }
+ }
+ if(bTxDone)
+ {
+ bTxDone = FALSE;
+
+ uart.printf("\r\n Transmission Performed\r\n");
+ uart.printf("\r\n -Press [ENTER] to end Carrier Sense Test");
+ cstcState = gCsTcStateCarrierSenseEndTest_c;
+ }
+ if(evDataFromUART && gu8UartData == ' ')
+ {
+ uart.printf("\r\n\r\n-Test interrupted by user. Press [ENTER] to continue\r\n\r\n");
+ cstcState = gCsTcStateCarrierSenseEndTest_c;
+ }
+ break;
+ case gCsTcStateCarrierSenseEndTest_c:
+ if(evDataFromUART && gu8UartData == '\r')
+ {
+#if CT_Feature_Calibration
+ (void)MLMESetAdditionalRFOffset(gOffsetIncrement);
+#endif
+ (void)MLMESetChannelRequest(testChannel);
+ cstcState = gCsTcStateInit_c;
+ SelfNotificationEvent();
+ }
+ evDataFromUART = FALSE;
+ break;
+ }
+}
+
+/************************************************************************************
+*
+* Auxiliary Functions
+*
+************************************************************************************/
+
+/**************************************************************************************/
+void SetRadioRxOnNoTimeOut(void)
+{
+ bRxDone = FALSE;
+ gAppRxPacket->u8MaxDataLength = gMaxSmacSDULength_c;
+ (void)MLMERXEnableRequest(gAppRxPacket, 0);
+}
+
+/**************************************************************************************/
+void PrintPerRxFinalLine(uint16_t u16Received, uint16_t u16Total)
+{
+ uart.printf("Received ");
+ uart.printf("%d",(uint32_t)u16Received);
+ uart.printf(" of ");
+ uart.printf("%d",(uint32_t)u16Total);
+ uart.printf(" packets transmitted \r\n");
+ uart.printf("\r\n Press [enter] to go back to the Per Rx test menu");
+}
+
+/************************************************************************************
+*
+*
+* By employing this function, users can execute a test of the radio. Test mode
+* implements the following:
+* -PRBS9 Mode,
+* -Force_idle,
+* -Continuos TX without modulation,
+* -Continuos TX with modulation.(0's,1's and PN patterns)
+*
+************************************************************************************/
+smacErrors_t TestMode
+(
+smacTestMode_t mode /*IN: The test mode to start.*/
+)
+{
+ aspTestRequestMsg.msgType = aspMsgTypeTelecTest_c;
+
+#if(TRUE == smacParametersValidation_d)
+ if(gMaxTestMode_c <= mode)
+ {
+ return gErrorOutOfRange_c;
+ }
+#endif
+
+ if(gTestModeForceIdle_c == mode)
+ {
+ aspTestRequestMsg.msgData.aspTelecTest.mode = gTestForceIdle_c;
+ }
+ else if(gTestModeContinuousTxModulated_c == mode)
+ {
+ if(contTxModBitValue==gContTxModSelectOnes_c)
+ {
+ aspTestRequestMsg.msgData.aspTelecTest.mode = gTestContinuousTxModOne_c;
+ }
+ else if(contTxModBitValue == gContTxModSelectZeros_c)
+ {
+ aspTestRequestMsg.msgData.aspTelecTest.mode = gTestContinuousTxModZero_c;
+ }
+ else if(contTxModBitValue == gContTxModSelectPN9_c)
+ {
+#ifdef gPHY_802_15_4g_d
+ aspTestRequestMsg.msgData.aspTelecTest.mode = gTestContinuousTxContPN9_c;
+#else
+ aspTestRequestMsg.msgData.aspTelecTest.mode = gTestPulseTxPrbs9_c;
+#endif
+ }
+ }
+ else if(gTestModeContinuousTxUnmodulated_c == mode)
+ {
+ aspTestRequestMsg.msgData.aspTelecTest.mode = gTestContinuousTxNoMod_c;
+ }
+ else if(gTestModeContinuousRxBER_c == mode)
+ {
+ aspTestRequestMsg.msgData.aspTelecTest.mode = gTestContinuousRx_c;
+ }
+ else if(gTestModePRBS9_c == mode)
+ {
+ /*Set Data Mode*/
+ gAppTxPacket->u8DataLength = gPrbs9BufferLength_c;
+ FLib_MemCpy(gAppTxPacket->smacPdu.smacPdu, u8Prbs9Buffer, gPrbs9BufferLength_c);
+ PacketHandler_Prbs9();
+ }
+ if(gTestModePRBS9_c != mode)
+ (void)APP_ASP_SapHandler(&aspTestRequestMsg, 0);
+
+ return gErrorNoError_c;
+}
+
+/************************************************************************************
+* PacketHandler_Prbs9
+*
+* This function sends OTA the content of a PRBS9 polynomial of 65 bytes of payload.
+*
+*
+************************************************************************************/
+
+void PacketHandler_Prbs9(void)
+{
+ smacErrors_t err;
+ /*@CMA, Need to set Smac to Idle in order to get PRBS9 to work after a second try on the Conn Test menu*/
+ (void)MLMERXDisableRequest();
+ (void)MLMETXDisableRequest();
+ err = MCPSDataRequest(gAppTxPacket);
+ if(err != gErrorNoError_c)
+ {
+ failedPRBS9 = TRUE;
+ SelfNotificationEvent(); //in case data isn't sent, no confirm event will fire.
+ //this way we need to make sure the application will not freeze.
+ }
+}
+
+/*****************************************************************************
+* UartRxCallBack function
+*
+* Interface assumptions:
+* This callback is triggered when a new byte is received over the UART
+*
+* Return Value:
+* None
+*****************************************************************************/
+void UartRxCallBack(void * param)
+{
+ uint16_t readBytes;
+ gu8UartData = uart.getc();
+ gTaskEventFlags |= gUART_RX_EVENT_c;
+}
+
+/*@CMA, Conn Test. Range Test CallBack*/
+void RangeTest_Timer_CallBack ()
+{
+ gTaskEventFlags |= gRangeTest_EVENT_c;
+}
+
+
+
+/************************************************************************************
+*
+* Increments channel on the ED Confirm event and fires a new ED measurement request
+*
+************************************************************************************/
+void IncrementChannelOnEdEvent()
+{
+ bScanDone = FALSE;
+ smacErrors_t err;
+ if (ChannelToScan <= gMaxChannel_c)
+ {
+ err = MLMEScanRequest((channels_t)ChannelToScan);
+ if(err == gErrorNoError_c)
+ ChannelToScan++; //Increment channel to scan
+ }
+ else
+ {
+ bScanDone = TRUE; //PRINT ALL CHANNEL RESULTS
+ Thread::wait(300); //Add delay between channel scanning series.
+ }
+}
+
+/***********************************************************************
+*********************Utilities Software********************************
+************************************************************************/
+
+bool_t stringComp(uint8_t * au8leftString, uint8_t * au8RightString, uint8_t bytesToCompare)
+{
+ do
+ {
+ }while((*au8leftString++ == *au8RightString++) && --bytesToCompare);
+ return(0 == bytesToCompare);
+}
+
+uint32_t HexString2Dec(uint8_t* au8String)
+{
+ uint8_t u8LocIndex=0;
+ uint8_t u8LocIndex2=0;
+ uint32_t u32DecValue = 0;
+
+ while(au8String[u8LocIndex]){
+ u8LocIndex++;
+ }
+
+ while(u8LocIndex--){
+ if((au8String[u8LocIndex] >= '0') && (au8String[u8LocIndex] <= '9'))
+ u32DecValue |= ((uint32_t)(au8String[u8LocIndex] - '0'))<<(u8LocIndex2*4);
+ else if((au8String[u8LocIndex] >= 'A') && (au8String[u8LocIndex] <= 'F')){
+ u32DecValue |= ((uint32_t)(au8String[u8LocIndex] - 'A' + 0x0A))<<(u8LocIndex2*4);
+ }else{
+ u32DecValue |= ((uint32_t)(au8String[u8LocIndex] - 'a' + 0x0A))<<(u8LocIndex2*4);
+ }
+ u8LocIndex2++;
+ }
+
+ return u32DecValue;
+}
+
+static void DelayTimeElapsed()
+{
+ timePassed = TRUE;
+ gTaskEventFlags |= gTimePassed_EVENT_c;
+}
+
+/***********************************************************************************
+*
+* PrintMenu
+*
+************************************************************************************/
+void PrintMenu(char * const pu8Menu[], uint8_t port)
+{
+ uint8_t u8Index = 0;
+ (void)port;
+ while(pu8Menu[u8Index]){
+ uart.printf(pu8Menu[u8Index]);
+ u8Index++;
+ }
+}
+
+/***********************************************************************
+************************************************************************/
+
+/************************************************************************************
+*
+* PrintTestParameters
+*
+************************************************************************************/
+void PrintTestParameters(bool_t bEraseLine)
+{
+ uint8_t u8lineLen = 63;
+ uint8_t u8Index;
+
+ if(bEraseLine)
+ {
+ for(u8Index = 0;u8Index<u8lineLen;u8Index++)
+ {
+ uart.printf("\b");
+ }
+ }
+
+ uart.printf("Mode ");
+ if(mTxOperation_c == testOpMode)
+ {
+ uart.printf("Tx");
+ }
+ else
+ {
+ uart.printf("Rx");
+ }
+ uart.printf(", Channel ");
+ uart.printf("%d", (uint32_t)testChannel);
+ uart.printf(", Power ");
+ uart.printf("%d",(uint32_t)testPower);
+ uart.printf(", Payload ");
+ uart.printf("%d", (uint32_t)testPayloadLen);
+ uart.printf(", CCA Thresh ");
+ if(ccaThresh != 0)
+ {
+ uart.printf("-");
+ }
+ uart.printf("%d", (uint32_t)ccaThresh);
+ uart.printf("dBm");
+ uart.printf(" >");
+}
+/*****************************************************************************/
+
+int main()
+{
+ mainTask = new Thread(main_task);
+ while(1)
+ {
+
+ }
+ return 0;
+}
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/Source/Connectivity_Test_Platform.c Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,205 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file App_Custom.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+#include "Connectivity_Test_Platform.h"
+
+/************************************************************************************
+*************************************************************************************
+* Macros
+*************************************************************************************
+************************************************************************************/
+#define gCTSelf_EVENT_c (1<<7)
+#define SelfNotificationEvent() (OSA_EventSet(&gTaskEvent, gCTSelf_EVENT_c));
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+const registerLimits_t registerIntervals[] =
+{
+ {.regStart=0x00 , .regEnd=0x26, TRUE},
+ {.regStart=0x28 , .regEnd=0x3F, TRUE},
+ {.regStart=0x00 , .regEnd=0x28, FALSE},
+ {.regStart=0x2A , .regEnd=0x2E, FALSE},
+ {.regStart=0x30 , .regEnd=0x32, FALSE},
+ {.regStart=0x34 , .regEnd=0x45, FALSE},
+ {.regStart=0x47 , .regEnd=0x56, FALSE},
+ {.regStart=0x58 , .regEnd=0x5B, FALSE},
+ {.regStart=0x5D , .regEnd=0x6B, FALSE},
+ {.regStart=0x6E , .regEnd=0x71, FALSE},
+ {.regStart=0x74 , .regEnd=0x75, FALSE},
+ {.regStart=0x78 , .regEnd=0x83, FALSE},
+ {.regStart=0x86 , .regEnd=0x86, FALSE},
+ {.regStart=0x89 , .regEnd=0x8A, FALSE},
+ {.regStart=0x8D , .regEnd=0x8E, FALSE},
+ {.regStart=0x91 , .regEnd=0x97, FALSE},
+ {.regStart=0x9A , .regEnd=0xA1, FALSE},
+ {.regStart=0xA3 , .regEnd=0xA8, FALSE},
+ {.regStart=0xAA , .regEnd=0xAF, FALSE},
+ {.regStart=0xB2 , .regEnd=0xB6, FALSE},
+ {.regStart=0xFE , .regEnd=0xFF, FALSE},
+ {.regStart=0x00 , .regEnd=0x00, FALSE}
+};
+
+uint8_t u8Prbs9Buffer[] =
+{
+ 0x42,
+ 0xff,0xc1,0xfb,0xe8,0x4c,0x90,0x72,0x8b,0xe7,0xb3,0x51,0x89,0x63,0xab,0x23,0x23,
+ 0x02,0x84,0x18,0x72,0xaa,0x61,0x2f,0x3b,0x51,0xa8,0xe5,0x37,0x49,0xfb,0xc9,0xca,
+ 0x0c,0x18,0x53,0x2c,0xfd,0x45,0xe3,0x9a,0xe6,0xf1,0x5d,0xb0,0xb6,0x1b,0xb4,0xbe,
+ 0x2a,0x50,0xea,0xe9,0x0e,0x9c,0x4b,0x5e,0x57,0x24,0xcc,0xa1,0xb7,0x59,0xb8,0x87
+};
+/************************************************************************************
+*************************************************************************************
+* Private function prototypes
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*
+* InitApp_custom
+*
+************************************************************************************/
+void InitApp_custom()
+{
+}
+
+/************************************************************************************
+*
+* InitProject_custom
+*
+************************************************************************************/
+void InitProject_custom()
+{
+}
+
+/************************************************************************************
+*
+* ShortCutsParser
+*
+* Performs changes in different menus whenever shortcuts are allowed
+*
+************************************************************************************/
+void ShortCutsParser(uint8_t u8UartData)
+{
+ evTestParameters = TRUE;
+ evDataFromUART = FALSE;
+ switch(u8UartData){
+ case 't':
+ testOpMode = mTxOperation_c;
+ break;
+ case 'r':
+ testOpMode = mRxOperation_c;
+ break;
+ case 'q':
+ if(testChannel == (channels_t)gTotalChannels)
+ {
+ testChannel = gChannel11_c;
+ }
+ else
+ {
+ testChannel++;
+ }
+ break;
+ case 'w':
+ if(testChannel == gChannel11_c)
+ {
+ testChannel = (channels_t)gTotalChannels;
+ }
+ else
+ {
+ testChannel--;
+ }
+ break;
+ case 'a':
+ testPower++;
+ if(gMaxOutputPower_c < testPower)
+ {
+ testPower = gMinOutputPower_c;
+ }
+ break;
+ case 's':
+ if(testPower == gMinOutputPower_c)
+ {
+ testPower = gMaxOutputPower_c;
+ }
+ else
+ {
+ testPower--;
+ }
+ break;
+ case 'n':
+ testPayloadLen++;
+ if(gMaxSmacSDULength_c < testPayloadLen)
+ {
+ testPayloadLen = 17;
+ }
+ break;
+ case 'm':
+ testPayloadLen--;
+ if(17 > testPayloadLen)
+ {
+ testPayloadLen = gMaxSmacSDULength_c;
+ }
+ break;
+ case 'k':
+ ccaThresh++;
+ if(ccaThresh > gMaxCCAThreshold_c)
+ {
+ ccaThresh = gMinCCAThreshold_c;
+ }
+ break;
+ case 'l':
+ ccaThresh--;
+ if(ccaThresh > gMaxCCAThreshold_c)
+ {
+ ccaThresh = gMaxCCAThreshold_c;
+ }
+ break;
+ default:
+ evDataFromUART = TRUE;
+ evTestParameters = FALSE;
+ break;
+ }
+}
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/Source/Connectivity_Test_Platform.h Thu Jul 16 07:29:15 2015 +0000
@@ -0,0 +1,184 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file App_Custom.h
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+#include "MemManager.h"
+#include "SMAC_Interface.h" /*@CMA Conn Test*/
+#include "AspInterface.h"
+#include "ConnectivityMenus.h"
+
+#if 0
+#include "SerialManager.h"
+#include "LED.h" /*Include all LED functionality*/
+#include "TimersManager.h"
+#include "FunctionLib.h"
+#include "fsl_os_abstraction.h"
+#include "fsl_osa_ext.h"
+#include "board.h"
+#endif
+/************************************************************************************
+*************************************************************************************
+* Currently supported feature-sets.
+* DO NOT CHANGE as they MIGHT be platform dependent
+*************************************************************************************
+************************************************************************************/
+/*This feature is only for sub-ghz phy's*/
+#ifndef CT_Feature_Bitrate_Select
+#define CT_Feature_Bitrate_Select (0)
+#endif
+
+/*This feature is only for platforms that have BER Test Connectors
+*(currently only KW01)*/
+#ifndef CT_Feature_BER_Test
+#define CT_Feature_BER_Test (0)
+#endif
+
+#ifndef CT_Feature_Direct_Registers
+#define CT_Feature_Direct_Registers (1)
+#endif
+
+#ifndef CT_Feature_Indirect_Registers
+#define CT_Feature_Indirect_Registers (1)
+#endif
+
+/*This feature is currently supported only on KW01 platforms*/
+#ifndef CT_Feature_Calibration
+#define CT_Feature_Calibration (0)
+#endif
+
+/*This feature is only for sub-ghz platforms*/
+#ifndef CT_Feature_Custom_CCA_Dur
+#define CT_Feature_Custom_CCA_Dur (0)
+#endif
+
+/*This feature is currently supported on KW01. Disabled by default*/
+#ifndef CT_Feature_Afc
+#define CT_Feature_Afc (0)
+#endif
+
+
+#if CT_Feature_Calibration
+#include "Flash_Adapter.h"
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Macros
+*************************************************************************************
+************************************************************************************/
+#define gMaxOutputPower_c ( 0x1F )
+#define gMinOutputPower_c ( 0x03 )
+#define gDefaultOutputPower_c ( 0x1F )
+
+#if CT_Feature_Calibration
+#define gMinAdditionalRFOffset_c ( -1000)
+#define gMaxAdditionalRFOffset_c ( 1000 )
+#endif
+
+#define gDefaultChannelNumber_c gChannel15_c
+#define gMaxCCAThreshold_c 0x6EU
+#define gMinCCAThreshold_c 0x00U
+#define gDefaultCCAThreshold_c 0x50U
+
+/*register size in bytes and ASCII characters macros*/
+
+#define gRegisterSize_c (1)
+#define gRegisterSizeASCII_c (2*gRegisterSize_c)
+
+/*register address size in ASCII*/
+#define gRegisterAddress_c (1)
+#define gRegisterAddressASCII_c (2*gRegisterAddress_c)
+
+/************************************************************************************
+*************************************************************************************
+* Memory Type Definitions
+*************************************************************************************
+************************************************************************************/
+
+/* these type definitions must be changed depending on register size and address range*/
+typedef uint8_t registerSize_t;
+typedef uint8_t registerAddressSize_t;
+
+/*this structure defines the upper and lower bound for dump registers feature*/
+typedef struct registerLimits_tag
+{
+ registerAddressSize_t regStart;
+ registerAddressSize_t regEnd;
+ bool_t bIsRegisterDirect;
+}registerLimits_t;
+
+typedef enum operationModes_tag
+{
+ mTxOperation_c,
+ mRxOperation_c
+}operationModes_t;
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+extern const registerLimits_t registerIntervals[];
+
+extern uint8_t crtBitrate;
+
+extern bool_t evTestParameters;
+extern bool_t evDataFromUART;
+extern bool_t bEdDone;
+extern bool_t shortCutsEnabled;
+
+extern uint8_t testPower;
+extern uint8_t mAppSer;
+extern uint8_t gu8UartData;
+extern uint8_t au8ScanResults[];
+extern uint8_t ccaThresh;
+extern uint8_t testPayloadLen;
+extern channels_t testChannel;
+
+extern operationModes_t testOpMode;
+
+/************************************************************************************
+*************************************************************************************
+* Public functions declarations
+*************************************************************************************
+************************************************************************************/
+
+extern void PrintMenu(char * const pu8Menu[], uint8_t port);
+/*common functions declarations which have platform dependent behavior*/
+extern void ShortCutsParser( uint8_t u8UartData );
+extern void InitApp_custom();
+extern void InitProject_custom();
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/mbed-rtos.lib Thu Jul 16 07:29:15 2015 +0000 @@ -0,0 +1,1 @@ +http://mbed.org/users/mbed_official/code/mbed-rtos/#a21475017ae2
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/mbed.bld Thu Jul 16 07:29:15 2015 +0000 @@ -0,0 +1,1 @@ +http://mbed.org/users/mbed_official/code/mbed/builds/da0ca467f8b5 \ No newline at end of file