Jim Cooke / Mbed 2 deprecated Hat_Board_v5_1

Slight Mod

Dependencies:   mbed-dsp mbed

Fork of Hat_Board_v5 by John Scharf

SI_LIS.cpp@2:3a8cd127b72a, 2014-03-20 (annotated)

Committer:
drnow
Date:
Thu Mar 20 09:49:36 2014 +0000
Revision:
2:3a8cd127b72a
Parent:
1:2efeed26d93a
Child:
3:8334f137c151
Cleaned up, sends 2 light and 3 accel, with timing data.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
drnow 0:34bad5aca893 1
drnow 0:34bad5aca893 2 #include "SI_LIS.h"
drnow 0:34bad5aca893 3
drnow 0:34bad5aca893 4 I2C i2c(p9, p10); // (SDA,SCL)
drnow 0:34bad5aca893 5 int bias1,bias2,bias3,PS1,PS2,PS3,VIS;
drnow 0:34bad5aca893 6 unsigned char LowB,HighB;
drnow 0:34bad5aca893 7 unsigned int IR;
drnow 0:34bad5aca893 8 extern char rx_data[4];
drnow 0:34bad5aca893 9 extern char accel_2_data[2];
drnow 1:2efeed26d93a 10 extern char accel_data[6];
drnow 0:34bad5aca893 11
drnow 0:34bad5aca893 12 void restart()
drnow 0:34bad5aca893 13 {
drnow 0:34bad5aca893 14 wait_ms(30);
drnow 0:34bad5aca893 15 i2c.frequency(400000);
drnow 0:34bad5aca893 16 command(RESET);
drnow 0:34bad5aca893 17 wait_ms(30);
drnow 0:34bad5aca893 18
drnow 0:34bad5aca893 19 write_reg(HW_KEY,HW_KEY_VAL0);
drnow 0:34bad5aca893 20 write_reg(PS_LED21,0x41); // values when Si1142 and LED's put into hat
drnow 0:34bad5aca893 21 write_reg(PS_LED3,0x00);
drnow 0:34bad5aca893 22
drnow 0:34bad5aca893 23 // CHLIST Parameter
drnow 0:34bad5aca893 24 write_reg(PARAM_WR, PS1_TASK + PS2_TASK); //use PS1, PS2 to fire LED's
drnow 0:34bad5aca893 25 command(PARAM_SET + (CHLIST & 0x1F));
drnow 0:34bad5aca893 26
drnow 0:34bad5aca893 27 // PS Gain: by factor of (2 ^ PS_ADC_GAIN). Max gain: 128 (0x7).
drnow 0:34bad5aca893 28 write_reg(PARAM_WR, 0x03);
drnow 0:34bad5aca893 29 command(PARAM_SET + (PS_ADC_GAIN & 0x1F));
drnow 0:34bad5aca893 30
drnow 0:34bad5aca893 31 // PS_ADC_COUNTER (Recommend one’s complement of PS_ADC_GAIN.)
drnow 0:34bad5aca893 32 write_reg(PARAM_WR, 0x40);
drnow 0:34bad5aca893 33 command(PARAM_SET + (PS_ADC_COUNTER & 0x1F));
drnow 0:34bad5aca893 34
drnow 0:34bad5aca893 35 // ADC_OFFSET (adds to reported so there's no confusion with 0xFFFF overrange indicator) reset: 0x80
drnow 0:34bad5aca893 36 write_reg(PARAM_WR, 0x00);
drnow 0:34bad5aca893 37 command(PARAM_SET + (ADC_OFFSET & 0x1F));
drnow 0:34bad5aca893 38
drnow 0:34bad5aca893 39 // PS_Encoding (Bit 5: When set, ADC reports least significant 16 bits of 17-bit ADC
drnow 0:34bad5aca893 40 // Current Concept: don't set, but gain it up by another 2x
drnow 0:34bad5aca893 41
drnow 0:34bad5aca893 42 write_reg(INT_CFG,1); //set bit 0 to 1. Requires clearing interrupt pin
drnow 0:34bad5aca893 43
drnow 0:34bad5aca893 44 // IRQ_ENABLE 0x04: Bit 3: PS2_IE Bit 2: PS1_IE
drnow 0:34bad5aca893 45 write_reg(IRQ_ENABLE,0x04);
drnow 0:34bad5aca893 46
drnow 0:34bad5aca893 47 //IRQ_MODE1: 00: PS1_INT is set whenever a PS1 measurement has completed.
drnow 0:34bad5aca893 48 write_reg(IRQ_MODE1,0);
drnow 0:34bad5aca893 49 write_reg(IRQ_MODE2,0);
drnow 0:34bad5aca893 50
drnow 0:34bad5aca893 51 wait_ms(30);
drnow 0:34bad5aca893 52
drnow 0:34bad5aca893 53 write_reg(MEAS_RATE,0x20); //0x84 should be every 10 ms. Need calcs if less than that
drnow 0:34bad5aca893 54 wait_ms(30);
drnow 0:34bad5aca893 55 write_reg(PS_RATE,0x08); //this should be a multiplier of 1
drnow 0:34bad5aca893 56 wait_ms(30);
drnow 0:34bad5aca893 57 }
drnow 0:34bad5aca893 58
drnow 0:34bad5aca893 59 void command_test()
drnow 0:34bad5aca893 60 {
drnow 0:34bad5aca893 61 write_reg(COMMAND,NOP);
drnow 0:34bad5aca893 62 }
drnow 0:34bad5aca893 63
drnow 0:34bad5aca893 64 void command(char cmd)
drnow 0:34bad5aca893 65 {
drnow 0:34bad5aca893 66 int val;
drnow 0:34bad5aca893 67
drnow 0:34bad5aca893 68 val = read_reg(RESPONSE,1);
drnow 0:34bad5aca893 69 while(val!=0) {
drnow 0:34bad5aca893 70 write_reg(COMMAND,NOP);
drnow 0:34bad5aca893 71 val = read_reg(RESPONSE,1);
drnow 0:34bad5aca893 72 }
drnow 0:34bad5aca893 73 do {
drnow 0:34bad5aca893 74 write_reg(COMMAND,cmd);
drnow 0:34bad5aca893 75 if(cmd==RESET) break;
drnow 0:34bad5aca893 76 val = read_reg(RESPONSE,1);
drnow 0:34bad5aca893 77 } while(val==0);
drnow 0:34bad5aca893 78 }
drnow 0:34bad5aca893 79
drnow 0:34bad5aca893 80 int command2(char cmd)
drnow 0:34bad5aca893 81 {
drnow 0:34bad5aca893 82 int val;
drnow 0:34bad5aca893 83 int i = 0;
drnow 0:34bad5aca893 84 do {
drnow 0:34bad5aca893 85 write_reg(COMMAND,cmd);
drnow 0:34bad5aca893 86 val = read_reg(RESPONSE,1);
drnow 0:34bad5aca893 87 i = i+1;
drnow 0:34bad5aca893 88 } while(val==0);
drnow 0:34bad5aca893 89 return val;
drnow 0:34bad5aca893 90 }
drnow 0:34bad5aca893 91
drnow 0:34bad5aca893 92 void command3(char cmd)
drnow 0:34bad5aca893 93 {
drnow 0:34bad5aca893 94 write_reg(COMMAND,cmd);
drnow 0:34bad5aca893 95 }
drnow 0:34bad5aca893 96
drnow 0:34bad5aca893 97 char read_reg2 (/*unsigned*/ char address) // Read a register
drnow 0:34bad5aca893 98 {
drnow 0:34bad5aca893 99 char tx[1];
drnow 0:34bad5aca893 100 tx[0] = address;
drnow 0:34bad5aca893 101 i2c.write((IR_ADDRESS << 1) & 0xFE, tx, 1);
drnow 0:34bad5aca893 102
drnow 0:34bad5aca893 103 i2c.read((IR_ADDRESS << 1) | 0x01, rx_data, 4);
drnow 0:34bad5aca893 104 return 0;
drnow 0:34bad5aca893 105 }
drnow 0:34bad5aca893 106
drnow 0:34bad5aca893 107 char read_reg (/*unsigned*/ char address, int num_data) // Read a register
drnow 0:34bad5aca893 108 {
drnow 0:34bad5aca893 109 char tx[1];
drnow 0:34bad5aca893 110 char rx[1];
drnow 0:34bad5aca893 111 tx[0] = address;
drnow 0:34bad5aca893 112 i2c.write((IR_ADDRESS << 1) & 0xFE, tx, num_data);
drnow 0:34bad5aca893 113
drnow 0:34bad5aca893 114 i2c.read((IR_ADDRESS << 1) | 0x01, rx, num_data);
drnow 0:34bad5aca893 115 return rx[0];
drnow 0:34bad5aca893 116 }
drnow 0:34bad5aca893 117
drnow 0:34bad5aca893 118 void write_reg(char address, char num_data) // Write a resigter
drnow 0:34bad5aca893 119 {
drnow 0:34bad5aca893 120 char tx[2];
drnow 0:34bad5aca893 121 tx[0] = address;
drnow 0:34bad5aca893 122 tx[1] = num_data;
drnow 0:34bad5aca893 123 i2c.write((IR_ADDRESS << 1) & 0xFE, tx, 2);
drnow 0:34bad5aca893 124 }
drnow 0:34bad5aca893 125
drnow 2:3a8cd127b72a 126 void Init_Accel ()
drnow 0:34bad5aca893 127 {
drnow 0:34bad5aca893 128 char data[2];
drnow 2:3a8cd127b72a 129 char Reg_Num;
drnow 2:3a8cd127b72a 130 char Reg_Val;
drnow 2:3a8cd127b72a 131
drnow 2:3a8cd127b72a 132 Reg_Num = 0x20; // CTRL_REG1
drnow 2:3a8cd127b72a 133 Reg_Val = 0x57; // Nib 1 of 0101: Normal mode, 100 Hz; Nib 2 of 0111: Normal mode, XYZ enabled
drnow 2:3a8cd127b72a 134
drnow 0:34bad5aca893 135 data[0] = Reg_Num; //register to be written to
drnow 0:34bad5aca893 136 data[1] = Reg_Val; //data
drnow 2:3a8cd127b72a 137 i2c.write((LIS_Addr << 1) & 0xFE, data, 2);
drnow 0:34bad5aca893 138
drnow 2:3a8cd127b72a 139 wait(0.050); // Delay needed, or 2nd write doesn't work
drnow 2:3a8cd127b72a 140
drnow 2:3a8cd127b72a 141 Reg_Num = 0x21; // CTRL_REG2
drnow 2:3a8cd127b72a 142 Reg_Val = 0xA0; // 7-6 10: Normal filter mode; 5-4 10: Cut off freq; 3-0 0000: bypass interrupts
drnow 2:3a8cd127b72a 143 // High-pass filter bits 5-4: @ 100 Hz: 00 - 2Hz 01 - 1Hz 10- 0.5Hz 11- 0.2Hz
drnow 2:3a8cd127b72a 144 data[0] = Reg_Num; //register to be written to
drnow 2:3a8cd127b72a 145 data[1] = Reg_Val; //data
drnow 0:34bad5aca893 146 i2c.write((LIS_Addr << 1) & 0xFE, data, 2);
drnow 2:3a8cd127b72a 147
drnow 2:3a8cd127b72a 148 wait(0.050); // Delay needed?
drnow 0:34bad5aca893 149 }
drnow 0:34bad5aca893 150
drnow 0:34bad5aca893 151 void Get_Accel_Register (char Reg_Num)
drnow 0:34bad5aca893 152 {
drnow 0:34bad5aca893 153 char data;
drnow 0:34bad5aca893 154 char reg;
drnow 0:34bad5aca893 155
drnow 0:34bad5aca893 156 reg = Reg_Num;
drnow 0:34bad5aca893 157
drnow 0:34bad5aca893 158 i2c.write((LIS_Addr << 1) & 0xFE , &reg, 1 ); // Write register number
drnow 0:34bad5aca893 159 i2c.read ((LIS_Addr << 1) | 0x01, &data, 1 ); // Receive Byte from Slave
drnow 1:2efeed26d93a 160 accel_data[0] = data;
drnow 0:34bad5aca893 161 }
drnow 0:34bad5aca893 162
drnow 1:2efeed26d93a 163 void Get_Accel_Reg_6 (char Reg_Num) // Read 6 registers
drnow 1:2efeed26d93a 164 {
drnow 1:2efeed26d93a 165 char reg;
drnow 2:3a8cd127b72a 166 reg = Reg_Num | 0x80; // set bit 7 high to enable burst read
drnow 1:2efeed26d93a 167 i2c.write((LIS_Addr << 1) & 0xFE, &reg, 1);
drnow 1:2efeed26d93a 168 i2c.read((LIS_Addr << 1) | 0x01, accel_data, 6);
drnow 1:2efeed26d93a 169 }
drnow 1:2efeed26d93a 170
drnow 0:34bad5aca893 171