RYUICHI NAKAYAMA / mbed-dev

OK

Fork of mbed-dev by mbed official

targets/hal/TARGET_NXP/TARGET_LPC81X/sleep.c@144:423e1876dc07, 2016-08-02 (annotated)

Committer:
screamer
Date:
Tue Aug 02 14:07:36 2016 +0000
Revision:
144:423e1876dc07
Parent:
0:9b334a45a8ff 
Added targets.json file for the supported targets in the release

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "sleep_api.h"
bogdanm 0:9b334a45a8ff 17 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19
bogdanm 0:9b334a45a8ff 20 //#define DEEPSLEEP
bogdanm 0:9b334a45a8ff 21 #define POWERDOWN
bogdanm 0:9b334a45a8ff 22
bogdanm 0:9b334a45a8ff 23 void sleep(void) {
bogdanm 0:9b334a45a8ff 24 //Normal sleep mode for PCON:
bogdanm 0:9b334a45a8ff 25 LPC_PMU->PCON &= ~0x03;
bogdanm 0:9b334a45a8ff 26
bogdanm 0:9b334a45a8ff 27 //Normal sleep mode for ARM core:
bogdanm 0:9b334a45a8ff 28 SCB->SCR = 0;
bogdanm 0:9b334a45a8ff 29
bogdanm 0:9b334a45a8ff 30 //And go to sleep
bogdanm 0:9b334a45a8ff 31 __WFI();
bogdanm 0:9b334a45a8ff 32 }
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35
bogdanm 0:9b334a45a8ff 36 //Deepsleep/powerdown modes assume the device is configured to use its internal RC oscillator directly
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 #ifdef DEEPSLEEP
bogdanm 0:9b334a45a8ff 39 void deepsleep(void) {
bogdanm 0:9b334a45a8ff 40 //Deep sleep in PCON
bogdanm 0:9b334a45a8ff 41 LPC_PMU->PCON &= ~0x03;
bogdanm 0:9b334a45a8ff 42 LPC_PMU->PCON |= 0x01;
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 //If brownout detection and WDT are enabled, keep them enabled during sleep
bogdanm 0:9b334a45a8ff 45 LPC_SYSCON->PDSLEEPCFG = LPC_SYSCON->PDRUNCFG;
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 //After wakeup same stuff as currently enabled:
bogdanm 0:9b334a45a8ff 48 LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG;
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 //All interrupts may wake up:
bogdanm 0:9b334a45a8ff 51 LPC_SYSCON->STARTERP0 = 0xFF;
bogdanm 0:9b334a45a8ff 52 LPC_SYSCON->STARTERP1 = 0xFFFF;
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 //Deep sleep for ARM core:
bogdanm 0:9b334a45a8ff 55 SCB->SCR = 1<<2;
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 __WFI();
bogdanm 0:9b334a45a8ff 58 }
bogdanm 0:9b334a45a8ff 59 #endif
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 #ifdef POWERDOWN
bogdanm 0:9b334a45a8ff 62 void deepsleep(void) {
bogdanm 0:9b334a45a8ff 63 //Powerdown in PCON
bogdanm 0:9b334a45a8ff 64 LPC_PMU->PCON &= ~0x03;
bogdanm 0:9b334a45a8ff 65 LPC_PMU->PCON |= 0x02;
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 //If brownout detection and WDT are enabled, keep them enabled during sleep
bogdanm 0:9b334a45a8ff 68 LPC_SYSCON->PDSLEEPCFG = LPC_SYSCON->PDRUNCFG;
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 //After wakeup same stuff as currently enabled:
bogdanm 0:9b334a45a8ff 71 LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG;
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 //All interrupts may wake up:
bogdanm 0:9b334a45a8ff 74 LPC_SYSCON->STARTERP0 = 0xFF;
bogdanm 0:9b334a45a8ff 75 LPC_SYSCON->STARTERP1 = 0xFFFF;
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 //Deep sleep for ARM core:
bogdanm 0:9b334a45a8ff 78 SCB->SCR = 1<<2;
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 __WFI();
bogdanm 0:9b334a45a8ff 81 }
bogdanm 0:9b334a45a8ff 82 #endif