Code from liamg with few edits to init seria comml and output counter.
Fork of MKL05CLK by
head.h@2:1328c14aca66, 2014-04-11 (annotated)
- Committer:
- donoman
- Date:
- Fri Apr 11 02:34:27 2014 +0000
- Revision:
- 2:1328c14aca66
- Parent:
- 0:0d020b1f3308
- Child:
- 3:985a40825e8d
More registers added, still having problems reading MCG_C1;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
liamg | 0:0d020b1f3308 | 1 | |
liamg | 0:0d020b1f3308 | 2 | |
donoman | 2:1328c14aca66 | 3 | #define SIM_SDID (*(volatile unsigned long *)(0x40048024)) // Kinetis ID register |
donoman | 2:1328c14aca66 | 4 | #define PORTC_PCR3 (*(volatile unsigned long *)(0x4004B00C)) // PORTC_PCR3 Mux |
donoman | 2:1328c14aca66 | 5 | #define SIM_SOPT2 (*(volatile unsigned long *)(0x40048004)) // SIM Option Mux |
donoman | 2:1328c14aca66 | 6 | #define MCG_C1 (*(volatile unsigned long *)(0x40064001)) // MCG Register |