Diff: drv/zg2100/zg_com.h

Revision:

1:3a7c15057192

Parent:

0:b802fc31f1db

Child:

2:ac860ad9e490

--- a/drv/zg2100/zg_com.h	Fri Jul 09 15:37:23 2010 +0000
+++ b/drv/zg2100/zg_com.h	Fri Aug 06 10:23:41 2010 +0000
@@ -21,7 +21,7 @@
 THE SOFTWARE.
 */
 
-//ZG2100 Low-level communication functions (SPI, CS, Interrupt)
+/// \file ZG2100 Low-level communication functions (SPI, CS, Interrupt)
 //Donatien Garnier 2010
 
 #ifndef ZG_COM_H
@@ -44,30 +44,45 @@
 class DigitalOut;
 class InterruptIn;
 */
-void zg_com_init(SPI* pSpi, DigitalOut* pCs, InterruptIn* pInt, DigitalOut* pNrst);
+///Opens SPI interface with pins
+void zg_com_init(SPI* pSpi, DigitalOut* pCs, /*InterruptIn*/ DigitalIn* pInt, DigitalOut* pNrst);
 
 //Registers Access
-
+///Reads register
 uint32_t zg_register_read(uint32_t addr);
 
+///Writes register
 void zg_register_write(uint32_t addr, uint32_t reg);
 
 //Indexed Registers Access
-
+///Reads indexed register
 uint32_t zg_indexed_register_read(uint32_t addr);
 
+///writes indexed register
 void zg_indexed_register_write(uint32_t addr, uint32_t reg);
 
 //Fifos
-
+///Reads FIFO
 void zg_fifo_read( byte fifo, byte* pType, byte* pSubtype, byte* buf, int len );
 
+///Writes FIFO (can be chunked)
 void zg_fifo_write( byte fifo, byte type, byte subtype, byte* buf, int len, bool start = true, bool stop = true ); //Write by chunks
 
 //Spi
 
-void zg_spi_trf(byte* buf, int len, bool resetCs = true);
+///SPI transfers directions
+typedef enum __ZG_SPI_DIR
+{
+  ZG_SPI_READ, ///Read
+  ZG_SPI_WRITE, ///Write
+  ZG_SPI_TRF ///Read & Write
+} ZG_SPI_DIR;
 
+///Transfers SPI frame
+void zg_spi_trf(byte* buf, int len, bool resetCs = true, ZG_SPI_DIR dir = ZG_SPI_TRF);
+
+///Is there an interrupt to serve?
+bool zg_is_int();
 
 //Callbacks, must be implemented in zg_drv.c