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nrf_sdm.h

00001 /* 
00002  * Copyright (c) Nordic Semiconductor ASA
00003  * All rights reserved.
00004  * 
00005  * Redistribution and use in source and binary forms, with or without modification,
00006  * are permitted provided that the following conditions are met:
00007  * 
00008  *   1. Redistributions of source code must retain the above copyright notice, this
00009  *   list of conditions and the following disclaimer.
00010  * 
00011  *   2. Redistributions in binary form must reproduce the above copyright notice, this
00012  *   list of conditions and the following disclaimer in the documentation and/or
00013  *   other materials provided with the distribution.
00014  * 
00015  *   3. Neither the name of Nordic Semiconductor ASA nor the names of other
00016  *   contributors to this software may be used to endorse or promote products
00017  *   derived from this software without specific prior written permission.
00018  * 
00019  *   4. This software must only be used in a processor manufactured by Nordic
00020  *   Semiconductor ASA, or in a processor manufactured by a third party that
00021  *   is used in combination with a processor manufactured by Nordic Semiconductor.
00022  * 
00023  * 
00024  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
00025  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00026  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00027  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
00028  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
00029  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00030  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
00031  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
00032  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00033  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00034  * 
00035  */
00036 /**
00037   @defgroup nrf_sdm_api SoftDevice Manager API
00038   @{
00039      
00040   @brief APIs for SoftDevice management.
00041  
00042 */
00043 
00044 /* Header guard */
00045 #ifndef NRF_SDM_H__
00046 #define NRF_SDM_H__
00047 
00048 #include "nrf_svc.h"
00049 #include "nrf51.h"
00050 #include "nrf_soc.h"
00051 #include "nrf_error_sdm.h"
00052 
00053 /** @addtogroup NRF_SDM_DEFINES Defines
00054  * @{ */
00055 
00056 /** @brief SoftDevice Manager SVC Base number. */
00057 #define SDM_SVC_BASE 0x10   
00058 
00059 /** @} */
00060 
00061 /** @brief Defines the SoftDevice Information Structure location (address) as an offset from 
00062 the start of the softdevice (without MBR)*/
00063 #define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000)
00064 
00065 /** @brief Defines the usual size reserverd for the MBR when a softdevice is written to flash. 
00066 This is the offset where the first byte of the softdevice hex file is written.*/
00067 #define MBR_SIZE (0x1000)
00068 
00069 /** @brief Defines the absolute Softdevice information structure location (address)*/
00070 #define SOFTDEVICE_INFO_STRUCT_ADDRESS (SOFTDEVICE_INFO_STRUCT_OFFSET + MBR_SIZE)
00071 
00072 /** @brief Defines the offset for Softdevice size value relative to Softdevice base address*/
00073 #define SD_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x08)
00074 
00075 /** @brief Defines the offset for FWID value relative to Softdevice base address*/
00076 #define SD_FWID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x0C)
00077 
00078 /** @brief Defines a macro for retreiving the actual Softdevice size value from a given base address
00079            use @ref MBR_SIZE when Softdevice is installed just above the MBR (the usual case)*/
00080 #define SD_SIZE_GET(baseaddr) (*((uint32_t *) ((baseaddr) + SD_SIZE_OFFSET)))
00081 
00082 /** @brief Defines a macro for retreiving the actual FWID value from a given base address
00083            use @ref MBR_SIZE when Softdevice is installed just above the MBR (the usual case)*/
00084 #define SD_FWID_GET(baseaddr) ((*((uint32_t *) ((baseaddr) + SD_FWID_OFFSET))) & 0xFFFF)
00085 
00086 
00087 /** @addtogroup NRF_SDM_ENUMS Enumerations
00088  * @{ */
00089 
00090 /**@brief nRF SoftDevice Manager API SVC numbers. */
00091 enum NRF_SD_SVCS
00092 {
00093   SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */
00094   SD_SOFTDEVICE_DISABLE,               /**< ::sd_softdevice_disable */
00095   SD_SOFTDEVICE_IS_ENABLED,            /**< ::sd_softdevice_is_enabled */
00096   SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */
00097   SVC_SDM_LAST                         /**< Placeholder for last SDM SVC */
00098 };
00099 
00100 /**@brief Possible lfclk oscillator sources. */
00101 enum NRF_CLOCK_LFCLKSRCS
00102 {
00103   NRF_CLOCK_LFCLKSRC_SYNTH_250_PPM,                       /**< LFCLK Synthesized from HFCLK.                    */
00104   NRF_CLOCK_LFCLKSRC_XTAL_500_PPM,                        /**< LFCLK crystal oscillator 500 PPM accuracy.       */
00105   NRF_CLOCK_LFCLKSRC_XTAL_250_PPM,                        /**< LFCLK crystal oscillator 250 PPM accuracy.       */
00106   NRF_CLOCK_LFCLKSRC_XTAL_150_PPM,                        /**< LFCLK crystal oscillator 150 PPM accuracy.       */
00107   NRF_CLOCK_LFCLKSRC_XTAL_100_PPM,                        /**< LFCLK crystal oscillator 100 PPM accuracy.       */
00108   NRF_CLOCK_LFCLKSRC_XTAL_75_PPM,                         /**< LFCLK crystal oscillator 75 PPM accuracy.        */
00109   NRF_CLOCK_LFCLKSRC_XTAL_50_PPM,                         /**< LFCLK crystal oscillator 50 PPM accuracy.        */
00110   NRF_CLOCK_LFCLKSRC_XTAL_30_PPM,                         /**< LFCLK crystal oscillator 30 PPM accuracy.        */
00111   NRF_CLOCK_LFCLKSRC_XTAL_20_PPM,                         /**< LFCLK crystal oscillator 20 PPM accuracy.        */
00112   NRF_CLOCK_LFCLKSRC_RC_250_PPM_250MS_CALIBRATION,        /**< LFCLK RC oscillator, 250ms  calibration interval.*/
00113   NRF_CLOCK_LFCLKSRC_RC_250_PPM_500MS_CALIBRATION,        /**< LFCLK RC oscillator, 500ms  calibration interval.*/
00114   NRF_CLOCK_LFCLKSRC_RC_250_PPM_1000MS_CALIBRATION,       /**< LFCLK RC oscillator, 1000ms calibration interval.*/
00115   NRF_CLOCK_LFCLKSRC_RC_250_PPM_2000MS_CALIBRATION,       /**< LFCLK RC oscillator, 2000ms calibration interval.*/
00116   NRF_CLOCK_LFCLKSRC_RC_250_PPM_4000MS_CALIBRATION,       /**< LFCLK RC oscillator, 4000ms calibration interval.*/
00117   NRF_CLOCK_LFCLKSRC_RC_250_PPM_8000MS_CALIBRATION,       /**< LFCLK RC oscillator, 8000ms calibration interval.*/
00118   NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_1000MS_CALIBRATION,  /**< LFCLK RC oscillator. Temperature checked every 1000ms, if changed above a threshold, a calibration is done.*/
00119   NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_2000MS_CALIBRATION,  /**< LFCLK RC oscillator. Temperature checked every 2000ms, if changed above a threshold, a calibration is done.*/
00120   NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_4000MS_CALIBRATION,  /**< LFCLK RC oscillator. Temperature checked every 4000ms, if changed above a threshold, a calibration is done.*/
00121   NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_8000MS_CALIBRATION,  /**< LFCLK RC oscillator. Temperature checked every 8000ms, if changed above a threshold, a calibration is done.*/
00122   NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_16000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 16000ms, if changed above a threshold, a calibration is done.*/
00123 };
00124 
00125 /** @} */
00126 
00127 /** @addtogroup NRF_SDM_TYPES Types
00128  * @{ */
00129 
00130 /**@brief Type representing lfclk oscillator source. */
00131 typedef uint32_t nrf_clock_lfclksrc_t;
00132 
00133 
00134 /**@brief SoftDevice Assertion Handler type.
00135  *
00136  * When an unexpected error occurs within the SoftDevice it will call the SoftDevice assertion handler callback.
00137  * The protocol stack will be in an undefined state when this happens and the only way to recover will be to
00138  * perform a reset, using e.g. CMSIS NVIC_SystemReset().
00139  *
00140  * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the SoftDevice assert callback.
00141  *       
00142  * @param[in] pc The program counter of the failed assert.
00143  * @param[in] line_number Line number where the assert failed.
00144  * @param[in] file_name File name where the assert failed.
00145  */
00146 typedef void (*softdevice_assertion_handler_t)(uint32_t pc, uint16_t line_number, const uint8_t * p_file_name);
00147 
00148 /** @} */
00149 
00150 /** @addtogroup NRF_SDM_FUNCTIONS Functions
00151  * @{ */
00152 
00153 /**@brief Enables the SoftDevice and by extension the protocol stack.
00154  *
00155  * Idempotent function to enable the SoftDevice.
00156  *
00157  * @note Some care must be taken if a low frequency clock source is already running when calling this function:
00158  *       If the LF clock has a different source then the one currently running, it will be stopped. Then, the new
00159  *       clock source will be started.
00160  *
00161  * @note This function has no effect when returning with an error.
00162  *
00163  * @post If return code is ::NRF_SUCCESS 
00164  *       - SoC library and protocol stack APIs are made available.
00165  *       - A portion of RAM will be unavailable (see relevant SDS documentation).
00166  *       - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation).
00167  *       - Interrupts will not arrive from protected peripherals or interrupts.
00168  *       - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the softdevice.
00169  *       - Interrupt latency may be affected by the SoftDevice  (see relevant SDS documentation).
00170  *       - Chosen low frequency clock source will be running.
00171  *
00172  * @param clock_source Low frequency clock source and accuracy. (Note: In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock).
00173  * @param assertion_handler Callback for SoftDevice assertions.
00174  *
00175  * @retval ::NRF_SUCCESS
00176  * @retval ::NRF_ERROR_INVALID_STATE SoftDevice is already enabled, and the clock source and assertion handler cannot be updated.
00177  * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDeviceinterrupt is already enabled, or an enabled interrupt has an illegal priority level.
00178  * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected.
00179  */
00180 SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lfclksrc_t clock_source, softdevice_assertion_handler_t assertion_handler));
00181 
00182 /**@brief Disables the SoftDevice and by extension the protocol stack.
00183  * 
00184  * Idempotent function to disable the SoftDevice.
00185  *
00186  * @post SoC library and protocol stack APIs are made unavailable.
00187  * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest).
00188  * @post All peripherals used by the SoftDevice will be reset to default values.
00189  * @post All of RAM become available.
00190  * @post All interrupts are forwarded to the application.
00191  * @post LFCLK source chosen in ::sd_softdevice_enable will be left running.
00192  *
00193  * @retval ::NRF_SUCCESS
00194  */
00195 SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void));
00196 
00197 /**@brief Check if the SoftDevice is enabled.
00198  *
00199  * @param[out]  p_softdevice_enabled If the SoftDevice is enabled: 1 else 0.
00200  *
00201  * @retval ::NRF_SUCCESS
00202  */
00203 SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled));
00204 
00205 /**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice
00206  * 
00207  * This function is only intended to be called when a bootloader is enabled.
00208  *
00209  * @param[in] address The base address of the interrupt vector table for forwarded interrupts.
00210  
00211  * @retval ::NRF_SUCCESS
00212  */
00213 SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address)); 
00214 
00215 /** @} */
00216 
00217 #endif // NRF_SDM_H__
00218 
00219 /**
00220   @}
00221 */