Daiki Kato / mbed-os-lychee

mbed-os for GR-LYCHEE

Dependents:   mbed-os-example-blinky-gr-lychee GR-Boads_Camera_sample GR-Boards_Audio_Recoder GR-Boads_Camera_DisplayApp ... more

hal/spi_api.h@0:f782d9c66c49, 2018-02-02 (annotated)

Committer:
dkato
Date:
Fri Feb 02 05:42:23 2018 +0000
Revision:
0:f782d9c66c49
mbed-os for GR-LYCHEE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:f782d9c66c49 1
dkato 0:f782d9c66c49 2 /** \addtogroup hal */
dkato 0:f782d9c66c49 3 /** @{*/
dkato 0:f782d9c66c49 4 /* mbed Microcontroller Library
dkato 0:f782d9c66c49 5 * Copyright (c) 2006-2013 ARM Limited
dkato 0:f782d9c66c49 6 *
dkato 0:f782d9c66c49 7 * Licensed under the Apache License, Version 2.0 (the "License");
dkato 0:f782d9c66c49 8 * you may not use this file except in compliance with the License.
dkato 0:f782d9c66c49 9 * You may obtain a copy of the License at
dkato 0:f782d9c66c49 10 *
dkato 0:f782d9c66c49 11 * http://www.apache.org/licenses/LICENSE-2.0
dkato 0:f782d9c66c49 12 *
dkato 0:f782d9c66c49 13 * Unless required by applicable law or agreed to in writing, software
dkato 0:f782d9c66c49 14 * distributed under the License is distributed on an "AS IS" BASIS,
dkato 0:f782d9c66c49 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
dkato 0:f782d9c66c49 16 * See the License for the specific language governing permissions and
dkato 0:f782d9c66c49 17 * limitations under the License.
dkato 0:f782d9c66c49 18 */
dkato 0:f782d9c66c49 19 #ifndef MBED_SPI_API_H
dkato 0:f782d9c66c49 20 #define MBED_SPI_API_H
dkato 0:f782d9c66c49 21
dkato 0:f782d9c66c49 22 #include "device.h"
dkato 0:f782d9c66c49 23 #include "hal/dma_api.h"
dkato 0:f782d9c66c49 24 #include "hal/buffer.h"
dkato 0:f782d9c66c49 25
dkato 0:f782d9c66c49 26 #if DEVICE_SPI
dkato 0:f782d9c66c49 27
dkato 0:f782d9c66c49 28 #define SPI_EVENT_ERROR (1 << 1)
dkato 0:f782d9c66c49 29 #define SPI_EVENT_COMPLETE (1 << 2)
dkato 0:f782d9c66c49 30 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
dkato 0:f782d9c66c49 31 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
dkato 0:f782d9c66c49 32
dkato 0:f782d9c66c49 33 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
dkato 0:f782d9c66c49 34
dkato 0:f782d9c66c49 35 #define SPI_FILL_WORD (0xFFFF)
dkato 0:f782d9c66c49 36
dkato 0:f782d9c66c49 37 #if DEVICE_SPI_ASYNCH
dkato 0:f782d9c66c49 38 /** Asynch SPI HAL structure
dkato 0:f782d9c66c49 39 */
dkato 0:f782d9c66c49 40 typedef struct {
dkato 0:f782d9c66c49 41 struct spi_s spi; /**< Target specific SPI structure */
dkato 0:f782d9c66c49 42 struct buffer_s tx_buff; /**< Tx buffer */
dkato 0:f782d9c66c49 43 struct buffer_s rx_buff; /**< Rx buffer */
dkato 0:f782d9c66c49 44 } spi_t;
dkato 0:f782d9c66c49 45
dkato 0:f782d9c66c49 46 #else
dkato 0:f782d9c66c49 47 /** Non-asynch SPI HAL structure
dkato 0:f782d9c66c49 48 */
dkato 0:f782d9c66c49 49 typedef struct spi_s spi_t;
dkato 0:f782d9c66c49 50
dkato 0:f782d9c66c49 51 #endif
dkato 0:f782d9c66c49 52
dkato 0:f782d9c66c49 53 #ifdef __cplusplus
dkato 0:f782d9c66c49 54 extern "C" {
dkato 0:f782d9c66c49 55 #endif
dkato 0:f782d9c66c49 56
dkato 0:f782d9c66c49 57 /**
dkato 0:f782d9c66c49 58 * \defgroup hal_GeneralSPI SPI Configuration Functions
dkato 0:f782d9c66c49 59 * @{
dkato 0:f782d9c66c49 60 */
dkato 0:f782d9c66c49 61
dkato 0:f782d9c66c49 62 /** Initialize the SPI peripheral
dkato 0:f782d9c66c49 63 *
dkato 0:f782d9c66c49 64 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
dkato 0:f782d9c66c49 65 * @param[out] obj The SPI object to initialize
dkato 0:f782d9c66c49 66 * @param[in] mosi The pin to use for MOSI
dkato 0:f782d9c66c49 67 * @param[in] miso The pin to use for MISO
dkato 0:f782d9c66c49 68 * @param[in] sclk The pin to use for SCLK
dkato 0:f782d9c66c49 69 * @param[in] ssel The pin to use for SSEL
dkato 0:f782d9c66c49 70 */
dkato 0:f782d9c66c49 71 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
dkato 0:f782d9c66c49 72
dkato 0:f782d9c66c49 73 /** Release a SPI object
dkato 0:f782d9c66c49 74 *
dkato 0:f782d9c66c49 75 * TODO: spi_free is currently unimplemented
dkato 0:f782d9c66c49 76 * This will require reference counting at the C++ level to be safe
dkato 0:f782d9c66c49 77 *
dkato 0:f782d9c66c49 78 * Return the pins owned by the SPI object to their reset state
dkato 0:f782d9c66c49 79 * Disable the SPI peripheral
dkato 0:f782d9c66c49 80 * Disable the SPI clock
dkato 0:f782d9c66c49 81 * @param[in] obj The SPI object to deinitialize
dkato 0:f782d9c66c49 82 */
dkato 0:f782d9c66c49 83 void spi_free(spi_t *obj);
dkato 0:f782d9c66c49 84
dkato 0:f782d9c66c49 85 /** Configure the SPI format
dkato 0:f782d9c66c49 86 *
dkato 0:f782d9c66c49 87 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
dkato 0:f782d9c66c49 88 * The default bit order is MSB.
dkato 0:f782d9c66c49 89 * @param[in,out] obj The SPI object to configure
dkato 0:f782d9c66c49 90 * @param[in] bits The number of bits per frame
dkato 0:f782d9c66c49 91 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
dkato 0:f782d9c66c49 92 * @param[in] slave Zero for master mode or non-zero for slave mode
dkato 0:f782d9c66c49 93 */
dkato 0:f782d9c66c49 94 void spi_format(spi_t *obj, int bits, int mode, int slave);
dkato 0:f782d9c66c49 95
dkato 0:f782d9c66c49 96 /** Set the SPI baud rate
dkato 0:f782d9c66c49 97 *
dkato 0:f782d9c66c49 98 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
dkato 0:f782d9c66c49 99 * Configures the SPI peripheral's baud rate
dkato 0:f782d9c66c49 100 * @param[in,out] obj The SPI object to configure
dkato 0:f782d9c66c49 101 * @param[in] hz The baud rate in Hz
dkato 0:f782d9c66c49 102 */
dkato 0:f782d9c66c49 103 void spi_frequency(spi_t *obj, int hz);
dkato 0:f782d9c66c49 104
dkato 0:f782d9c66c49 105 /**@}*/
dkato 0:f782d9c66c49 106 /**
dkato 0:f782d9c66c49 107 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
dkato 0:f782d9c66c49 108 * @{
dkato 0:f782d9c66c49 109 */
dkato 0:f782d9c66c49 110
dkato 0:f782d9c66c49 111 /** Write a byte out in master mode and receive a value
dkato 0:f782d9c66c49 112 *
dkato 0:f782d9c66c49 113 * @param[in] obj The SPI peripheral to use for sending
dkato 0:f782d9c66c49 114 * @param[in] value The value to send
dkato 0:f782d9c66c49 115 * @return Returns the value received during send
dkato 0:f782d9c66c49 116 */
dkato 0:f782d9c66c49 117 int spi_master_write(spi_t *obj, int value);
dkato 0:f782d9c66c49 118
dkato 0:f782d9c66c49 119 /** Check if a value is available to read
dkato 0:f782d9c66c49 120 *
dkato 0:f782d9c66c49 121 * @param[in] obj The SPI peripheral to check
dkato 0:f782d9c66c49 122 * @return non-zero if a value is available
dkato 0:f782d9c66c49 123 */
dkato 0:f782d9c66c49 124 int spi_slave_receive(spi_t *obj);
dkato 0:f782d9c66c49 125
dkato 0:f782d9c66c49 126 /** Get a received value out of the SPI receive buffer in slave mode
dkato 0:f782d9c66c49 127 *
dkato 0:f782d9c66c49 128 * Blocks until a value is available
dkato 0:f782d9c66c49 129 * @param[in] obj The SPI peripheral to read
dkato 0:f782d9c66c49 130 * @return The value received
dkato 0:f782d9c66c49 131 */
dkato 0:f782d9c66c49 132 int spi_slave_read(spi_t *obj);
dkato 0:f782d9c66c49 133
dkato 0:f782d9c66c49 134 /** Write a value to the SPI peripheral in slave mode
dkato 0:f782d9c66c49 135 *
dkato 0:f782d9c66c49 136 * Blocks until the SPI peripheral can be written to
dkato 0:f782d9c66c49 137 * @param[in] obj The SPI peripheral to write
dkato 0:f782d9c66c49 138 * @param[in] value The value to write
dkato 0:f782d9c66c49 139 */
dkato 0:f782d9c66c49 140 void spi_slave_write(spi_t *obj, int value);
dkato 0:f782d9c66c49 141
dkato 0:f782d9c66c49 142 /** Checks if the specified SPI peripheral is in use
dkato 0:f782d9c66c49 143 *
dkato 0:f782d9c66c49 144 * @param[in] obj The SPI peripheral to check
dkato 0:f782d9c66c49 145 * @return non-zero if the peripheral is currently transmitting
dkato 0:f782d9c66c49 146 */
dkato 0:f782d9c66c49 147 int spi_busy(spi_t *obj);
dkato 0:f782d9c66c49 148
dkato 0:f782d9c66c49 149 /** Get the module number
dkato 0:f782d9c66c49 150 *
dkato 0:f782d9c66c49 151 * @param[in] obj The SPI peripheral to check
dkato 0:f782d9c66c49 152 * @return The module number
dkato 0:f782d9c66c49 153 */
dkato 0:f782d9c66c49 154 uint8_t spi_get_module(spi_t *obj);
dkato 0:f782d9c66c49 155
dkato 0:f782d9c66c49 156 /**@}*/
dkato 0:f782d9c66c49 157
dkato 0:f782d9c66c49 158 #if DEVICE_SPI_ASYNCH
dkato 0:f782d9c66c49 159 /**
dkato 0:f782d9c66c49 160 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
dkato 0:f782d9c66c49 161 * @{
dkato 0:f782d9c66c49 162 */
dkato 0:f782d9c66c49 163
dkato 0:f782d9c66c49 164 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
dkato 0:f782d9c66c49 165 *
dkato 0:f782d9c66c49 166 * @param[in] obj The SPI object that holds the transfer information
dkato 0:f782d9c66c49 167 * @param[in] tx The transmit buffer
dkato 0:f782d9c66c49 168 * @param[in] tx_length The number of bytes to transmit
dkato 0:f782d9c66c49 169 * @param[in] rx The receive buffer
dkato 0:f782d9c66c49 170 * @param[in] rx_length The number of bytes to receive
dkato 0:f782d9c66c49 171 * @param[in] bit_width The bit width of buffer words
dkato 0:f782d9c66c49 172 * @param[in] event The logical OR of events to be registered
dkato 0:f782d9c66c49 173 * @param[in] handler SPI interrupt handler
dkato 0:f782d9c66c49 174 * @param[in] hint A suggestion for how to use DMA with this transfer
dkato 0:f782d9c66c49 175 */
dkato 0:f782d9c66c49 176 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
dkato 0:f782d9c66c49 177
dkato 0:f782d9c66c49 178 /** The asynchronous IRQ handler
dkato 0:f782d9c66c49 179 *
dkato 0:f782d9c66c49 180 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
dkato 0:f782d9c66c49 181 * conditions, such as buffer overflows or transfer complete.
dkato 0:f782d9c66c49 182 * @param[in] obj The SPI object that holds the transfer information
dkato 0:f782d9c66c49 183 * @return Event flags if a transfer termination condition was met; otherwise 0.
dkato 0:f782d9c66c49 184 */
dkato 0:f782d9c66c49 185 uint32_t spi_irq_handler_asynch(spi_t *obj);
dkato 0:f782d9c66c49 186
dkato 0:f782d9c66c49 187 /** Attempts to determine if the SPI peripheral is already in use
dkato 0:f782d9c66c49 188 *
dkato 0:f782d9c66c49 189 * If a temporary DMA channel has been allocated, peripheral is in use.
dkato 0:f782d9c66c49 190 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
dkato 0:f782d9c66c49 191 * channel were allocated.
dkato 0:f782d9c66c49 192 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
dkato 0:f782d9c66c49 193 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
dkato 0:f782d9c66c49 194 * there are any bytes in the FIFOs.
dkato 0:f782d9c66c49 195 * @param[in] obj The SPI object to check for activity
dkato 0:f782d9c66c49 196 * @return Non-zero if the SPI port is active or zero if it is not.
dkato 0:f782d9c66c49 197 */
dkato 0:f782d9c66c49 198 uint8_t spi_active(spi_t *obj);
dkato 0:f782d9c66c49 199
dkato 0:f782d9c66c49 200 /** Abort an SPI transfer
dkato 0:f782d9c66c49 201 *
dkato 0:f782d9c66c49 202 * @param obj The SPI peripheral to stop
dkato 0:f782d9c66c49 203 */
dkato 0:f782d9c66c49 204 void spi_abort_asynch(spi_t *obj);
dkato 0:f782d9c66c49 205
dkato 0:f782d9c66c49 206
dkato 0:f782d9c66c49 207 #endif
dkato 0:f782d9c66c49 208
dkato 0:f782d9c66c49 209 /**@}*/
dkato 0:f782d9c66c49 210
dkato 0:f782d9c66c49 211 #ifdef __cplusplus
dkato 0:f782d9c66c49 212 }
dkato 0:f782d9c66c49 213 #endif // __cplusplus
dkato 0:f782d9c66c49 214
dkato 0:f782d9c66c49 215 #endif // SPI_DEVICE
dkato 0:f782d9c66c49 216
dkato 0:f782d9c66c49 217 #endif // MBED_SPI_API_H
dkato 0:f782d9c66c49 218
dkato 0:f782d9c66c49 219 /** @}*/