Daiki Kato / mbed-os-lychee

mbed-os for GR-LYCHEE

Dependents:   mbed-os-example-blinky-gr-lychee GR-Boads_Camera_sample GR-Boards_Audio_Recoder GR-Boads_Camera_DisplayApp ... more

hal/i2c_api.h@0:f782d9c66c49, 2018-02-02 (annotated)

Committer:
dkato
Date:
Fri Feb 02 05:42:23 2018 +0000
Revision:
0:f782d9c66c49
mbed-os for GR-LYCHEE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:f782d9c66c49 1
dkato 0:f782d9c66c49 2 /** \addtogroup hal */
dkato 0:f782d9c66c49 3 /** @{*/
dkato 0:f782d9c66c49 4 /* mbed Microcontroller Library
dkato 0:f782d9c66c49 5 * Copyright (c) 2006-2015 ARM Limited
dkato 0:f782d9c66c49 6 *
dkato 0:f782d9c66c49 7 * Licensed under the Apache License, Version 2.0 (the "License");
dkato 0:f782d9c66c49 8 * you may not use this file except in compliance with the License.
dkato 0:f782d9c66c49 9 * You may obtain a copy of the License at
dkato 0:f782d9c66c49 10 *
dkato 0:f782d9c66c49 11 * http://www.apache.org/licenses/LICENSE-2.0
dkato 0:f782d9c66c49 12 *
dkato 0:f782d9c66c49 13 * Unless required by applicable law or agreed to in writing, software
dkato 0:f782d9c66c49 14 * distributed under the License is distributed on an "AS IS" BASIS,
dkato 0:f782d9c66c49 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
dkato 0:f782d9c66c49 16 * See the License for the specific language governing permissions and
dkato 0:f782d9c66c49 17 * limitations under the License.
dkato 0:f782d9c66c49 18 */
dkato 0:f782d9c66c49 19 #ifndef MBED_I2C_API_H
dkato 0:f782d9c66c49 20 #define MBED_I2C_API_H
dkato 0:f782d9c66c49 21
dkato 0:f782d9c66c49 22 #include "device.h"
dkato 0:f782d9c66c49 23 #include "hal/buffer.h"
dkato 0:f782d9c66c49 24
dkato 0:f782d9c66c49 25 #if DEVICE_I2C_ASYNCH
dkato 0:f782d9c66c49 26 #include "hal/dma_api.h"
dkato 0:f782d9c66c49 27 #endif
dkato 0:f782d9c66c49 28
dkato 0:f782d9c66c49 29 #if DEVICE_I2C
dkato 0:f782d9c66c49 30
dkato 0:f782d9c66c49 31 /**
dkato 0:f782d9c66c49 32 * @defgroup hal_I2CEvents I2C Events Macros
dkato 0:f782d9c66c49 33 *
dkato 0:f782d9c66c49 34 * @{
dkato 0:f782d9c66c49 35 */
dkato 0:f782d9c66c49 36 #define I2C_EVENT_ERROR (1 << 1)
dkato 0:f782d9c66c49 37 #define I2C_EVENT_ERROR_NO_SLAVE (1 << 2)
dkato 0:f782d9c66c49 38 #define I2C_EVENT_TRANSFER_COMPLETE (1 << 3)
dkato 0:f782d9c66c49 39 #define I2C_EVENT_TRANSFER_EARLY_NACK (1 << 4)
dkato 0:f782d9c66c49 40 #define I2C_EVENT_ALL (I2C_EVENT_ERROR | I2C_EVENT_TRANSFER_COMPLETE | I2C_EVENT_ERROR_NO_SLAVE | I2C_EVENT_TRANSFER_EARLY_NACK)
dkato 0:f782d9c66c49 41
dkato 0:f782d9c66c49 42 /**@}*/
dkato 0:f782d9c66c49 43
dkato 0:f782d9c66c49 44 #if DEVICE_I2C_ASYNCH
dkato 0:f782d9c66c49 45 /** Asynch I2C HAL structure
dkato 0:f782d9c66c49 46 */
dkato 0:f782d9c66c49 47 typedef struct {
dkato 0:f782d9c66c49 48 struct i2c_s i2c; /**< Target specific I2C structure */
dkato 0:f782d9c66c49 49 struct buffer_s tx_buff; /**< Tx buffer */
dkato 0:f782d9c66c49 50 struct buffer_s rx_buff; /**< Rx buffer */
dkato 0:f782d9c66c49 51 } i2c_t;
dkato 0:f782d9c66c49 52
dkato 0:f782d9c66c49 53 #else
dkato 0:f782d9c66c49 54 /** Non-asynch I2C HAL structure
dkato 0:f782d9c66c49 55 */
dkato 0:f782d9c66c49 56 typedef struct i2c_s i2c_t;
dkato 0:f782d9c66c49 57
dkato 0:f782d9c66c49 58 #endif
dkato 0:f782d9c66c49 59
dkato 0:f782d9c66c49 60 enum {
dkato 0:f782d9c66c49 61 I2C_ERROR_NO_SLAVE = -1,
dkato 0:f782d9c66c49 62 I2C_ERROR_BUS_BUSY = -2
dkato 0:f782d9c66c49 63 };
dkato 0:f782d9c66c49 64
dkato 0:f782d9c66c49 65 #ifdef __cplusplus
dkato 0:f782d9c66c49 66 extern "C" {
dkato 0:f782d9c66c49 67 #endif
dkato 0:f782d9c66c49 68
dkato 0:f782d9c66c49 69 /**
dkato 0:f782d9c66c49 70 * \defgroup hal_GeneralI2C I2C Configuration Functions
dkato 0:f782d9c66c49 71 * @{
dkato 0:f782d9c66c49 72 */
dkato 0:f782d9c66c49 73
dkato 0:f782d9c66c49 74 /** Initialize the I2C peripheral. It sets the default parameters for I2C
dkato 0:f782d9c66c49 75 * peripheral, and configures its specifieds pins.
dkato 0:f782d9c66c49 76 *
dkato 0:f782d9c66c49 77 * @param obj The I2C object
dkato 0:f782d9c66c49 78 * @param sda The sda pin
dkato 0:f782d9c66c49 79 * @param scl The scl pin
dkato 0:f782d9c66c49 80 */
dkato 0:f782d9c66c49 81 void i2c_init(i2c_t *obj, PinName sda, PinName scl);
dkato 0:f782d9c66c49 82
dkato 0:f782d9c66c49 83 /** Configure the I2C frequency
dkato 0:f782d9c66c49 84 *
dkato 0:f782d9c66c49 85 * @param obj The I2C object
dkato 0:f782d9c66c49 86 * @param hz Frequency in Hz
dkato 0:f782d9c66c49 87 */
dkato 0:f782d9c66c49 88 void i2c_frequency(i2c_t *obj, int hz);
dkato 0:f782d9c66c49 89
dkato 0:f782d9c66c49 90 /** Send START command
dkato 0:f782d9c66c49 91 *
dkato 0:f782d9c66c49 92 * @param obj The I2C object
dkato 0:f782d9c66c49 93 */
dkato 0:f782d9c66c49 94 int i2c_start(i2c_t *obj);
dkato 0:f782d9c66c49 95
dkato 0:f782d9c66c49 96 /** Send STOP command
dkato 0:f782d9c66c49 97 *
dkato 0:f782d9c66c49 98 * @param obj The I2C object
dkato 0:f782d9c66c49 99 */
dkato 0:f782d9c66c49 100 int i2c_stop(i2c_t *obj);
dkato 0:f782d9c66c49 101
dkato 0:f782d9c66c49 102 /** Blocking reading data
dkato 0:f782d9c66c49 103 *
dkato 0:f782d9c66c49 104 * @param obj The I2C object
dkato 0:f782d9c66c49 105 * @param address 7-bit address (last bit is 1)
dkato 0:f782d9c66c49 106 * @param data The buffer for receiving
dkato 0:f782d9c66c49 107 * @param length Number of bytes to read
dkato 0:f782d9c66c49 108 * @param stop Stop to be generated after the transfer is done
dkato 0:f782d9c66c49 109 * @return Number of read bytes
dkato 0:f782d9c66c49 110 */
dkato 0:f782d9c66c49 111 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop);
dkato 0:f782d9c66c49 112
dkato 0:f782d9c66c49 113 /** Blocking sending data
dkato 0:f782d9c66c49 114 *
dkato 0:f782d9c66c49 115 * @param obj The I2C object
dkato 0:f782d9c66c49 116 * @param address 7-bit address (last bit is 0)
dkato 0:f782d9c66c49 117 * @param data The buffer for sending
dkato 0:f782d9c66c49 118 * @param length Number of bytes to write
dkato 0:f782d9c66c49 119 * @param stop Stop to be generated after the transfer is done
dkato 0:f782d9c66c49 120 * @return
dkato 0:f782d9c66c49 121 * zero or non-zero - Number of written bytes
dkato 0:f782d9c66c49 122 * negative - I2C_ERROR_XXX status
dkato 0:f782d9c66c49 123 */
dkato 0:f782d9c66c49 124 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop);
dkato 0:f782d9c66c49 125
dkato 0:f782d9c66c49 126 /** Reset I2C peripheral. TODO: The action here. Most of the implementation sends stop()
dkato 0:f782d9c66c49 127 *
dkato 0:f782d9c66c49 128 * @param obj The I2C object
dkato 0:f782d9c66c49 129 */
dkato 0:f782d9c66c49 130 void i2c_reset(i2c_t *obj);
dkato 0:f782d9c66c49 131
dkato 0:f782d9c66c49 132 /** Read one byte
dkato 0:f782d9c66c49 133 *
dkato 0:f782d9c66c49 134 * @param obj The I2C object
dkato 0:f782d9c66c49 135 * @param last Acknoledge
dkato 0:f782d9c66c49 136 * @return The read byte
dkato 0:f782d9c66c49 137 */
dkato 0:f782d9c66c49 138 int i2c_byte_read(i2c_t *obj, int last);
dkato 0:f782d9c66c49 139
dkato 0:f782d9c66c49 140 /** Write one byte
dkato 0:f782d9c66c49 141 *
dkato 0:f782d9c66c49 142 * @param obj The I2C object
dkato 0:f782d9c66c49 143 * @param data Byte to be written
dkato 0:f782d9c66c49 144 * @return 0 if NAK was received, 1 if ACK was received, 2 for timeout.
dkato 0:f782d9c66c49 145 */
dkato 0:f782d9c66c49 146 int i2c_byte_write(i2c_t *obj, int data);
dkato 0:f782d9c66c49 147
dkato 0:f782d9c66c49 148 /**@}*/
dkato 0:f782d9c66c49 149
dkato 0:f782d9c66c49 150 #if DEVICE_I2CSLAVE
dkato 0:f782d9c66c49 151
dkato 0:f782d9c66c49 152 /**
dkato 0:f782d9c66c49 153 * \defgroup SynchI2C Synchronous I2C Hardware Abstraction Layer for slave
dkato 0:f782d9c66c49 154 * @{
dkato 0:f782d9c66c49 155 */
dkato 0:f782d9c66c49 156
dkato 0:f782d9c66c49 157 /** Configure I2C as slave or master.
dkato 0:f782d9c66c49 158 * @param obj The I2C object
dkato 0:f782d9c66c49 159 * @return non-zero if a value is available
dkato 0:f782d9c66c49 160 */
dkato 0:f782d9c66c49 161 void i2c_slave_mode(i2c_t *obj, int enable_slave);
dkato 0:f782d9c66c49 162
dkato 0:f782d9c66c49 163 /** Check to see if the I2C slave has been addressed.
dkato 0:f782d9c66c49 164 * @param obj The I2C object
dkato 0:f782d9c66c49 165 * @return The status - 1 - read addresses, 2 - write to all slaves,
dkato 0:f782d9c66c49 166 * 3 write addressed, 0 - the slave has not been addressed
dkato 0:f782d9c66c49 167 */
dkato 0:f782d9c66c49 168 int i2c_slave_receive(i2c_t *obj);
dkato 0:f782d9c66c49 169
dkato 0:f782d9c66c49 170 /** Configure I2C as slave or master.
dkato 0:f782d9c66c49 171 * @param obj The I2C object
dkato 0:f782d9c66c49 172 * @return non-zero if a value is available
dkato 0:f782d9c66c49 173 */
dkato 0:f782d9c66c49 174 int i2c_slave_read(i2c_t *obj, char *data, int length);
dkato 0:f782d9c66c49 175
dkato 0:f782d9c66c49 176 /** Configure I2C as slave or master.
dkato 0:f782d9c66c49 177 * @param obj The I2C object
dkato 0:f782d9c66c49 178 * @return non-zero if a value is available
dkato 0:f782d9c66c49 179 */
dkato 0:f782d9c66c49 180 int i2c_slave_write(i2c_t *obj, const char *data, int length);
dkato 0:f782d9c66c49 181
dkato 0:f782d9c66c49 182 /** Configure I2C address.
dkato 0:f782d9c66c49 183 * @param obj The I2C object
dkato 0:f782d9c66c49 184 * @param idx Currently not used
dkato 0:f782d9c66c49 185 * @param address The address to be set
dkato 0:f782d9c66c49 186 * @param mask Currently not used
dkato 0:f782d9c66c49 187 */
dkato 0:f782d9c66c49 188 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask);
dkato 0:f782d9c66c49 189
dkato 0:f782d9c66c49 190 #endif
dkato 0:f782d9c66c49 191
dkato 0:f782d9c66c49 192 /**@}*/
dkato 0:f782d9c66c49 193
dkato 0:f782d9c66c49 194 #if DEVICE_I2C_ASYNCH
dkato 0:f782d9c66c49 195
dkato 0:f782d9c66c49 196 /**
dkato 0:f782d9c66c49 197 * \defgroup hal_AsynchI2C Asynchronous I2C Hardware Abstraction Layer
dkato 0:f782d9c66c49 198 * @{
dkato 0:f782d9c66c49 199 */
dkato 0:f782d9c66c49 200
dkato 0:f782d9c66c49 201 /** Start I2C asynchronous transfer
dkato 0:f782d9c66c49 202 *
dkato 0:f782d9c66c49 203 * @param obj The I2C object
dkato 0:f782d9c66c49 204 * @param tx The transmit buffer
dkato 0:f782d9c66c49 205 * @param tx_length The number of bytes to transmit
dkato 0:f782d9c66c49 206 * @param rx The receive buffer
dkato 0:f782d9c66c49 207 * @param rx_length The number of bytes to receive
dkato 0:f782d9c66c49 208 * @param address The address to be set - 7bit or 9bit
dkato 0:f782d9c66c49 209 * @param stop If true, stop will be generated after the transfer is done
dkato 0:f782d9c66c49 210 * @param handler The I2C IRQ handler to be set
dkato 0:f782d9c66c49 211 * @param hint DMA hint usage
dkato 0:f782d9c66c49 212 */
dkato 0:f782d9c66c49 213 void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint);
dkato 0:f782d9c66c49 214
dkato 0:f782d9c66c49 215 /** The asynchronous IRQ handler
dkato 0:f782d9c66c49 216 *
dkato 0:f782d9c66c49 217 * @param obj The I2C object which holds the transfer information
dkato 0:f782d9c66c49 218 * @return Event flags if a transfer termination condition was met, otherwise return 0.
dkato 0:f782d9c66c49 219 */
dkato 0:f782d9c66c49 220 uint32_t i2c_irq_handler_asynch(i2c_t *obj);
dkato 0:f782d9c66c49 221
dkato 0:f782d9c66c49 222 /** Attempts to determine if the I2C peripheral is already in use
dkato 0:f782d9c66c49 223 *
dkato 0:f782d9c66c49 224 * @param obj The I2C object
dkato 0:f782d9c66c49 225 * @return Non-zero if the I2C module is active or zero if it is not
dkato 0:f782d9c66c49 226 */
dkato 0:f782d9c66c49 227 uint8_t i2c_active(i2c_t *obj);
dkato 0:f782d9c66c49 228
dkato 0:f782d9c66c49 229 /** Abort asynchronous transfer
dkato 0:f782d9c66c49 230 *
dkato 0:f782d9c66c49 231 * This function does not perform any check - that should happen in upper layers.
dkato 0:f782d9c66c49 232 * @param obj The I2C object
dkato 0:f782d9c66c49 233 */
dkato 0:f782d9c66c49 234 void i2c_abort_asynch(i2c_t *obj);
dkato 0:f782d9c66c49 235
dkato 0:f782d9c66c49 236 #endif
dkato 0:f782d9c66c49 237
dkato 0:f782d9c66c49 238 /**@}*/
dkato 0:f782d9c66c49 239
dkato 0:f782d9c66c49 240 #ifdef __cplusplus
dkato 0:f782d9c66c49 241 }
dkato 0:f782d9c66c49 242 #endif
dkato 0:f782d9c66c49 243
dkato 0:f782d9c66c49 244 #endif
dkato 0:f782d9c66c49 245
dkato 0:f782d9c66c49 246 #endif
dkato 0:f782d9c66c49 247
dkato 0:f782d9c66c49 248 /** @}*/