Daiki Kato / mbed-os-lychee

mbed-os for GR-LYCHEE

Dependents:   mbed-os-example-blinky-gr-lychee GR-Boads_Camera_sample GR-Boards_Audio_Recoder GR-Boads_Camera_DisplayApp ... more

cmsis/core_cmInstr.h@0:f782d9c66c49, 2018-02-02 (annotated)

Committer:
dkato
Date:
Fri Feb 02 05:42:23 2018 +0000
Revision:
0:f782d9c66c49
mbed-os for GR-LYCHEE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:f782d9c66c49 1 /**************************************************************************//**
dkato 0:f782d9c66c49 2 * @file core_cmInstr.h
dkato 0:f782d9c66c49 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
dkato 0:f782d9c66c49 4 * @version V4.10
dkato 0:f782d9c66c49 5 * @date 18. March 2015
dkato 0:f782d9c66c49 6 *
dkato 0:f782d9c66c49 7 * @note
dkato 0:f782d9c66c49 8 *
dkato 0:f782d9c66c49 9 ******************************************************************************/
dkato 0:f782d9c66c49 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
dkato 0:f782d9c66c49 11
dkato 0:f782d9c66c49 12 All rights reserved.
dkato 0:f782d9c66c49 13 Redistribution and use in source and binary forms, with or without
dkato 0:f782d9c66c49 14 modification, are permitted provided that the following conditions are met:
dkato 0:f782d9c66c49 15 - Redistributions of source code must retain the above copyright
dkato 0:f782d9c66c49 16 notice, this list of conditions and the following disclaimer.
dkato 0:f782d9c66c49 17 - Redistributions in binary form must reproduce the above copyright
dkato 0:f782d9c66c49 18 notice, this list of conditions and the following disclaimer in the
dkato 0:f782d9c66c49 19 documentation and/or other materials provided with the distribution.
dkato 0:f782d9c66c49 20 - Neither the name of ARM nor the names of its contributors may be used
dkato 0:f782d9c66c49 21 to endorse or promote products derived from this software without
dkato 0:f782d9c66c49 22 specific prior written permission.
dkato 0:f782d9c66c49 23 *
dkato 0:f782d9c66c49 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
dkato 0:f782d9c66c49 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
dkato 0:f782d9c66c49 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
dkato 0:f782d9c66c49 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
dkato 0:f782d9c66c49 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
dkato 0:f782d9c66c49 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
dkato 0:f782d9c66c49 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
dkato 0:f782d9c66c49 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
dkato 0:f782d9c66c49 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
dkato 0:f782d9c66c49 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
dkato 0:f782d9c66c49 34 POSSIBILITY OF SUCH DAMAGE.
dkato 0:f782d9c66c49 35 ---------------------------------------------------------------------------*/
dkato 0:f782d9c66c49 36
dkato 0:f782d9c66c49 37
dkato 0:f782d9c66c49 38 #ifndef __CORE_CMINSTR_H
dkato 0:f782d9c66c49 39 #define __CORE_CMINSTR_H
dkato 0:f782d9c66c49 40
dkato 0:f782d9c66c49 41
dkato 0:f782d9c66c49 42 /* ########################## Core Instruction Access ######################### */
dkato 0:f782d9c66c49 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
dkato 0:f782d9c66c49 44 Access to dedicated instructions
dkato 0:f782d9c66c49 45 @{
dkato 0:f782d9c66c49 46 */
dkato 0:f782d9c66c49 47
dkato 0:f782d9c66c49 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
dkato 0:f782d9c66c49 49 /* ARM armcc specific functions */
dkato 0:f782d9c66c49 50
dkato 0:f782d9c66c49 51 #if (__ARMCC_VERSION < 400677)
dkato 0:f782d9c66c49 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
dkato 0:f782d9c66c49 53 #endif
dkato 0:f782d9c66c49 54
dkato 0:f782d9c66c49 55
dkato 0:f782d9c66c49 56 /** \brief No Operation
dkato 0:f782d9c66c49 57
dkato 0:f782d9c66c49 58 No Operation does nothing. This instruction can be used for code alignment purposes.
dkato 0:f782d9c66c49 59 */
dkato 0:f782d9c66c49 60 #define __NOP __nop
dkato 0:f782d9c66c49 61
dkato 0:f782d9c66c49 62
dkato 0:f782d9c66c49 63 /** \brief Wait For Interrupt
dkato 0:f782d9c66c49 64
dkato 0:f782d9c66c49 65 Wait For Interrupt is a hint instruction that suspends execution
dkato 0:f782d9c66c49 66 until one of a number of events occurs.
dkato 0:f782d9c66c49 67 */
dkato 0:f782d9c66c49 68 #define __WFI __wfi
dkato 0:f782d9c66c49 69
dkato 0:f782d9c66c49 70
dkato 0:f782d9c66c49 71 /** \brief Wait For Event
dkato 0:f782d9c66c49 72
dkato 0:f782d9c66c49 73 Wait For Event is a hint instruction that permits the processor to enter
dkato 0:f782d9c66c49 74 a low-power state until one of a number of events occurs.
dkato 0:f782d9c66c49 75 */
dkato 0:f782d9c66c49 76 #define __WFE __wfe
dkato 0:f782d9c66c49 77
dkato 0:f782d9c66c49 78
dkato 0:f782d9c66c49 79 /** \brief Send Event
dkato 0:f782d9c66c49 80
dkato 0:f782d9c66c49 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
dkato 0:f782d9c66c49 82 */
dkato 0:f782d9c66c49 83 #define __SEV __sev
dkato 0:f782d9c66c49 84
dkato 0:f782d9c66c49 85
dkato 0:f782d9c66c49 86 /** \brief Instruction Synchronization Barrier
dkato 0:f782d9c66c49 87
dkato 0:f782d9c66c49 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
dkato 0:f782d9c66c49 89 so that all instructions following the ISB are fetched from cache or
dkato 0:f782d9c66c49 90 memory, after the instruction has been completed.
dkato 0:f782d9c66c49 91 */
dkato 0:f782d9c66c49 92 #define __ISB() do {\
dkato 0:f782d9c66c49 93 __schedule_barrier();\
dkato 0:f782d9c66c49 94 __isb(0xF);\
dkato 0:f782d9c66c49 95 __schedule_barrier();\
dkato 0:f782d9c66c49 96 } while (0)
dkato 0:f782d9c66c49 97
dkato 0:f782d9c66c49 98 /** \brief Data Synchronization Barrier
dkato 0:f782d9c66c49 99
dkato 0:f782d9c66c49 100 This function acts as a special kind of Data Memory Barrier.
dkato 0:f782d9c66c49 101 It completes when all explicit memory accesses before this instruction complete.
dkato 0:f782d9c66c49 102 */
dkato 0:f782d9c66c49 103 #define __DSB() do {\
dkato 0:f782d9c66c49 104 __schedule_barrier();\
dkato 0:f782d9c66c49 105 __dsb(0xF);\
dkato 0:f782d9c66c49 106 __schedule_barrier();\
dkato 0:f782d9c66c49 107 } while (0)
dkato 0:f782d9c66c49 108
dkato 0:f782d9c66c49 109 /** \brief Data Memory Barrier
dkato 0:f782d9c66c49 110
dkato 0:f782d9c66c49 111 This function ensures the apparent order of the explicit memory operations before
dkato 0:f782d9c66c49 112 and after the instruction, without ensuring their completion.
dkato 0:f782d9c66c49 113 */
dkato 0:f782d9c66c49 114 #define __DMB() do {\
dkato 0:f782d9c66c49 115 __schedule_barrier();\
dkato 0:f782d9c66c49 116 __dmb(0xF);\
dkato 0:f782d9c66c49 117 __schedule_barrier();\
dkato 0:f782d9c66c49 118 } while (0)
dkato 0:f782d9c66c49 119
dkato 0:f782d9c66c49 120 /** \brief Reverse byte order (32 bit)
dkato 0:f782d9c66c49 121
dkato 0:f782d9c66c49 122 This function reverses the byte order in integer value.
dkato 0:f782d9c66c49 123
dkato 0:f782d9c66c49 124 \param [in] value Value to reverse
dkato 0:f782d9c66c49 125 \return Reversed value
dkato 0:f782d9c66c49 126 */
dkato 0:f782d9c66c49 127 #define __REV __rev
dkato 0:f782d9c66c49 128
dkato 0:f782d9c66c49 129
dkato 0:f782d9c66c49 130 /** \brief Reverse byte order (16 bit)
dkato 0:f782d9c66c49 131
dkato 0:f782d9c66c49 132 This function reverses the byte order in two unsigned short values.
dkato 0:f782d9c66c49 133
dkato 0:f782d9c66c49 134 \param [in] value Value to reverse
dkato 0:f782d9c66c49 135 \return Reversed value
dkato 0:f782d9c66c49 136 */
dkato 0:f782d9c66c49 137 #ifndef __NO_EMBEDDED_ASM
dkato 0:f782d9c66c49 138 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
dkato 0:f782d9c66c49 139 {
dkato 0:f782d9c66c49 140 rev16 r0, r0
dkato 0:f782d9c66c49 141 bx lr
dkato 0:f782d9c66c49 142 }
dkato 0:f782d9c66c49 143 #endif
dkato 0:f782d9c66c49 144
dkato 0:f782d9c66c49 145 /** \brief Reverse byte order in signed short value
dkato 0:f782d9c66c49 146
dkato 0:f782d9c66c49 147 This function reverses the byte order in a signed short value with sign extension to integer.
dkato 0:f782d9c66c49 148
dkato 0:f782d9c66c49 149 \param [in] value Value to reverse
dkato 0:f782d9c66c49 150 \return Reversed value
dkato 0:f782d9c66c49 151 */
dkato 0:f782d9c66c49 152 #ifndef __NO_EMBEDDED_ASM
dkato 0:f782d9c66c49 153 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
dkato 0:f782d9c66c49 154 {
dkato 0:f782d9c66c49 155 revsh r0, r0
dkato 0:f782d9c66c49 156 bx lr
dkato 0:f782d9c66c49 157 }
dkato 0:f782d9c66c49 158 #endif
dkato 0:f782d9c66c49 159
dkato 0:f782d9c66c49 160
dkato 0:f782d9c66c49 161 /** \brief Rotate Right in unsigned value (32 bit)
dkato 0:f782d9c66c49 162
dkato 0:f782d9c66c49 163 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
dkato 0:f782d9c66c49 164
dkato 0:f782d9c66c49 165 \param [in] value Value to rotate
dkato 0:f782d9c66c49 166 \param [in] value Number of Bits to rotate
dkato 0:f782d9c66c49 167 \return Rotated value
dkato 0:f782d9c66c49 168 */
dkato 0:f782d9c66c49 169 #define __ROR __ror
dkato 0:f782d9c66c49 170
dkato 0:f782d9c66c49 171
dkato 0:f782d9c66c49 172 /** \brief Breakpoint
dkato 0:f782d9c66c49 173
dkato 0:f782d9c66c49 174 This function causes the processor to enter Debug state.
dkato 0:f782d9c66c49 175 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
dkato 0:f782d9c66c49 176
dkato 0:f782d9c66c49 177 \param [in] value is ignored by the processor.
dkato 0:f782d9c66c49 178 If required, a debugger can use it to store additional information about the breakpoint.
dkato 0:f782d9c66c49 179 */
dkato 0:f782d9c66c49 180 #define __BKPT(value) __breakpoint(value)
dkato 0:f782d9c66c49 181
dkato 0:f782d9c66c49 182
dkato 0:f782d9c66c49 183 /** \brief Reverse bit order of value
dkato 0:f782d9c66c49 184
dkato 0:f782d9c66c49 185 This function reverses the bit order of the given value.
dkato 0:f782d9c66c49 186
dkato 0:f782d9c66c49 187 \param [in] value Value to reverse
dkato 0:f782d9c66c49 188 \return Reversed value
dkato 0:f782d9c66c49 189 */
dkato 0:f782d9c66c49 190 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
dkato 0:f782d9c66c49 191 #define __RBIT __rbit
dkato 0:f782d9c66c49 192 #else
dkato 0:f782d9c66c49 193 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
dkato 0:f782d9c66c49 194 {
dkato 0:f782d9c66c49 195 uint32_t result;
dkato 0:f782d9c66c49 196 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
dkato 0:f782d9c66c49 197
dkato 0:f782d9c66c49 198 result = value; // r will be reversed bits of v; first get LSB of v
dkato 0:f782d9c66c49 199 for (value >>= 1; value; value >>= 1)
dkato 0:f782d9c66c49 200 {
dkato 0:f782d9c66c49 201 result <<= 1;
dkato 0:f782d9c66c49 202 result |= value & 1;
dkato 0:f782d9c66c49 203 s--;
dkato 0:f782d9c66c49 204 }
dkato 0:f782d9c66c49 205 result <<= s; // shift when v's highest bits are zero
dkato 0:f782d9c66c49 206 return(result);
dkato 0:f782d9c66c49 207 }
dkato 0:f782d9c66c49 208 #endif
dkato 0:f782d9c66c49 209
dkato 0:f782d9c66c49 210
dkato 0:f782d9c66c49 211 /** \brief Count leading zeros
dkato 0:f782d9c66c49 212
dkato 0:f782d9c66c49 213 This function counts the number of leading zeros of a data value.
dkato 0:f782d9c66c49 214
dkato 0:f782d9c66c49 215 \param [in] value Value to count the leading zeros
dkato 0:f782d9c66c49 216 \return number of leading zeros in value
dkato 0:f782d9c66c49 217 */
dkato 0:f782d9c66c49 218 #define __CLZ __clz
dkato 0:f782d9c66c49 219
dkato 0:f782d9c66c49 220
dkato 0:f782d9c66c49 221 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
dkato 0:f782d9c66c49 222
dkato 0:f782d9c66c49 223 /** \brief LDR Exclusive (8 bit)
dkato 0:f782d9c66c49 224
dkato 0:f782d9c66c49 225 This function executes a exclusive LDR instruction for 8 bit value.
dkato 0:f782d9c66c49 226
dkato 0:f782d9c66c49 227 \param [in] ptr Pointer to data
dkato 0:f782d9c66c49 228 \return value of type uint8_t at (*ptr)
dkato 0:f782d9c66c49 229 */
dkato 0:f782d9c66c49 230 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
dkato 0:f782d9c66c49 231
dkato 0:f782d9c66c49 232
dkato 0:f782d9c66c49 233 /** \brief LDR Exclusive (16 bit)
dkato 0:f782d9c66c49 234
dkato 0:f782d9c66c49 235 This function executes a exclusive LDR instruction for 16 bit values.
dkato 0:f782d9c66c49 236
dkato 0:f782d9c66c49 237 \param [in] ptr Pointer to data
dkato 0:f782d9c66c49 238 \return value of type uint16_t at (*ptr)
dkato 0:f782d9c66c49 239 */
dkato 0:f782d9c66c49 240 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
dkato 0:f782d9c66c49 241
dkato 0:f782d9c66c49 242
dkato 0:f782d9c66c49 243 /** \brief LDR Exclusive (32 bit)
dkato 0:f782d9c66c49 244
dkato 0:f782d9c66c49 245 This function executes a exclusive LDR instruction for 32 bit values.
dkato 0:f782d9c66c49 246
dkato 0:f782d9c66c49 247 \param [in] ptr Pointer to data
dkato 0:f782d9c66c49 248 \return value of type uint32_t at (*ptr)
dkato 0:f782d9c66c49 249 */
dkato 0:f782d9c66c49 250 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
dkato 0:f782d9c66c49 251
dkato 0:f782d9c66c49 252
dkato 0:f782d9c66c49 253 /** \brief STR Exclusive (8 bit)
dkato 0:f782d9c66c49 254
dkato 0:f782d9c66c49 255 This function executes a exclusive STR instruction for 8 bit values.
dkato 0:f782d9c66c49 256
dkato 0:f782d9c66c49 257 \param [in] value Value to store
dkato 0:f782d9c66c49 258 \param [in] ptr Pointer to location
dkato 0:f782d9c66c49 259 \return 0 Function succeeded
dkato 0:f782d9c66c49 260 \return 1 Function failed
dkato 0:f782d9c66c49 261 */
dkato 0:f782d9c66c49 262 #define __STREXB(value, ptr) __strex(value, ptr)
dkato 0:f782d9c66c49 263
dkato 0:f782d9c66c49 264
dkato 0:f782d9c66c49 265 /** \brief STR Exclusive (16 bit)
dkato 0:f782d9c66c49 266
dkato 0:f782d9c66c49 267 This function executes a exclusive STR instruction for 16 bit values.
dkato 0:f782d9c66c49 268
dkato 0:f782d9c66c49 269 \param [in] value Value to store
dkato 0:f782d9c66c49 270 \param [in] ptr Pointer to location
dkato 0:f782d9c66c49 271 \return 0 Function succeeded
dkato 0:f782d9c66c49 272 \return 1 Function failed
dkato 0:f782d9c66c49 273 */
dkato 0:f782d9c66c49 274 #define __STREXH(value, ptr) __strex(value, ptr)
dkato 0:f782d9c66c49 275
dkato 0:f782d9c66c49 276
dkato 0:f782d9c66c49 277 /** \brief STR Exclusive (32 bit)
dkato 0:f782d9c66c49 278
dkato 0:f782d9c66c49 279 This function executes a exclusive STR instruction for 32 bit values.
dkato 0:f782d9c66c49 280
dkato 0:f782d9c66c49 281 \param [in] value Value to store
dkato 0:f782d9c66c49 282 \param [in] ptr Pointer to location
dkato 0:f782d9c66c49 283 \return 0 Function succeeded
dkato 0:f782d9c66c49 284 \return 1 Function failed
dkato 0:f782d9c66c49 285 */
dkato 0:f782d9c66c49 286 #define __STREXW(value, ptr) __strex(value, ptr)
dkato 0:f782d9c66c49 287
dkato 0:f782d9c66c49 288
dkato 0:f782d9c66c49 289 /** \brief Remove the exclusive lock
dkato 0:f782d9c66c49 290
dkato 0:f782d9c66c49 291 This function removes the exclusive lock which is created by LDREX.
dkato 0:f782d9c66c49 292
dkato 0:f782d9c66c49 293 */
dkato 0:f782d9c66c49 294 #define __CLREX __clrex
dkato 0:f782d9c66c49 295
dkato 0:f782d9c66c49 296
dkato 0:f782d9c66c49 297 /** \brief Signed Saturate
dkato 0:f782d9c66c49 298
dkato 0:f782d9c66c49 299 This function saturates a signed value.
dkato 0:f782d9c66c49 300
dkato 0:f782d9c66c49 301 \param [in] value Value to be saturated
dkato 0:f782d9c66c49 302 \param [in] sat Bit position to saturate to (1..32)
dkato 0:f782d9c66c49 303 \return Saturated value
dkato 0:f782d9c66c49 304 */
dkato 0:f782d9c66c49 305 #define __SSAT __ssat
dkato 0:f782d9c66c49 306
dkato 0:f782d9c66c49 307
dkato 0:f782d9c66c49 308 /** \brief Unsigned Saturate
dkato 0:f782d9c66c49 309
dkato 0:f782d9c66c49 310 This function saturates an unsigned value.
dkato 0:f782d9c66c49 311
dkato 0:f782d9c66c49 312 \param [in] value Value to be saturated
dkato 0:f782d9c66c49 313 \param [in] sat Bit position to saturate to (0..31)
dkato 0:f782d9c66c49 314 \return Saturated value
dkato 0:f782d9c66c49 315 */
dkato 0:f782d9c66c49 316 #define __USAT __usat
dkato 0:f782d9c66c49 317
dkato 0:f782d9c66c49 318
dkato 0:f782d9c66c49 319 /** \brief Rotate Right with Extend (32 bit)
dkato 0:f782d9c66c49 320
dkato 0:f782d9c66c49 321 This function moves each bit of a bitstring right by one bit.
dkato 0:f782d9c66c49 322 The carry input is shifted in at the left end of the bitstring.
dkato 0:f782d9c66c49 323
dkato 0:f782d9c66c49 324 \param [in] value Value to rotate
dkato 0:f782d9c66c49 325 \return Rotated value
dkato 0:f782d9c66c49 326 */
dkato 0:f782d9c66c49 327 #ifndef __NO_EMBEDDED_ASM
dkato 0:f782d9c66c49 328 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
dkato 0:f782d9c66c49 329 {
dkato 0:f782d9c66c49 330 rrx r0, r0
dkato 0:f782d9c66c49 331 bx lr
dkato 0:f782d9c66c49 332 }
dkato 0:f782d9c66c49 333 #endif
dkato 0:f782d9c66c49 334
dkato 0:f782d9c66c49 335
dkato 0:f782d9c66c49 336 /** \brief LDRT Unprivileged (8 bit)
dkato 0:f782d9c66c49 337
dkato 0:f782d9c66c49 338 This function executes a Unprivileged LDRT instruction for 8 bit value.
dkato 0:f782d9c66c49 339
dkato 0:f782d9c66c49 340 \param [in] ptr Pointer to data
dkato 0:f782d9c66c49 341 \return value of type uint8_t at (*ptr)
dkato 0:f782d9c66c49 342 */
dkato 0:f782d9c66c49 343 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
dkato 0:f782d9c66c49 344
dkato 0:f782d9c66c49 345
dkato 0:f782d9c66c49 346 /** \brief LDRT Unprivileged (16 bit)
dkato 0:f782d9c66c49 347
dkato 0:f782d9c66c49 348 This function executes a Unprivileged LDRT instruction for 16 bit values.
dkato 0:f782d9c66c49 349
dkato 0:f782d9c66c49 350 \param [in] ptr Pointer to data
dkato 0:f782d9c66c49 351 \return value of type uint16_t at (*ptr)
dkato 0:f782d9c66c49 352 */
dkato 0:f782d9c66c49 353 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
dkato 0:f782d9c66c49 354
dkato 0:f782d9c66c49 355
dkato 0:f782d9c66c49 356 /** \brief LDRT Unprivileged (32 bit)
dkato 0:f782d9c66c49 357
dkato 0:f782d9c66c49 358 This function executes a Unprivileged LDRT instruction for 32 bit values.
dkato 0:f782d9c66c49 359
dkato 0:f782d9c66c49 360 \param [in] ptr Pointer to data
dkato 0:f782d9c66c49 361 \return value of type uint32_t at (*ptr)
dkato 0:f782d9c66c49 362 */
dkato 0:f782d9c66c49 363 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
dkato 0:f782d9c66c49 364
dkato 0:f782d9c66c49 365
dkato 0:f782d9c66c49 366 /** \brief STRT Unprivileged (8 bit)
dkato 0:f782d9c66c49 367
dkato 0:f782d9c66c49 368 This function executes a Unprivileged STRT instruction for 8 bit values.
dkato 0:f782d9c66c49 369
dkato 0:f782d9c66c49 370 \param [in] value Value to store
dkato 0:f782d9c66c49 371 \param [in] ptr Pointer to location
dkato 0:f782d9c66c49 372 */
dkato 0:f782d9c66c49 373 #define __STRBT(value, ptr) __strt(value, ptr)
dkato 0:f782d9c66c49 374
dkato 0:f782d9c66c49 375
dkato 0:f782d9c66c49 376 /** \brief STRT Unprivileged (16 bit)
dkato 0:f782d9c66c49 377
dkato 0:f782d9c66c49 378 This function executes a Unprivileged STRT instruction for 16 bit values.
dkato 0:f782d9c66c49 379
dkato 0:f782d9c66c49 380 \param [in] value Value to store
dkato 0:f782d9c66c49 381 \param [in] ptr Pointer to location
dkato 0:f782d9c66c49 382 */
dkato 0:f782d9c66c49 383 #define __STRHT(value, ptr) __strt(value, ptr)
dkato 0:f782d9c66c49 384
dkato 0:f782d9c66c49 385
dkato 0:f782d9c66c49 386 /** \brief STRT Unprivileged (32 bit)
dkato 0:f782d9c66c49 387
dkato 0:f782d9c66c49 388 This function executes a Unprivileged STRT instruction for 32 bit values.
dkato 0:f782d9c66c49 389
dkato 0:f782d9c66c49 390 \param [in] value Value to store
dkato 0:f782d9c66c49 391 \param [in] ptr Pointer to location
dkato 0:f782d9c66c49 392 */
dkato 0:f782d9c66c49 393 #define __STRT(value, ptr) __strt(value, ptr)
dkato 0:f782d9c66c49 394
dkato 0:f782d9c66c49 395 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
dkato 0:f782d9c66c49 396
dkato 0:f782d9c66c49 397
dkato 0:f782d9c66c49 398 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
dkato 0:f782d9c66c49 399 /* GNU gcc specific functions */
dkato 0:f782d9c66c49 400
dkato 0:f782d9c66c49 401 /* Define macros for porting to both thumb1 and thumb2.
dkato 0:f782d9c66c49 402 * For thumb1, use low register (r0-r7), specified by constrant "l"
dkato 0:f782d9c66c49 403 * Otherwise, use general registers, specified by constrant "r" */
dkato 0:f782d9c66c49 404 #if defined (__thumb__) && !defined (__thumb2__)
dkato 0:f782d9c66c49 405 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
dkato 0:f782d9c66c49 406 #define __CMSIS_GCC_USE_REG(r) "l" (r)
dkato 0:f782d9c66c49 407 #else
dkato 0:f782d9c66c49 408 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
dkato 0:f782d9c66c49 409 #define __CMSIS_GCC_USE_REG(r) "r" (r)
dkato 0:f782d9c66c49 410 #endif
dkato 0:f782d9c66c49 411
dkato 0:f782d9c66c49 412 /** \brief No Operation
dkato 0:f782d9c66c49 413
dkato 0:f782d9c66c49 414 No Operation does nothing. This instruction can be used for code alignment purposes.
dkato 0:f782d9c66c49 415 */
dkato 0:f782d9c66c49 416 __attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
dkato 0:f782d9c66c49 417 {
dkato 0:f782d9c66c49 418 __ASM volatile ("nop");
dkato 0:f782d9c66c49 419 }
dkato 0:f782d9c66c49 420
dkato 0:f782d9c66c49 421
dkato 0:f782d9c66c49 422 /** \brief Wait For Interrupt
dkato 0:f782d9c66c49 423
dkato 0:f782d9c66c49 424 Wait For Interrupt is a hint instruction that suspends execution
dkato 0:f782d9c66c49 425 until one of a number of events occurs.
dkato 0:f782d9c66c49 426 */
dkato 0:f782d9c66c49 427 __attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
dkato 0:f782d9c66c49 428 {
dkato 0:f782d9c66c49 429 __ASM volatile ("wfi");
dkato 0:f782d9c66c49 430 }
dkato 0:f782d9c66c49 431
dkato 0:f782d9c66c49 432
dkato 0:f782d9c66c49 433 /** \brief Wait For Event
dkato 0:f782d9c66c49 434
dkato 0:f782d9c66c49 435 Wait For Event is a hint instruction that permits the processor to enter
dkato 0:f782d9c66c49 436 a low-power state until one of a number of events occurs.
dkato 0:f782d9c66c49 437 */
dkato 0:f782d9c66c49 438 __attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
dkato 0:f782d9c66c49 439 {
dkato 0:f782d9c66c49 440 __ASM volatile ("wfe");
dkato 0:f782d9c66c49 441 }
dkato 0:f782d9c66c49 442
dkato 0:f782d9c66c49 443
dkato 0:f782d9c66c49 444 /** \brief Send Event
dkato 0:f782d9c66c49 445
dkato 0:f782d9c66c49 446 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
dkato 0:f782d9c66c49 447 */
dkato 0:f782d9c66c49 448 __attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
dkato 0:f782d9c66c49 449 {
dkato 0:f782d9c66c49 450 __ASM volatile ("sev");
dkato 0:f782d9c66c49 451 }
dkato 0:f782d9c66c49 452
dkato 0:f782d9c66c49 453
dkato 0:f782d9c66c49 454 /** \brief Instruction Synchronization Barrier
dkato 0:f782d9c66c49 455
dkato 0:f782d9c66c49 456 Instruction Synchronization Barrier flushes the pipeline in the processor,
dkato 0:f782d9c66c49 457 so that all instructions following the ISB are fetched from cache or
dkato 0:f782d9c66c49 458 memory, after the instruction has been completed.
dkato 0:f782d9c66c49 459 */
dkato 0:f782d9c66c49 460 __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
dkato 0:f782d9c66c49 461 {
dkato 0:f782d9c66c49 462 __ASM volatile ("isb 0xF":::"memory");
dkato 0:f782d9c66c49 463 }
dkato 0:f782d9c66c49 464
dkato 0:f782d9c66c49 465
dkato 0:f782d9c66c49 466 /** \brief Data Synchronization Barrier
dkato 0:f782d9c66c49 467
dkato 0:f782d9c66c49 468 This function acts as a special kind of Data Memory Barrier.
dkato 0:f782d9c66c49 469 It completes when all explicit memory accesses before this instruction complete.
dkato 0:f782d9c66c49 470 */
dkato 0:f782d9c66c49 471 __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
dkato 0:f782d9c66c49 472 {
dkato 0:f782d9c66c49 473 __ASM volatile ("dsb 0xF":::"memory");
dkato 0:f782d9c66c49 474 }
dkato 0:f782d9c66c49 475
dkato 0:f782d9c66c49 476
dkato 0:f782d9c66c49 477 /** \brief Data Memory Barrier
dkato 0:f782d9c66c49 478
dkato 0:f782d9c66c49 479 This function ensures the apparent order of the explicit memory operations before
dkato 0:f782d9c66c49 480 and after the instruction, without ensuring their completion.
dkato 0:f782d9c66c49 481 */
dkato 0:f782d9c66c49 482 __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
dkato 0:f782d9c66c49 483 {
dkato 0:f782d9c66c49 484 __ASM volatile ("dmb 0xF":::"memory");
dkato 0:f782d9c66c49 485 }
dkato 0:f782d9c66c49 486
dkato 0:f782d9c66c49 487
dkato 0:f782d9c66c49 488 /** \brief Reverse byte order (32 bit)
dkato 0:f782d9c66c49 489
dkato 0:f782d9c66c49 490 This function reverses the byte order in integer value.
dkato 0:f782d9c66c49 491
dkato 0:f782d9c66c49 492 \param [in] value Value to reverse
dkato 0:f782d9c66c49 493 \return Reversed value
dkato 0:f782d9c66c49 494 */
dkato 0:f782d9c66c49 495 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
dkato 0:f782d9c66c49 496 {
dkato 0:f782d9c66c49 497 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
dkato 0:f782d9c66c49 498 return __builtin_bswap32(value);
dkato 0:f782d9c66c49 499 #else
dkato 0:f782d9c66c49 500 uint32_t result;
dkato 0:f782d9c66c49 501
dkato 0:f782d9c66c49 502 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
dkato 0:f782d9c66c49 503 return(result);
dkato 0:f782d9c66c49 504 #endif
dkato 0:f782d9c66c49 505 }
dkato 0:f782d9c66c49 506
dkato 0:f782d9c66c49 507
dkato 0:f782d9c66c49 508 /** \brief Reverse byte order (16 bit)
dkato 0:f782d9c66c49 509
dkato 0:f782d9c66c49 510 This function reverses the byte order in two unsigned short values.
dkato 0:f782d9c66c49 511
dkato 0:f782d9c66c49 512 \param [in] value Value to reverse
dkato 0:f782d9c66c49 513 \return Reversed value
dkato 0:f782d9c66c49 514 */
dkato 0:f782d9c66c49 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
dkato 0:f782d9c66c49 516 {
dkato 0:f782d9c66c49 517 uint32_t result;
dkato 0:f782d9c66c49 518
dkato 0:f782d9c66c49 519 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
dkato 0:f782d9c66c49 520 return(result);
dkato 0:f782d9c66c49 521 }
dkato 0:f782d9c66c49 522
dkato 0:f782d9c66c49 523
dkato 0:f782d9c66c49 524 /** \brief Reverse byte order in signed short value
dkato 0:f782d9c66c49 525
dkato 0:f782d9c66c49 526 This function reverses the byte order in a signed short value with sign extension to integer.
dkato 0:f782d9c66c49 527
dkato 0:f782d9c66c49 528 \param [in] value Value to reverse
dkato 0:f782d9c66c49 529 \return Reversed value
dkato 0:f782d9c66c49 530 */
dkato 0:f782d9c66c49 531 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
dkato 0:f782d9c66c49 532 {
dkato 0:f782d9c66c49 533 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
dkato 0:f782d9c66c49 534 return (short)__builtin_bswap16(value);
dkato 0:f782d9c66c49 535 #else
dkato 0:f782d9c66c49 536 uint32_t result;
dkato 0:f782d9c66c49 537
dkato 0:f782d9c66c49 538 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
dkato 0:f782d9c66c49 539 return(result);
dkato 0:f782d9c66c49 540 #endif
dkato 0:f782d9c66c49 541 }
dkato 0:f782d9c66c49 542
dkato 0:f782d9c66c49 543
dkato 0:f782d9c66c49 544 /** \brief Rotate Right in unsigned value (32 bit)
dkato 0:f782d9c66c49 545
dkato 0:f782d9c66c49 546 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
dkato 0:f782d9c66c49 547
dkato 0:f782d9c66c49 548 \param [in] value Value to rotate
dkato 0:f782d9c66c49 549 \param [in] value Number of Bits to rotate
dkato 0:f782d9c66c49 550 \return Rotated value
dkato 0:f782d9c66c49 551 */
dkato 0:f782d9c66c49 552 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 553 {
dkato 0:f782d9c66c49 554 return (op1 >> op2) | (op1 << (32 - op2));
dkato 0:f782d9c66c49 555 }
dkato 0:f782d9c66c49 556
dkato 0:f782d9c66c49 557
dkato 0:f782d9c66c49 558 /** \brief Breakpoint
dkato 0:f782d9c66c49 559
dkato 0:f782d9c66c49 560 This function causes the processor to enter Debug state.
dkato 0:f782d9c66c49 561 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
dkato 0:f782d9c66c49 562
dkato 0:f782d9c66c49 563 \param [in] value is ignored by the processor.
dkato 0:f782d9c66c49 564 If required, a debugger can use it to store additional information about the breakpoint.
dkato 0:f782d9c66c49 565 */
dkato 0:f782d9c66c49 566 #define __BKPT(value) __ASM volatile ("bkpt "#value)
dkato 0:f782d9c66c49 567
dkato 0:f782d9c66c49 568
dkato 0:f782d9c66c49 569 /** \brief Reverse bit order of value
dkato 0:f782d9c66c49 570
dkato 0:f782d9c66c49 571 This function reverses the bit order of the given value.
dkato 0:f782d9c66c49 572
dkato 0:f782d9c66c49 573 \param [in] value Value to reverse
dkato 0:f782d9c66c49 574 \return Reversed value
dkato 0:f782d9c66c49 575 */
dkato 0:f782d9c66c49 576 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
dkato 0:f782d9c66c49 577 {
dkato 0:f782d9c66c49 578 uint32_t result;
dkato 0:f782d9c66c49 579
dkato 0:f782d9c66c49 580 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
dkato 0:f782d9c66c49 581 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
dkato 0:f782d9c66c49 582 #else
dkato 0:f782d9c66c49 583 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
dkato 0:f782d9c66c49 584
dkato 0:f782d9c66c49 585 result = value; // r will be reversed bits of v; first get LSB of v
dkato 0:f782d9c66c49 586 for (value >>= 1; value; value >>= 1)
dkato 0:f782d9c66c49 587 {
dkato 0:f782d9c66c49 588 result <<= 1;
dkato 0:f782d9c66c49 589 result |= value & 1;
dkato 0:f782d9c66c49 590 s--;
dkato 0:f782d9c66c49 591 }
dkato 0:f782d9c66c49 592 result <<= s; // shift when v's highest bits are zero
dkato 0:f782d9c66c49 593 #endif
dkato 0:f782d9c66c49 594 return(result);
dkato 0:f782d9c66c49 595 }
dkato 0:f782d9c66c49 596
dkato 0:f782d9c66c49 597
dkato 0:f782d9c66c49 598 /** \brief Count leading zeros
dkato 0:f782d9c66c49 599
dkato 0:f782d9c66c49 600 This function counts the number of leading zeros of a data value.
dkato 0:f782d9c66c49 601
dkato 0:f782d9c66c49 602 \param [in] value Value to count the leading zeros
dkato 0:f782d9c66c49 603 \return number of leading zeros in value
dkato 0:f782d9c66c49 604 */
dkato 0:f782d9c66c49 605 #define __CLZ __builtin_clz
dkato 0:f782d9c66c49 606
dkato 0:f782d9c66c49 607
dkato 0:f782d9c66c49 608 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
dkato 0:f782d9c66c49 609
dkato 0:f782d9c66c49 610 /** \brief LDR Exclusive (8 bit)
dkato 0:f782d9c66c49 611
dkato 0:f782d9c66c49 612 This function executes a exclusive LDR instruction for 8 bit value.
dkato 0:f782d9c66c49 613
dkato 0:f782d9c66c49 614 \param [in] ptr Pointer to data
dkato 0:f782d9c66c49 615 \return value of type uint8_t at (*ptr)
dkato 0:f782d9c66c49 616 */
dkato 0:f782d9c66c49 617 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
dkato 0:f782d9c66c49 618 {
dkato 0:f782d9c66c49 619 uint32_t result;
dkato 0:f782d9c66c49 620
dkato 0:f782d9c66c49 621 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
dkato 0:f782d9c66c49 622 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
dkato 0:f782d9c66c49 623 #else
dkato 0:f782d9c66c49 624 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
dkato 0:f782d9c66c49 625 accepted by assembler. So has to use following less efficient pattern.
dkato 0:f782d9c66c49 626 */
dkato 0:f782d9c66c49 627 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
dkato 0:f782d9c66c49 628 #endif
dkato 0:f782d9c66c49 629 return ((uint8_t) result); /* Add explicit type cast here */
dkato 0:f782d9c66c49 630 }
dkato 0:f782d9c66c49 631
dkato 0:f782d9c66c49 632
dkato 0:f782d9c66c49 633 /** \brief LDR Exclusive (16 bit)
dkato 0:f782d9c66c49 634
dkato 0:f782d9c66c49 635 This function executes a exclusive LDR instruction for 16 bit values.
dkato 0:f782d9c66c49 636
dkato 0:f782d9c66c49 637 \param [in] ptr Pointer to data
dkato 0:f782d9c66c49 638 \return value of type uint16_t at (*ptr)
dkato 0:f782d9c66c49 639 */
dkato 0:f782d9c66c49 640 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
dkato 0:f782d9c66c49 641 {
dkato 0:f782d9c66c49 642 uint32_t result;
dkato 0:f782d9c66c49 643
dkato 0:f782d9c66c49 644 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
dkato 0:f782d9c66c49 645 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
dkato 0:f782d9c66c49 646 #else
dkato 0:f782d9c66c49 647 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
dkato 0:f782d9c66c49 648 accepted by assembler. So has to use following less efficient pattern.
dkato 0:f782d9c66c49 649 */
dkato 0:f782d9c66c49 650 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
dkato 0:f782d9c66c49 651 #endif
dkato 0:f782d9c66c49 652 return ((uint16_t) result); /* Add explicit type cast here */
dkato 0:f782d9c66c49 653 }
dkato 0:f782d9c66c49 654
dkato 0:f782d9c66c49 655
dkato 0:f782d9c66c49 656 /** \brief LDR Exclusive (32 bit)
dkato 0:f782d9c66c49 657
dkato 0:f782d9c66c49 658 This function executes a exclusive LDR instruction for 32 bit values.
dkato 0:f782d9c66c49 659
dkato 0:f782d9c66c49 660 \param [in] ptr Pointer to data
dkato 0:f782d9c66c49 661 \return value of type uint32_t at (*ptr)
dkato 0:f782d9c66c49 662 */
dkato 0:f782d9c66c49 663 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
dkato 0:f782d9c66c49 664 {
dkato 0:f782d9c66c49 665 uint32_t result;
dkato 0:f782d9c66c49 666
dkato 0:f782d9c66c49 667 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
dkato 0:f782d9c66c49 668 return(result);
dkato 0:f782d9c66c49 669 }
dkato 0:f782d9c66c49 670
dkato 0:f782d9c66c49 671
dkato 0:f782d9c66c49 672 /** \brief STR Exclusive (8 bit)
dkato 0:f782d9c66c49 673
dkato 0:f782d9c66c49 674 This function executes a exclusive STR instruction for 8 bit values.
dkato 0:f782d9c66c49 675
dkato 0:f782d9c66c49 676 \param [in] value Value to store
dkato 0:f782d9c66c49 677 \param [in] ptr Pointer to location
dkato 0:f782d9c66c49 678 \return 0 Function succeeded
dkato 0:f782d9c66c49 679 \return 1 Function failed
dkato 0:f782d9c66c49 680 */
dkato 0:f782d9c66c49 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
dkato 0:f782d9c66c49 682 {
dkato 0:f782d9c66c49 683 uint32_t result;
dkato 0:f782d9c66c49 684
dkato 0:f782d9c66c49 685 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
dkato 0:f782d9c66c49 686 return(result);
dkato 0:f782d9c66c49 687 }
dkato 0:f782d9c66c49 688
dkato 0:f782d9c66c49 689
dkato 0:f782d9c66c49 690 /** \brief STR Exclusive (16 bit)
dkato 0:f782d9c66c49 691
dkato 0:f782d9c66c49 692 This function executes a exclusive STR instruction for 16 bit values.
dkato 0:f782d9c66c49 693
dkato 0:f782d9c66c49 694 \param [in] value Value to store
dkato 0:f782d9c66c49 695 \param [in] ptr Pointer to location
dkato 0:f782d9c66c49 696 \return 0 Function succeeded
dkato 0:f782d9c66c49 697 \return 1 Function failed
dkato 0:f782d9c66c49 698 */
dkato 0:f782d9c66c49 699 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
dkato 0:f782d9c66c49 700 {
dkato 0:f782d9c66c49 701 uint32_t result;
dkato 0:f782d9c66c49 702
dkato 0:f782d9c66c49 703 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
dkato 0:f782d9c66c49 704 return(result);
dkato 0:f782d9c66c49 705 }
dkato 0:f782d9c66c49 706
dkato 0:f782d9c66c49 707
dkato 0:f782d9c66c49 708 /** \brief STR Exclusive (32 bit)
dkato 0:f782d9c66c49 709
dkato 0:f782d9c66c49 710 This function executes a exclusive STR instruction for 32 bit values.
dkato 0:f782d9c66c49 711
dkato 0:f782d9c66c49 712 \param [in] value Value to store
dkato 0:f782d9c66c49 713 \param [in] ptr Pointer to location
dkato 0:f782d9c66c49 714 \return 0 Function succeeded
dkato 0:f782d9c66c49 715 \return 1 Function failed
dkato 0:f782d9c66c49 716 */
dkato 0:f782d9c66c49 717 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
dkato 0:f782d9c66c49 718 {
dkato 0:f782d9c66c49 719 uint32_t result;
dkato 0:f782d9c66c49 720
dkato 0:f782d9c66c49 721 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
dkato 0:f782d9c66c49 722 return(result);
dkato 0:f782d9c66c49 723 }
dkato 0:f782d9c66c49 724
dkato 0:f782d9c66c49 725
dkato 0:f782d9c66c49 726 /** \brief Remove the exclusive lock
dkato 0:f782d9c66c49 727
dkato 0:f782d9c66c49 728 This function removes the exclusive lock which is created by LDREX.
dkato 0:f782d9c66c49 729
dkato 0:f782d9c66c49 730 */
dkato 0:f782d9c66c49 731 __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
dkato 0:f782d9c66c49 732 {
dkato 0:f782d9c66c49 733 __ASM volatile ("clrex" ::: "memory");
dkato 0:f782d9c66c49 734 }
dkato 0:f782d9c66c49 735
dkato 0:f782d9c66c49 736
dkato 0:f782d9c66c49 737 /** \brief Signed Saturate
dkato 0:f782d9c66c49 738
dkato 0:f782d9c66c49 739 This function saturates a signed value.
dkato 0:f782d9c66c49 740
dkato 0:f782d9c66c49 741 \param [in] value Value to be saturated
dkato 0:f782d9c66c49 742 \param [in] sat Bit position to saturate to (1..32)
dkato 0:f782d9c66c49 743 \return Saturated value
dkato 0:f782d9c66c49 744 */
dkato 0:f782d9c66c49 745 #define __SSAT(ARG1,ARG2) \
dkato 0:f782d9c66c49 746 ({ \
dkato 0:f782d9c66c49 747 uint32_t __RES, __ARG1 = (ARG1); \
dkato 0:f782d9c66c49 748 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
dkato 0:f782d9c66c49 749 __RES; \
dkato 0:f782d9c66c49 750 })
dkato 0:f782d9c66c49 751
dkato 0:f782d9c66c49 752
dkato 0:f782d9c66c49 753 /** \brief Unsigned Saturate
dkato 0:f782d9c66c49 754
dkato 0:f782d9c66c49 755 This function saturates an unsigned value.
dkato 0:f782d9c66c49 756
dkato 0:f782d9c66c49 757 \param [in] value Value to be saturated
dkato 0:f782d9c66c49 758 \param [in] sat Bit position to saturate to (0..31)
dkato 0:f782d9c66c49 759 \return Saturated value
dkato 0:f782d9c66c49 760 */
dkato 0:f782d9c66c49 761 #define __USAT(ARG1,ARG2) \
dkato 0:f782d9c66c49 762 ({ \
dkato 0:f782d9c66c49 763 uint32_t __RES, __ARG1 = (ARG1); \
dkato 0:f782d9c66c49 764 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
dkato 0:f782d9c66c49 765 __RES; \
dkato 0:f782d9c66c49 766 })
dkato 0:f782d9c66c49 767
dkato 0:f782d9c66c49 768
dkato 0:f782d9c66c49 769 /** \brief Rotate Right with Extend (32 bit)
dkato 0:f782d9c66c49 770
dkato 0:f782d9c66c49 771 This function moves each bit of a bitstring right by one bit.
dkato 0:f782d9c66c49 772 The carry input is shifted in at the left end of the bitstring.
dkato 0:f782d9c66c49 773
dkato 0:f782d9c66c49 774 \param [in] value Value to rotate
dkato 0:f782d9c66c49 775 \return Rotated value
dkato 0:f782d9c66c49 776 */
dkato 0:f782d9c66c49 777 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
dkato 0:f782d9c66c49 778 {
dkato 0:f782d9c66c49 779 uint32_t result;
dkato 0:f782d9c66c49 780
dkato 0:f782d9c66c49 781 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
dkato 0:f782d9c66c49 782 return(result);
dkato 0:f782d9c66c49 783 }
dkato 0:f782d9c66c49 784
dkato 0:f782d9c66c49 785
dkato 0:f782d9c66c49 786 /** \brief LDRT Unprivileged (8 bit)
dkato 0:f782d9c66c49 787
dkato 0:f782d9c66c49 788 This function executes a Unprivileged LDRT instruction for 8 bit value.
dkato 0:f782d9c66c49 789
dkato 0:f782d9c66c49 790 \param [in] ptr Pointer to data
dkato 0:f782d9c66c49 791 \return value of type uint8_t at (*ptr)
dkato 0:f782d9c66c49 792 */
dkato 0:f782d9c66c49 793 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
dkato 0:f782d9c66c49 794 {
dkato 0:f782d9c66c49 795 uint32_t result;
dkato 0:f782d9c66c49 796
dkato 0:f782d9c66c49 797 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
dkato 0:f782d9c66c49 798 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
dkato 0:f782d9c66c49 799 #else
dkato 0:f782d9c66c49 800 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
dkato 0:f782d9c66c49 801 accepted by assembler. So has to use following less efficient pattern.
dkato 0:f782d9c66c49 802 */
dkato 0:f782d9c66c49 803 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
dkato 0:f782d9c66c49 804 #endif
dkato 0:f782d9c66c49 805 return ((uint8_t) result); /* Add explicit type cast here */
dkato 0:f782d9c66c49 806 }
dkato 0:f782d9c66c49 807
dkato 0:f782d9c66c49 808
dkato 0:f782d9c66c49 809 /** \brief LDRT Unprivileged (16 bit)
dkato 0:f782d9c66c49 810
dkato 0:f782d9c66c49 811 This function executes a Unprivileged LDRT instruction for 16 bit values.
dkato 0:f782d9c66c49 812
dkato 0:f782d9c66c49 813 \param [in] ptr Pointer to data
dkato 0:f782d9c66c49 814 \return value of type uint16_t at (*ptr)
dkato 0:f782d9c66c49 815 */
dkato 0:f782d9c66c49 816 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
dkato 0:f782d9c66c49 817 {
dkato 0:f782d9c66c49 818 uint32_t result;
dkato 0:f782d9c66c49 819
dkato 0:f782d9c66c49 820 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
dkato 0:f782d9c66c49 821 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
dkato 0:f782d9c66c49 822 #else
dkato 0:f782d9c66c49 823 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
dkato 0:f782d9c66c49 824 accepted by assembler. So has to use following less efficient pattern.
dkato 0:f782d9c66c49 825 */
dkato 0:f782d9c66c49 826 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
dkato 0:f782d9c66c49 827 #endif
dkato 0:f782d9c66c49 828 return ((uint16_t) result); /* Add explicit type cast here */
dkato 0:f782d9c66c49 829 }
dkato 0:f782d9c66c49 830
dkato 0:f782d9c66c49 831
dkato 0:f782d9c66c49 832 /** \brief LDRT Unprivileged (32 bit)
dkato 0:f782d9c66c49 833
dkato 0:f782d9c66c49 834 This function executes a Unprivileged LDRT instruction for 32 bit values.
dkato 0:f782d9c66c49 835
dkato 0:f782d9c66c49 836 \param [in] ptr Pointer to data
dkato 0:f782d9c66c49 837 \return value of type uint32_t at (*ptr)
dkato 0:f782d9c66c49 838 */
dkato 0:f782d9c66c49 839 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
dkato 0:f782d9c66c49 840 {
dkato 0:f782d9c66c49 841 uint32_t result;
dkato 0:f782d9c66c49 842
dkato 0:f782d9c66c49 843 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
dkato 0:f782d9c66c49 844 return(result);
dkato 0:f782d9c66c49 845 }
dkato 0:f782d9c66c49 846
dkato 0:f782d9c66c49 847
dkato 0:f782d9c66c49 848 /** \brief STRT Unprivileged (8 bit)
dkato 0:f782d9c66c49 849
dkato 0:f782d9c66c49 850 This function executes a Unprivileged STRT instruction for 8 bit values.
dkato 0:f782d9c66c49 851
dkato 0:f782d9c66c49 852 \param [in] value Value to store
dkato 0:f782d9c66c49 853 \param [in] ptr Pointer to location
dkato 0:f782d9c66c49 854 */
dkato 0:f782d9c66c49 855 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
dkato 0:f782d9c66c49 856 {
dkato 0:f782d9c66c49 857 __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
dkato 0:f782d9c66c49 858 }
dkato 0:f782d9c66c49 859
dkato 0:f782d9c66c49 860
dkato 0:f782d9c66c49 861 /** \brief STRT Unprivileged (16 bit)
dkato 0:f782d9c66c49 862
dkato 0:f782d9c66c49 863 This function executes a Unprivileged STRT instruction for 16 bit values.
dkato 0:f782d9c66c49 864
dkato 0:f782d9c66c49 865 \param [in] value Value to store
dkato 0:f782d9c66c49 866 \param [in] ptr Pointer to location
dkato 0:f782d9c66c49 867 */
dkato 0:f782d9c66c49 868 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
dkato 0:f782d9c66c49 869 {
dkato 0:f782d9c66c49 870 __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
dkato 0:f782d9c66c49 871 }
dkato 0:f782d9c66c49 872
dkato 0:f782d9c66c49 873
dkato 0:f782d9c66c49 874 /** \brief STRT Unprivileged (32 bit)
dkato 0:f782d9c66c49 875
dkato 0:f782d9c66c49 876 This function executes a Unprivileged STRT instruction for 32 bit values.
dkato 0:f782d9c66c49 877
dkato 0:f782d9c66c49 878 \param [in] value Value to store
dkato 0:f782d9c66c49 879 \param [in] ptr Pointer to location
dkato 0:f782d9c66c49 880 */
dkato 0:f782d9c66c49 881 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
dkato 0:f782d9c66c49 882 {
dkato 0:f782d9c66c49 883 __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
dkato 0:f782d9c66c49 884 }
dkato 0:f782d9c66c49 885
dkato 0:f782d9c66c49 886 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
dkato 0:f782d9c66c49 887
dkato 0:f782d9c66c49 888
dkato 0:f782d9c66c49 889 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
dkato 0:f782d9c66c49 890 /* IAR iccarm specific functions */
dkato 0:f782d9c66c49 891 #include <cmsis_iar.h>
dkato 0:f782d9c66c49 892
dkato 0:f782d9c66c49 893
dkato 0:f782d9c66c49 894 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
dkato 0:f782d9c66c49 895 /* TI CCS specific functions */
dkato 0:f782d9c66c49 896 #include <cmsis_ccs.h>
dkato 0:f782d9c66c49 897
dkato 0:f782d9c66c49 898
dkato 0:f782d9c66c49 899 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
dkato 0:f782d9c66c49 900 /* TASKING carm specific functions */
dkato 0:f782d9c66c49 901 /*
dkato 0:f782d9c66c49 902 * The CMSIS functions have been implemented as intrinsics in the compiler.
dkato 0:f782d9c66c49 903 * Please use "carm -?i" to get an up to date list of all intrinsics,
dkato 0:f782d9c66c49 904 * Including the CMSIS ones.
dkato 0:f782d9c66c49 905 */
dkato 0:f782d9c66c49 906
dkato 0:f782d9c66c49 907
dkato 0:f782d9c66c49 908 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
dkato 0:f782d9c66c49 909 /* Cosmic specific functions */
dkato 0:f782d9c66c49 910 #include <cmsis_csm.h>
dkato 0:f782d9c66c49 911
dkato 0:f782d9c66c49 912 #endif
dkato 0:f782d9c66c49 913
dkato 0:f782d9c66c49 914 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
dkato 0:f782d9c66c49 915
dkato 0:f782d9c66c49 916 #endif /* __CORE_CMINSTR_H */