Daiki Kato / mbed-os-lychee

mbed-os for GR-LYCHEE

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cmsis/core_cmFunc.h@0:f782d9c66c49, 2018-02-02 (annotated)

Committer:
dkato
Date:
Fri Feb 02 05:42:23 2018 +0000
Revision:
0:f782d9c66c49
mbed-os for GR-LYCHEE

Who changed what in which revision?

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dkato 0:f782d9c66c49 1 /**************************************************************************//**
dkato 0:f782d9c66c49 2 * @file core_cmFunc.h
dkato 0:f782d9c66c49 3 * @brief CMSIS Cortex-M Core Function Access Header File
dkato 0:f782d9c66c49 4 * @version V4.10
dkato 0:f782d9c66c49 5 * @date 18. March 2015
dkato 0:f782d9c66c49 6 *
dkato 0:f782d9c66c49 7 * @note
dkato 0:f782d9c66c49 8 *
dkato 0:f782d9c66c49 9 ******************************************************************************/
dkato 0:f782d9c66c49 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
dkato 0:f782d9c66c49 11
dkato 0:f782d9c66c49 12 All rights reserved.
dkato 0:f782d9c66c49 13 Redistribution and use in source and binary forms, with or without
dkato 0:f782d9c66c49 14 modification, are permitted provided that the following conditions are met:
dkato 0:f782d9c66c49 15 - Redistributions of source code must retain the above copyright
dkato 0:f782d9c66c49 16 notice, this list of conditions and the following disclaimer.
dkato 0:f782d9c66c49 17 - Redistributions in binary form must reproduce the above copyright
dkato 0:f782d9c66c49 18 notice, this list of conditions and the following disclaimer in the
dkato 0:f782d9c66c49 19 documentation and/or other materials provided with the distribution.
dkato 0:f782d9c66c49 20 - Neither the name of ARM nor the names of its contributors may be used
dkato 0:f782d9c66c49 21 to endorse or promote products derived from this software without
dkato 0:f782d9c66c49 22 specific prior written permission.
dkato 0:f782d9c66c49 23 *
dkato 0:f782d9c66c49 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
dkato 0:f782d9c66c49 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
dkato 0:f782d9c66c49 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
dkato 0:f782d9c66c49 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
dkato 0:f782d9c66c49 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
dkato 0:f782d9c66c49 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
dkato 0:f782d9c66c49 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
dkato 0:f782d9c66c49 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
dkato 0:f782d9c66c49 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
dkato 0:f782d9c66c49 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
dkato 0:f782d9c66c49 34 POSSIBILITY OF SUCH DAMAGE.
dkato 0:f782d9c66c49 35 ---------------------------------------------------------------------------*/
dkato 0:f782d9c66c49 36
dkato 0:f782d9c66c49 37
dkato 0:f782d9c66c49 38 #ifndef __CORE_CMFUNC_H
dkato 0:f782d9c66c49 39 #define __CORE_CMFUNC_H
dkato 0:f782d9c66c49 40
dkato 0:f782d9c66c49 41
dkato 0:f782d9c66c49 42 /* ########################### Core Function Access ########################### */
dkato 0:f782d9c66c49 43 /** \ingroup CMSIS_Core_FunctionInterface
dkato 0:f782d9c66c49 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
dkato 0:f782d9c66c49 45 @{
dkato 0:f782d9c66c49 46 */
dkato 0:f782d9c66c49 47
dkato 0:f782d9c66c49 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
dkato 0:f782d9c66c49 49 /* ARM armcc specific functions */
dkato 0:f782d9c66c49 50
dkato 0:f782d9c66c49 51 #if (__ARMCC_VERSION < 400677)
dkato 0:f782d9c66c49 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
dkato 0:f782d9c66c49 53 #endif
dkato 0:f782d9c66c49 54
dkato 0:f782d9c66c49 55 /* intrinsic void __enable_irq(); */
dkato 0:f782d9c66c49 56 /* intrinsic void __disable_irq(); */
dkato 0:f782d9c66c49 57
dkato 0:f782d9c66c49 58 /** \brief Get Control Register
dkato 0:f782d9c66c49 59
dkato 0:f782d9c66c49 60 This function returns the content of the Control Register.
dkato 0:f782d9c66c49 61
dkato 0:f782d9c66c49 62 \return Control Register value
dkato 0:f782d9c66c49 63 */
dkato 0:f782d9c66c49 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
dkato 0:f782d9c66c49 65 {
dkato 0:f782d9c66c49 66 register uint32_t __regControl __ASM("control");
dkato 0:f782d9c66c49 67 return(__regControl);
dkato 0:f782d9c66c49 68 }
dkato 0:f782d9c66c49 69
dkato 0:f782d9c66c49 70
dkato 0:f782d9c66c49 71 /** \brief Set Control Register
dkato 0:f782d9c66c49 72
dkato 0:f782d9c66c49 73 This function writes the given value to the Control Register.
dkato 0:f782d9c66c49 74
dkato 0:f782d9c66c49 75 \param [in] control Control Register value to set
dkato 0:f782d9c66c49 76 */
dkato 0:f782d9c66c49 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
dkato 0:f782d9c66c49 78 {
dkato 0:f782d9c66c49 79 register uint32_t __regControl __ASM("control");
dkato 0:f782d9c66c49 80 __regControl = control;
dkato 0:f782d9c66c49 81 }
dkato 0:f782d9c66c49 82
dkato 0:f782d9c66c49 83
dkato 0:f782d9c66c49 84 /** \brief Get IPSR Register
dkato 0:f782d9c66c49 85
dkato 0:f782d9c66c49 86 This function returns the content of the IPSR Register.
dkato 0:f782d9c66c49 87
dkato 0:f782d9c66c49 88 \return IPSR Register value
dkato 0:f782d9c66c49 89 */
dkato 0:f782d9c66c49 90 __STATIC_INLINE uint32_t __get_IPSR(void)
dkato 0:f782d9c66c49 91 {
dkato 0:f782d9c66c49 92 register uint32_t __regIPSR __ASM("ipsr");
dkato 0:f782d9c66c49 93 return(__regIPSR);
dkato 0:f782d9c66c49 94 }
dkato 0:f782d9c66c49 95
dkato 0:f782d9c66c49 96
dkato 0:f782d9c66c49 97 /** \brief Get APSR Register
dkato 0:f782d9c66c49 98
dkato 0:f782d9c66c49 99 This function returns the content of the APSR Register.
dkato 0:f782d9c66c49 100
dkato 0:f782d9c66c49 101 \return APSR Register value
dkato 0:f782d9c66c49 102 */
dkato 0:f782d9c66c49 103 __STATIC_INLINE uint32_t __get_APSR(void)
dkato 0:f782d9c66c49 104 {
dkato 0:f782d9c66c49 105 register uint32_t __regAPSR __ASM("apsr");
dkato 0:f782d9c66c49 106 return(__regAPSR);
dkato 0:f782d9c66c49 107 }
dkato 0:f782d9c66c49 108
dkato 0:f782d9c66c49 109
dkato 0:f782d9c66c49 110 /** \brief Get xPSR Register
dkato 0:f782d9c66c49 111
dkato 0:f782d9c66c49 112 This function returns the content of the xPSR Register.
dkato 0:f782d9c66c49 113
dkato 0:f782d9c66c49 114 \return xPSR Register value
dkato 0:f782d9c66c49 115 */
dkato 0:f782d9c66c49 116 __STATIC_INLINE uint32_t __get_xPSR(void)
dkato 0:f782d9c66c49 117 {
dkato 0:f782d9c66c49 118 register uint32_t __regXPSR __ASM("xpsr");
dkato 0:f782d9c66c49 119 return(__regXPSR);
dkato 0:f782d9c66c49 120 }
dkato 0:f782d9c66c49 121
dkato 0:f782d9c66c49 122
dkato 0:f782d9c66c49 123 /** \brief Get Process Stack Pointer
dkato 0:f782d9c66c49 124
dkato 0:f782d9c66c49 125 This function returns the current value of the Process Stack Pointer (PSP).
dkato 0:f782d9c66c49 126
dkato 0:f782d9c66c49 127 \return PSP Register value
dkato 0:f782d9c66c49 128 */
dkato 0:f782d9c66c49 129 __STATIC_INLINE uint32_t __get_PSP(void)
dkato 0:f782d9c66c49 130 {
dkato 0:f782d9c66c49 131 register uint32_t __regProcessStackPointer __ASM("psp");
dkato 0:f782d9c66c49 132 return(__regProcessStackPointer);
dkato 0:f782d9c66c49 133 }
dkato 0:f782d9c66c49 134
dkato 0:f782d9c66c49 135
dkato 0:f782d9c66c49 136 /** \brief Set Process Stack Pointer
dkato 0:f782d9c66c49 137
dkato 0:f782d9c66c49 138 This function assigns the given value to the Process Stack Pointer (PSP).
dkato 0:f782d9c66c49 139
dkato 0:f782d9c66c49 140 \param [in] topOfProcStack Process Stack Pointer value to set
dkato 0:f782d9c66c49 141 */
dkato 0:f782d9c66c49 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
dkato 0:f782d9c66c49 143 {
dkato 0:f782d9c66c49 144 register uint32_t __regProcessStackPointer __ASM("psp");
dkato 0:f782d9c66c49 145 __regProcessStackPointer = topOfProcStack;
dkato 0:f782d9c66c49 146 }
dkato 0:f782d9c66c49 147
dkato 0:f782d9c66c49 148
dkato 0:f782d9c66c49 149 /** \brief Get Main Stack Pointer
dkato 0:f782d9c66c49 150
dkato 0:f782d9c66c49 151 This function returns the current value of the Main Stack Pointer (MSP).
dkato 0:f782d9c66c49 152
dkato 0:f782d9c66c49 153 \return MSP Register value
dkato 0:f782d9c66c49 154 */
dkato 0:f782d9c66c49 155 __STATIC_INLINE uint32_t __get_MSP(void)
dkato 0:f782d9c66c49 156 {
dkato 0:f782d9c66c49 157 register uint32_t __regMainStackPointer __ASM("msp");
dkato 0:f782d9c66c49 158 return(__regMainStackPointer);
dkato 0:f782d9c66c49 159 }
dkato 0:f782d9c66c49 160
dkato 0:f782d9c66c49 161
dkato 0:f782d9c66c49 162 /** \brief Set Main Stack Pointer
dkato 0:f782d9c66c49 163
dkato 0:f782d9c66c49 164 This function assigns the given value to the Main Stack Pointer (MSP).
dkato 0:f782d9c66c49 165
dkato 0:f782d9c66c49 166 \param [in] topOfMainStack Main Stack Pointer value to set
dkato 0:f782d9c66c49 167 */
dkato 0:f782d9c66c49 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
dkato 0:f782d9c66c49 169 {
dkato 0:f782d9c66c49 170 register uint32_t __regMainStackPointer __ASM("msp");
dkato 0:f782d9c66c49 171 __regMainStackPointer = topOfMainStack;
dkato 0:f782d9c66c49 172 }
dkato 0:f782d9c66c49 173
dkato 0:f782d9c66c49 174
dkato 0:f782d9c66c49 175 /** \brief Get Priority Mask
dkato 0:f782d9c66c49 176
dkato 0:f782d9c66c49 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
dkato 0:f782d9c66c49 178
dkato 0:f782d9c66c49 179 \return Priority Mask value
dkato 0:f782d9c66c49 180 */
dkato 0:f782d9c66c49 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
dkato 0:f782d9c66c49 182 {
dkato 0:f782d9c66c49 183 register uint32_t __regPriMask __ASM("primask");
dkato 0:f782d9c66c49 184 return(__regPriMask);
dkato 0:f782d9c66c49 185 }
dkato 0:f782d9c66c49 186
dkato 0:f782d9c66c49 187
dkato 0:f782d9c66c49 188 /** \brief Set Priority Mask
dkato 0:f782d9c66c49 189
dkato 0:f782d9c66c49 190 This function assigns the given value to the Priority Mask Register.
dkato 0:f782d9c66c49 191
dkato 0:f782d9c66c49 192 \param [in] priMask Priority Mask
dkato 0:f782d9c66c49 193 */
dkato 0:f782d9c66c49 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
dkato 0:f782d9c66c49 195 {
dkato 0:f782d9c66c49 196 register uint32_t __regPriMask __ASM("primask");
dkato 0:f782d9c66c49 197 __regPriMask = (priMask);
dkato 0:f782d9c66c49 198 }
dkato 0:f782d9c66c49 199
dkato 0:f782d9c66c49 200
dkato 0:f782d9c66c49 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
dkato 0:f782d9c66c49 202
dkato 0:f782d9c66c49 203 /** \brief Enable FIQ
dkato 0:f782d9c66c49 204
dkato 0:f782d9c66c49 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
dkato 0:f782d9c66c49 206 Can only be executed in Privileged modes.
dkato 0:f782d9c66c49 207 */
dkato 0:f782d9c66c49 208 #define __enable_fault_irq __enable_fiq
dkato 0:f782d9c66c49 209
dkato 0:f782d9c66c49 210
dkato 0:f782d9c66c49 211 /** \brief Disable FIQ
dkato 0:f782d9c66c49 212
dkato 0:f782d9c66c49 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
dkato 0:f782d9c66c49 214 Can only be executed in Privileged modes.
dkato 0:f782d9c66c49 215 */
dkato 0:f782d9c66c49 216 #define __disable_fault_irq __disable_fiq
dkato 0:f782d9c66c49 217
dkato 0:f782d9c66c49 218
dkato 0:f782d9c66c49 219 /** \brief Get Base Priority
dkato 0:f782d9c66c49 220
dkato 0:f782d9c66c49 221 This function returns the current value of the Base Priority register.
dkato 0:f782d9c66c49 222
dkato 0:f782d9c66c49 223 \return Base Priority register value
dkato 0:f782d9c66c49 224 */
dkato 0:f782d9c66c49 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
dkato 0:f782d9c66c49 226 {
dkato 0:f782d9c66c49 227 register uint32_t __regBasePri __ASM("basepri");
dkato 0:f782d9c66c49 228 return(__regBasePri);
dkato 0:f782d9c66c49 229 }
dkato 0:f782d9c66c49 230
dkato 0:f782d9c66c49 231
dkato 0:f782d9c66c49 232 /** \brief Set Base Priority
dkato 0:f782d9c66c49 233
dkato 0:f782d9c66c49 234 This function assigns the given value to the Base Priority register.
dkato 0:f782d9c66c49 235
dkato 0:f782d9c66c49 236 \param [in] basePri Base Priority value to set
dkato 0:f782d9c66c49 237 */
dkato 0:f782d9c66c49 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
dkato 0:f782d9c66c49 239 {
dkato 0:f782d9c66c49 240 register uint32_t __regBasePri __ASM("basepri");
dkato 0:f782d9c66c49 241 __regBasePri = (basePri & 0xff);
dkato 0:f782d9c66c49 242 }
dkato 0:f782d9c66c49 243
dkato 0:f782d9c66c49 244
dkato 0:f782d9c66c49 245 /** \brief Set Base Priority with condition
dkato 0:f782d9c66c49 246
dkato 0:f782d9c66c49 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
dkato 0:f782d9c66c49 248 or the new value increases the BASEPRI priority level.
dkato 0:f782d9c66c49 249
dkato 0:f782d9c66c49 250 \param [in] basePri Base Priority value to set
dkato 0:f782d9c66c49 251 */
dkato 0:f782d9c66c49 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
dkato 0:f782d9c66c49 253 {
dkato 0:f782d9c66c49 254 register uint32_t __regBasePriMax __ASM("basepri_max");
dkato 0:f782d9c66c49 255 __regBasePriMax = (basePri & 0xff);
dkato 0:f782d9c66c49 256 }
dkato 0:f782d9c66c49 257
dkato 0:f782d9c66c49 258
dkato 0:f782d9c66c49 259 /** \brief Get Fault Mask
dkato 0:f782d9c66c49 260
dkato 0:f782d9c66c49 261 This function returns the current value of the Fault Mask register.
dkato 0:f782d9c66c49 262
dkato 0:f782d9c66c49 263 \return Fault Mask register value
dkato 0:f782d9c66c49 264 */
dkato 0:f782d9c66c49 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
dkato 0:f782d9c66c49 266 {
dkato 0:f782d9c66c49 267 register uint32_t __regFaultMask __ASM("faultmask");
dkato 0:f782d9c66c49 268 return(__regFaultMask);
dkato 0:f782d9c66c49 269 }
dkato 0:f782d9c66c49 270
dkato 0:f782d9c66c49 271
dkato 0:f782d9c66c49 272 /** \brief Set Fault Mask
dkato 0:f782d9c66c49 273
dkato 0:f782d9c66c49 274 This function assigns the given value to the Fault Mask register.
dkato 0:f782d9c66c49 275
dkato 0:f782d9c66c49 276 \param [in] faultMask Fault Mask value to set
dkato 0:f782d9c66c49 277 */
dkato 0:f782d9c66c49 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
dkato 0:f782d9c66c49 279 {
dkato 0:f782d9c66c49 280 register uint32_t __regFaultMask __ASM("faultmask");
dkato 0:f782d9c66c49 281 __regFaultMask = (faultMask & (uint32_t)1);
dkato 0:f782d9c66c49 282 }
dkato 0:f782d9c66c49 283
dkato 0:f782d9c66c49 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
dkato 0:f782d9c66c49 285
dkato 0:f782d9c66c49 286
dkato 0:f782d9c66c49 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
dkato 0:f782d9c66c49 288
dkato 0:f782d9c66c49 289 /** \brief Get FPSCR
dkato 0:f782d9c66c49 290
dkato 0:f782d9c66c49 291 This function returns the current value of the Floating Point Status/Control register.
dkato 0:f782d9c66c49 292
dkato 0:f782d9c66c49 293 \return Floating Point Status/Control register value
dkato 0:f782d9c66c49 294 */
dkato 0:f782d9c66c49 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
dkato 0:f782d9c66c49 296 {
dkato 0:f782d9c66c49 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
dkato 0:f782d9c66c49 298 register uint32_t __regfpscr __ASM("fpscr");
dkato 0:f782d9c66c49 299 return(__regfpscr);
dkato 0:f782d9c66c49 300 #else
dkato 0:f782d9c66c49 301 return(0);
dkato 0:f782d9c66c49 302 #endif
dkato 0:f782d9c66c49 303 }
dkato 0:f782d9c66c49 304
dkato 0:f782d9c66c49 305
dkato 0:f782d9c66c49 306 /** \brief Set FPSCR
dkato 0:f782d9c66c49 307
dkato 0:f782d9c66c49 308 This function assigns the given value to the Floating Point Status/Control register.
dkato 0:f782d9c66c49 309
dkato 0:f782d9c66c49 310 \param [in] fpscr Floating Point Status/Control value to set
dkato 0:f782d9c66c49 311 */
dkato 0:f782d9c66c49 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
dkato 0:f782d9c66c49 313 {
dkato 0:f782d9c66c49 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
dkato 0:f782d9c66c49 315 register uint32_t __regfpscr __ASM("fpscr");
dkato 0:f782d9c66c49 316 __regfpscr = (fpscr);
dkato 0:f782d9c66c49 317 #endif
dkato 0:f782d9c66c49 318 }
dkato 0:f782d9c66c49 319
dkato 0:f782d9c66c49 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
dkato 0:f782d9c66c49 321
dkato 0:f782d9c66c49 322
dkato 0:f782d9c66c49 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
dkato 0:f782d9c66c49 324 /* GNU gcc specific functions */
dkato 0:f782d9c66c49 325
dkato 0:f782d9c66c49 326 /** \brief Enable IRQ Interrupts
dkato 0:f782d9c66c49 327
dkato 0:f782d9c66c49 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
dkato 0:f782d9c66c49 329 Can only be executed in Privileged modes.
dkato 0:f782d9c66c49 330 */
dkato 0:f782d9c66c49 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
dkato 0:f782d9c66c49 332 {
dkato 0:f782d9c66c49 333 __ASM volatile ("cpsie i" : : : "memory");
dkato 0:f782d9c66c49 334 }
dkato 0:f782d9c66c49 335
dkato 0:f782d9c66c49 336
dkato 0:f782d9c66c49 337 /** \brief Disable IRQ Interrupts
dkato 0:f782d9c66c49 338
dkato 0:f782d9c66c49 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
dkato 0:f782d9c66c49 340 Can only be executed in Privileged modes.
dkato 0:f782d9c66c49 341 */
dkato 0:f782d9c66c49 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
dkato 0:f782d9c66c49 343 {
dkato 0:f782d9c66c49 344 __ASM volatile ("cpsid i" : : : "memory");
dkato 0:f782d9c66c49 345 }
dkato 0:f782d9c66c49 346
dkato 0:f782d9c66c49 347
dkato 0:f782d9c66c49 348 /** \brief Get Control Register
dkato 0:f782d9c66c49 349
dkato 0:f782d9c66c49 350 This function returns the content of the Control Register.
dkato 0:f782d9c66c49 351
dkato 0:f782d9c66c49 352 \return Control Register value
dkato 0:f782d9c66c49 353 */
dkato 0:f782d9c66c49 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
dkato 0:f782d9c66c49 355 {
dkato 0:f782d9c66c49 356 uint32_t result;
dkato 0:f782d9c66c49 357
dkato 0:f782d9c66c49 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
dkato 0:f782d9c66c49 359 return(result);
dkato 0:f782d9c66c49 360 }
dkato 0:f782d9c66c49 361
dkato 0:f782d9c66c49 362
dkato 0:f782d9c66c49 363 /** \brief Set Control Register
dkato 0:f782d9c66c49 364
dkato 0:f782d9c66c49 365 This function writes the given value to the Control Register.
dkato 0:f782d9c66c49 366
dkato 0:f782d9c66c49 367 \param [in] control Control Register value to set
dkato 0:f782d9c66c49 368 */
dkato 0:f782d9c66c49 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
dkato 0:f782d9c66c49 370 {
dkato 0:f782d9c66c49 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
dkato 0:f782d9c66c49 372 }
dkato 0:f782d9c66c49 373
dkato 0:f782d9c66c49 374
dkato 0:f782d9c66c49 375 /** \brief Get IPSR Register
dkato 0:f782d9c66c49 376
dkato 0:f782d9c66c49 377 This function returns the content of the IPSR Register.
dkato 0:f782d9c66c49 378
dkato 0:f782d9c66c49 379 \return IPSR Register value
dkato 0:f782d9c66c49 380 */
dkato 0:f782d9c66c49 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
dkato 0:f782d9c66c49 382 {
dkato 0:f782d9c66c49 383 uint32_t result;
dkato 0:f782d9c66c49 384
dkato 0:f782d9c66c49 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
dkato 0:f782d9c66c49 386 return(result);
dkato 0:f782d9c66c49 387 }
dkato 0:f782d9c66c49 388
dkato 0:f782d9c66c49 389
dkato 0:f782d9c66c49 390 /** \brief Get APSR Register
dkato 0:f782d9c66c49 391
dkato 0:f782d9c66c49 392 This function returns the content of the APSR Register.
dkato 0:f782d9c66c49 393
dkato 0:f782d9c66c49 394 \return APSR Register value
dkato 0:f782d9c66c49 395 */
dkato 0:f782d9c66c49 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
dkato 0:f782d9c66c49 397 {
dkato 0:f782d9c66c49 398 uint32_t result;
dkato 0:f782d9c66c49 399
dkato 0:f782d9c66c49 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
dkato 0:f782d9c66c49 401 return(result);
dkato 0:f782d9c66c49 402 }
dkato 0:f782d9c66c49 403
dkato 0:f782d9c66c49 404
dkato 0:f782d9c66c49 405 /** \brief Get xPSR Register
dkato 0:f782d9c66c49 406
dkato 0:f782d9c66c49 407 This function returns the content of the xPSR Register.
dkato 0:f782d9c66c49 408
dkato 0:f782d9c66c49 409 \return xPSR Register value
dkato 0:f782d9c66c49 410 */
dkato 0:f782d9c66c49 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
dkato 0:f782d9c66c49 412 {
dkato 0:f782d9c66c49 413 uint32_t result;
dkato 0:f782d9c66c49 414
dkato 0:f782d9c66c49 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
dkato 0:f782d9c66c49 416 return(result);
dkato 0:f782d9c66c49 417 }
dkato 0:f782d9c66c49 418
dkato 0:f782d9c66c49 419
dkato 0:f782d9c66c49 420 /** \brief Get Process Stack Pointer
dkato 0:f782d9c66c49 421
dkato 0:f782d9c66c49 422 This function returns the current value of the Process Stack Pointer (PSP).
dkato 0:f782d9c66c49 423
dkato 0:f782d9c66c49 424 \return PSP Register value
dkato 0:f782d9c66c49 425 */
dkato 0:f782d9c66c49 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
dkato 0:f782d9c66c49 427 {
dkato 0:f782d9c66c49 428 register uint32_t result;
dkato 0:f782d9c66c49 429
dkato 0:f782d9c66c49 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
dkato 0:f782d9c66c49 431 return(result);
dkato 0:f782d9c66c49 432 }
dkato 0:f782d9c66c49 433
dkato 0:f782d9c66c49 434
dkato 0:f782d9c66c49 435 /** \brief Set Process Stack Pointer
dkato 0:f782d9c66c49 436
dkato 0:f782d9c66c49 437 This function assigns the given value to the Process Stack Pointer (PSP).
dkato 0:f782d9c66c49 438
dkato 0:f782d9c66c49 439 \param [in] topOfProcStack Process Stack Pointer value to set
dkato 0:f782d9c66c49 440 */
dkato 0:f782d9c66c49 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
dkato 0:f782d9c66c49 442 {
dkato 0:f782d9c66c49 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
dkato 0:f782d9c66c49 444 }
dkato 0:f782d9c66c49 445
dkato 0:f782d9c66c49 446
dkato 0:f782d9c66c49 447 /** \brief Get Main Stack Pointer
dkato 0:f782d9c66c49 448
dkato 0:f782d9c66c49 449 This function returns the current value of the Main Stack Pointer (MSP).
dkato 0:f782d9c66c49 450
dkato 0:f782d9c66c49 451 \return MSP Register value
dkato 0:f782d9c66c49 452 */
dkato 0:f782d9c66c49 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
dkato 0:f782d9c66c49 454 {
dkato 0:f782d9c66c49 455 register uint32_t result;
dkato 0:f782d9c66c49 456
dkato 0:f782d9c66c49 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
dkato 0:f782d9c66c49 458 return(result);
dkato 0:f782d9c66c49 459 }
dkato 0:f782d9c66c49 460
dkato 0:f782d9c66c49 461
dkato 0:f782d9c66c49 462 /** \brief Set Main Stack Pointer
dkato 0:f782d9c66c49 463
dkato 0:f782d9c66c49 464 This function assigns the given value to the Main Stack Pointer (MSP).
dkato 0:f782d9c66c49 465
dkato 0:f782d9c66c49 466 \param [in] topOfMainStack Main Stack Pointer value to set
dkato 0:f782d9c66c49 467 */
dkato 0:f782d9c66c49 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
dkato 0:f782d9c66c49 469 {
dkato 0:f782d9c66c49 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
dkato 0:f782d9c66c49 471 }
dkato 0:f782d9c66c49 472
dkato 0:f782d9c66c49 473
dkato 0:f782d9c66c49 474 /** \brief Get Priority Mask
dkato 0:f782d9c66c49 475
dkato 0:f782d9c66c49 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
dkato 0:f782d9c66c49 477
dkato 0:f782d9c66c49 478 \return Priority Mask value
dkato 0:f782d9c66c49 479 */
dkato 0:f782d9c66c49 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
dkato 0:f782d9c66c49 481 {
dkato 0:f782d9c66c49 482 uint32_t result;
dkato 0:f782d9c66c49 483
dkato 0:f782d9c66c49 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
dkato 0:f782d9c66c49 485 return(result);
dkato 0:f782d9c66c49 486 }
dkato 0:f782d9c66c49 487
dkato 0:f782d9c66c49 488
dkato 0:f782d9c66c49 489 /** \brief Set Priority Mask
dkato 0:f782d9c66c49 490
dkato 0:f782d9c66c49 491 This function assigns the given value to the Priority Mask Register.
dkato 0:f782d9c66c49 492
dkato 0:f782d9c66c49 493 \param [in] priMask Priority Mask
dkato 0:f782d9c66c49 494 */
dkato 0:f782d9c66c49 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
dkato 0:f782d9c66c49 496 {
dkato 0:f782d9c66c49 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
dkato 0:f782d9c66c49 498 }
dkato 0:f782d9c66c49 499
dkato 0:f782d9c66c49 500
dkato 0:f782d9c66c49 501 #if (__CORTEX_M >= 0x03)
dkato 0:f782d9c66c49 502
dkato 0:f782d9c66c49 503 /** \brief Enable FIQ
dkato 0:f782d9c66c49 504
dkato 0:f782d9c66c49 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
dkato 0:f782d9c66c49 506 Can only be executed in Privileged modes.
dkato 0:f782d9c66c49 507 */
dkato 0:f782d9c66c49 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
dkato 0:f782d9c66c49 509 {
dkato 0:f782d9c66c49 510 __ASM volatile ("cpsie f" : : : "memory");
dkato 0:f782d9c66c49 511 }
dkato 0:f782d9c66c49 512
dkato 0:f782d9c66c49 513
dkato 0:f782d9c66c49 514 /** \brief Disable FIQ
dkato 0:f782d9c66c49 515
dkato 0:f782d9c66c49 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
dkato 0:f782d9c66c49 517 Can only be executed in Privileged modes.
dkato 0:f782d9c66c49 518 */
dkato 0:f782d9c66c49 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
dkato 0:f782d9c66c49 520 {
dkato 0:f782d9c66c49 521 __ASM volatile ("cpsid f" : : : "memory");
dkato 0:f782d9c66c49 522 }
dkato 0:f782d9c66c49 523
dkato 0:f782d9c66c49 524
dkato 0:f782d9c66c49 525 /** \brief Get Base Priority
dkato 0:f782d9c66c49 526
dkato 0:f782d9c66c49 527 This function returns the current value of the Base Priority register.
dkato 0:f782d9c66c49 528
dkato 0:f782d9c66c49 529 \return Base Priority register value
dkato 0:f782d9c66c49 530 */
dkato 0:f782d9c66c49 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
dkato 0:f782d9c66c49 532 {
dkato 0:f782d9c66c49 533 uint32_t result;
dkato 0:f782d9c66c49 534
dkato 0:f782d9c66c49 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
dkato 0:f782d9c66c49 536 return(result);
dkato 0:f782d9c66c49 537 }
dkato 0:f782d9c66c49 538
dkato 0:f782d9c66c49 539
dkato 0:f782d9c66c49 540 /** \brief Set Base Priority
dkato 0:f782d9c66c49 541
dkato 0:f782d9c66c49 542 This function assigns the given value to the Base Priority register.
dkato 0:f782d9c66c49 543
dkato 0:f782d9c66c49 544 \param [in] basePri Base Priority value to set
dkato 0:f782d9c66c49 545 */
dkato 0:f782d9c66c49 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
dkato 0:f782d9c66c49 547 {
dkato 0:f782d9c66c49 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
dkato 0:f782d9c66c49 549 }
dkato 0:f782d9c66c49 550
dkato 0:f782d9c66c49 551
dkato 0:f782d9c66c49 552 /** \brief Set Base Priority with condition
dkato 0:f782d9c66c49 553
dkato 0:f782d9c66c49 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
dkato 0:f782d9c66c49 555 or the new value increases the BASEPRI priority level.
dkato 0:f782d9c66c49 556
dkato 0:f782d9c66c49 557 \param [in] basePri Base Priority value to set
dkato 0:f782d9c66c49 558 */
dkato 0:f782d9c66c49 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
dkato 0:f782d9c66c49 560 {
dkato 0:f782d9c66c49 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
dkato 0:f782d9c66c49 562 }
dkato 0:f782d9c66c49 563
dkato 0:f782d9c66c49 564
dkato 0:f782d9c66c49 565 /** \brief Get Fault Mask
dkato 0:f782d9c66c49 566
dkato 0:f782d9c66c49 567 This function returns the current value of the Fault Mask register.
dkato 0:f782d9c66c49 568
dkato 0:f782d9c66c49 569 \return Fault Mask register value
dkato 0:f782d9c66c49 570 */
dkato 0:f782d9c66c49 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
dkato 0:f782d9c66c49 572 {
dkato 0:f782d9c66c49 573 uint32_t result;
dkato 0:f782d9c66c49 574
dkato 0:f782d9c66c49 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
dkato 0:f782d9c66c49 576 return(result);
dkato 0:f782d9c66c49 577 }
dkato 0:f782d9c66c49 578
dkato 0:f782d9c66c49 579
dkato 0:f782d9c66c49 580 /** \brief Set Fault Mask
dkato 0:f782d9c66c49 581
dkato 0:f782d9c66c49 582 This function assigns the given value to the Fault Mask register.
dkato 0:f782d9c66c49 583
dkato 0:f782d9c66c49 584 \param [in] faultMask Fault Mask value to set
dkato 0:f782d9c66c49 585 */
dkato 0:f782d9c66c49 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
dkato 0:f782d9c66c49 587 {
dkato 0:f782d9c66c49 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
dkato 0:f782d9c66c49 589 }
dkato 0:f782d9c66c49 590
dkato 0:f782d9c66c49 591 #endif /* (__CORTEX_M >= 0x03) */
dkato 0:f782d9c66c49 592
dkato 0:f782d9c66c49 593
dkato 0:f782d9c66c49 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
dkato 0:f782d9c66c49 595
dkato 0:f782d9c66c49 596 /** \brief Get FPSCR
dkato 0:f782d9c66c49 597
dkato 0:f782d9c66c49 598 This function returns the current value of the Floating Point Status/Control register.
dkato 0:f782d9c66c49 599
dkato 0:f782d9c66c49 600 \return Floating Point Status/Control register value
dkato 0:f782d9c66c49 601 */
dkato 0:f782d9c66c49 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
dkato 0:f782d9c66c49 603 {
dkato 0:f782d9c66c49 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
dkato 0:f782d9c66c49 605 uint32_t result;
dkato 0:f782d9c66c49 606
dkato 0:f782d9c66c49 607 /* Empty asm statement works as a scheduling barrier */
dkato 0:f782d9c66c49 608 __ASM volatile ("");
dkato 0:f782d9c66c49 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
dkato 0:f782d9c66c49 610 __ASM volatile ("");
dkato 0:f782d9c66c49 611 return(result);
dkato 0:f782d9c66c49 612 #else
dkato 0:f782d9c66c49 613 return(0);
dkato 0:f782d9c66c49 614 #endif
dkato 0:f782d9c66c49 615 }
dkato 0:f782d9c66c49 616
dkato 0:f782d9c66c49 617
dkato 0:f782d9c66c49 618 /** \brief Set FPSCR
dkato 0:f782d9c66c49 619
dkato 0:f782d9c66c49 620 This function assigns the given value to the Floating Point Status/Control register.
dkato 0:f782d9c66c49 621
dkato 0:f782d9c66c49 622 \param [in] fpscr Floating Point Status/Control value to set
dkato 0:f782d9c66c49 623 */
dkato 0:f782d9c66c49 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
dkato 0:f782d9c66c49 625 {
dkato 0:f782d9c66c49 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
dkato 0:f782d9c66c49 627 /* Empty asm statement works as a scheduling barrier */
dkato 0:f782d9c66c49 628 __ASM volatile ("");
dkato 0:f782d9c66c49 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
dkato 0:f782d9c66c49 630 __ASM volatile ("");
dkato 0:f782d9c66c49 631 #endif
dkato 0:f782d9c66c49 632 }
dkato 0:f782d9c66c49 633
dkato 0:f782d9c66c49 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
dkato 0:f782d9c66c49 635
dkato 0:f782d9c66c49 636
dkato 0:f782d9c66c49 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
dkato 0:f782d9c66c49 638 /* IAR iccarm specific functions */
dkato 0:f782d9c66c49 639 #include <cmsis_iar.h>
dkato 0:f782d9c66c49 640
dkato 0:f782d9c66c49 641
dkato 0:f782d9c66c49 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
dkato 0:f782d9c66c49 643 /* TI CCS specific functions */
dkato 0:f782d9c66c49 644 #include <cmsis_ccs.h>
dkato 0:f782d9c66c49 645
dkato 0:f782d9c66c49 646
dkato 0:f782d9c66c49 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
dkato 0:f782d9c66c49 648 /* TASKING carm specific functions */
dkato 0:f782d9c66c49 649 /*
dkato 0:f782d9c66c49 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
dkato 0:f782d9c66c49 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
dkato 0:f782d9c66c49 652 * Including the CMSIS ones.
dkato 0:f782d9c66c49 653 */
dkato 0:f782d9c66c49 654
dkato 0:f782d9c66c49 655
dkato 0:f782d9c66c49 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
dkato 0:f782d9c66c49 657 /* Cosmic specific functions */
dkato 0:f782d9c66c49 658 #include <cmsis_csm.h>
dkato 0:f782d9c66c49 659
dkato 0:f782d9c66c49 660 #endif
dkato 0:f782d9c66c49 661
dkato 0:f782d9c66c49 662 /*@} end of CMSIS_Core_RegAccFunctions */
dkato 0:f782d9c66c49 663
dkato 0:f782d9c66c49 664 #endif /* __CORE_CMFUNC_H */