Daiki Kato / mbed-os-lychee

mbed-os for GR-LYCHEE

Dependents:   mbed-os-example-blinky-gr-lychee GR-Boads_Camera_sample GR-Boards_Audio_Recoder GR-Boads_Camera_DisplayApp ... more

cmsis/core_cm4_simd.h@0:f782d9c66c49, 2018-02-02 (annotated)

Committer:
dkato
Date:
Fri Feb 02 05:42:23 2018 +0000
Revision:
0:f782d9c66c49
mbed-os for GR-LYCHEE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:f782d9c66c49 1 /**************************************************************************//**
dkato 0:f782d9c66c49 2 * @file core_cm4_simd.h
dkato 0:f782d9c66c49 3 * @brief CMSIS Cortex-M4 SIMD Header File
dkato 0:f782d9c66c49 4 * @version V3.20
dkato 0:f782d9c66c49 5 * @date 25. February 2013
dkato 0:f782d9c66c49 6 *
dkato 0:f782d9c66c49 7 * @note
dkato 0:f782d9c66c49 8 *
dkato 0:f782d9c66c49 9 ******************************************************************************/
dkato 0:f782d9c66c49 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
dkato 0:f782d9c66c49 11
dkato 0:f782d9c66c49 12 All rights reserved.
dkato 0:f782d9c66c49 13 Redistribution and use in source and binary forms, with or without
dkato 0:f782d9c66c49 14 modification, are permitted provided that the following conditions are met:
dkato 0:f782d9c66c49 15 - Redistributions of source code must retain the above copyright
dkato 0:f782d9c66c49 16 notice, this list of conditions and the following disclaimer.
dkato 0:f782d9c66c49 17 - Redistributions in binary form must reproduce the above copyright
dkato 0:f782d9c66c49 18 notice, this list of conditions and the following disclaimer in the
dkato 0:f782d9c66c49 19 documentation and/or other materials provided with the distribution.
dkato 0:f782d9c66c49 20 - Neither the name of ARM nor the names of its contributors may be used
dkato 0:f782d9c66c49 21 to endorse or promote products derived from this software without
dkato 0:f782d9c66c49 22 specific prior written permission.
dkato 0:f782d9c66c49 23 *
dkato 0:f782d9c66c49 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
dkato 0:f782d9c66c49 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
dkato 0:f782d9c66c49 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
dkato 0:f782d9c66c49 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
dkato 0:f782d9c66c49 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
dkato 0:f782d9c66c49 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
dkato 0:f782d9c66c49 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
dkato 0:f782d9c66c49 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
dkato 0:f782d9c66c49 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
dkato 0:f782d9c66c49 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
dkato 0:f782d9c66c49 34 POSSIBILITY OF SUCH DAMAGE.
dkato 0:f782d9c66c49 35 ---------------------------------------------------------------------------*/
dkato 0:f782d9c66c49 36
dkato 0:f782d9c66c49 37
dkato 0:f782d9c66c49 38 #ifdef __cplusplus
dkato 0:f782d9c66c49 39 extern "C" {
dkato 0:f782d9c66c49 40 #endif
dkato 0:f782d9c66c49 41
dkato 0:f782d9c66c49 42 #ifndef __CORE_CM4_SIMD_H
dkato 0:f782d9c66c49 43 #define __CORE_CM4_SIMD_H
dkato 0:f782d9c66c49 44
dkato 0:f782d9c66c49 45
dkato 0:f782d9c66c49 46 /*******************************************************************************
dkato 0:f782d9c66c49 47 * Hardware Abstraction Layer
dkato 0:f782d9c66c49 48 ******************************************************************************/
dkato 0:f782d9c66c49 49
dkato 0:f782d9c66c49 50
dkato 0:f782d9c66c49 51 /* ################### Compiler specific Intrinsics ########################### */
dkato 0:f782d9c66c49 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
dkato 0:f782d9c66c49 53 Access to dedicated SIMD instructions
dkato 0:f782d9c66c49 54 @{
dkato 0:f782d9c66c49 55 */
dkato 0:f782d9c66c49 56
dkato 0:f782d9c66c49 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
dkato 0:f782d9c66c49 58 /* ARM armcc specific functions */
dkato 0:f782d9c66c49 59
dkato 0:f782d9c66c49 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
dkato 0:f782d9c66c49 61 #define __SADD8 __sadd8
dkato 0:f782d9c66c49 62 #define __QADD8 __qadd8
dkato 0:f782d9c66c49 63 #define __SHADD8 __shadd8
dkato 0:f782d9c66c49 64 #define __UADD8 __uadd8
dkato 0:f782d9c66c49 65 #define __UQADD8 __uqadd8
dkato 0:f782d9c66c49 66 #define __UHADD8 __uhadd8
dkato 0:f782d9c66c49 67 #define __SSUB8 __ssub8
dkato 0:f782d9c66c49 68 #define __QSUB8 __qsub8
dkato 0:f782d9c66c49 69 #define __SHSUB8 __shsub8
dkato 0:f782d9c66c49 70 #define __USUB8 __usub8
dkato 0:f782d9c66c49 71 #define __UQSUB8 __uqsub8
dkato 0:f782d9c66c49 72 #define __UHSUB8 __uhsub8
dkato 0:f782d9c66c49 73 #define __SADD16 __sadd16
dkato 0:f782d9c66c49 74 #define __QADD16 __qadd16
dkato 0:f782d9c66c49 75 #define __SHADD16 __shadd16
dkato 0:f782d9c66c49 76 #define __UADD16 __uadd16
dkato 0:f782d9c66c49 77 #define __UQADD16 __uqadd16
dkato 0:f782d9c66c49 78 #define __UHADD16 __uhadd16
dkato 0:f782d9c66c49 79 #define __SSUB16 __ssub16
dkato 0:f782d9c66c49 80 #define __QSUB16 __qsub16
dkato 0:f782d9c66c49 81 #define __SHSUB16 __shsub16
dkato 0:f782d9c66c49 82 #define __USUB16 __usub16
dkato 0:f782d9c66c49 83 #define __UQSUB16 __uqsub16
dkato 0:f782d9c66c49 84 #define __UHSUB16 __uhsub16
dkato 0:f782d9c66c49 85 #define __SASX __sasx
dkato 0:f782d9c66c49 86 #define __QASX __qasx
dkato 0:f782d9c66c49 87 #define __SHASX __shasx
dkato 0:f782d9c66c49 88 #define __UASX __uasx
dkato 0:f782d9c66c49 89 #define __UQASX __uqasx
dkato 0:f782d9c66c49 90 #define __UHASX __uhasx
dkato 0:f782d9c66c49 91 #define __SSAX __ssax
dkato 0:f782d9c66c49 92 #define __QSAX __qsax
dkato 0:f782d9c66c49 93 #define __SHSAX __shsax
dkato 0:f782d9c66c49 94 #define __USAX __usax
dkato 0:f782d9c66c49 95 #define __UQSAX __uqsax
dkato 0:f782d9c66c49 96 #define __UHSAX __uhsax
dkato 0:f782d9c66c49 97 #define __USAD8 __usad8
dkato 0:f782d9c66c49 98 #define __USADA8 __usada8
dkato 0:f782d9c66c49 99 #define __SSAT16 __ssat16
dkato 0:f782d9c66c49 100 #define __USAT16 __usat16
dkato 0:f782d9c66c49 101 #define __UXTB16 __uxtb16
dkato 0:f782d9c66c49 102 #define __UXTAB16 __uxtab16
dkato 0:f782d9c66c49 103 #define __SXTB16 __sxtb16
dkato 0:f782d9c66c49 104 #define __SXTAB16 __sxtab16
dkato 0:f782d9c66c49 105 #define __SMUAD __smuad
dkato 0:f782d9c66c49 106 #define __SMUADX __smuadx
dkato 0:f782d9c66c49 107 #define __SMLAD __smlad
dkato 0:f782d9c66c49 108 #define __SMLADX __smladx
dkato 0:f782d9c66c49 109 #define __SMLALD __smlald
dkato 0:f782d9c66c49 110 #define __SMLALDX __smlaldx
dkato 0:f782d9c66c49 111 #define __SMUSD __smusd
dkato 0:f782d9c66c49 112 #define __SMUSDX __smusdx
dkato 0:f782d9c66c49 113 #define __SMLSD __smlsd
dkato 0:f782d9c66c49 114 #define __SMLSDX __smlsdx
dkato 0:f782d9c66c49 115 #define __SMLSLD __smlsld
dkato 0:f782d9c66c49 116 #define __SMLSLDX __smlsldx
dkato 0:f782d9c66c49 117 #define __SEL __sel
dkato 0:f782d9c66c49 118 #define __QADD __qadd
dkato 0:f782d9c66c49 119 #define __QSUB __qsub
dkato 0:f782d9c66c49 120
dkato 0:f782d9c66c49 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
dkato 0:f782d9c66c49 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
dkato 0:f782d9c66c49 123
dkato 0:f782d9c66c49 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
dkato 0:f782d9c66c49 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
dkato 0:f782d9c66c49 126
dkato 0:f782d9c66c49 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
dkato 0:f782d9c66c49 128 ((int64_t)(ARG3) << 32) ) >> 32))
dkato 0:f782d9c66c49 129
dkato 0:f782d9c66c49 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
dkato 0:f782d9c66c49 131
dkato 0:f782d9c66c49 132
dkato 0:f782d9c66c49 133
dkato 0:f782d9c66c49 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
dkato 0:f782d9c66c49 135 /* IAR iccarm specific functions */
dkato 0:f782d9c66c49 136
dkato 0:f782d9c66c49 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
dkato 0:f782d9c66c49 138 #include <cmsis_iar.h>
dkato 0:f782d9c66c49 139
dkato 0:f782d9c66c49 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
dkato 0:f782d9c66c49 141
dkato 0:f782d9c66c49 142
dkato 0:f782d9c66c49 143
dkato 0:f782d9c66c49 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
dkato 0:f782d9c66c49 145 /* TI CCS specific functions */
dkato 0:f782d9c66c49 146
dkato 0:f782d9c66c49 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
dkato 0:f782d9c66c49 148 #include <cmsis_ccs.h>
dkato 0:f782d9c66c49 149
dkato 0:f782d9c66c49 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
dkato 0:f782d9c66c49 151
dkato 0:f782d9c66c49 152
dkato 0:f782d9c66c49 153
dkato 0:f782d9c66c49 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
dkato 0:f782d9c66c49 155 /* GNU gcc specific functions */
dkato 0:f782d9c66c49 156
dkato 0:f782d9c66c49 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
dkato 0:f782d9c66c49 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 159 {
dkato 0:f782d9c66c49 160 uint32_t result;
dkato 0:f782d9c66c49 161
dkato 0:f782d9c66c49 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 163 return(result);
dkato 0:f782d9c66c49 164 }
dkato 0:f782d9c66c49 165
dkato 0:f782d9c66c49 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 167 {
dkato 0:f782d9c66c49 168 uint32_t result;
dkato 0:f782d9c66c49 169
dkato 0:f782d9c66c49 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 171 return(result);
dkato 0:f782d9c66c49 172 }
dkato 0:f782d9c66c49 173
dkato 0:f782d9c66c49 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 175 {
dkato 0:f782d9c66c49 176 uint32_t result;
dkato 0:f782d9c66c49 177
dkato 0:f782d9c66c49 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 179 return(result);
dkato 0:f782d9c66c49 180 }
dkato 0:f782d9c66c49 181
dkato 0:f782d9c66c49 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 183 {
dkato 0:f782d9c66c49 184 uint32_t result;
dkato 0:f782d9c66c49 185
dkato 0:f782d9c66c49 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 187 return(result);
dkato 0:f782d9c66c49 188 }
dkato 0:f782d9c66c49 189
dkato 0:f782d9c66c49 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 191 {
dkato 0:f782d9c66c49 192 uint32_t result;
dkato 0:f782d9c66c49 193
dkato 0:f782d9c66c49 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 195 return(result);
dkato 0:f782d9c66c49 196 }
dkato 0:f782d9c66c49 197
dkato 0:f782d9c66c49 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 199 {
dkato 0:f782d9c66c49 200 uint32_t result;
dkato 0:f782d9c66c49 201
dkato 0:f782d9c66c49 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 203 return(result);
dkato 0:f782d9c66c49 204 }
dkato 0:f782d9c66c49 205
dkato 0:f782d9c66c49 206
dkato 0:f782d9c66c49 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 208 {
dkato 0:f782d9c66c49 209 uint32_t result;
dkato 0:f782d9c66c49 210
dkato 0:f782d9c66c49 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 212 return(result);
dkato 0:f782d9c66c49 213 }
dkato 0:f782d9c66c49 214
dkato 0:f782d9c66c49 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 216 {
dkato 0:f782d9c66c49 217 uint32_t result;
dkato 0:f782d9c66c49 218
dkato 0:f782d9c66c49 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 220 return(result);
dkato 0:f782d9c66c49 221 }
dkato 0:f782d9c66c49 222
dkato 0:f782d9c66c49 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 224 {
dkato 0:f782d9c66c49 225 uint32_t result;
dkato 0:f782d9c66c49 226
dkato 0:f782d9c66c49 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 228 return(result);
dkato 0:f782d9c66c49 229 }
dkato 0:f782d9c66c49 230
dkato 0:f782d9c66c49 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 232 {
dkato 0:f782d9c66c49 233 uint32_t result;
dkato 0:f782d9c66c49 234
dkato 0:f782d9c66c49 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 236 return(result);
dkato 0:f782d9c66c49 237 }
dkato 0:f782d9c66c49 238
dkato 0:f782d9c66c49 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 240 {
dkato 0:f782d9c66c49 241 uint32_t result;
dkato 0:f782d9c66c49 242
dkato 0:f782d9c66c49 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 244 return(result);
dkato 0:f782d9c66c49 245 }
dkato 0:f782d9c66c49 246
dkato 0:f782d9c66c49 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 248 {
dkato 0:f782d9c66c49 249 uint32_t result;
dkato 0:f782d9c66c49 250
dkato 0:f782d9c66c49 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 252 return(result);
dkato 0:f782d9c66c49 253 }
dkato 0:f782d9c66c49 254
dkato 0:f782d9c66c49 255
dkato 0:f782d9c66c49 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 257 {
dkato 0:f782d9c66c49 258 uint32_t result;
dkato 0:f782d9c66c49 259
dkato 0:f782d9c66c49 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 261 return(result);
dkato 0:f782d9c66c49 262 }
dkato 0:f782d9c66c49 263
dkato 0:f782d9c66c49 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 265 {
dkato 0:f782d9c66c49 266 uint32_t result;
dkato 0:f782d9c66c49 267
dkato 0:f782d9c66c49 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 269 return(result);
dkato 0:f782d9c66c49 270 }
dkato 0:f782d9c66c49 271
dkato 0:f782d9c66c49 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 273 {
dkato 0:f782d9c66c49 274 uint32_t result;
dkato 0:f782d9c66c49 275
dkato 0:f782d9c66c49 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 277 return(result);
dkato 0:f782d9c66c49 278 }
dkato 0:f782d9c66c49 279
dkato 0:f782d9c66c49 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 281 {
dkato 0:f782d9c66c49 282 uint32_t result;
dkato 0:f782d9c66c49 283
dkato 0:f782d9c66c49 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 285 return(result);
dkato 0:f782d9c66c49 286 }
dkato 0:f782d9c66c49 287
dkato 0:f782d9c66c49 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 289 {
dkato 0:f782d9c66c49 290 uint32_t result;
dkato 0:f782d9c66c49 291
dkato 0:f782d9c66c49 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 293 return(result);
dkato 0:f782d9c66c49 294 }
dkato 0:f782d9c66c49 295
dkato 0:f782d9c66c49 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 297 {
dkato 0:f782d9c66c49 298 uint32_t result;
dkato 0:f782d9c66c49 299
dkato 0:f782d9c66c49 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 301 return(result);
dkato 0:f782d9c66c49 302 }
dkato 0:f782d9c66c49 303
dkato 0:f782d9c66c49 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 305 {
dkato 0:f782d9c66c49 306 uint32_t result;
dkato 0:f782d9c66c49 307
dkato 0:f782d9c66c49 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 309 return(result);
dkato 0:f782d9c66c49 310 }
dkato 0:f782d9c66c49 311
dkato 0:f782d9c66c49 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 313 {
dkato 0:f782d9c66c49 314 uint32_t result;
dkato 0:f782d9c66c49 315
dkato 0:f782d9c66c49 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 317 return(result);
dkato 0:f782d9c66c49 318 }
dkato 0:f782d9c66c49 319
dkato 0:f782d9c66c49 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 321 {
dkato 0:f782d9c66c49 322 uint32_t result;
dkato 0:f782d9c66c49 323
dkato 0:f782d9c66c49 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 325 return(result);
dkato 0:f782d9c66c49 326 }
dkato 0:f782d9c66c49 327
dkato 0:f782d9c66c49 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 329 {
dkato 0:f782d9c66c49 330 uint32_t result;
dkato 0:f782d9c66c49 331
dkato 0:f782d9c66c49 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 333 return(result);
dkato 0:f782d9c66c49 334 }
dkato 0:f782d9c66c49 335
dkato 0:f782d9c66c49 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 337 {
dkato 0:f782d9c66c49 338 uint32_t result;
dkato 0:f782d9c66c49 339
dkato 0:f782d9c66c49 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 341 return(result);
dkato 0:f782d9c66c49 342 }
dkato 0:f782d9c66c49 343
dkato 0:f782d9c66c49 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 345 {
dkato 0:f782d9c66c49 346 uint32_t result;
dkato 0:f782d9c66c49 347
dkato 0:f782d9c66c49 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 349 return(result);
dkato 0:f782d9c66c49 350 }
dkato 0:f782d9c66c49 351
dkato 0:f782d9c66c49 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 353 {
dkato 0:f782d9c66c49 354 uint32_t result;
dkato 0:f782d9c66c49 355
dkato 0:f782d9c66c49 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 357 return(result);
dkato 0:f782d9c66c49 358 }
dkato 0:f782d9c66c49 359
dkato 0:f782d9c66c49 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 361 {
dkato 0:f782d9c66c49 362 uint32_t result;
dkato 0:f782d9c66c49 363
dkato 0:f782d9c66c49 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 365 return(result);
dkato 0:f782d9c66c49 366 }
dkato 0:f782d9c66c49 367
dkato 0:f782d9c66c49 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 369 {
dkato 0:f782d9c66c49 370 uint32_t result;
dkato 0:f782d9c66c49 371
dkato 0:f782d9c66c49 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 373 return(result);
dkato 0:f782d9c66c49 374 }
dkato 0:f782d9c66c49 375
dkato 0:f782d9c66c49 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 377 {
dkato 0:f782d9c66c49 378 uint32_t result;
dkato 0:f782d9c66c49 379
dkato 0:f782d9c66c49 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 381 return(result);
dkato 0:f782d9c66c49 382 }
dkato 0:f782d9c66c49 383
dkato 0:f782d9c66c49 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 385 {
dkato 0:f782d9c66c49 386 uint32_t result;
dkato 0:f782d9c66c49 387
dkato 0:f782d9c66c49 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 389 return(result);
dkato 0:f782d9c66c49 390 }
dkato 0:f782d9c66c49 391
dkato 0:f782d9c66c49 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 393 {
dkato 0:f782d9c66c49 394 uint32_t result;
dkato 0:f782d9c66c49 395
dkato 0:f782d9c66c49 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 397 return(result);
dkato 0:f782d9c66c49 398 }
dkato 0:f782d9c66c49 399
dkato 0:f782d9c66c49 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 401 {
dkato 0:f782d9c66c49 402 uint32_t result;
dkato 0:f782d9c66c49 403
dkato 0:f782d9c66c49 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 405 return(result);
dkato 0:f782d9c66c49 406 }
dkato 0:f782d9c66c49 407
dkato 0:f782d9c66c49 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 409 {
dkato 0:f782d9c66c49 410 uint32_t result;
dkato 0:f782d9c66c49 411
dkato 0:f782d9c66c49 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 413 return(result);
dkato 0:f782d9c66c49 414 }
dkato 0:f782d9c66c49 415
dkato 0:f782d9c66c49 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 417 {
dkato 0:f782d9c66c49 418 uint32_t result;
dkato 0:f782d9c66c49 419
dkato 0:f782d9c66c49 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 421 return(result);
dkato 0:f782d9c66c49 422 }
dkato 0:f782d9c66c49 423
dkato 0:f782d9c66c49 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 425 {
dkato 0:f782d9c66c49 426 uint32_t result;
dkato 0:f782d9c66c49 427
dkato 0:f782d9c66c49 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 429 return(result);
dkato 0:f782d9c66c49 430 }
dkato 0:f782d9c66c49 431
dkato 0:f782d9c66c49 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 433 {
dkato 0:f782d9c66c49 434 uint32_t result;
dkato 0:f782d9c66c49 435
dkato 0:f782d9c66c49 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 437 return(result);
dkato 0:f782d9c66c49 438 }
dkato 0:f782d9c66c49 439
dkato 0:f782d9c66c49 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 441 {
dkato 0:f782d9c66c49 442 uint32_t result;
dkato 0:f782d9c66c49 443
dkato 0:f782d9c66c49 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 445 return(result);
dkato 0:f782d9c66c49 446 }
dkato 0:f782d9c66c49 447
dkato 0:f782d9c66c49 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 449 {
dkato 0:f782d9c66c49 450 uint32_t result;
dkato 0:f782d9c66c49 451
dkato 0:f782d9c66c49 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 453 return(result);
dkato 0:f782d9c66c49 454 }
dkato 0:f782d9c66c49 455
dkato 0:f782d9c66c49 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
dkato 0:f782d9c66c49 457 {
dkato 0:f782d9c66c49 458 uint32_t result;
dkato 0:f782d9c66c49 459
dkato 0:f782d9c66c49 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
dkato 0:f782d9c66c49 461 return(result);
dkato 0:f782d9c66c49 462 }
dkato 0:f782d9c66c49 463
dkato 0:f782d9c66c49 464 #define __SSAT16(ARG1,ARG2) \
dkato 0:f782d9c66c49 465 ({ \
dkato 0:f782d9c66c49 466 uint32_t __RES, __ARG1 = (ARG1); \
dkato 0:f782d9c66c49 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
dkato 0:f782d9c66c49 468 __RES; \
dkato 0:f782d9c66c49 469 })
dkato 0:f782d9c66c49 470
dkato 0:f782d9c66c49 471 #define __USAT16(ARG1,ARG2) \
dkato 0:f782d9c66c49 472 ({ \
dkato 0:f782d9c66c49 473 uint32_t __RES, __ARG1 = (ARG1); \
dkato 0:f782d9c66c49 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
dkato 0:f782d9c66c49 475 __RES; \
dkato 0:f782d9c66c49 476 })
dkato 0:f782d9c66c49 477
dkato 0:f782d9c66c49 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
dkato 0:f782d9c66c49 479 {
dkato 0:f782d9c66c49 480 uint32_t result;
dkato 0:f782d9c66c49 481
dkato 0:f782d9c66c49 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
dkato 0:f782d9c66c49 483 return(result);
dkato 0:f782d9c66c49 484 }
dkato 0:f782d9c66c49 485
dkato 0:f782d9c66c49 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 487 {
dkato 0:f782d9c66c49 488 uint32_t result;
dkato 0:f782d9c66c49 489
dkato 0:f782d9c66c49 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 491 return(result);
dkato 0:f782d9c66c49 492 }
dkato 0:f782d9c66c49 493
dkato 0:f782d9c66c49 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
dkato 0:f782d9c66c49 495 {
dkato 0:f782d9c66c49 496 uint32_t result;
dkato 0:f782d9c66c49 497
dkato 0:f782d9c66c49 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
dkato 0:f782d9c66c49 499 return(result);
dkato 0:f782d9c66c49 500 }
dkato 0:f782d9c66c49 501
dkato 0:f782d9c66c49 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 503 {
dkato 0:f782d9c66c49 504 uint32_t result;
dkato 0:f782d9c66c49 505
dkato 0:f782d9c66c49 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 507 return(result);
dkato 0:f782d9c66c49 508 }
dkato 0:f782d9c66c49 509
dkato 0:f782d9c66c49 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 511 {
dkato 0:f782d9c66c49 512 uint32_t result;
dkato 0:f782d9c66c49 513
dkato 0:f782d9c66c49 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 515 return(result);
dkato 0:f782d9c66c49 516 }
dkato 0:f782d9c66c49 517
dkato 0:f782d9c66c49 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 519 {
dkato 0:f782d9c66c49 520 uint32_t result;
dkato 0:f782d9c66c49 521
dkato 0:f782d9c66c49 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 523 return(result);
dkato 0:f782d9c66c49 524 }
dkato 0:f782d9c66c49 525
dkato 0:f782d9c66c49 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
dkato 0:f782d9c66c49 527 {
dkato 0:f782d9c66c49 528 uint32_t result;
dkato 0:f782d9c66c49 529
dkato 0:f782d9c66c49 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
dkato 0:f782d9c66c49 531 return(result);
dkato 0:f782d9c66c49 532 }
dkato 0:f782d9c66c49 533
dkato 0:f782d9c66c49 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
dkato 0:f782d9c66c49 535 {
dkato 0:f782d9c66c49 536 uint32_t result;
dkato 0:f782d9c66c49 537
dkato 0:f782d9c66c49 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
dkato 0:f782d9c66c49 539 return(result);
dkato 0:f782d9c66c49 540 }
dkato 0:f782d9c66c49 541
dkato 0:f782d9c66c49 542 #define __SMLALD(ARG1,ARG2,ARG3) \
dkato 0:f782d9c66c49 543 ({ \
dkato 0:f782d9c66c49 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
dkato 0:f782d9c66c49 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
dkato 0:f782d9c66c49 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
dkato 0:f782d9c66c49 547 })
dkato 0:f782d9c66c49 548
dkato 0:f782d9c66c49 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
dkato 0:f782d9c66c49 550 ({ \
dkato 0:f782d9c66c49 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
dkato 0:f782d9c66c49 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
dkato 0:f782d9c66c49 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
dkato 0:f782d9c66c49 554 })
dkato 0:f782d9c66c49 555
dkato 0:f782d9c66c49 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 557 {
dkato 0:f782d9c66c49 558 uint32_t result;
dkato 0:f782d9c66c49 559
dkato 0:f782d9c66c49 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 561 return(result);
dkato 0:f782d9c66c49 562 }
dkato 0:f782d9c66c49 563
dkato 0:f782d9c66c49 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 565 {
dkato 0:f782d9c66c49 566 uint32_t result;
dkato 0:f782d9c66c49 567
dkato 0:f782d9c66c49 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 569 return(result);
dkato 0:f782d9c66c49 570 }
dkato 0:f782d9c66c49 571
dkato 0:f782d9c66c49 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
dkato 0:f782d9c66c49 573 {
dkato 0:f782d9c66c49 574 uint32_t result;
dkato 0:f782d9c66c49 575
dkato 0:f782d9c66c49 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
dkato 0:f782d9c66c49 577 return(result);
dkato 0:f782d9c66c49 578 }
dkato 0:f782d9c66c49 579
dkato 0:f782d9c66c49 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
dkato 0:f782d9c66c49 581 {
dkato 0:f782d9c66c49 582 uint32_t result;
dkato 0:f782d9c66c49 583
dkato 0:f782d9c66c49 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
dkato 0:f782d9c66c49 585 return(result);
dkato 0:f782d9c66c49 586 }
dkato 0:f782d9c66c49 587
dkato 0:f782d9c66c49 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
dkato 0:f782d9c66c49 589 ({ \
dkato 0:f782d9c66c49 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
dkato 0:f782d9c66c49 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
dkato 0:f782d9c66c49 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
dkato 0:f782d9c66c49 593 })
dkato 0:f782d9c66c49 594
dkato 0:f782d9c66c49 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
dkato 0:f782d9c66c49 596 ({ \
dkato 0:f782d9c66c49 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
dkato 0:f782d9c66c49 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
dkato 0:f782d9c66c49 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
dkato 0:f782d9c66c49 600 })
dkato 0:f782d9c66c49 601
dkato 0:f782d9c66c49 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 603 {
dkato 0:f782d9c66c49 604 uint32_t result;
dkato 0:f782d9c66c49 605
dkato 0:f782d9c66c49 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 607 return(result);
dkato 0:f782d9c66c49 608 }
dkato 0:f782d9c66c49 609
dkato 0:f782d9c66c49 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 611 {
dkato 0:f782d9c66c49 612 uint32_t result;
dkato 0:f782d9c66c49 613
dkato 0:f782d9c66c49 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 615 return(result);
dkato 0:f782d9c66c49 616 }
dkato 0:f782d9c66c49 617
dkato 0:f782d9c66c49 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
dkato 0:f782d9c66c49 619 {
dkato 0:f782d9c66c49 620 uint32_t result;
dkato 0:f782d9c66c49 621
dkato 0:f782d9c66c49 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
dkato 0:f782d9c66c49 623 return(result);
dkato 0:f782d9c66c49 624 }
dkato 0:f782d9c66c49 625
dkato 0:f782d9c66c49 626 #define __PKHBT(ARG1,ARG2,ARG3) \
dkato 0:f782d9c66c49 627 ({ \
dkato 0:f782d9c66c49 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
dkato 0:f782d9c66c49 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
dkato 0:f782d9c66c49 630 __RES; \
dkato 0:f782d9c66c49 631 })
dkato 0:f782d9c66c49 632
dkato 0:f782d9c66c49 633 #define __PKHTB(ARG1,ARG2,ARG3) \
dkato 0:f782d9c66c49 634 ({ \
dkato 0:f782d9c66c49 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
dkato 0:f782d9c66c49 636 if (ARG3 == 0) \
dkato 0:f782d9c66c49 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
dkato 0:f782d9c66c49 638 else \
dkato 0:f782d9c66c49 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
dkato 0:f782d9c66c49 640 __RES; \
dkato 0:f782d9c66c49 641 })
dkato 0:f782d9c66c49 642
dkato 0:f782d9c66c49 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
dkato 0:f782d9c66c49 644 {
dkato 0:f782d9c66c49 645 int32_t result;
dkato 0:f782d9c66c49 646
dkato 0:f782d9c66c49 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
dkato 0:f782d9c66c49 648 return(result);
dkato 0:f782d9c66c49 649 }
dkato 0:f782d9c66c49 650
dkato 0:f782d9c66c49 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
dkato 0:f782d9c66c49 652
dkato 0:f782d9c66c49 653
dkato 0:f782d9c66c49 654
dkato 0:f782d9c66c49 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
dkato 0:f782d9c66c49 656 /* TASKING carm specific functions */
dkato 0:f782d9c66c49 657
dkato 0:f782d9c66c49 658
dkato 0:f782d9c66c49 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
dkato 0:f782d9c66c49 660 /* not yet supported */
dkato 0:f782d9c66c49 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
dkato 0:f782d9c66c49 662
dkato 0:f782d9c66c49 663
dkato 0:f782d9c66c49 664 #endif
dkato 0:f782d9c66c49 665
dkato 0:f782d9c66c49 666 /*@} end of group CMSIS_SIMD_intrinsics */
dkato 0:f782d9c66c49 667
dkato 0:f782d9c66c49 668
dkato 0:f782d9c66c49 669 #endif /* __CORE_CM4_SIMD_H */
dkato 0:f782d9c66c49 670
dkato 0:f782d9c66c49 671 #ifdef __cplusplus
dkato 0:f782d9c66c49 672 }
dkato 0:f782d9c66c49 673 #endif