mbed-os for GR-LYCHEE

Dependents:   mbed-os-example-blinky-gr-lychee GR-Boads_Camera_sample GR-Boards_Audio_Recoder GR-Boads_Camera_DisplayApp ... more

Committer:
dkato
Date:
Fri Feb 02 05:42:23 2018 +0000
Revision:
0:f782d9c66c49
mbed-os for GR-LYCHEE

Who changed what in which revision?

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dkato 0:f782d9c66c49 1 /**************************************************************************//**
dkato 0:f782d9c66c49 2 * @file core_ca9.h
dkato 0:f782d9c66c49 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
dkato 0:f782d9c66c49 4 * @version
dkato 0:f782d9c66c49 5 * @date 25 March 2013
dkato 0:f782d9c66c49 6 *
dkato 0:f782d9c66c49 7 * @note
dkato 0:f782d9c66c49 8 *
dkato 0:f782d9c66c49 9 ******************************************************************************/
dkato 0:f782d9c66c49 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
dkato 0:f782d9c66c49 11
dkato 0:f782d9c66c49 12 All rights reserved.
dkato 0:f782d9c66c49 13 Redistribution and use in source and binary forms, with or without
dkato 0:f782d9c66c49 14 modification, are permitted provided that the following conditions are met:
dkato 0:f782d9c66c49 15 - Redistributions of source code must retain the above copyright
dkato 0:f782d9c66c49 16 notice, this list of conditions and the following disclaimer.
dkato 0:f782d9c66c49 17 - Redistributions in binary form must reproduce the above copyright
dkato 0:f782d9c66c49 18 notice, this list of conditions and the following disclaimer in the
dkato 0:f782d9c66c49 19 documentation and/or other materials provided with the distribution.
dkato 0:f782d9c66c49 20 - Neither the name of ARM nor the names of its contributors may be used
dkato 0:f782d9c66c49 21 to endorse or promote products derived from this software without
dkato 0:f782d9c66c49 22 specific prior written permission.
dkato 0:f782d9c66c49 23 *
dkato 0:f782d9c66c49 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
dkato 0:f782d9c66c49 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
dkato 0:f782d9c66c49 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
dkato 0:f782d9c66c49 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
dkato 0:f782d9c66c49 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
dkato 0:f782d9c66c49 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
dkato 0:f782d9c66c49 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
dkato 0:f782d9c66c49 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
dkato 0:f782d9c66c49 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
dkato 0:f782d9c66c49 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
dkato 0:f782d9c66c49 34 POSSIBILITY OF SUCH DAMAGE.
dkato 0:f782d9c66c49 35 ---------------------------------------------------------------------------*/
dkato 0:f782d9c66c49 36
dkato 0:f782d9c66c49 37
dkato 0:f782d9c66c49 38 #if defined ( __ICCARM__ )
dkato 0:f782d9c66c49 39 #pragma system_include /* treat file as system include file for MISRA check */
dkato 0:f782d9c66c49 40 #endif
dkato 0:f782d9c66c49 41
dkato 0:f782d9c66c49 42 #ifdef __cplusplus
dkato 0:f782d9c66c49 43 extern "C" {
dkato 0:f782d9c66c49 44 #endif
dkato 0:f782d9c66c49 45
dkato 0:f782d9c66c49 46 #ifndef __CORE_CA9_H_GENERIC
dkato 0:f782d9c66c49 47 #define __CORE_CA9_H_GENERIC
dkato 0:f782d9c66c49 48
dkato 0:f782d9c66c49 49
dkato 0:f782d9c66c49 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
dkato 0:f782d9c66c49 51 CMSIS violates the following MISRA-C:2004 rules:
dkato 0:f782d9c66c49 52
dkato 0:f782d9c66c49 53 \li Required Rule 8.5, object/function definition in header file.<br>
dkato 0:f782d9c66c49 54 Function definitions in header files are used to allow 'inlining'.
dkato 0:f782d9c66c49 55
dkato 0:f782d9c66c49 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
dkato 0:f782d9c66c49 57 Unions are used for effective representation of core registers.
dkato 0:f782d9c66c49 58
dkato 0:f782d9c66c49 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
dkato 0:f782d9c66c49 60 Function-like macros are used to allow more efficient code.
dkato 0:f782d9c66c49 61 */
dkato 0:f782d9c66c49 62
dkato 0:f782d9c66c49 63
dkato 0:f782d9c66c49 64 /*******************************************************************************
dkato 0:f782d9c66c49 65 * CMSIS definitions
dkato 0:f782d9c66c49 66 ******************************************************************************/
dkato 0:f782d9c66c49 67 /** \ingroup Cortex_A9
dkato 0:f782d9c66c49 68 @{
dkato 0:f782d9c66c49 69 */
dkato 0:f782d9c66c49 70
dkato 0:f782d9c66c49 71 /* CMSIS CA9 definitions */
dkato 0:f782d9c66c49 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
dkato 0:f782d9c66c49 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
dkato 0:f782d9c66c49 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
dkato 0:f782d9c66c49 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
dkato 0:f782d9c66c49 76
dkato 0:f782d9c66c49 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
dkato 0:f782d9c66c49 78
dkato 0:f782d9c66c49 79
dkato 0:f782d9c66c49 80 #if defined ( __CC_ARM )
dkato 0:f782d9c66c49 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
dkato 0:f782d9c66c49 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
dkato 0:f782d9c66c49 83 #define __STATIC_INLINE static __inline
dkato 0:f782d9c66c49 84 #define __STATIC_ASM static __asm
dkato 0:f782d9c66c49 85
dkato 0:f782d9c66c49 86 #elif defined ( __ICCARM__ )
dkato 0:f782d9c66c49 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
dkato 0:f782d9c66c49 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
dkato 0:f782d9c66c49 89 #define __STATIC_INLINE static inline
dkato 0:f782d9c66c49 90 #define __STATIC_ASM static __asm
dkato 0:f782d9c66c49 91
dkato 0:f782d9c66c49 92 #include <stdint.h>
dkato 0:f782d9c66c49 93 inline uint32_t __get_PSR(void) {
dkato 0:f782d9c66c49 94 __ASM("mrs r0, cpsr");
dkato 0:f782d9c66c49 95 }
dkato 0:f782d9c66c49 96
dkato 0:f782d9c66c49 97 #elif defined ( __TMS470__ )
dkato 0:f782d9c66c49 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
dkato 0:f782d9c66c49 99 #define __STATIC_INLINE static inline
dkato 0:f782d9c66c49 100 #define __STATIC_ASM static __asm
dkato 0:f782d9c66c49 101
dkato 0:f782d9c66c49 102 #elif defined ( __GNUC__ )
dkato 0:f782d9c66c49 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
dkato 0:f782d9c66c49 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
dkato 0:f782d9c66c49 105 #define __STATIC_INLINE static inline
dkato 0:f782d9c66c49 106 #define __STATIC_ASM static __asm
dkato 0:f782d9c66c49 107
dkato 0:f782d9c66c49 108 #elif defined ( __TASKING__ )
dkato 0:f782d9c66c49 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
dkato 0:f782d9c66c49 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
dkato 0:f782d9c66c49 111 #define __STATIC_INLINE static inline
dkato 0:f782d9c66c49 112 #define __STATIC_ASM static __asm
dkato 0:f782d9c66c49 113
dkato 0:f782d9c66c49 114 #endif
dkato 0:f782d9c66c49 115
dkato 0:f782d9c66c49 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
dkato 0:f782d9c66c49 117 */
dkato 0:f782d9c66c49 118 #if defined ( __CC_ARM )
dkato 0:f782d9c66c49 119 #if defined __TARGET_FPU_VFP
dkato 0:f782d9c66c49 120 #if (__FPU_PRESENT == 1)
dkato 0:f782d9c66c49 121 #define __FPU_USED 1
dkato 0:f782d9c66c49 122 #else
dkato 0:f782d9c66c49 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
dkato 0:f782d9c66c49 124 #define __FPU_USED 0
dkato 0:f782d9c66c49 125 #endif
dkato 0:f782d9c66c49 126 #else
dkato 0:f782d9c66c49 127 #define __FPU_USED 0
dkato 0:f782d9c66c49 128 #endif
dkato 0:f782d9c66c49 129
dkato 0:f782d9c66c49 130 #elif defined ( __ICCARM__ )
dkato 0:f782d9c66c49 131 #if defined __ARMVFP__
dkato 0:f782d9c66c49 132 #if (__FPU_PRESENT == 1)
dkato 0:f782d9c66c49 133 #define __FPU_USED 1
dkato 0:f782d9c66c49 134 #else
dkato 0:f782d9c66c49 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
dkato 0:f782d9c66c49 136 #define __FPU_USED 0
dkato 0:f782d9c66c49 137 #endif
dkato 0:f782d9c66c49 138 #else
dkato 0:f782d9c66c49 139 #define __FPU_USED 0
dkato 0:f782d9c66c49 140 #endif
dkato 0:f782d9c66c49 141
dkato 0:f782d9c66c49 142 #elif defined ( __TMS470__ )
dkato 0:f782d9c66c49 143 #if defined __TI_VFP_SUPPORT__
dkato 0:f782d9c66c49 144 #if (__FPU_PRESENT == 1)
dkato 0:f782d9c66c49 145 #define __FPU_USED 1
dkato 0:f782d9c66c49 146 #else
dkato 0:f782d9c66c49 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
dkato 0:f782d9c66c49 148 #define __FPU_USED 0
dkato 0:f782d9c66c49 149 #endif
dkato 0:f782d9c66c49 150 #else
dkato 0:f782d9c66c49 151 #define __FPU_USED 0
dkato 0:f782d9c66c49 152 #endif
dkato 0:f782d9c66c49 153
dkato 0:f782d9c66c49 154 #elif defined ( __GNUC__ )
dkato 0:f782d9c66c49 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
dkato 0:f782d9c66c49 156 #if (__FPU_PRESENT == 1)
dkato 0:f782d9c66c49 157 #define __FPU_USED 1
dkato 0:f782d9c66c49 158 #else
dkato 0:f782d9c66c49 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
dkato 0:f782d9c66c49 160 #define __FPU_USED 0
dkato 0:f782d9c66c49 161 #endif
dkato 0:f782d9c66c49 162 #else
dkato 0:f782d9c66c49 163 #define __FPU_USED 0
dkato 0:f782d9c66c49 164 #endif
dkato 0:f782d9c66c49 165
dkato 0:f782d9c66c49 166 #elif defined ( __TASKING__ )
dkato 0:f782d9c66c49 167 #if defined __FPU_VFP__
dkato 0:f782d9c66c49 168 #if (__FPU_PRESENT == 1)
dkato 0:f782d9c66c49 169 #define __FPU_USED 1
dkato 0:f782d9c66c49 170 #else
dkato 0:f782d9c66c49 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
dkato 0:f782d9c66c49 172 #define __FPU_USED 0
dkato 0:f782d9c66c49 173 #endif
dkato 0:f782d9c66c49 174 #else
dkato 0:f782d9c66c49 175 #define __FPU_USED 0
dkato 0:f782d9c66c49 176 #endif
dkato 0:f782d9c66c49 177 #endif
dkato 0:f782d9c66c49 178
dkato 0:f782d9c66c49 179 #include <stdint.h> /*!< standard types definitions */
dkato 0:f782d9c66c49 180 #include "core_caInstr.h" /*!< Core Instruction Access */
dkato 0:f782d9c66c49 181 #include "core_caFunc.h" /*!< Core Function Access */
dkato 0:f782d9c66c49 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
dkato 0:f782d9c66c49 183
dkato 0:f782d9c66c49 184 #endif /* __CORE_CA9_H_GENERIC */
dkato 0:f782d9c66c49 185
dkato 0:f782d9c66c49 186 #ifndef __CMSIS_GENERIC
dkato 0:f782d9c66c49 187
dkato 0:f782d9c66c49 188 #ifndef __CORE_CA9_H_DEPENDANT
dkato 0:f782d9c66c49 189 #define __CORE_CA9_H_DEPENDANT
dkato 0:f782d9c66c49 190
dkato 0:f782d9c66c49 191 /* check device defines and use defaults */
dkato 0:f782d9c66c49 192 #if defined __CHECK_DEVICE_DEFINES
dkato 0:f782d9c66c49 193 #ifndef __CA9_REV
dkato 0:f782d9c66c49 194 #define __CA9_REV 0x0000
dkato 0:f782d9c66c49 195 #warning "__CA9_REV not defined in device header file; using default!"
dkato 0:f782d9c66c49 196 #endif
dkato 0:f782d9c66c49 197
dkato 0:f782d9c66c49 198 #ifndef __FPU_PRESENT
dkato 0:f782d9c66c49 199 #define __FPU_PRESENT 1
dkato 0:f782d9c66c49 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
dkato 0:f782d9c66c49 201 #endif
dkato 0:f782d9c66c49 202
dkato 0:f782d9c66c49 203 #ifndef __Vendor_SysTickConfig
dkato 0:f782d9c66c49 204 #define __Vendor_SysTickConfig 1
dkato 0:f782d9c66c49 205 #endif
dkato 0:f782d9c66c49 206
dkato 0:f782d9c66c49 207 #if __Vendor_SysTickConfig == 0
dkato 0:f782d9c66c49 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
dkato 0:f782d9c66c49 209 #endif
dkato 0:f782d9c66c49 210 #endif
dkato 0:f782d9c66c49 211
dkato 0:f782d9c66c49 212 /* IO definitions (access restrictions to peripheral registers) */
dkato 0:f782d9c66c49 213 /**
dkato 0:f782d9c66c49 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
dkato 0:f782d9c66c49 215
dkato 0:f782d9c66c49 216 <strong>IO Type Qualifiers</strong> are used
dkato 0:f782d9c66c49 217 \li to specify the access to peripheral variables.
dkato 0:f782d9c66c49 218 \li for automatic generation of peripheral register debug information.
dkato 0:f782d9c66c49 219 */
dkato 0:f782d9c66c49 220 #ifdef __cplusplus
dkato 0:f782d9c66c49 221 #define __I volatile /*!< Defines 'read only' permissions */
dkato 0:f782d9c66c49 222 #else
dkato 0:f782d9c66c49 223 #define __I volatile const /*!< Defines 'read only' permissions */
dkato 0:f782d9c66c49 224 #endif
dkato 0:f782d9c66c49 225 #define __O volatile /*!< Defines 'write only' permissions */
dkato 0:f782d9c66c49 226 #define __IO volatile /*!< Defines 'read / write' permissions */
dkato 0:f782d9c66c49 227
dkato 0:f782d9c66c49 228 /*@} end of group Cortex_A9 */
dkato 0:f782d9c66c49 229
dkato 0:f782d9c66c49 230
dkato 0:f782d9c66c49 231 /*******************************************************************************
dkato 0:f782d9c66c49 232 * Register Abstraction
dkato 0:f782d9c66c49 233 ******************************************************************************/
dkato 0:f782d9c66c49 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
dkato 0:f782d9c66c49 235 \brief Type definitions and defines for Cortex-A processor based devices.
dkato 0:f782d9c66c49 236 */
dkato 0:f782d9c66c49 237
dkato 0:f782d9c66c49 238 /** \ingroup CMSIS_core_register
dkato 0:f782d9c66c49 239 \defgroup CMSIS_CORE Status and Control Registers
dkato 0:f782d9c66c49 240 \brief Core Register type definitions.
dkato 0:f782d9c66c49 241 @{
dkato 0:f782d9c66c49 242 */
dkato 0:f782d9c66c49 243
dkato 0:f782d9c66c49 244 /** \brief Union type to access the Application Program Status Register (APSR).
dkato 0:f782d9c66c49 245 */
dkato 0:f782d9c66c49 246 typedef union
dkato 0:f782d9c66c49 247 {
dkato 0:f782d9c66c49 248 struct
dkato 0:f782d9c66c49 249 {
dkato 0:f782d9c66c49 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
dkato 0:f782d9c66c49 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
dkato 0:f782d9c66c49 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
dkato 0:f782d9c66c49 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
dkato 0:f782d9c66c49 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
dkato 0:f782d9c66c49 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
dkato 0:f782d9c66c49 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
dkato 0:f782d9c66c49 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
dkato 0:f782d9c66c49 258 } b; /*!< Structure used for bit access */
dkato 0:f782d9c66c49 259 uint32_t w; /*!< Type used for word access */
dkato 0:f782d9c66c49 260 } APSR_Type;
dkato 0:f782d9c66c49 261
dkato 0:f782d9c66c49 262
dkato 0:f782d9c66c49 263 /*@} end of group CMSIS_CORE */
dkato 0:f782d9c66c49 264
dkato 0:f782d9c66c49 265 /*@} end of CMSIS_Core_FPUFunctions */
dkato 0:f782d9c66c49 266
dkato 0:f782d9c66c49 267
dkato 0:f782d9c66c49 268 #endif /* __CORE_CA9_H_GENERIC */
dkato 0:f782d9c66c49 269
dkato 0:f782d9c66c49 270 #endif /* __CMSIS_GENERIC */
dkato 0:f782d9c66c49 271
dkato 0:f782d9c66c49 272 #ifdef __cplusplus
dkato 0:f782d9c66c49 273 }
dkato 0:f782d9c66c49 274
dkato 0:f782d9c66c49 275
dkato 0:f782d9c66c49 276 #endif