Daiki Kato / mbed-dev_tmp

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targets/hal/TARGET_STM/TARGET_STM32F4/serial_api.c@55:814265bf5462, 2016-01-29 (annotated)

Committer:
mbed_official
Date:
Fri Jan 29 13:30:11 2016 +0000
Revision:
55:814265bf5462
Parent:
0:9b334a45a8ff
Child:
60:6e6ed0527880
Synchronized with git revision bad9c120124289d7176748df4ebcc6b2e1cbfd1e



Full URL: https://github.com/mbedmicro/mbed/commit/bad9c120124289d7176748df4ebcc6b2e1cbfd1e/



B96B async serial

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 *******************************************************************************
bogdanm 0:9b334a45a8ff 3 * Copyright (c) 2015, STMicroelectronics
bogdanm 0:9b334a45a8ff 4 * All rights reserved.
bogdanm 0:9b334a45a8ff 5 *
bogdanm 0:9b334a45a8ff 6 * Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 7 * modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 10 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 12 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 13 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 15 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 16 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 17 *
bogdanm 0:9b334a45a8ff 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 28 *******************************************************************************
bogdanm 0:9b334a45a8ff 29 */
bogdanm 0:9b334a45a8ff 30 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 31 #include "serial_api.h"
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 #if DEVICE_SERIAL
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 36 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 37 #include <string.h>
bogdanm 0:9b334a45a8ff 38 #include "PeripheralPins.h"
bogdanm 0:9b334a45a8ff 39 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 #define UART_NUM (8)
mbed_official 55:814265bf5462 42 #define UART_STATE_RX_ACTIVE 0x20
mbed_official 55:814265bf5462 43 #define UART_STATE_TX_ACTIVE 0x10
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 static uint32_t serial_irq_ids[UART_NUM] = {0, 0, 0, 0, 0, 0, 0, 0};
bogdanm 0:9b334a45a8ff 46
mbed_official 55:814265bf5462 47 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 48 static const uint32_t DMA_UartRx_Channel[UART_NUM] = {DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_5, DMA_CHANNEL_5, DMA_CHANNEL_5};
mbed_official 55:814265bf5462 49 static const uint32_t DMA_UartRx_Stream[UART_NUM] = {(uint32_t)DMA2_Stream5, (uint32_t) DMA1_Stream5, (uint32_t) DMA1_Stream1, (uint32_t) DMA1_Stream2, (uint32_t) DMA1_Stream0, (uint32_t) DMA2_Stream5, (uint32_t) DMA1_Stream3, (uint32_t) DMA1_Stream6};
mbed_official 55:814265bf5462 50 static const uint32_t DMA_UartTx_Channel[UART_NUM] = {DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_4, DMA_CHANNEL_5, DMA_CHANNEL_5, DMA_CHANNEL_5};
mbed_official 55:814265bf5462 51 static const uint32_t DMA_UartTx_Stream[UART_NUM] = {(uint32_t)DMA2_Stream7, (uint32_t) DMA1_Stream6, (uint32_t) DMA1_Stream3, (uint32_t) DMA1_Stream4, (uint32_t) DMA1_Stream7, (uint32_t) DMA2_Stream6, (uint32_t) DMA1_Stream1, (uint32_t) DMA1_Stream0};
mbed_official 55:814265bf5462 52
mbed_official 55:814265bf5462 53 #endif
bogdanm 0:9b334a45a8ff 54 static uart_irq_handler irq_handler;
bogdanm 0:9b334a45a8ff 55
mbed_official 55:814265bf5462 56 DMA_HandleTypeDef DmaHandle;
bogdanm 0:9b334a45a8ff 57 UART_HandleTypeDef UartHandle;
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 int stdio_uart_inited = 0;
bogdanm 0:9b334a45a8ff 60 serial_t stdio_uart;
bogdanm 0:9b334a45a8ff 61
mbed_official 55:814265bf5462 62 #if DEVICE_SERIAL_ASYNCH
mbed_official 55:814265bf5462 63 #define SERIAL_OBJ(X) (obj->serial.X)
mbed_official 55:814265bf5462 64 #else
mbed_official 55:814265bf5462 65 #define SERIAL_OBJ(X) (obj->X)
mbed_official 55:814265bf5462 66 #endif
mbed_official 55:814265bf5462 67
bogdanm 0:9b334a45a8ff 68 static void init_uart(serial_t *obj)
bogdanm 0:9b334a45a8ff 69 {
mbed_official 55:814265bf5462 70 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 71 static DMA_HandleTypeDef hdma_tx;
mbed_official 55:814265bf5462 72 static DMA_HandleTypeDef hdma_rx;
mbed_official 55:814265bf5462 73 #endif
mbed_official 55:814265bf5462 74
mbed_official 55:814265bf5462 75 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
bogdanm 0:9b334a45a8ff 76
mbed_official 55:814265bf5462 77 UartHandle.Init.BaudRate = SERIAL_OBJ(baudrate);
mbed_official 55:814265bf5462 78 UartHandle.Init.WordLength = SERIAL_OBJ(databits);
mbed_official 55:814265bf5462 79 UartHandle.Init.StopBits = SERIAL_OBJ(stopbits);
mbed_official 55:814265bf5462 80 UartHandle.Init.Parity = SERIAL_OBJ(parity);
bogdanm 0:9b334a45a8ff 81 UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
mbed_official 55:814265bf5462 82 UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
bogdanm 0:9b334a45a8ff 83
mbed_official 55:814265bf5462 84 if (SERIAL_OBJ(pin_rx) == NC) {
bogdanm 0:9b334a45a8ff 85 UartHandle.Init.Mode = UART_MODE_TX;
mbed_official 55:814265bf5462 86 } else if (SERIAL_OBJ(pin_tx) == NC) {
bogdanm 0:9b334a45a8ff 87 UartHandle.Init.Mode = UART_MODE_RX;
bogdanm 0:9b334a45a8ff 88 } else {
bogdanm 0:9b334a45a8ff 89 UartHandle.Init.Mode = UART_MODE_TX_RX;
bogdanm 0:9b334a45a8ff 90 }
mbed_official 55:814265bf5462 91 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 92 if (SERIAL_OBJ(pin_tx) != NC) {
mbed_official 55:814265bf5462 93 // set DMA in the UartHandle
mbed_official 55:814265bf5462 94 /* Configure the DMA handler for Transmission process */
mbed_official 55:814265bf5462 95 hdma_tx.Instance = (DMA_Stream_TypeDef *)DMA_UartTx_Stream[SERIAL_OBJ(index)];
mbed_official 55:814265bf5462 96 hdma_tx.Init.Channel = DMA_UartTx_Channel[SERIAL_OBJ(index)];
mbed_official 55:814265bf5462 97 hdma_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
mbed_official 55:814265bf5462 98 hdma_tx.Init.PeriphInc = DMA_PINC_DISABLE;
mbed_official 55:814265bf5462 99 hdma_tx.Init.MemInc = DMA_MINC_ENABLE;
mbed_official 55:814265bf5462 100 hdma_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
mbed_official 55:814265bf5462 101 hdma_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
mbed_official 55:814265bf5462 102 hdma_tx.Init.Mode = DMA_NORMAL;
mbed_official 55:814265bf5462 103 hdma_tx.Init.Priority = DMA_PRIORITY_LOW;
mbed_official 55:814265bf5462 104 hdma_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
mbed_official 55:814265bf5462 105 hdma_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
mbed_official 55:814265bf5462 106 hdma_tx.Init.MemBurst = DMA_MBURST_INC4;
mbed_official 55:814265bf5462 107 hdma_tx.Init.PeriphBurst = DMA_PBURST_INC4;
mbed_official 55:814265bf5462 108
mbed_official 55:814265bf5462 109 HAL_DMA_Init(&hdma_tx);
mbed_official 55:814265bf5462 110
mbed_official 55:814265bf5462 111 /* Associate the initialized DMA handle to the UART handle */
mbed_official 55:814265bf5462 112 __HAL_LINKDMA(&UartHandle, hdmatx, hdma_tx);
mbed_official 55:814265bf5462 113 }
mbed_official 55:814265bf5462 114
mbed_official 55:814265bf5462 115 if (SERIAL_OBJ(pin_rx) != NC) {
mbed_official 55:814265bf5462 116 /* Configure the DMA handler for reception process */
mbed_official 55:814265bf5462 117 hdma_rx.Instance = (DMA_Stream_TypeDef *)DMA_UartRx_Stream[SERIAL_OBJ(index)];
mbed_official 55:814265bf5462 118 hdma_rx.Init.Channel = DMA_UartRx_Channel[SERIAL_OBJ(index)];
mbed_official 55:814265bf5462 119 hdma_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
mbed_official 55:814265bf5462 120 hdma_rx.Init.PeriphInc = DMA_PINC_DISABLE;
mbed_official 55:814265bf5462 121 hdma_rx.Init.MemInc = DMA_MINC_ENABLE;
mbed_official 55:814265bf5462 122 hdma_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
mbed_official 55:814265bf5462 123 hdma_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
mbed_official 55:814265bf5462 124 hdma_rx.Init.Mode = DMA_NORMAL;
mbed_official 55:814265bf5462 125 hdma_rx.Init.Priority = DMA_PRIORITY_HIGH;
mbed_official 55:814265bf5462 126 hdma_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
mbed_official 55:814265bf5462 127 hdma_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
mbed_official 55:814265bf5462 128 hdma_rx.Init.MemBurst = DMA_MBURST_INC4;
mbed_official 55:814265bf5462 129 hdma_rx.Init.PeriphBurst = DMA_PBURST_INC4;
mbed_official 55:814265bf5462 130
mbed_official 55:814265bf5462 131 HAL_DMA_Init(&hdma_rx);
mbed_official 55:814265bf5462 132
mbed_official 55:814265bf5462 133 /* Associate the initialized DMA handle to the UART handle */
mbed_official 55:814265bf5462 134 __HAL_LINKDMA(&UartHandle, hdmarx, hdma_rx);
mbed_official 55:814265bf5462 135 }
mbed_official 55:814265bf5462 136 #endif
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138 if (HAL_UART_Init(&UartHandle) != HAL_OK) {
mbed_official 55:814265bf5462 139 error("Cannot initialize UART\n");
bogdanm 0:9b334a45a8ff 140 }
bogdanm 0:9b334a45a8ff 141 }
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143 void serial_init(serial_t *obj, PinName tx, PinName rx)
bogdanm 0:9b334a45a8ff 144 {
bogdanm 0:9b334a45a8ff 145 // Determine the UART to use (UART_1, UART_2, ...)
bogdanm 0:9b334a45a8ff 146 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 147 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
bogdanm 0:9b334a45a8ff 148
bogdanm 0:9b334a45a8ff 149 // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
mbed_official 55:814265bf5462 150 SERIAL_OBJ(uart) = (UARTName)pinmap_merge(uart_tx, uart_rx);
mbed_official 55:814265bf5462 151
mbed_official 55:814265bf5462 152 MBED_ASSERT(SERIAL_OBJ(uart) != (UARTName)NC);
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 // Enable USART clock
mbed_official 55:814265bf5462 155 switch (SERIAL_OBJ(uart)) {
bogdanm 0:9b334a45a8ff 156 case UART_1:
bogdanm 0:9b334a45a8ff 157 __HAL_RCC_USART1_CLK_ENABLE();
mbed_official 55:814265bf5462 158 SERIAL_OBJ(index) = 0;
mbed_official 55:814265bf5462 159 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 160 __HAL_RCC_DMA2_CLK_ENABLE();
mbed_official 55:814265bf5462 161 #endif
bogdanm 0:9b334a45a8ff 162 break;
bogdanm 0:9b334a45a8ff 163 case UART_2:
bogdanm 0:9b334a45a8ff 164 __HAL_RCC_USART2_CLK_ENABLE();
mbed_official 55:814265bf5462 165 SERIAL_OBJ(index) = 1;
mbed_official 55:814265bf5462 166 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 167 __HAL_RCC_DMA1_CLK_ENABLE();
mbed_official 55:814265bf5462 168 #endif
bogdanm 0:9b334a45a8ff 169 break;
bogdanm 0:9b334a45a8ff 170 #if defined(USART3_BASE)
bogdanm 0:9b334a45a8ff 171 case UART_3:
bogdanm 0:9b334a45a8ff 172 __HAL_RCC_USART3_CLK_ENABLE();
mbed_official 55:814265bf5462 173 SERIAL_OBJ(index) = 2;
mbed_official 55:814265bf5462 174 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 175 __HAL_RCC_DMA1_CLK_ENABLE();
mbed_official 55:814265bf5462 176 #endif
bogdanm 0:9b334a45a8ff 177 break;
bogdanm 0:9b334a45a8ff 178 #endif
bogdanm 0:9b334a45a8ff 179 #if defined(UART4_BASE)
bogdanm 0:9b334a45a8ff 180 case UART_4:
bogdanm 0:9b334a45a8ff 181 __HAL_RCC_UART4_CLK_ENABLE();
mbed_official 55:814265bf5462 182 SERIAL_OBJ(index) = 3;
mbed_official 55:814265bf5462 183 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 184 __HAL_RCC_DMA1_CLK_ENABLE();
mbed_official 55:814265bf5462 185 #endif
bogdanm 0:9b334a45a8ff 186 break;
bogdanm 0:9b334a45a8ff 187 #endif
bogdanm 0:9b334a45a8ff 188 #if defined(UART5_BASE)
bogdanm 0:9b334a45a8ff 189 case UART_5:
bogdanm 0:9b334a45a8ff 190 __HAL_RCC_UART5_CLK_ENABLE();
mbed_official 55:814265bf5462 191 SERIAL_OBJ(index) = 4;
mbed_official 55:814265bf5462 192 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 193 __HAL_RCC_DMA1_CLK_ENABLE();
mbed_official 55:814265bf5462 194 #endif
bogdanm 0:9b334a45a8ff 195 break;
bogdanm 0:9b334a45a8ff 196 #endif
bogdanm 0:9b334a45a8ff 197 #if defined(USART6_BASE)
bogdanm 0:9b334a45a8ff 198 case UART_6:
bogdanm 0:9b334a45a8ff 199 __HAL_RCC_USART6_CLK_ENABLE();
mbed_official 55:814265bf5462 200 SERIAL_OBJ(index) = 5;
mbed_official 55:814265bf5462 201 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 202 __HAL_RCC_DMA2_CLK_ENABLE();
mbed_official 55:814265bf5462 203 #endif
bogdanm 0:9b334a45a8ff 204 break;
bogdanm 0:9b334a45a8ff 205 #endif
bogdanm 0:9b334a45a8ff 206 #if defined(UART7_BASE)
bogdanm 0:9b334a45a8ff 207 case UART_7:
bogdanm 0:9b334a45a8ff 208 __HAL_RCC_UART7_CLK_ENABLE();
mbed_official 55:814265bf5462 209 SERIAL_OBJ(index) = 6;
mbed_official 55:814265bf5462 210 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 211 __HAL_RCC_DMA1_CLK_ENABLE();
mbed_official 55:814265bf5462 212 #endif
bogdanm 0:9b334a45a8ff 213 break;
bogdanm 0:9b334a45a8ff 214 #endif
bogdanm 0:9b334a45a8ff 215 #if defined(UART8_BASE)
bogdanm 0:9b334a45a8ff 216 case UART_8:
bogdanm 0:9b334a45a8ff 217 __HAL_RCC_UART8_CLK_ENABLE();
mbed_official 55:814265bf5462 218 SERIAL_OBJ(index) = 7;
mbed_official 55:814265bf5462 219 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 220 __HAL_RCC_DMA1_CLK_ENABLE();
mbed_official 55:814265bf5462 221 #endif
bogdanm 0:9b334a45a8ff 222 break;
bogdanm 0:9b334a45a8ff 223 #endif
bogdanm 0:9b334a45a8ff 224 }
bogdanm 0:9b334a45a8ff 225
bogdanm 0:9b334a45a8ff 226 // Configure the UART pins
bogdanm 0:9b334a45a8ff 227 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 228 pinmap_pinout(rx, PinMap_UART_RX);
mbed_official 55:814265bf5462 229
bogdanm 0:9b334a45a8ff 230 if (tx != NC) {
bogdanm 0:9b334a45a8ff 231 pin_mode(tx, PullUp);
bogdanm 0:9b334a45a8ff 232 }
bogdanm 0:9b334a45a8ff 233 if (rx != NC) {
bogdanm 0:9b334a45a8ff 234 pin_mode(rx, PullUp);
bogdanm 0:9b334a45a8ff 235 }
bogdanm 0:9b334a45a8ff 236
bogdanm 0:9b334a45a8ff 237 // Configure UART
mbed_official 55:814265bf5462 238 SERIAL_OBJ(baudrate) = 9600;
mbed_official 55:814265bf5462 239 SERIAL_OBJ(databits) = UART_WORDLENGTH_8B;
mbed_official 55:814265bf5462 240 SERIAL_OBJ(stopbits) = UART_STOPBITS_1;
mbed_official 55:814265bf5462 241 SERIAL_OBJ(parity) = UART_PARITY_NONE;
bogdanm 0:9b334a45a8ff 242
mbed_official 55:814265bf5462 243 SERIAL_OBJ(pin_tx) = tx;
mbed_official 55:814265bf5462 244 SERIAL_OBJ(pin_rx) = rx;
bogdanm 0:9b334a45a8ff 245
bogdanm 0:9b334a45a8ff 246 init_uart(obj);
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 // For stdio management
mbed_official 55:814265bf5462 249 if (SERIAL_OBJ(uart) == STDIO_UART) {
bogdanm 0:9b334a45a8ff 250 stdio_uart_inited = 1;
bogdanm 0:9b334a45a8ff 251 memcpy(&stdio_uart, obj, sizeof(serial_t));
bogdanm 0:9b334a45a8ff 252 }
bogdanm 0:9b334a45a8ff 253 }
bogdanm 0:9b334a45a8ff 254
bogdanm 0:9b334a45a8ff 255 void serial_free(serial_t *obj)
bogdanm 0:9b334a45a8ff 256 {
bogdanm 0:9b334a45a8ff 257 // Reset UART and disable clock
mbed_official 55:814265bf5462 258 switch (SERIAL_OBJ(uart)) {
bogdanm 0:9b334a45a8ff 259 case UART_1:
bogdanm 0:9b334a45a8ff 260 __USART1_FORCE_RESET();
bogdanm 0:9b334a45a8ff 261 __USART1_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 262 __USART1_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 263 break;
bogdanm 0:9b334a45a8ff 264 case UART_2:
bogdanm 0:9b334a45a8ff 265 __USART2_FORCE_RESET();
bogdanm 0:9b334a45a8ff 266 __USART2_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 267 __USART2_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 268 break;
bogdanm 0:9b334a45a8ff 269 #if defined(USART3_BASE)
bogdanm 0:9b334a45a8ff 270 case UART_3:
bogdanm 0:9b334a45a8ff 271 __USART3_FORCE_RESET();
bogdanm 0:9b334a45a8ff 272 __USART3_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 273 __USART3_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 274 break;
bogdanm 0:9b334a45a8ff 275 #endif
bogdanm 0:9b334a45a8ff 276 #if defined(UART4_BASE)
bogdanm 0:9b334a45a8ff 277 case UART_4:
bogdanm 0:9b334a45a8ff 278 __UART4_FORCE_RESET();
bogdanm 0:9b334a45a8ff 279 __UART4_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 280 __UART4_CLK_DISABLE();
mbed_official 55:814265bf5462 281 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 282 __HAL_RCC_DMA1_CLK_DISABLE();
mbed_official 55:814265bf5462 283 #endif
bogdanm 0:9b334a45a8ff 284 break;
bogdanm 0:9b334a45a8ff 285 #endif
bogdanm 0:9b334a45a8ff 286 #if defined(UART5_BASE)
bogdanm 0:9b334a45a8ff 287 case UART_5:
bogdanm 0:9b334a45a8ff 288 __UART5_FORCE_RESET();
bogdanm 0:9b334a45a8ff 289 __UART5_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 290 __UART5_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 291 break;
bogdanm 0:9b334a45a8ff 292 #endif
bogdanm 0:9b334a45a8ff 293 #if defined(USART6_BASE)
bogdanm 0:9b334a45a8ff 294 case UART_6:
bogdanm 0:9b334a45a8ff 295 __USART6_FORCE_RESET();
bogdanm 0:9b334a45a8ff 296 __USART6_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 297 __USART6_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 298 break;
bogdanm 0:9b334a45a8ff 299 #endif
bogdanm 0:9b334a45a8ff 300 #if defined(UART7_BASE)
bogdanm 0:9b334a45a8ff 301 case UART_7:
bogdanm 0:9b334a45a8ff 302 __UART7_FORCE_RESET();
bogdanm 0:9b334a45a8ff 303 __UART7_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 304 __UART7_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 305 break;
bogdanm 0:9b334a45a8ff 306 #endif
bogdanm 0:9b334a45a8ff 307 #if defined(UART8_BASE)
bogdanm 0:9b334a45a8ff 308 case UART_8:
bogdanm 0:9b334a45a8ff 309 __UART8_FORCE_RESET();
bogdanm 0:9b334a45a8ff 310 __UART8_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 311 __UART8_CLK_DISABLE();
bogdanm 0:9b334a45a8ff 312 break;
bogdanm 0:9b334a45a8ff 313 #endif
bogdanm 0:9b334a45a8ff 314 }
bogdanm 0:9b334a45a8ff 315 // Configure GPIOs
mbed_official 55:814265bf5462 316 pin_function(SERIAL_OBJ(pin_tx), STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
mbed_official 55:814265bf5462 317 pin_function(SERIAL_OBJ(pin_rx), STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
bogdanm 0:9b334a45a8ff 318
mbed_official 55:814265bf5462 319 serial_irq_ids[SERIAL_OBJ(index)] = 0;
bogdanm 0:9b334a45a8ff 320 }
bogdanm 0:9b334a45a8ff 321
bogdanm 0:9b334a45a8ff 322 void serial_baud(serial_t *obj, int baudrate)
bogdanm 0:9b334a45a8ff 323 {
mbed_official 55:814265bf5462 324 SERIAL_OBJ(baudrate) = baudrate;
bogdanm 0:9b334a45a8ff 325 init_uart(obj);
bogdanm 0:9b334a45a8ff 326 }
bogdanm 0:9b334a45a8ff 327
bogdanm 0:9b334a45a8ff 328 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
bogdanm 0:9b334a45a8ff 329 {
bogdanm 0:9b334a45a8ff 330 if (data_bits == 9) {
mbed_official 55:814265bf5462 331 SERIAL_OBJ(databits) = UART_WORDLENGTH_9B;
bogdanm 0:9b334a45a8ff 332 } else {
mbed_official 55:814265bf5462 333 SERIAL_OBJ(databits) = UART_WORDLENGTH_8B;
bogdanm 0:9b334a45a8ff 334 }
bogdanm 0:9b334a45a8ff 335
bogdanm 0:9b334a45a8ff 336 switch (parity) {
bogdanm 0:9b334a45a8ff 337 case ParityOdd:
bogdanm 0:9b334a45a8ff 338 case ParityForced0:
mbed_official 55:814265bf5462 339 SERIAL_OBJ(parity) = UART_PARITY_ODD;
bogdanm 0:9b334a45a8ff 340 break;
bogdanm 0:9b334a45a8ff 341 case ParityEven:
bogdanm 0:9b334a45a8ff 342 case ParityForced1:
mbed_official 55:814265bf5462 343 SERIAL_OBJ(parity) = UART_PARITY_EVEN;
bogdanm 0:9b334a45a8ff 344 break;
bogdanm 0:9b334a45a8ff 345 default: // ParityNone
mbed_official 55:814265bf5462 346 SERIAL_OBJ(parity) = UART_PARITY_NONE;
bogdanm 0:9b334a45a8ff 347 break;
bogdanm 0:9b334a45a8ff 348 }
bogdanm 0:9b334a45a8ff 349
bogdanm 0:9b334a45a8ff 350 if (stop_bits == 2) {
mbed_official 55:814265bf5462 351 SERIAL_OBJ(stopbits) = UART_STOPBITS_2;
bogdanm 0:9b334a45a8ff 352 } else {
mbed_official 55:814265bf5462 353 SERIAL_OBJ(stopbits) = UART_STOPBITS_1;
bogdanm 0:9b334a45a8ff 354 }
bogdanm 0:9b334a45a8ff 355
bogdanm 0:9b334a45a8ff 356 init_uart(obj);
bogdanm 0:9b334a45a8ff 357 }
bogdanm 0:9b334a45a8ff 358
bogdanm 0:9b334a45a8ff 359 /******************************************************************************
bogdanm 0:9b334a45a8ff 360 * INTERRUPTS HANDLING
bogdanm 0:9b334a45a8ff 361 ******************************************************************************/
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 static void uart_irq(UARTName name, int id)
bogdanm 0:9b334a45a8ff 364 {
bogdanm 0:9b334a45a8ff 365 UartHandle.Instance = (USART_TypeDef *)name;
bogdanm 0:9b334a45a8ff 366 if (serial_irq_ids[id] != 0) {
bogdanm 0:9b334a45a8ff 367 if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TC) != RESET) {
bogdanm 0:9b334a45a8ff 368 irq_handler(serial_irq_ids[id], TxIrq);
bogdanm 0:9b334a45a8ff 369 __HAL_UART_CLEAR_FLAG(&UartHandle, UART_FLAG_TC);
bogdanm 0:9b334a45a8ff 370 }
bogdanm 0:9b334a45a8ff 371 if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE) != RESET) {
bogdanm 0:9b334a45a8ff 372 irq_handler(serial_irq_ids[id], RxIrq);
bogdanm 0:9b334a45a8ff 373 __HAL_UART_CLEAR_FLAG(&UartHandle, UART_FLAG_RXNE);
bogdanm 0:9b334a45a8ff 374 }
bogdanm 0:9b334a45a8ff 375 }
bogdanm 0:9b334a45a8ff 376 }
mbed_official 55:814265bf5462 377 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 378 static void dma_irq(DMAName name, int id)
mbed_official 55:814265bf5462 379 {
mbed_official 55:814265bf5462 380 // TO DO
mbed_official 55:814265bf5462 381 DmaHandle.Instance = (DMA_Stream_TypeDef *)name;
mbed_official 55:814265bf5462 382 if (serial_irq_ids[id] != 0) {
mbed_official 55:814265bf5462 383 if (__HAL_DMA_GET_TC_FLAG_INDEX(&DmaHandle) != RESET) {
mbed_official 55:814265bf5462 384 irq_handler(serial_irq_ids[id], TxIrq);
mbed_official 55:814265bf5462 385 __HAL_DMA_CLEAR_FLAG(&DmaHandle, DMA_FLAG_TCIF0_4);
mbed_official 55:814265bf5462 386 }
mbed_official 55:814265bf5462 387 if (__HAL_DMA_GET_TC_FLAG_INDEX(&DmaHandle) != RESET) {
mbed_official 55:814265bf5462 388 irq_handler(serial_irq_ids[id], RxIrq);
mbed_official 55:814265bf5462 389 __HAL_DMA_CLEAR_FLAG(&DmaHandle, DMA_FLAG_TCIF2_6);
mbed_official 55:814265bf5462 390 }
mbed_official 55:814265bf5462 391 }
mbed_official 55:814265bf5462 392 }
mbed_official 55:814265bf5462 393 #endif
bogdanm 0:9b334a45a8ff 394
bogdanm 0:9b334a45a8ff 395 static void uart1_irq(void)
bogdanm 0:9b334a45a8ff 396 {
bogdanm 0:9b334a45a8ff 397 uart_irq(UART_1, 0);
bogdanm 0:9b334a45a8ff 398 }
bogdanm 0:9b334a45a8ff 399
bogdanm 0:9b334a45a8ff 400 static void uart2_irq(void)
bogdanm 0:9b334a45a8ff 401 {
bogdanm 0:9b334a45a8ff 402 uart_irq(UART_2, 1);
bogdanm 0:9b334a45a8ff 403 }
bogdanm 0:9b334a45a8ff 404
bogdanm 0:9b334a45a8ff 405 #if defined(USART3_BASE)
bogdanm 0:9b334a45a8ff 406 static void uart3_irq(void)
bogdanm 0:9b334a45a8ff 407 {
bogdanm 0:9b334a45a8ff 408 uart_irq(UART_3, 2);
bogdanm 0:9b334a45a8ff 409 }
bogdanm 0:9b334a45a8ff 410 #endif
bogdanm 0:9b334a45a8ff 411
bogdanm 0:9b334a45a8ff 412 #if defined(UART4_BASE)
bogdanm 0:9b334a45a8ff 413 static void uart4_irq(void)
bogdanm 0:9b334a45a8ff 414 {
bogdanm 0:9b334a45a8ff 415 uart_irq(UART_4, 3);
bogdanm 0:9b334a45a8ff 416 }
mbed_official 55:814265bf5462 417 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 418
mbed_official 55:814265bf5462 419 static void dma1_stream2_irq(void)
mbed_official 55:814265bf5462 420 {
mbed_official 55:814265bf5462 421 dma_irq(DMA_1, 3 /* TO DO : ??? WHAT IS THIS 3 ??? */);
mbed_official 55:814265bf5462 422 }
mbed_official 55:814265bf5462 423
mbed_official 55:814265bf5462 424
mbed_official 55:814265bf5462 425 static void dma1_stream4_irq(void)
mbed_official 55:814265bf5462 426 {
mbed_official 55:814265bf5462 427 dma_irq(DMA_1, 3 /* TO DO : ??? WHAT IS THIS 3 ??? */);
mbed_official 55:814265bf5462 428 }
mbed_official 55:814265bf5462 429 #endif
bogdanm 0:9b334a45a8ff 430 #endif
bogdanm 0:9b334a45a8ff 431
bogdanm 0:9b334a45a8ff 432 #if defined(UART5_BASE)
bogdanm 0:9b334a45a8ff 433 static void uart5_irq(void)
bogdanm 0:9b334a45a8ff 434 {
bogdanm 0:9b334a45a8ff 435 uart_irq(UART_5, 4);
bogdanm 0:9b334a45a8ff 436 }
bogdanm 0:9b334a45a8ff 437 #endif
bogdanm 0:9b334a45a8ff 438
bogdanm 0:9b334a45a8ff 439 #if defined(USART6_BASE)
bogdanm 0:9b334a45a8ff 440 static void uart6_irq(void)
bogdanm 0:9b334a45a8ff 441 {
bogdanm 0:9b334a45a8ff 442 uart_irq(UART_6, 5);
bogdanm 0:9b334a45a8ff 443 }
bogdanm 0:9b334a45a8ff 444 #endif
bogdanm 0:9b334a45a8ff 445
bogdanm 0:9b334a45a8ff 446 #if defined(UART7_BASE)
bogdanm 0:9b334a45a8ff 447 static void uart7_irq(void)
bogdanm 0:9b334a45a8ff 448 {
bogdanm 0:9b334a45a8ff 449 uart_irq(UART_7, 6);
bogdanm 0:9b334a45a8ff 450 }
bogdanm 0:9b334a45a8ff 451 #endif
bogdanm 0:9b334a45a8ff 452
bogdanm 0:9b334a45a8ff 453 #if defined(UART8_BASE)
bogdanm 0:9b334a45a8ff 454 static void uart8_irq(void)
bogdanm 0:9b334a45a8ff 455 {
bogdanm 0:9b334a45a8ff 456 uart_irq(UART_8, 7);
bogdanm 0:9b334a45a8ff 457 }
bogdanm 0:9b334a45a8ff 458 #endif
bogdanm 0:9b334a45a8ff 459
bogdanm 0:9b334a45a8ff 460 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
bogdanm 0:9b334a45a8ff 461 {
bogdanm 0:9b334a45a8ff 462 irq_handler = handler;
mbed_official 55:814265bf5462 463 serial_irq_ids[SERIAL_OBJ(index)] = id;
bogdanm 0:9b334a45a8ff 464 }
bogdanm 0:9b334a45a8ff 465
bogdanm 0:9b334a45a8ff 466 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
bogdanm 0:9b334a45a8ff 467 {
bogdanm 0:9b334a45a8ff 468 IRQn_Type irq_n = (IRQn_Type)0;
bogdanm 0:9b334a45a8ff 469 uint32_t vector = 0;
mbed_official 55:814265bf5462 470 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 471 IRQn_Type irqn_dma = (IRQn_Type)0;
mbed_official 55:814265bf5462 472 uint32_t vector_dma = 0;
mbed_official 55:814265bf5462 473 #endif
bogdanm 0:9b334a45a8ff 474
mbed_official 55:814265bf5462 475 UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
bogdanm 0:9b334a45a8ff 476
mbed_official 55:814265bf5462 477 switch (SERIAL_OBJ(uart)) {
bogdanm 0:9b334a45a8ff 478 case UART_1:
bogdanm 0:9b334a45a8ff 479 irq_n = USART1_IRQn;
bogdanm 0:9b334a45a8ff 480 vector = (uint32_t)&uart1_irq;
bogdanm 0:9b334a45a8ff 481 break;
bogdanm 0:9b334a45a8ff 482
bogdanm 0:9b334a45a8ff 483 case UART_2:
bogdanm 0:9b334a45a8ff 484 irq_n = USART2_IRQn;
bogdanm 0:9b334a45a8ff 485 vector = (uint32_t)&uart2_irq;
bogdanm 0:9b334a45a8ff 486 break;
bogdanm 0:9b334a45a8ff 487 #if defined(USART3_BASE)
bogdanm 0:9b334a45a8ff 488 case UART_3:
bogdanm 0:9b334a45a8ff 489 irq_n = USART3_IRQn;
bogdanm 0:9b334a45a8ff 490 vector = (uint32_t)&uart3_irq;
bogdanm 0:9b334a45a8ff 491 break;
bogdanm 0:9b334a45a8ff 492 #endif
bogdanm 0:9b334a45a8ff 493 #if defined(UART4_BASE)
bogdanm 0:9b334a45a8ff 494 case UART_4:
bogdanm 0:9b334a45a8ff 495 irq_n = UART4_IRQn;
bogdanm 0:9b334a45a8ff 496 vector = (uint32_t)&uart4_irq;
mbed_official 55:814265bf5462 497 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 498 if (irq == RxIrq) {
mbed_official 55:814265bf5462 499 irqn_dma = DMA1_Stream2_IRQn;
mbed_official 55:814265bf5462 500 vector_dma = (uint32_t)&dma1_stream2_irq;
mbed_official 55:814265bf5462 501 } else {
mbed_official 55:814265bf5462 502 irqn_dma = DMA1_Stream4_IRQn;
mbed_official 55:814265bf5462 503 vector_dma = (uint32_t)&dma1_stream4_irq;
mbed_official 55:814265bf5462 504 }
mbed_official 55:814265bf5462 505 #endif
bogdanm 0:9b334a45a8ff 506 break;
bogdanm 0:9b334a45a8ff 507 #endif
bogdanm 0:9b334a45a8ff 508 #if defined(UART5_BASE)
bogdanm 0:9b334a45a8ff 509 case UART_5:
bogdanm 0:9b334a45a8ff 510 irq_n = UART5_IRQn;
bogdanm 0:9b334a45a8ff 511 vector = (uint32_t)&uart5_irq;
bogdanm 0:9b334a45a8ff 512 break;
bogdanm 0:9b334a45a8ff 513 #endif
bogdanm 0:9b334a45a8ff 514 #if defined(USART6_BASE)
bogdanm 0:9b334a45a8ff 515 case UART_6:
bogdanm 0:9b334a45a8ff 516 irq_n = USART6_IRQn;
bogdanm 0:9b334a45a8ff 517 vector = (uint32_t)&uart6_irq;
bogdanm 0:9b334a45a8ff 518 break;
bogdanm 0:9b334a45a8ff 519 #endif
bogdanm 0:9b334a45a8ff 520 #if defined(UART7_BASE)
bogdanm 0:9b334a45a8ff 521 case UART_7:
bogdanm 0:9b334a45a8ff 522 irq_n = UART7_IRQn;
bogdanm 0:9b334a45a8ff 523 vector = (uint32_t)&uart7_irq;
bogdanm 0:9b334a45a8ff 524 break;
bogdanm 0:9b334a45a8ff 525 #endif
bogdanm 0:9b334a45a8ff 526 #if defined(UART8_BASE)
bogdanm 0:9b334a45a8ff 527 case UART_8:
bogdanm 0:9b334a45a8ff 528 irq_n = UART8_IRQn;
bogdanm 0:9b334a45a8ff 529 vector = (uint32_t)&uart8_irq;
bogdanm 0:9b334a45a8ff 530 break;
bogdanm 0:9b334a45a8ff 531 #endif
bogdanm 0:9b334a45a8ff 532 }
bogdanm 0:9b334a45a8ff 533
bogdanm 0:9b334a45a8ff 534 if (enable) {
bogdanm 0:9b334a45a8ff 535
bogdanm 0:9b334a45a8ff 536 if (irq == RxIrq) {
bogdanm 0:9b334a45a8ff 537 __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE);
mbed_official 55:814265bf5462 538 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 539 NVIC_SetVector(irq_n, vector_dma);
mbed_official 55:814265bf5462 540 NVIC_EnableIRQ(irq_n);
mbed_official 55:814265bf5462 541 NVIC_SetVector(irqn_dma, vector_dma);
mbed_official 55:814265bf5462 542 NVIC_EnableIRQ(irqn_dma);
mbed_official 55:814265bf5462 543 #else
mbed_official 55:814265bf5462 544 NVIC_SetVector(irq_n, vector);
mbed_official 55:814265bf5462 545 NVIC_EnableIRQ(irq_n);
mbed_official 55:814265bf5462 546 #endif
bogdanm 0:9b334a45a8ff 547 } else { // TxIrq
bogdanm 0:9b334a45a8ff 548 __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_TC);
mbed_official 55:814265bf5462 549 NVIC_SetVector(irq_n, vector);
mbed_official 55:814265bf5462 550 NVIC_EnableIRQ(irq_n);
mbed_official 55:814265bf5462 551 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 552 NVIC_SetVector(irqn_dma, vector_dma);
mbed_official 55:814265bf5462 553 NVIC_EnableIRQ(irqn_dma);
mbed_official 55:814265bf5462 554 #endif
bogdanm 0:9b334a45a8ff 555 }
bogdanm 0:9b334a45a8ff 556 } else { // disable
bogdanm 0:9b334a45a8ff 557
bogdanm 0:9b334a45a8ff 558 int all_disabled = 0;
bogdanm 0:9b334a45a8ff 559
bogdanm 0:9b334a45a8ff 560 if (irq == RxIrq) {
bogdanm 0:9b334a45a8ff 561 __HAL_UART_DISABLE_IT(&UartHandle, UART_IT_RXNE);
bogdanm 0:9b334a45a8ff 562 // Check if TxIrq is disabled too
bogdanm 0:9b334a45a8ff 563 if ((UartHandle.Instance->CR1 & USART_CR1_TXEIE) == 0) all_disabled = 1;
bogdanm 0:9b334a45a8ff 564 } else { // TxIrq
bogdanm 0:9b334a45a8ff 565 __HAL_UART_DISABLE_IT(&UartHandle, UART_IT_TXE);
bogdanm 0:9b334a45a8ff 566 // Check if RxIrq is disabled too
bogdanm 0:9b334a45a8ff 567 if ((UartHandle.Instance->CR1 & USART_CR1_RXNEIE) == 0) all_disabled = 1;
bogdanm 0:9b334a45a8ff 568 }
bogdanm 0:9b334a45a8ff 569
mbed_official 55:814265bf5462 570 if (all_disabled) {
mbed_official 55:814265bf5462 571 NVIC_DisableIRQ(irq_n);
mbed_official 55:814265bf5462 572 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 573 NVIC_DisableIRQ(irqn_dma);
mbed_official 55:814265bf5462 574 #endif
mbed_official 55:814265bf5462 575 }
bogdanm 0:9b334a45a8ff 576
bogdanm 0:9b334a45a8ff 577 }
bogdanm 0:9b334a45a8ff 578 }
bogdanm 0:9b334a45a8ff 579
bogdanm 0:9b334a45a8ff 580 /******************************************************************************
bogdanm 0:9b334a45a8ff 581 * READ/WRITE
bogdanm 0:9b334a45a8ff 582 ******************************************************************************/
bogdanm 0:9b334a45a8ff 583
bogdanm 0:9b334a45a8ff 584 int serial_getc(serial_t *obj)
bogdanm 0:9b334a45a8ff 585 {
mbed_official 55:814265bf5462 586 USART_TypeDef *uart = (USART_TypeDef *)(SERIAL_OBJ(uart));
bogdanm 0:9b334a45a8ff 587 while (!serial_readable(obj));
bogdanm 0:9b334a45a8ff 588 return (int)(uart->DR & 0x1FF);
bogdanm 0:9b334a45a8ff 589 }
bogdanm 0:9b334a45a8ff 590
bogdanm 0:9b334a45a8ff 591 void serial_putc(serial_t *obj, int c)
bogdanm 0:9b334a45a8ff 592 {
mbed_official 55:814265bf5462 593 USART_TypeDef *uart = (USART_TypeDef *)(SERIAL_OBJ(uart));
bogdanm 0:9b334a45a8ff 594 while (!serial_writable(obj));
bogdanm 0:9b334a45a8ff 595 uart->DR = (uint32_t)(c & 0x1FF);
bogdanm 0:9b334a45a8ff 596 }
bogdanm 0:9b334a45a8ff 597
bogdanm 0:9b334a45a8ff 598 int serial_readable(serial_t *obj)
bogdanm 0:9b334a45a8ff 599 {
bogdanm 0:9b334a45a8ff 600 int status;
mbed_official 55:814265bf5462 601 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
bogdanm 0:9b334a45a8ff 602 // Check if data is received
bogdanm 0:9b334a45a8ff 603 status = ((__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE) != RESET) ? 1 : 0);
bogdanm 0:9b334a45a8ff 604 return status;
bogdanm 0:9b334a45a8ff 605 }
bogdanm 0:9b334a45a8ff 606
bogdanm 0:9b334a45a8ff 607 int serial_writable(serial_t *obj)
bogdanm 0:9b334a45a8ff 608 {
bogdanm 0:9b334a45a8ff 609 int status;
mbed_official 55:814265bf5462 610 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
bogdanm 0:9b334a45a8ff 611 // Check if data is transmitted
bogdanm 0:9b334a45a8ff 612 status = ((__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE) != RESET) ? 1 : 0);
bogdanm 0:9b334a45a8ff 613 return status;
bogdanm 0:9b334a45a8ff 614 }
bogdanm 0:9b334a45a8ff 615
bogdanm 0:9b334a45a8ff 616 void serial_clear(serial_t *obj)
bogdanm 0:9b334a45a8ff 617 {
mbed_official 55:814265bf5462 618 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
bogdanm 0:9b334a45a8ff 619 __HAL_UART_CLEAR_FLAG(&UartHandle, UART_FLAG_TXE);
bogdanm 0:9b334a45a8ff 620 __HAL_UART_CLEAR_FLAG(&UartHandle, UART_FLAG_RXNE);
bogdanm 0:9b334a45a8ff 621 }
bogdanm 0:9b334a45a8ff 622
bogdanm 0:9b334a45a8ff 623 void serial_pinout_tx(PinName tx)
bogdanm 0:9b334a45a8ff 624 {
bogdanm 0:9b334a45a8ff 625 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 626 }
bogdanm 0:9b334a45a8ff 627
bogdanm 0:9b334a45a8ff 628 void serial_break_set(serial_t *obj)
bogdanm 0:9b334a45a8ff 629 {
mbed_official 55:814265bf5462 630 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
bogdanm 0:9b334a45a8ff 631 HAL_LIN_SendBreak(&UartHandle);
bogdanm 0:9b334a45a8ff 632 }
bogdanm 0:9b334a45a8ff 633
bogdanm 0:9b334a45a8ff 634 void serial_break_clear(serial_t *obj)
bogdanm 0:9b334a45a8ff 635 {
bogdanm 0:9b334a45a8ff 636 }
bogdanm 0:9b334a45a8ff 637
mbed_official 55:814265bf5462 638 //########################################################################################
mbed_official 55:814265bf5462 639
mbed_official 55:814265bf5462 640 #if DEVICE_SERIAL_ASYNCH
mbed_official 55:814265bf5462 641
mbed_official 55:814265bf5462 642 //----------------------------------------------------------------------------------------
mbed_official 55:814265bf5462 643 // LOCAL HELPER FUNCTIONS
mbed_official 55:814265bf5462 644 //----------------------------------------------------------------------------------------
mbed_official 55:814265bf5462 645
mbed_official 55:814265bf5462 646 /** Configure the TX buffer for an asynchronous write serial transaction
mbed_official 55:814265bf5462 647 *
mbed_official 55:814265bf5462 648 * @param obj The serial object.
mbed_official 55:814265bf5462 649 * @param tx The buffer for sending.
mbed_official 55:814265bf5462 650 * @param tx_length The number of words to transmit.
mbed_official 55:814265bf5462 651 */
mbed_official 55:814265bf5462 652 static void h_serial_tx_buffer_set(serial_t *obj, void *tx, int tx_length, uint8_t width)
mbed_official 55:814265bf5462 653 {
mbed_official 55:814265bf5462 654 // We only support byte buffers for now
mbed_official 55:814265bf5462 655 MBED_ASSERT(width == 8);
mbed_official 55:814265bf5462 656 UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
mbed_official 55:814265bf5462 657
mbed_official 55:814265bf5462 658 // Exit if a transmit is already on-going
mbed_official 55:814265bf5462 659 if (serial_tx_active(obj)) return;
mbed_official 55:814265bf5462 660
mbed_official 55:814265bf5462 661 obj->tx_buff.buffer = tx;
mbed_official 55:814265bf5462 662 obj->tx_buff.length = tx_length;
mbed_official 55:814265bf5462 663 obj->tx_buff.pos = 0;
mbed_official 55:814265bf5462 664
mbed_official 55:814265bf5462 665 return;
mbed_official 55:814265bf5462 666 }
mbed_official 55:814265bf5462 667
mbed_official 55:814265bf5462 668 /** Configure the RX buffer for an asynchronous write serial transaction
mbed_official 55:814265bf5462 669 *
mbed_official 55:814265bf5462 670 * @param obj The serial object.
mbed_official 55:814265bf5462 671 * @param tx The buffer for sending.
mbed_official 55:814265bf5462 672 * @param tx_length The number of words to transmit.
mbed_official 55:814265bf5462 673 */
mbed_official 55:814265bf5462 674 static void h_serial_rx_buffer_set(serial_t *obj, void *rx, int rx_length, uint8_t width)
mbed_official 55:814265bf5462 675 {
mbed_official 55:814265bf5462 676 /* Sanity check arguments */
mbed_official 55:814265bf5462 677 MBED_ASSERT(obj);
mbed_official 55:814265bf5462 678 MBED_ASSERT(rx != (void*)0);
mbed_official 55:814265bf5462 679 // We only support byte buffers for now
mbed_official 55:814265bf5462 680 MBED_ASSERT(width == 8);
mbed_official 55:814265bf5462 681
mbed_official 55:814265bf5462 682 // Exit if a reception is already on-going
mbed_official 55:814265bf5462 683 if (serial_rx_active(obj)) return;
mbed_official 55:814265bf5462 684
mbed_official 55:814265bf5462 685 obj->rx_buff.buffer = rx;
mbed_official 55:814265bf5462 686 obj->rx_buff.length = rx_length;
mbed_official 55:814265bf5462 687 obj->rx_buff.pos = 0;
mbed_official 55:814265bf5462 688
mbed_official 55:814265bf5462 689 return;
mbed_official 55:814265bf5462 690 }
mbed_official 55:814265bf5462 691
mbed_official 55:814265bf5462 692 /** Configure TX events
mbed_official 55:814265bf5462 693 *
mbed_official 55:814265bf5462 694 * @param obj The serial object
mbed_official 55:814265bf5462 695 * @param event The logical OR of the TX events to configure
mbed_official 55:814265bf5462 696 * @param enable Set to non-zero to enable events, or zero to disable them
mbed_official 55:814265bf5462 697 */
mbed_official 55:814265bf5462 698 static void h_serial_tx_enable_event(serial_t *obj, int event, uint8_t enable)
mbed_official 55:814265bf5462 699 {
mbed_official 55:814265bf5462 700 // Shouldn't have to enable TX interrupt here, just need to keep track of the requested events.
mbed_official 55:814265bf5462 701 if (enable) SERIAL_OBJ(events) |= event;
mbed_official 55:814265bf5462 702 else SERIAL_OBJ(events) &= ~event;
mbed_official 55:814265bf5462 703 }
mbed_official 55:814265bf5462 704
mbed_official 55:814265bf5462 705 /** Configure RX events
mbed_official 55:814265bf5462 706 *
mbed_official 55:814265bf5462 707 * @param obj The serial object
mbed_official 55:814265bf5462 708 * @param event The logical OR of the RX events to configure
mbed_official 55:814265bf5462 709 * @param enable Set to non-zero to enable events, or zero to disable them
mbed_official 55:814265bf5462 710 */
mbed_official 55:814265bf5462 711 static void h_serial_rx_enable_event(serial_t *obj, int event, uint8_t enable)
mbed_official 55:814265bf5462 712 {
mbed_official 55:814265bf5462 713 // Shouldn't have to enable RX interrupt here, just need to keep track of the requested events.
mbed_official 55:814265bf5462 714 if (enable) SERIAL_OBJ(events) |= event;
mbed_official 55:814265bf5462 715 else SERIAL_OBJ(events) &= ~event;
mbed_official 55:814265bf5462 716 }
mbed_official 55:814265bf5462 717
mbed_official 55:814265bf5462 718 /**
mbed_official 55:814265bf5462 719 * Get index of serial object TX IRQ, relating it to the physical peripheral.
mbed_official 55:814265bf5462 720 *
mbed_official 55:814265bf5462 721 * @param obj pointer to serial object
mbed_official 55:814265bf5462 722 * @return internal NVIC TX IRQ index of U(S)ART peripheral
mbed_official 55:814265bf5462 723 */
mbed_official 55:814265bf5462 724 static IRQn_Type h_serial_get_irq_index(serial_t *obj)
mbed_official 55:814265bf5462 725 {
mbed_official 55:814265bf5462 726 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 55:814265bf5462 727
mbed_official 55:814265bf5462 728 UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
mbed_official 55:814265bf5462 729
mbed_official 55:814265bf5462 730 switch (SERIAL_OBJ(uart)) {
mbed_official 55:814265bf5462 731 #if defined(USART1_BASE)
mbed_official 55:814265bf5462 732 case UART_1:
mbed_official 55:814265bf5462 733 irq_n = USART1_IRQn;
mbed_official 55:814265bf5462 734 break;
bogdanm 0:9b334a45a8ff 735 #endif
mbed_official 55:814265bf5462 736 #if defined(USART2_BASE)
mbed_official 55:814265bf5462 737 case UART_2:
mbed_official 55:814265bf5462 738 irq_n = USART2_IRQn;
mbed_official 55:814265bf5462 739 break;
mbed_official 55:814265bf5462 740 #endif
mbed_official 55:814265bf5462 741 #if defined(USART3_BASE)
mbed_official 55:814265bf5462 742 case UART_3:
mbed_official 55:814265bf5462 743 irq_n = USART3_IRQn;
mbed_official 55:814265bf5462 744 break;
mbed_official 55:814265bf5462 745 #endif
mbed_official 55:814265bf5462 746 #if defined(UART4_BASE)
mbed_official 55:814265bf5462 747 case UART_4:
mbed_official 55:814265bf5462 748 irq_n = UART4_IRQn;
mbed_official 55:814265bf5462 749 break;
mbed_official 55:814265bf5462 750 #endif
mbed_official 55:814265bf5462 751 #if defined(UART5_BASE)
mbed_official 55:814265bf5462 752 case UART_5:
mbed_official 55:814265bf5462 753 irq_n = UART5_IRQn;
mbed_official 55:814265bf5462 754 break;
mbed_official 55:814265bf5462 755 #endif
mbed_official 55:814265bf5462 756 #if defined(USART6_BASE)
mbed_official 55:814265bf5462 757 case UART_6:
mbed_official 55:814265bf5462 758 irq_n = USART6_IRQn;
mbed_official 55:814265bf5462 759 break;
mbed_official 55:814265bf5462 760 #endif
mbed_official 55:814265bf5462 761 #if defined(UART7_BASE)
mbed_official 55:814265bf5462 762 case UART_7:
mbed_official 55:814265bf5462 763 irq_n = UART7_IRQn;
mbed_official 55:814265bf5462 764 break;
mbed_official 55:814265bf5462 765 #endif
mbed_official 55:814265bf5462 766 #if defined(UART8_BASE)
mbed_official 55:814265bf5462 767 case UART_8:
mbed_official 55:814265bf5462 768 irq_n = UART8_IRQn;
mbed_official 55:814265bf5462 769 break;
mbed_official 55:814265bf5462 770 #endif
mbed_official 55:814265bf5462 771 default:
mbed_official 55:814265bf5462 772 irq_n = (IRQn_Type)0;
mbed_official 55:814265bf5462 773 }
mbed_official 55:814265bf5462 774
mbed_official 55:814265bf5462 775 return irq_n;
mbed_official 55:814265bf5462 776 }
mbed_official 55:814265bf5462 777
mbed_official 55:814265bf5462 778 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 779
mbed_official 55:814265bf5462 780 /** The asynchronous TX and RX handler.
mbed_official 55:814265bf5462 781 *
mbed_official 55:814265bf5462 782 * @param obj The serial object
mbed_official 55:814265bf5462 783 * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise
mbed_official 55:814265bf5462 784 */
mbed_official 55:814265bf5462 785 static void h_serial_txdma_irq_handler_asynch()
mbed_official 55:814265bf5462 786 {
mbed_official 55:814265bf5462 787 HAL_DMA_IRQHandler(UartHandle.hdmatx);
mbed_official 55:814265bf5462 788 }
mbed_official 55:814265bf5462 789 /** The asynchronous TX and RX handler.
mbed_official 55:814265bf5462 790 *
mbed_official 55:814265bf5462 791 * @param obj The serial object
mbed_official 55:814265bf5462 792 * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise
mbed_official 55:814265bf5462 793 */
mbed_official 55:814265bf5462 794 void h_serial_rxdma_irq_handler_asynch(serial_t *obj)
mbed_official 55:814265bf5462 795 {
mbed_official 55:814265bf5462 796 // UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
mbed_official 55:814265bf5462 797 HAL_DMA_IRQHandler(UartHandle.hdmarx);
mbed_official 55:814265bf5462 798 }
mbed_official 55:814265bf5462 799
mbed_official 55:814265bf5462 800 /**
mbed_official 55:814265bf5462 801 * Get index of serial object TX DMA IRQ, relating it to the physical peripheral.
mbed_official 55:814265bf5462 802 *
mbed_official 55:814265bf5462 803 * @param obj pointer to serial object
mbed_official 55:814265bf5462 804 * @return internal NVIC TX DMA IRQ index of U(S)ART peripheral
mbed_official 55:814265bf5462 805 */
mbed_official 55:814265bf5462 806 static IRQn_Type h_serial_tx_get_irqdma_index(serial_t *obj)
mbed_official 55:814265bf5462 807 {
mbed_official 55:814265bf5462 808 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 55:814265bf5462 809
mbed_official 55:814265bf5462 810 UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
mbed_official 55:814265bf5462 811
mbed_official 55:814265bf5462 812 switch (SERIAL_OBJ(uart)) {
mbed_official 55:814265bf5462 813 #if defined(USART1_BASE)
mbed_official 55:814265bf5462 814 case UART_1:
mbed_official 55:814265bf5462 815 irq_n = DMA2_Stream7_IRQn;
mbed_official 55:814265bf5462 816 break;
mbed_official 55:814265bf5462 817 #endif
mbed_official 55:814265bf5462 818 #if defined(USART2_BASE)
mbed_official 55:814265bf5462 819 case UART_2:
mbed_official 55:814265bf5462 820 irq_n = DMA1_Stream6_IRQn;
mbed_official 55:814265bf5462 821 break;
mbed_official 55:814265bf5462 822 #endif
mbed_official 55:814265bf5462 823 #if defined(USART3_BASE)
mbed_official 55:814265bf5462 824 case UART_3:
mbed_official 55:814265bf5462 825 irq_n = DMA1_Stream3_IRQn;
mbed_official 55:814265bf5462 826 break;
mbed_official 55:814265bf5462 827 #endif
mbed_official 55:814265bf5462 828 #if defined(UART4_BASE)
mbed_official 55:814265bf5462 829 case UART_4:
mbed_official 55:814265bf5462 830 irq_n = DMA1_Stream4_IRQn;
mbed_official 55:814265bf5462 831 break;
mbed_official 55:814265bf5462 832 #endif
mbed_official 55:814265bf5462 833 #if defined(UART5_BASE)
mbed_official 55:814265bf5462 834 case UART_5:
mbed_official 55:814265bf5462 835 irq_n = DMA1_Stream7_IRQn;
mbed_official 55:814265bf5462 836 break;
mbed_official 55:814265bf5462 837 #endif
mbed_official 55:814265bf5462 838 #if defined(USART6_BASE)
mbed_official 55:814265bf5462 839 case UART_6:
mbed_official 55:814265bf5462 840 irq_n = DMA2_Stream6_IRQn;
mbed_official 55:814265bf5462 841 break;
mbed_official 55:814265bf5462 842 #endif
mbed_official 55:814265bf5462 843 #if defined(UART7_BASE)
mbed_official 55:814265bf5462 844 case UART_7:
mbed_official 55:814265bf5462 845 irq_n = DMA1_Stream1_IRQn;
mbed_official 55:814265bf5462 846 break;
mbed_official 55:814265bf5462 847 #endif
mbed_official 55:814265bf5462 848 #if defined(UART8_BASE)
mbed_official 55:814265bf5462 849 case UART_8:
mbed_official 55:814265bf5462 850 irq_n = DMA1_Stream0_IRQn;
mbed_official 55:814265bf5462 851 break;
mbed_official 55:814265bf5462 852 #endif
mbed_official 55:814265bf5462 853 default:
mbed_official 55:814265bf5462 854 irq_n = (IRQn_Type)0;
mbed_official 55:814265bf5462 855 }
mbed_official 55:814265bf5462 856
mbed_official 55:814265bf5462 857 return irq_n;
mbed_official 55:814265bf5462 858 }
mbed_official 55:814265bf5462 859 /**
mbed_official 55:814265bf5462 860 * Get index of serial object RX DMA IRQ, relating it to the physical peripheral.
mbed_official 55:814265bf5462 861 *
mbed_official 55:814265bf5462 862 * @param obj pointer to serial object
mbed_official 55:814265bf5462 863 * @return internal NVIC RX DMA IRQ index of U(S)ART peripheral
mbed_official 55:814265bf5462 864 */
mbed_official 55:814265bf5462 865 static IRQn_Type h_serial_rx_get_irqdma_index(serial_t *obj)
mbed_official 55:814265bf5462 866 {
mbed_official 55:814265bf5462 867 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 55:814265bf5462 868
mbed_official 55:814265bf5462 869 UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
mbed_official 55:814265bf5462 870
mbed_official 55:814265bf5462 871 switch (SERIAL_OBJ(uart)) {
mbed_official 55:814265bf5462 872 #if defined(USART1_BASE)
mbed_official 55:814265bf5462 873 case UART_1:
mbed_official 55:814265bf5462 874 irq_n = DMA2_Stream5_IRQn;
mbed_official 55:814265bf5462 875 break;
mbed_official 55:814265bf5462 876 #endif
mbed_official 55:814265bf5462 877 #if defined(USART2_BASE)
mbed_official 55:814265bf5462 878 case UART_2:
mbed_official 55:814265bf5462 879 irq_n = DMA1_Stream5_IRQn;
mbed_official 55:814265bf5462 880 break;
mbed_official 55:814265bf5462 881 #endif
mbed_official 55:814265bf5462 882 #if defined(USART3_BASE)
mbed_official 55:814265bf5462 883 case UART_3:
mbed_official 55:814265bf5462 884 irq_n = DMA1_Stream1_IRQn;
mbed_official 55:814265bf5462 885 break;
mbed_official 55:814265bf5462 886 #endif
mbed_official 55:814265bf5462 887 #if defined(UART4_BASE)
mbed_official 55:814265bf5462 888 case UART_4:
mbed_official 55:814265bf5462 889 irq_n = DMA1_Stream2_IRQn;
mbed_official 55:814265bf5462 890 break;
mbed_official 55:814265bf5462 891 #endif
mbed_official 55:814265bf5462 892 #if defined(UART5_BASE)
mbed_official 55:814265bf5462 893 case UART_5:
mbed_official 55:814265bf5462 894 irq_n = DMA1_Stream0_IRQn;
mbed_official 55:814265bf5462 895 break;
mbed_official 55:814265bf5462 896 #endif
mbed_official 55:814265bf5462 897 #if defined(USART6_BASE)
mbed_official 55:814265bf5462 898 case UART_6:
mbed_official 55:814265bf5462 899 irq_n = DMA2_Stream2_IRQn;
mbed_official 55:814265bf5462 900 break;
mbed_official 55:814265bf5462 901 #endif
mbed_official 55:814265bf5462 902 #if defined(UART7_BASE)
mbed_official 55:814265bf5462 903 case UART_7:
mbed_official 55:814265bf5462 904 irq_n = DMA1_Stream3_IRQn;
mbed_official 55:814265bf5462 905 break;
mbed_official 55:814265bf5462 906 #endif
mbed_official 55:814265bf5462 907 #if defined(UART8_BASE)
mbed_official 55:814265bf5462 908 case UART_8:
mbed_official 55:814265bf5462 909 irq_n = DMA1_Stream6_IRQn;
mbed_official 55:814265bf5462 910 break;
mbed_official 55:814265bf5462 911 #endif
mbed_official 55:814265bf5462 912 default:
mbed_official 55:814265bf5462 913 irq_n = (IRQn_Type)0;
mbed_official 55:814265bf5462 914 }
mbed_official 55:814265bf5462 915
mbed_official 55:814265bf5462 916 return irq_n;
mbed_official 55:814265bf5462 917 }
mbed_official 55:814265bf5462 918 #endif
mbed_official 55:814265bf5462 919 //----------------------------------------------------------------------------------------
mbed_official 55:814265bf5462 920 // MBED API FUNCTIONS
mbed_official 55:814265bf5462 921 //----------------------------------------------------------------------------------------
mbed_official 55:814265bf5462 922
mbed_official 55:814265bf5462 923 /** Begin asynchronous TX transfer. The used buffer is specified in the serial object,
mbed_official 55:814265bf5462 924 * tx_buff
mbed_official 55:814265bf5462 925 *
mbed_official 55:814265bf5462 926 * @param obj The serial object
mbed_official 55:814265bf5462 927 * @param tx The buffer for sending
mbed_official 55:814265bf5462 928 * @param tx_length The number of words to transmit
mbed_official 55:814265bf5462 929 * @param tx_width The bit width of buffer word
mbed_official 55:814265bf5462 930 * @param handler The serial handler
mbed_official 55:814265bf5462 931 * @param event The logical OR of events to be registered
mbed_official 55:814265bf5462 932 * @param hint A suggestion for how to use DMA with this transfer
mbed_official 55:814265bf5462 933 * @return Returns number of data transfered, or 0 otherwise
mbed_official 55:814265bf5462 934 */
mbed_official 55:814265bf5462 935 int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
mbed_official 55:814265bf5462 936 {
mbed_official 55:814265bf5462 937
mbed_official 55:814265bf5462 938 // Check buffer is ok
mbed_official 55:814265bf5462 939 MBED_ASSERT(tx != (void*)0);
mbed_official 55:814265bf5462 940 MBED_ASSERT(tx_width == 8); // support only 8b width
mbed_official 55:814265bf5462 941
mbed_official 55:814265bf5462 942 if (tx_length == 0) return 0;
mbed_official 55:814265bf5462 943
mbed_official 55:814265bf5462 944 // Set up buffer
mbed_official 55:814265bf5462 945 h_serial_tx_buffer_set(obj, (void *)tx, tx_length, tx_width);
mbed_official 55:814265bf5462 946
mbed_official 55:814265bf5462 947 // Set up events
mbed_official 55:814265bf5462 948 h_serial_tx_enable_event(obj, SERIAL_EVENT_TX_ALL, 0); // Clear all events
mbed_official 55:814265bf5462 949 h_serial_tx_enable_event(obj, event, 1); // Set only the wanted events
mbed_official 55:814265bf5462 950
mbed_official 55:814265bf5462 951 // Enable interrupt
mbed_official 55:814265bf5462 952 IRQn_Type irqn = h_serial_get_irq_index(obj);
mbed_official 55:814265bf5462 953 NVIC_ClearPendingIRQ(irqn);
mbed_official 55:814265bf5462 954 NVIC_DisableIRQ(irqn);
mbed_official 55:814265bf5462 955 NVIC_SetPriority(irqn, 1);
mbed_official 55:814265bf5462 956 NVIC_SetVector(irqn, (uint32_t)handler);
mbed_official 55:814265bf5462 957 UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
mbed_official 55:814265bf5462 958 NVIC_EnableIRQ(irqn);
mbed_official 55:814265bf5462 959
mbed_official 55:814265bf5462 960 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 961 // Enable DMA interrupt
mbed_official 55:814265bf5462 962 irqn = h_serial_tx_get_irqdma_index(obj);
mbed_official 55:814265bf5462 963 NVIC_ClearPendingIRQ(irqn);
mbed_official 55:814265bf5462 964 NVIC_DisableIRQ(irqn);
mbed_official 55:814265bf5462 965 NVIC_SetPriority(irqn, 1);
mbed_official 55:814265bf5462 966 // NVIC_SetVector(irqn, (uint32_t)&h_serial_txdma_irq_handler_asynch);
mbed_official 55:814265bf5462 967 NVIC_SetVector(irqn, (uint32_t)handler);
mbed_official 55:814265bf5462 968 NVIC_EnableIRQ(irqn);
mbed_official 55:814265bf5462 969
mbed_official 55:814265bf5462 970 // the following function will enable program and enable the DMA transfer
mbed_official 55:814265bf5462 971 if (HAL_UART_Transmit_DMA(&UartHandle, (uint8_t*)tx, tx_length) != HAL_OK)
mbed_official 55:814265bf5462 972 {
mbed_official 55:814265bf5462 973 /* Transfer error in transmission process */
mbed_official 55:814265bf5462 974 return 0;
mbed_official 55:814265bf5462 975 }
mbed_official 55:814265bf5462 976 #else
mbed_official 55:814265bf5462 977 // the following function will enable UART_IT_TXE and error interrupts
mbed_official 55:814265bf5462 978 if (HAL_UART_Transmit_IT(&UartHandle, (uint8_t*)tx, tx_length) != HAL_OK)
mbed_official 55:814265bf5462 979 {
mbed_official 55:814265bf5462 980 /* Transfer error in transmission process */
mbed_official 55:814265bf5462 981 return 0;
mbed_official 55:814265bf5462 982 }
mbed_official 55:814265bf5462 983 #endif
mbed_official 55:814265bf5462 984
mbed_official 55:814265bf5462 985 return tx_length;
mbed_official 55:814265bf5462 986 }
mbed_official 55:814265bf5462 987
mbed_official 55:814265bf5462 988 /** Begin asynchronous RX transfer (enable interrupt for data collecting)
mbed_official 55:814265bf5462 989 * The used buffer is specified in the serial object - rx_buff
mbed_official 55:814265bf5462 990 *
mbed_official 55:814265bf5462 991 * @param obj The serial object
mbed_official 55:814265bf5462 992 * @param rx The buffer for sending
mbed_official 55:814265bf5462 993 * @param rx_length The number of words to transmit
mbed_official 55:814265bf5462 994 * @param rx_width The bit width of buffer word
mbed_official 55:814265bf5462 995 * @param handler The serial handler
mbed_official 55:814265bf5462 996 * @param event The logical OR of events to be registered
mbed_official 55:814265bf5462 997 * @param handler The serial handler
mbed_official 55:814265bf5462 998 * @param char_match A character in range 0-254 to be matched
mbed_official 55:814265bf5462 999 * @param hint A suggestion for how to use DMA with this transfer
mbed_official 55:814265bf5462 1000 */
mbed_official 55:814265bf5462 1001 void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
mbed_official 55:814265bf5462 1002 {
mbed_official 55:814265bf5462 1003 /* Sanity check arguments */
mbed_official 55:814265bf5462 1004 MBED_ASSERT(obj);
mbed_official 55:814265bf5462 1005 MBED_ASSERT(rx != (void*)0);
mbed_official 55:814265bf5462 1006 MBED_ASSERT(rx_width == 8); // support only 8b width
mbed_official 55:814265bf5462 1007
mbed_official 55:814265bf5462 1008 h_serial_rx_enable_event(obj, SERIAL_EVENT_RX_ALL, 0);
mbed_official 55:814265bf5462 1009 h_serial_rx_enable_event(obj, event, 1);
mbed_official 55:814265bf5462 1010 // set CharMatch
mbed_official 55:814265bf5462 1011 if (char_match != SERIAL_RESERVED_CHAR_MATCH) {
mbed_official 55:814265bf5462 1012 obj->char_match = char_match;
mbed_official 55:814265bf5462 1013 }
mbed_official 55:814265bf5462 1014 h_serial_rx_buffer_set(obj, rx, rx_length, rx_width);
mbed_official 55:814265bf5462 1015
mbed_official 55:814265bf5462 1016 IRQn_Type irqn = h_serial_get_irq_index(obj);
mbed_official 55:814265bf5462 1017 NVIC_ClearPendingIRQ(irqn);
mbed_official 55:814265bf5462 1018 NVIC_DisableIRQ(irqn);
mbed_official 55:814265bf5462 1019 NVIC_SetPriority(irqn, 0);
mbed_official 55:814265bf5462 1020 NVIC_SetVector(irqn, (uint32_t)handler);
mbed_official 55:814265bf5462 1021 NVIC_EnableIRQ(irqn);
mbed_official 55:814265bf5462 1022
mbed_official 55:814265bf5462 1023 UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
mbed_official 55:814265bf5462 1024 // flush current data + error flags
mbed_official 55:814265bf5462 1025 __HAL_UART_CLEAR_PEFLAG(&UartHandle);
mbed_official 55:814265bf5462 1026 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 1027 // Enable DMA interrupt
mbed_official 55:814265bf5462 1028 irqn = h_serial_rx_get_irqdma_index(obj);
mbed_official 55:814265bf5462 1029 NVIC_ClearPendingIRQ(irqn);
mbed_official 55:814265bf5462 1030 NVIC_DisableIRQ(irqn);
mbed_official 55:814265bf5462 1031 NVIC_SetPriority(irqn, 1);
mbed_official 55:814265bf5462 1032 NVIC_SetVector(irqn, (uint32_t)handler);
mbed_official 55:814265bf5462 1033
mbed_official 55:814265bf5462 1034 NVIC_EnableIRQ(irqn);
mbed_official 55:814265bf5462 1035 // following HAL function will program and enable the DMA transfer
mbed_official 55:814265bf5462 1036 HAL_UART_Receive_DMA(&UartHandle, (uint8_t*)rx, rx_length);
mbed_official 55:814265bf5462 1037 #else
mbed_official 55:814265bf5462 1038 // following HAL function will enable the RXNE interrupt + error interrupts
mbed_official 55:814265bf5462 1039 HAL_UART_Receive_IT(&UartHandle, (uint8_t*)rx, rx_length);
mbed_official 55:814265bf5462 1040 #endif
mbed_official 55:814265bf5462 1041 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
mbed_official 55:814265bf5462 1042 __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_ERR);
mbed_official 55:814265bf5462 1043
mbed_official 55:814265bf5462 1044 return;
mbed_official 55:814265bf5462 1045 }
mbed_official 55:814265bf5462 1046
mbed_official 55:814265bf5462 1047 /** Attempts to determine if the serial peripheral is already in use for TX
mbed_official 55:814265bf5462 1048 *
mbed_official 55:814265bf5462 1049 * @param obj The serial object
mbed_official 55:814265bf5462 1050 * @return Non-zero if the TX transaction is ongoing, 0 otherwise
mbed_official 55:814265bf5462 1051 */
mbed_official 55:814265bf5462 1052 uint8_t serial_tx_active(serial_t *obj)
mbed_official 55:814265bf5462 1053 {
mbed_official 55:814265bf5462 1054 MBED_ASSERT(obj);
mbed_official 55:814265bf5462 1055 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
mbed_official 55:814265bf5462 1056 return ((HAL_UART_GetState(&UartHandle) & UART_STATE_TX_ACTIVE) ? 1 : 0);
mbed_official 55:814265bf5462 1057 }
mbed_official 55:814265bf5462 1058
mbed_official 55:814265bf5462 1059 /** Attempts to determine if the serial peripheral is already in use for RX
mbed_official 55:814265bf5462 1060 *
mbed_official 55:814265bf5462 1061 * @param obj The serial object
mbed_official 55:814265bf5462 1062 * @return Non-zero if the RX transaction is ongoing, 0 otherwise
mbed_official 55:814265bf5462 1063 */
mbed_official 55:814265bf5462 1064 uint8_t serial_rx_active(serial_t *obj)
mbed_official 55:814265bf5462 1065 {
mbed_official 55:814265bf5462 1066 MBED_ASSERT(obj);
mbed_official 55:814265bf5462 1067 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
mbed_official 55:814265bf5462 1068 return ((HAL_UART_GetState(&UartHandle) & UART_STATE_RX_ACTIVE) ? 1 : 0);
mbed_official 55:814265bf5462 1069
mbed_official 55:814265bf5462 1070 }
mbed_official 55:814265bf5462 1071
mbed_official 55:814265bf5462 1072 /** The asynchronous TX and RX handler.
mbed_official 55:814265bf5462 1073 *
mbed_official 55:814265bf5462 1074 * @param obj The serial object
mbed_official 55:814265bf5462 1075 * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise
mbed_official 55:814265bf5462 1076 */
mbed_official 55:814265bf5462 1077 int serial_irq_handler_asynch(serial_t *obj)
mbed_official 55:814265bf5462 1078 {
mbed_official 55:814265bf5462 1079 volatile int return_event = 0;
mbed_official 55:814265bf5462 1080 uint8_t *buf = (uint8_t*)obj->rx_buff.buffer;
mbed_official 55:814265bf5462 1081 uint8_t i = 0;
mbed_official 55:814265bf5462 1082
mbed_official 55:814265bf5462 1083 // Irq handler is common to Tx and Rx
mbed_official 55:814265bf5462 1084 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
mbed_official 55:814265bf5462 1085 #if DEVICE_SERIAL_ASYNCH_DMA
mbed_official 55:814265bf5462 1086 if ((UartHandle.Instance->CR3 & USART_CR3_DMAT) !=0) {
mbed_official 55:814265bf5462 1087 // call dma tx interrupt
mbed_official 55:814265bf5462 1088 HAL_DMA_IRQHandler(UartHandle.hdmatx);
mbed_official 55:814265bf5462 1089 }
mbed_official 55:814265bf5462 1090 if ((UartHandle.Instance->CR3 & USART_CR3_DMAR) !=0) {
mbed_official 55:814265bf5462 1091 // call dma rx interrupt
mbed_official 55:814265bf5462 1092 HAL_DMA_IRQHandler(UartHandle.hdmarx);
mbed_official 55:814265bf5462 1093 }
mbed_official 55:814265bf5462 1094 #endif
mbed_official 55:814265bf5462 1095 HAL_UART_IRQHandler(&UartHandle);
mbed_official 55:814265bf5462 1096 // TX PART:
mbed_official 55:814265bf5462 1097 if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TC) != RESET) {
mbed_official 55:814265bf5462 1098 __HAL_UART_CLEAR_FLAG(&UartHandle, UART_FLAG_TC);
mbed_official 55:814265bf5462 1099 // return event SERIAL_EVENT_TX_COMPLETE if requested
mbed_official 55:814265bf5462 1100 if ((SERIAL_OBJ(events) & SERIAL_EVENT_TX_COMPLETE ) != 0){
mbed_official 55:814265bf5462 1101 return_event |= SERIAL_EVENT_TX_COMPLETE & obj->serial.events;
mbed_official 55:814265bf5462 1102 }
mbed_official 55:814265bf5462 1103 }
mbed_official 55:814265bf5462 1104 // handle error events:
mbed_official 55:814265bf5462 1105 if (__HAL_UART_GET_FLAG(&UartHandle, HAL_UART_ERROR_PE)) {
mbed_official 55:814265bf5462 1106 __HAL_UART_CLEAR_FLAG(&UartHandle, HAL_UART_ERROR_PE);
mbed_official 55:814265bf5462 1107 return_event |= SERIAL_EVENT_RX_PARITY_ERROR & obj->serial.events;
mbed_official 55:814265bf5462 1108 }
mbed_official 55:814265bf5462 1109 if (__HAL_UART_GET_FLAG(&UartHandle, HAL_UART_ERROR_NE)||(UartHandle.ErrorCode & HAL_UART_ERROR_NE)!=0) {
mbed_official 55:814265bf5462 1110 __HAL_UART_CLEAR_FLAG(&UartHandle, HAL_UART_ERROR_NE);
mbed_official 55:814265bf5462 1111 // not supported by mbed
mbed_official 55:814265bf5462 1112 }
mbed_official 55:814265bf5462 1113 if (__HAL_UART_GET_FLAG(&UartHandle, HAL_UART_ERROR_FE)||(UartHandle.ErrorCode & HAL_UART_ERROR_FE)!=0) {
mbed_official 55:814265bf5462 1114 __HAL_UART_CLEAR_FLAG(&UartHandle, HAL_UART_ERROR_FE);
mbed_official 55:814265bf5462 1115 return_event |= SERIAL_EVENT_RX_FRAMING_ERROR & obj->serial.events;
mbed_official 55:814265bf5462 1116 }
mbed_official 55:814265bf5462 1117 if (__HAL_UART_GET_FLAG(&UartHandle, HAL_UART_ERROR_ORE)||(UartHandle.ErrorCode & HAL_UART_ERROR_ORE)!=0) {
mbed_official 55:814265bf5462 1118 __HAL_UART_CLEAR_FLAG(&UartHandle, HAL_UART_ERROR_ORE);
mbed_official 55:814265bf5462 1119 return_event |= SERIAL_EVENT_RX_OVERRUN_ERROR & obj->serial.events;
mbed_official 55:814265bf5462 1120 }
mbed_official 55:814265bf5462 1121
mbed_official 55:814265bf5462 1122 //RX PART
mbed_official 55:814265bf5462 1123 // increment rx_buff.pos
mbed_official 55:814265bf5462 1124 if (UartHandle.RxXferSize !=0) {
mbed_official 55:814265bf5462 1125 obj->rx_buff.pos = UartHandle.RxXferSize - UartHandle.RxXferCount;
mbed_official 55:814265bf5462 1126 }
mbed_official 55:814265bf5462 1127 if ((UartHandle.RxXferCount==0)&&(obj->rx_buff.pos >= (obj->rx_buff.length - 1))) {
mbed_official 55:814265bf5462 1128 return_event |= SERIAL_EVENT_RX_COMPLETE & obj->serial.events;
mbed_official 55:814265bf5462 1129 }
mbed_official 55:814265bf5462 1130 // Chek if Char_match is present
mbed_official 55:814265bf5462 1131 if (SERIAL_OBJ(events) & SERIAL_EVENT_RX_CHARACTER_MATCH) {
mbed_official 55:814265bf5462 1132 if (buf != NULL){
mbed_official 55:814265bf5462 1133 while((buf[i] != obj->char_match)&&(i<UartHandle.RxXferSize)){//for (i=0;i<UartHandle.RxXferSize;i++){
mbed_official 55:814265bf5462 1134 i++;//if (buf[i] == obj->char_match{
mbed_official 55:814265bf5462 1135 //}
mbed_official 55:814265bf5462 1136 }
mbed_official 55:814265bf5462 1137 if (i<UartHandle.RxXferSize){
mbed_official 55:814265bf5462 1138 obj->rx_buff.pos = i;
mbed_official 55:814265bf5462 1139 return_event |= SERIAL_EVENT_RX_CHARACTER_MATCH & obj->serial.events;
mbed_official 55:814265bf5462 1140 }
mbed_official 55:814265bf5462 1141 }
mbed_official 55:814265bf5462 1142 }
mbed_official 55:814265bf5462 1143 return return_event;
mbed_official 55:814265bf5462 1144 }
mbed_official 55:814265bf5462 1145
mbed_official 55:814265bf5462 1146 /** Abort the ongoing TX transaction. It disables the enabled interupt for TX and
mbed_official 55:814265bf5462 1147 * flush TX hardware buffer if TX FIFO is used
mbed_official 55:814265bf5462 1148 *
mbed_official 55:814265bf5462 1149 * @param obj The serial object
mbed_official 55:814265bf5462 1150 */
mbed_official 55:814265bf5462 1151 void serial_tx_abort_asynch(serial_t *obj)
mbed_official 55:814265bf5462 1152 {
mbed_official 55:814265bf5462 1153 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
mbed_official 55:814265bf5462 1154 __HAL_UART_DISABLE_IT(&UartHandle, UART_IT_TC|UART_IT_TXE);
mbed_official 55:814265bf5462 1155 UartHandle.Instance = 0;
mbed_official 55:814265bf5462 1156
mbed_official 55:814265bf5462 1157 obj->tx_buff.buffer = 0;
mbed_official 55:814265bf5462 1158 obj->tx_buff.length = 0;
mbed_official 55:814265bf5462 1159
mbed_official 55:814265bf5462 1160 }
mbed_official 55:814265bf5462 1161
mbed_official 55:814265bf5462 1162 /** Abort the ongoing RX transaction It disables the enabled interrupt for RX and
mbed_official 55:814265bf5462 1163 * flush RX hardware buffer if RX FIFO is used
mbed_official 55:814265bf5462 1164 *
mbed_official 55:814265bf5462 1165 * @param obj The serial object
mbed_official 55:814265bf5462 1166 */
mbed_official 55:814265bf5462 1167 void serial_rx_abort_asynch(serial_t *obj)
mbed_official 55:814265bf5462 1168 {
mbed_official 55:814265bf5462 1169 UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
mbed_official 55:814265bf5462 1170 __HAL_UART_DISABLE_IT(&UartHandle, UART_IT_RXNE);
mbed_official 55:814265bf5462 1171 UartHandle.Instance = 0;
mbed_official 55:814265bf5462 1172
mbed_official 55:814265bf5462 1173 obj->rx_buff.buffer = 0;
mbed_official 55:814265bf5462 1174 obj->rx_buff.length = 0;
mbed_official 55:814265bf5462 1175
mbed_official 55:814265bf5462 1176 }
mbed_official 55:814265bf5462 1177
mbed_official 55:814265bf5462 1178 #endif
mbed_official 55:814265bf5462 1179
mbed_official 55:814265bf5462 1180 #endif