Important changes to repositories hosted on mbed.com
Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.
To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.
It is also possible to export all your personal repositories from the account settings page.
Fork of mbed-dev by
Revision 43:e3d4af315dd8, committed 2016-01-04
- Comitter:
- mbed_official
- Date:
- Mon Jan 04 12:15:11 2016 +0000
- Parent:
- 42:367d7b10ab62
- Child:
- 44:520636e34279
- Commit message:
- Synchronized with git revision a63257b05f089cc4258f15d451450cf2fd28af96
Full URL: https://github.com/mbedmicro/mbed/commit/a63257b05f089cc4258f15d451450cf2fd28af96/
[TARGET_STMF0] Fix #1419 baudrateissue
Changed in this revision
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/cmsis_nvic.c Mon Jan 04 09:30:11 2016 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/cmsis_nvic.c Mon Jan 04 12:15:11 2016 +0000
@@ -27,7 +27,7 @@
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
- */
+ */
#include "cmsis_nvic.h"
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
@@ -35,23 +35,18 @@
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
int i;
- // To keep track that the vectors remap is done
- static volatile uint32_t vtor_remap = 0;
- // Space for dynamic vectors, initialised to allocate in R/W
- static volatile uint32_t *vectors = (uint32_t *)NVIC_RAM_VECTOR_ADDRESS;
// Copy and switch to dynamic vectors if first time called
- if (vtor_remap == 0) {
- uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
- for (i = 0; i < NVIC_NUM_VECTORS; i++) {
- vectors[i] = old_vectors[i];
- }
- SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000
- vtor_remap = 1; // The vectors remap is done
+ if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
+ uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
+ for (i = 0; i < NVIC_NUM_VECTORS; i++) {
+ *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
+ }
+ SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
}
// Set the vector
- vectors[IRQn + 16] = vector;
+ *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (IRQn*4) + (NVIC_USER_IRQ_OFFSET*4))) = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c Mon Jan 04 09:30:11 2016 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c Mon Jan 04 12:15:11 2016 +0000
@@ -82,7 +82,6 @@
*/
#include "stm32f0xx.h"
-
/**
* @}
*/
@@ -161,6 +160,7 @@
* @{
*/
+
/**
* @brief Setup the microcontroller system.
* Initialize the default HSI clock source, vector table location and the PLL configuration is reset.
@@ -225,6 +225,15 @@
/* Disable all interrupts */
RCC->CIR = 0x00000000;
+
+ /* Configure the Cube driver */
+ SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
+ HAL_Init();
+
+ /* Configure the System clock source, PLL Multiplier and Divider factors,
+ AHB/APBx prescalers and Flash settings */
+ SetSysClock();
+
}
/**
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/cmsis_nvic.c Mon Jan 04 09:30:11 2016 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/cmsis_nvic.c Mon Jan 04 12:15:11 2016 +0000
@@ -1,7 +1,7 @@
/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
- * Copyright (c) 2014, STMicroelectronics
+ * Copyright (c) 2015, STMicroelectronics
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -27,31 +27,27 @@
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
- */
+ */
#include "cmsis_nvic.h"
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
-static unsigned char vtor_remap = 0; // To keep track that the vectors remap is done
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
int i;
- // Space for dynamic vectors, initialised to allocate in R/W
- static volatile uint32_t *vectors = (uint32_t *)NVIC_RAM_VECTOR_ADDRESS;
// Copy and switch to dynamic vectors if first time called
- if (vtor_remap == 0) {
- uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
- for (i = 0; i < NVIC_NUM_VECTORS; i++) {
- vectors[i] = old_vectors[i];
- }
- SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000
- vtor_remap = 1; // The vectors remap is done
+ if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
+ uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
+ for (i = 0; i < NVIC_NUM_VECTORS; i++) {
+ *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
+ }
+ SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
}
// Set the vector
- vectors[IRQn + 16] = vector;
+ *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (IRQn*4) + (NVIC_USER_IRQ_OFFSET*4))) = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/cmsis_nvic.h Mon Jan 04 09:30:11 2016 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/cmsis_nvic.h Mon Jan 04 12:15:11 2016 +0000 @@ -1,7 +1,7 @@ /* mbed Microcontroller Library * CMSIS-style functionality to support dynamic vectors ******************************************************************************* - * Copyright (c) 2014, STMicroelectronics + * Copyright (c) 2015, STMicroelectronics * All rights reserved. * * Redistribution and use in source and binary forms, with or without
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/system_stm32f0xx.c Mon Jan 04 09:30:11 2016 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/system_stm32f0xx.c Mon Jan 04 12:15:11 2016 +0000
@@ -82,7 +82,7 @@
*/
#include "stm32f0xx.h"
-
+#include "hal_tick.h"
/**
* @}
*/
@@ -161,6 +161,7 @@
* @{
*/
+
/**
* @brief Setup the microcontroller system.
* Initialize the default HSI clock source, vector table location and the PLL configuration is reset.
@@ -225,6 +226,18 @@
/* Disable all interrupts */
RCC->CIR = 0x00000000;
+
+ /* Configure the Cube driver */
+ SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
+ HAL_Init();
+
+ /* Configure the System clock source, PLL Multiplier and Divider factors,
+ AHB/APBx prescalers and Flash settings */
+ SetSysClock();
+
+ /* Reset the timer to avoid issues after the RAM initialization */
+ TIM_MST_RESET_ON;
+ TIM_MST_RESET_OFF;
}
/**
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/cmsis_nvic.c Mon Jan 04 09:30:11 2016 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/cmsis_nvic.c Mon Jan 04 12:15:11 2016 +0000
@@ -33,25 +33,21 @@
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
+
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
int i;
- // To keep track that the vectors remap is done
- static volatile uint32_t vtor_remap = 0;
- // Space for dynamic vectors, initialised to allocate in R/W
- static volatile uint32_t *vectors = (uint32_t *)NVIC_RAM_VECTOR_ADDRESS;
-
+
// Copy and switch to dynamic vectors if first time called
- if (vtor_remap == 0) {
+ if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
for (i = 0; i < NVIC_NUM_VECTORS; i++) {
- vectors[i] = old_vectors[i];
+ *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
}
- SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000
- vtor_remap = 1; // The vectors remap is done
+ SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
}
// Set the vector
- vectors[IRQn + 16] = vector;
+ *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (IRQn*4) + (NVIC_USER_IRQ_OFFSET*4))) = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/system_stm32f0xx.c Mon Jan 04 09:30:11 2016 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/system_stm32f0xx.c Mon Jan 04 12:15:11 2016 +0000
@@ -82,7 +82,7 @@
*/
#include "stm32f0xx.h"
-
+#include "hal_tick.h"
/**
* @}
*/
@@ -161,6 +161,7 @@
* @{
*/
+
/**
* @brief Setup the microcontroller system.
* Initialize the default HSI clock source, vector table location and the PLL configuration is reset.
@@ -225,6 +226,18 @@
/* Disable all interrupts */
RCC->CIR = 0x00000000;
+
+ /* Configure the Cube driver */
+ SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
+ HAL_Init();
+
+ /* Configure the System clock source, PLL Multiplier and Divider factors,
+ AHB/APBx prescalers and Flash settings */
+ SetSysClock();
+
+ /* Reset the timer to avoid issues after the RAM initialization */
+ TIM_MST_RESET_ON;
+ TIM_MST_RESET_OFF;
}
/**
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/cmsis_nvic.c Mon Jan 04 09:30:11 2016 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/cmsis_nvic.c Mon Jan 04 12:15:11 2016 +0000
@@ -33,25 +33,21 @@
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
+
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
int i;
- // To keep track that the vectors remap is done
- static volatile uint32_t vtor_remap = 0;
- // Space for dynamic vectors, initialised to allocate in R/W
- static volatile uint32_t *vectors = (uint32_t *)NVIC_RAM_VECTOR_ADDRESS;
-
+
// Copy and switch to dynamic vectors if first time called
- if (vtor_remap == 0) {
+ if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
for (i = 0; i < NVIC_NUM_VECTORS; i++) {
- vectors[i] = old_vectors[i];
+ *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
}
- SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000
- vtor_remap = 1; // The vectors remap is done
+ SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
}
// Set the vector
- vectors[IRQn + 16] = vector;
+ *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (IRQn*4) + (NVIC_USER_IRQ_OFFSET*4))) = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/system_stm32f0xx.c Mon Jan 04 09:30:11 2016 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/system_stm32f0xx.c Mon Jan 04 12:15:11 2016 +0000
@@ -82,7 +82,7 @@
*/
#include "stm32f0xx.h"
-
+#include "hal_tick.h"
/**
* @}
*/
@@ -161,6 +161,7 @@
* @{
*/
+
/**
* @brief Setup the microcontroller system.
* Initialize the default HSI clock source, vector table location and the PLL configuration is reset.
@@ -225,6 +226,18 @@
/* Disable all interrupts */
RCC->CIR = 0x00000000;
+
+ /* Configure the Cube driver */
+ SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
+ HAL_Init();
+
+ /* Configure the System clock source, PLL Multiplier and Divider factors,
+ AHB/APBx prescalers and Flash settings */
+ SetSysClock();
+
+ /* Reset the timer to avoid issues after the RAM initialization */
+ TIM_MST_RESET_ON;
+ TIM_MST_RESET_OFF;
}
/**
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/cmsis_nvic.c Mon Jan 04 09:30:11 2016 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/cmsis_nvic.c Mon Jan 04 12:15:11 2016 +0000
@@ -27,31 +27,27 @@
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
- */
+ */
#include "cmsis_nvic.h"
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
+
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
int i;
- // To keep track that the vectors remap is done
- static volatile uint32_t vtor_remap = 0;
- // Space for dynamic vectors, initialised to allocate in R/W
- static volatile uint32_t *vectors = (uint32_t *)NVIC_RAM_VECTOR_ADDRESS;
// Copy and switch to dynamic vectors if first time called
- if (vtor_remap == 0) {
- uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
- for (i = 0; i < NVIC_NUM_VECTORS; i++) {
- vectors[i] = old_vectors[i];
- }
- SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000
- vtor_remap = 1; // The vectors remap is done
+ if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
+ uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
+ for (i = 0; i < NVIC_NUM_VECTORS; i++) {
+ *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
+ }
+ SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
}
// Set the vector
- vectors[IRQn + 16] = vector;
+ *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (IRQn*4) + (NVIC_USER_IRQ_OFFSET*4))) = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/system_stm32f0xx.c Mon Jan 04 09:30:11 2016 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/system_stm32f0xx.c Mon Jan 04 12:15:11 2016 +0000
@@ -82,7 +82,7 @@
*/
#include "stm32f0xx.h"
-
+#include "hal_tick.h"
/**
* @}
*/
@@ -161,6 +161,7 @@
* @{
*/
+
/**
* @brief Setup the microcontroller system.
* Initialize the default HSI clock source, vector table location and the PLL configuration is reset.
@@ -225,6 +226,18 @@
/* Disable all interrupts */
RCC->CIR = 0x00000000;
+
+ /* Configure the Cube driver */
+ SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
+ HAL_Init();
+
+ /* Configure the System clock source, PLL Multiplier and Divider factors,
+ AHB/APBx prescalers and Flash settings */
+ SetSysClock();
+
+ /* Reset the timer to avoid issues after the RAM initialization */
+ TIM_MST_RESET_ON;
+ TIM_MST_RESET_OFF;
}
/**
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/cmsis_nvic.c Mon Jan 04 09:30:11 2016 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/cmsis_nvic.c Mon Jan 04 12:15:11 2016 +0000
@@ -27,31 +27,27 @@
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
- */
+ */
#include "cmsis_nvic.h"
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
+
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
int i;
- // To keep track that the vectors remap is done
- static volatile uint32_t vtor_remap = 0;
- // Space for dynamic vectors, initialised to allocate in R/W
- static volatile uint32_t *vectors = (uint32_t *)NVIC_RAM_VECTOR_ADDRESS;
// Copy and switch to dynamic vectors if first time called
- if (vtor_remap == 0) {
- uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
- for (i = 0; i < NVIC_NUM_VECTORS; i++) {
- vectors[i] = old_vectors[i];
- }
- SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000
- vtor_remap = 1; // The vectors remap is done
+ if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
+ uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
+ for (i = 0; i < NVIC_NUM_VECTORS; i++) {
+ *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
+ }
+ SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
}
// Set the vector
- vectors[IRQn + 16] = vector;
+ *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (IRQn*4) + (NVIC_USER_IRQ_OFFSET*4))) = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/system_stm32f0xx.c Mon Jan 04 09:30:11 2016 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/system_stm32f0xx.c Mon Jan 04 12:15:11 2016 +0000 @@ -82,7 +82,7 @@ */ #include "stm32f0xx.h" - +#include "hal_tick.h" /** * @} */ @@ -225,6 +225,18 @@ /* Disable all interrupts */ RCC->CIR = 0x00000000; + + /* Configure the Cube driver */ + SystemCoreClock = 8000000; // At this stage the HSI is used as system clock + HAL_Init(); + + /* Configure the System clock source, PLL Multiplier and Divider factors, + AHB/APBx prescalers and Flash settings */ + SetSysClock(); + + /* Reset the timer to avoid issues after the RAM initialization */ + TIM_MST_RESET_ON; + TIM_MST_RESET_OFF; } /**
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/cmsis_nvic.c Mon Jan 04 09:30:11 2016 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/cmsis_nvic.c Mon Jan 04 12:15:11 2016 +0000
@@ -27,7 +27,7 @@
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
- */
+ */
#include "cmsis_nvic.h"
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
@@ -35,23 +35,18 @@
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
int i;
- // To keep track that the vectors remap is done
- static volatile uint32_t vtor_remap = 0;
- // Space for dynamic vectors, initialised to allocate in R/W
- static volatile uint32_t *vectors = (uint32_t *)NVIC_RAM_VECTOR_ADDRESS;
// Copy and switch to dynamic vectors if first time called
- if (vtor_remap == 0) {
- uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
- for (i = 0; i < NVIC_NUM_VECTORS; i++) {
- vectors[i] = old_vectors[i];
- }
- SYSCFG->CFGR1 |= 0x03; // Embedded SRAM mapped at 0x00000000
- vtor_remap = 1; // The vectors remap is done
+ if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) {
+ uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS;
+ for (i = 0; i < NVIC_NUM_VECTORS; i++) {
+ *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i];
+ }
+ SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000
}
// Set the vector
- vectors[IRQn + 16] = vector;
+ *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (IRQn*4) + (NVIC_USER_IRQ_OFFSET*4))) = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/system_stm32f0xx.c Mon Jan 04 09:30:11 2016 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/system_stm32f0xx.c Mon Jan 04 12:15:11 2016 +0000 @@ -82,7 +82,7 @@ */ #include "stm32f0xx.h" - +#include "hal_tick.h" /** * @} */ @@ -225,6 +225,18 @@ /* Disable all interrupts */ RCC->CIR = 0x00000000; + + /* Configure the Cube driver */ + SystemCoreClock = 8000000; // At this stage the HSI is used as system clock + HAL_Init(); + + /* Configure the System clock source, PLL Multiplier and Divider factors, + AHB/APBx prescalers and Flash settings */ + SetSysClock(); + + /* Reset the timer to avoid issues after the RAM initialization */ + TIM_MST_RESET_ON; + TIM_MST_RESET_OFF; } /**
--- a/targets/hal/TARGET_STM/TARGET_STM32F0/mbed_overrides.c Mon Jan 04 09:30:11 2016 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32F0/mbed_overrides.c Mon Jan 04 12:15:11 2016 +0000
@@ -27,23 +27,12 @@
*/
#include "cmsis.h"
-extern int stdio_uart_inited;
-
// This function is called after RAM initialization and before main.
void mbed_sdk_init() {
- /* Configure the Cube driver */
- SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
-
- HAL_Init();
-
- /* Configure the System clock source, PLL Multiplier and Divider factors,
- AHB/APBx prescalers and Flash settings */
- SetSysClock();
-
// Update the SystemCoreClock variable.
SystemCoreClockUpdate();
- // reset serial next time it is called, now that system clock is set
- stdio_uart_inited = 0;
+ // Need to restart HAL driver after the RAM is initialized
+ HAL_Init();
}
