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Dependents: Motor_Control_using_lib Motor_Control_API
Revision 3:2ceb3de67371, committed 2016-09-08
- Comitter:
- dkato
- Date:
- Thu Sep 08 11:05:53 2016 +0000
- Parent:
- 2:2dbc9553463c
- Commit message:
- Delete the negative-phase waveform output.
Changed in this revision
diff -r 2dbc9553463c -r 2ceb3de67371 PwmOutResetSync.h --- a/PwmOutResetSync.h Fri Sep 02 02:51:43 2016 +0000 +++ b/PwmOutResetSync.h Thu Sep 08 11:05:53 2016 +0000 @@ -44,18 +44,17 @@ /** Create a PwmOutResetSync connected to the specified pin * * @param pin PwmOutResetSync pin to connect to - * @param neg_ph_pin negative-phase waveform of pin * * @attention * Output Pins for Reset-Synchronized PWM Mode. - * [TIOC3B : P8_11, (P7_9), (P3_5)][TIOC3D : P8_13, P5_4, (P7_11), (P3_7)], - * [TIOC4A : P3_8, P4_4, (P7_12), (P11_0)][TIOC4A : P3_10, P4_6, (P7_14), (P11_2)], - * [TIOC4B : P3_9, P4_5, (P7_13), (P11_1)][TIOC4D : P7_15, P3_11, P4_7, (P11_3)] + * [TIOC3B : P8_11, (P7_9), (P3_5)], + * [TIOC4A : P3_8, P4_4, (P7_12), (P11_0)], + * [TIOC4B : P3_9, P4_5, (P7_13), (P11_1)] * ():On the GR-PEACH, it can not be used. * */ - PwmOutResetSync(PinName pin, PinName neg_ph_pin = NC) { - pwmout_rst_sync_init(&_pwm, pin, neg_ph_pin); + PwmOutResetSync(PinName pin) { + pwmout_rst_sync_init(&_pwm, pin); } /** Destructor
diff -r 2dbc9553463c -r 2ceb3de67371 pwmout_rst_sync_api.c --- a/pwmout_rst_sync_api.c Fri Sep 02 02:51:43 2016 +0000 +++ b/pwmout_rst_sync_api.c Thu Sep 08 11:05:53 2016 +0000 @@ -6,7 +6,6 @@ #define MTU2_PWM_NUM 3 -#define MTU2_PWM_SIGNAL 2 /* PORT ID, MTU2_PWMType, Pin function */ static const PinMap PinMap_PWM[] = { @@ -24,69 +23,49 @@ {NC , NC , 0} }; -static const PinMap PinMap_PWM_neg_ph[] = { - {P7_11 , 0 , 7}, - {P8_13 , 0 , 4}, - {P3_7 , 0 , 6}, - {P5_4 , 0 , 6}, - {P7_14 , 1 , 7}, - {P3_10 , 1 , 6}, - {P4_6 , 1 , 3}, - {P11_2 , 1 , 2}, - {P7_15 , 2 , 7}, - {P3_11 , 2 , 6}, - {P4_7 , 2 , 3}, - {P11_3 , 2 , 2}, - {NC , NC , 0} +static __IO uint16_t *MTU2_PWM_MATCH[MTU2_PWM_NUM] = { + { &MTU2TGRD_3 }, + { &MTU2TGRC_4 }, + { &MTU2TGRD_4 } }; -static __IO uint16_t *MTU2_PWM_MATCH[MTU2_PWM_NUM][MTU2_PWM_SIGNAL] = { - { &MTU2TGRB_3, &MTU2TGRD_3 }, - { &MTU2TGRA_4, &MTU2TGRC_4 }, - { &MTU2TGRB_4, &MTU2TGRD_4 } -}; +static int32_t mtu2_period = 1000; /* default period 1ms */ +static uint8_t mtu2_toer = 0xc0; +static uint8_t init_end = 0; -static int32_t mtu2_period = 1000; -static uint8_t mtu2_toer = 0xc0; -static int32_t mtu2_buff_mode = 1; - -void pwmout_rst_sync_init(pwmout_rst_sync_t* obj, PinName pin, PinName neg_ph_pin) { +void pwmout_rst_sync_init(pwmout_rst_sync_t* obj, PinName pin) { /* Port setting for S/W I/O Contorol */ int pwm_type = pinmap_peripheral(pin, PinMap_PWM); - int pwm_neg_ph = pinmap_peripheral(neg_ph_pin, PinMap_PWM_neg_ph); MBED_ASSERT(pwm_type != NC); MBED_ASSERT((mtu2_toer & (0x01 << pwm_type)) == 0); obj->pwm_type = pwm_type; - obj->pwm_neg_ph = pwm_neg_ph; mtu2_toer |= (0x01 << obj->pwm_type); /* Wire pinout */ pinmap_pinout(pin, PinMap_PWM); *PMSR(PINGROUP(pin)) = ((1 << (pin & 0xf)) << 16) | 0; - if (obj->pwm_type == obj->pwm_neg_ph) { - mtu2_buff_mode = 0; - mtu2_toer |= (0x08 << obj->pwm_neg_ph); - pinmap_pinout(neg_ph_pin, PinMap_PWM_neg_ph); - *PMSR(PINGROUP(neg_ph_pin)) = ((1 << (neg_ph_pin & 0xf)) << 16) | 0; - } - /* Mosule stop 33(MTU2) canceling */ CPGSTBCR3 &= ~(CPG_STBCR3_BIT_MSTP33); - MTU2TSTR &= 0xBF; + /* default duty 0.0f */ + if (init_end == 0) { + MTU2TSTR &= 0xBF; + MTU2TGRB_3 = MTU2TGRD_3 = 0; + MTU2TGRA_4 = MTU2TGRC_4 = 0; + MTU2TGRB_4 = MTU2TGRD_4 = 0; + init_end = 1; + } - /* default period 1ms */ pwmout_rst_sync_period_us(mtu2_period); } void pwmout_rst_sync_free(pwmout_rst_sync_t* obj) { pwmout_rst_sync_write(obj, 0); mtu2_toer &= ~(0x01 << obj->pwm_type); - mtu2_toer &= ~(0x08 << obj->pwm_neg_ph); if (mtu2_toer == 0xc0) { - mtu2_buff_mode = 1; + init_end = 0; } } @@ -107,7 +86,7 @@ wk_set_value -= 1; } /* set channel match to percentage */ - *MTU2_PWM_MATCH[obj->pwm_type][mtu2_buff_mode] = wk_set_value; + *MTU2_PWM_MATCH[obj->pwm_type] = wk_set_value; } float pwmout_rst_sync_read(pwmout_rst_sync_t* obj) { @@ -117,7 +96,7 @@ wk_cycle = MTU2TGRA_3 & 0xffff; if (wk_cycle != 0) { - wk_pulse = *MTU2_PWM_MATCH[obj->pwm_type][mtu2_buff_mode]; + wk_pulse = *MTU2_PWM_MATCH[obj->pwm_type]; value = ((float)wk_pulse / (float)wk_cycle); } else { value = 0.0f; @@ -184,20 +163,15 @@ MTU2TCR_3 = 0x20 + wk_cks; /* TCNT Clear(TGRA), P0φ/1 */ MTU2TOCR1 = 0x04; /* */ MTU2TOCR2 = 0x40; /* N L>H P H>L */ - if (mtu2_buff_mode == 0) { - MTU2TMDR_3 = 0x08; /* Buff:OFF Reset-Synchronized PWM mode */ - MTU2TMDR_4 = 0x00; /* Buff:OFF */ - } else { - MTU2TMDR_3 = 0x38; /* Buff:ON Reset-Synchronized PWM mode */ - MTU2TMDR_4 = 0x30; /* Buff:ON */ - } + MTU2TMDR_3 = 0x38; /* Buff:ON Reset-Synchronized PWM mode */ + MTU2TMDR_4 = 0x30; /* Buff:ON */ MTU2TOER = mtu2_toer; /* enabled output */ MTU2TCNT_3 = MTU2TCNT_4 = 0; /* TCNT3,TCNT4 Set 0 */ MTU2TGRA_3 = MTU2TGRC_3 = (uint16_t)wk_cycle; - set_mtu2_duty_again(MTU2_PWM_MATCH[0][mtu2_buff_mode], wk_last_cycle, wk_cycle); - set_mtu2_duty_again(MTU2_PWM_MATCH[1][mtu2_buff_mode], wk_last_cycle, wk_cycle); - set_mtu2_duty_again(MTU2_PWM_MATCH[2][mtu2_buff_mode], wk_last_cycle, wk_cycle); + set_mtu2_duty_again(MTU2_PWM_MATCH[0], wk_last_cycle, wk_cycle); + set_mtu2_duty_again(MTU2_PWM_MATCH[1], wk_last_cycle, wk_cycle); + set_mtu2_duty_again(MTU2_PWM_MATCH[2], wk_last_cycle, wk_cycle); MTU2TSTR |= 0x40; /* TCNT_4 Start */
diff -r 2dbc9553463c -r 2ceb3de67371 pwmout_rst_sync_api.h --- a/pwmout_rst_sync_api.h Fri Sep 02 02:51:43 2016 +0000 +++ b/pwmout_rst_sync_api.h Thu Sep 08 11:05:53 2016 +0000 @@ -12,7 +12,7 @@ int pwm_neg_ph; } pwmout_rst_sync_t; -void pwmout_rst_sync_init (pwmout_rst_sync_t* obj, PinName pin, PinName neg_ph_pin); +void pwmout_rst_sync_init (pwmout_rst_sync_t* obj, PinName pin); void pwmout_rst_sync_free (pwmout_rst_sync_t* obj); void pwmout_rst_sync_write (pwmout_rst_sync_t* obj, float percent); @@ -32,3 +32,4 @@ #endif +