Chihiro H / 23LCxx_SPI

Microchip SPI SRAM (23LC1024, 23LC512) access library.

23LCxx_SPI.cpp@2:52d3272b886c, 2015-11-29 (annotated)

Committer:
discypus
Date:
Sun Nov 29 11:31:24 2015 +0000
Revision:
2:52d3272b886c
Parent:
1:56e01e806364 
add comment to enum member

Who changed what in which revision?

UserRevisionLine numberNew contents of line
discypus 0:625ac56d810e 1
discypus 0:625ac56d810e 2 #include <mbed.h>
discypus 0:625ac56d810e 3 #include "23LCxx_SPI.h"
discypus 0:625ac56d810e 4
discypus 1:56e01e806364 5 Microchip23LCxx::Microchip23LCxx(const PinName mosi, const PinName miso, const PinName sck, const PinName cs, const uint32_t hz):
discypus 1:56e01e806364 6 _spi(mosi, miso, sck), _cs(cs, 1) {
discypus 0:625ac56d810e 7 _spi.format(8, 0); // 8bit, mode=0
discypus 1:56e01e806364 8 _spi.frequency(hz);
discypus 0:625ac56d810e 9 }
discypus 0:625ac56d810e 10
discypus 0:625ac56d810e 11 uint8_t
discypus 0:625ac56d810e 12 Microchip23LCxx::read_mode_register() {
discypus 0:625ac56d810e 13 _cs = 0;
discypus 0:625ac56d810e 14 _spi.write(RDMR);
discypus 0:625ac56d810e 15 const uint8_t value = _spi.write(0x00);
discypus 0:625ac56d810e 16 _cs = 1;
discypus 0:625ac56d810e 17
discypus 0:625ac56d810e 18 return value;
discypus 0:625ac56d810e 19 }
discypus 0:625ac56d810e 20
discypus 0:625ac56d810e 21 void
discypus 0:625ac56d810e 22 Microchip23LCxx::write_mode_register(const uint8_t value) {
discypus 0:625ac56d810e 23 _cs = 0;
discypus 0:625ac56d810e 24 _spi.write(WRMR);
discypus 0:625ac56d810e 25 _spi.write(value);
discypus 0:625ac56d810e 26 _cs = 1;
discypus 0:625ac56d810e 27 }
discypus 0:625ac56d810e 28
discypus 0:625ac56d810e 29 uint8_t
discypus 0:625ac56d810e 30 Microchip23LCxx::change_mode(const uint8_t next_mode) {
discypus 0:625ac56d810e 31 const uint8_t previous_register = read_mode_register();
discypus 0:625ac56d810e 32 const uint8_t previous_mode = previous_register & MODE_MASK;
discypus 0:625ac56d810e 33 if (next_mode != previous_mode) {
discypus 0:625ac56d810e 34 const uint8_t next_register = (previous_register & ~MODE_MASK) | uint8_t(next_mode);
discypus 0:625ac56d810e 35 write_mode_register(next_register);
discypus 0:625ac56d810e 36 }
discypus 0:625ac56d810e 37 return previous_mode;
discypus 0:625ac56d810e 38 }
discypus 0:625ac56d810e 39
discypus 0:625ac56d810e 40 void
discypus 0:625ac56d810e 41 Microchip23LCxx::_set_address(const uint32_t address) {
discypus 0:625ac56d810e 42 const uint8_t address_high = (address >> (8 * 2)) & 0xFFu;
discypus 0:625ac56d810e 43 const uint8_t address_mid = (address >> (8 * 1)) & 0xFFu;
discypus 0:625ac56d810e 44 const uint8_t address_low = (address >> (8 * 0)) & 0xFFu;
discypus 0:625ac56d810e 45 _spi.write(address_high);
discypus 0:625ac56d810e 46 _spi.write(address_mid);
discypus 0:625ac56d810e 47 _spi.write(address_low);
discypus 0:625ac56d810e 48 }
discypus 0:625ac56d810e 49
discypus 0:625ac56d810e 50 uint8_t
discypus 0:625ac56d810e 51 Microchip23LCxx::read_byte(const uint32_t address) {
discypus 0:625ac56d810e 52 _cs = 0;
discypus 0:625ac56d810e 53 _spi.write(READ);
discypus 0:625ac56d810e 54 _set_address(address);
discypus 0:625ac56d810e 55 const uint8_t data = _spi.write(0);
discypus 0:625ac56d810e 56 _cs = 1;
discypus 0:625ac56d810e 57
discypus 0:625ac56d810e 58 return data;
discypus 0:625ac56d810e 59 }
discypus 0:625ac56d810e 60
discypus 0:625ac56d810e 61 void
discypus 0:625ac56d810e 62 Microchip23LCxx::write_byte(const uint32_t address, const uint8_t data) {
discypus 0:625ac56d810e 63 _cs = 0;
discypus 0:625ac56d810e 64 _spi.write(WRITE);
discypus 0:625ac56d810e 65 _set_address(address);
discypus 0:625ac56d810e 66 _spi.write(data);
discypus 0:625ac56d810e 67 _cs = 1;
discypus 0:625ac56d810e 68 }
discypus 0:625ac56d810e 69
discypus 0:625ac56d810e 70 /**
discypus 0:625ac56d810e 71 * multi-byte read
discypus 0:625ac56d810e 72 * @pre sequential mode or page mode is required.
discypus 0:625ac56d810e 73 */
discypus 0:625ac56d810e 74 void
discypus 0:625ac56d810e 75 Microchip23LCxx::read_bytes(const uint32_t address, uint8_t __restrict data[], const uint32_t size) {
discypus 0:625ac56d810e 76 _cs = 0;
discypus 0:625ac56d810e 77 _spi.write(READ);
discypus 0:625ac56d810e 78 _set_address(address);
discypus 0:625ac56d810e 79 for (uint32_t i = 0; i < size; ++i) {
discypus 0:625ac56d810e 80 data[i] = _spi.write(0x00u);
discypus 0:625ac56d810e 81 }
discypus 0:625ac56d810e 82 _cs = 1;
discypus 0:625ac56d810e 83 }
discypus 0:625ac56d810e 84
discypus 0:625ac56d810e 85 /**
discypus 0:625ac56d810e 86 * multi-byte write
discypus 0:625ac56d810e 87 * @pre sequential mode or page mode is required.
discypus 0:625ac56d810e 88 */
discypus 0:625ac56d810e 89 void
discypus 0:625ac56d810e 90 Microchip23LCxx::write_bytes(const uint32_t address, const uint8_t __restrict data[], const uint32_t size) {
discypus 0:625ac56d810e 91 _cs = 0;
discypus 0:625ac56d810e 92 _spi.write(WRITE);
discypus 0:625ac56d810e 93 _set_address(address);
discypus 0:625ac56d810e 94 for (uint32_t i = 0; i < size; ++i) {
discypus 0:625ac56d810e 95 _spi.write(data[i]);
discypus 0:625ac56d810e 96 }
discypus 0:625ac56d810e 97 _cs = 1;
discypus 0:625ac56d810e 98 }