dhivya gopal / Mbed 2 deprecated TFT_sdcard

Dependencies:   MMA8451Q SDFileSystem SPI_TFT_ILI9341 TFT_fonts mbed

Fork of TFT_test_frdm-kl25z by Motoo Tanaka

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Show/hide line numbers SPI_STMPE610.cpp Source File

SPI_STMPE610.cpp

00001 /* mbed SPI_STMPE610.cpp to test adafruit 2.8" TFT LCD shiled w Touchscreen
00002  * Copyright (c) 2014 Motoo Tanaka @ Design Methodology Lab
00003  *
00004  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
00005  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
00006  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
00007  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
00008  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
00009  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
00010  * THE SOFTWARE.
00011  */
00012  /*
00013   * Note: Since the interrupt siganl of the shield was not connected
00014   * to an interrupt pin on my frdm-kl25z, I just used polling mode.
00015   */
00016   
00017 #include "SPI_STMPE610.h"
00018 
00019 /* some definitions here */
00020 #define REG_CHIP_ID       0x00
00021 #define REG_CHIP_ID_MSB   0x00
00022 #define REG_CHIP_ID_LSB   0x01
00023 
00024 #define REG_ID_VER        0x02
00025 #define REG_SYS_CTRL1     0x03
00026 #define REG_SYS_CTRL1_RESET 0x02
00027 
00028 #define REG_SYS_CTRL2     0x04
00029 #define REG_SPI_CFG       0x08
00030 #define REG_INT_CTRL      0x09
00031 #define REG_INT_CTRL_POL_HIGH 0x04
00032 #define REG_INT_CTRL_POL_LOW  0x00
00033 #define REG_INT_CTRL_EDGE     0x02
00034 #define REG_INT_CTRL_LEVEL    0x00
00035 #define REG_INT_CTRL_ENABLE   0x01
00036 #define REG_INT_CTRL_DISABLE  0x00
00037 
00038 #define REG_INT_EN        0x0A
00039 #define REG_INT_EN_TOUCHDET  0x01
00040 #define REG_INT_EN_FIFOTH    0x02
00041 #define REG_INT_EN_FIFOOF    0x04
00042 #define REG_INT_EN_FIFOFULL  0x08
00043 #define REG_INT_EN_FIFOEMPTY 0x10
00044 #define REG_INT_EN_ADC       0x40
00045 
00046 #define REG_INT_STA       0x0B
00047 #define REG_INT_STA_TOUCHDET 0x01
00048 
00049 #define REG_GPIO_EN       0x0C
00050 #define REG_GPIO_INT_STA  0x0D
00051 #define REG_ADC_INT_EN    0x0E
00052 #define REG_ADC_INT_STA   0x0F
00053 #define REG_GPIO_SET_PIN  0x10
00054 #define REG_GPIO_CLR_PIN  0x11
00055 #define REG_GPIO_MP_STA   0x12
00056 #define REG_GPIO_DIR      0x13
00057 #define REG_GPIO_ED       0x14
00058 #define REG_GPIO_RE       0x15
00059 #define REG_GPIO_FE       0x16
00060 #define REG_GPIO_AF       0x17
00061 #define REG_ADC_CTRL1     0x20
00062 #define REG_ADC_CTRL1_12BIT 0x08
00063 #define REG_ADC_CTRL1_10BIT 0x00
00064 
00065 #define REG_ADC_CTRL2     0x21
00066 #define REG_ADC_CTRL2_1_625MHZ 0x00
00067 #define REG_ADC_CTRL2_3_25MHZ  0x01
00068 #define REG_ADC_CTRL2_6_5MHZ   0x02
00069 
00070 #define REG_ADC_CAPT      0x22
00071 #define REG_ADC_DATA_CH0  0x30
00072 #define REG_ADC_DATA_CH1  0x32
00073 #define REG_ADC_DATA_CH4  0x38
00074 #define REG_ADC_DATA_CH5  0x3A
00075 #define REG_ADC_DATA_CH6  0x3C
00076 #define REG_ADC_DATA_CH7  0x3E
00077 #define REG_TSC_CTRL      0x40
00078 #define REG_TSC_CTRL_EN     0x01
00079 #define REG_TSC_CTRL_XYZ    0x00
00080 #define REG_TSC_CTRL_XY     0x02
00081 
00082 #define REG_TSC_CFG       0x41
00083 #define REG_TSC_CFG_1SAMPLE      0x00
00084 #define REG_TSC_CFG_2SAMPLE      0x40
00085 #define REG_TSC_CFG_4SAMPLE      0x80
00086 #define REG_TSC_CFG_8SAMPLE      0xC0
00087 #define REG_TSC_CFG_DELAY_10US   0x00
00088 #define REG_TSC_CFG_DELAY_50US   0x08
00089 #define REG_TSC_CFG_DELAY_100US  0x10
00090 #define REG_TSC_CFG_DELAY_500US  0x18
00091 #define REG_TSC_CFG_DELAY_1MS    0x20
00092 #define REG_TSC_CFG_DELAY_5MS    0x28
00093 #define REG_TSC_CFG_DELAY_10MS   0x30
00094 #define REG_TSC_CFG_DELAY_50MS   0x38
00095 #define REG_TSC_CFG_SETTLE_10US  0x00
00096 #define REG_TSC_CFG_SETTLE_100US 0x01
00097 #define REG_TSC_CFG_SETTLE_500US 0x02
00098 #define REG_TSC_CFG_SETTLE_1MS   0x03
00099 #define REG_TSC_CFG_SETTLE_5MS   0x04
00100 #define REG_TSC_CFG_SETTLE_10MS  0x05
00101 #define REG_TSC_CFG_SETTLE_50MS  0x06
00102 #define REG_TSC_CFG_SETTLE_100MS 0x07
00103 
00104 #define REG_WDW_TR_X      0x42
00105 #define REG_WDW_TR_Y      0x44
00106 #define REG_WDW_BL_X      0x46
00107 #define REG_WDW_BL_Y      0x48
00108 #define REG_FIFO_TH       0x4A
00109 #define REG_FIFO_STA      0x4B
00110 #define REG_FIFO_SIZE     0x4C
00111 #define REG_TSC_DATA_X    0x4D
00112 #define REG_TSC_DATA_Y    0x4F
00113 #define REG_TSC_DATA_Z    0x51
00114 #define REG_TSC_DATA_XYZ  0x52
00115 #define REG_TSC_FRACT_XYZ 0x56
00116 #define REG_TSC_DATA      0x57
00117 #define REG_TSC_I_DRIVE   0x58
00118 #define REG_TSC_SHIELD    0x59
00119 
00120 SPI_STMPE610::SPI_STMPE610(PinName mosi, PinName miso, PinName sclk, PinName cs) :
00121         m_spi(mosi, miso, sclk), m_cs(cs) {
00122     // activate the peripheral
00123     m_cs = 0 ;
00124     _mode = 0 ;
00125     m_spi.frequency(1000000) ;
00126     m_spi.format(8, 0) ;
00127     write8(REG_SYS_CTRL1, REG_SYS_CTRL1_RESET) ;
00128     wait(0.1) ;
00129     write8(REG_SYS_CTRL2, 0x00) ; // turn on clocks
00130     write8(REG_TSC_CFG,
00131           REG_TSC_CFG_4SAMPLE 
00132         | REG_TSC_CFG_DELAY_100US
00133         | REG_TSC_CFG_SETTLE_1MS ) ;
00134         
00135     write8(REG_TSC_CTRL, REG_TSC_CTRL_XYZ | REG_TSC_CTRL_EN) ;   
00136     m_cs = 1 ;
00137 }
00138 
00139 SPI_STMPE610::~SPI_STMPE610() { }
00140 
00141 void SPI_STMPE610::readRegs(int addr, uint8_t * data, int len) {
00142     m_cs = 0 ;
00143 
00144     for (int i = 0 ; i < len ; i++ ) {    
00145        m_spi.write((addr+i)|0x80) ;  // spacify address to read
00146        data[i] = m_spi.write((addr+i)|0x80) ; 
00147     } 
00148     m_spi.write(0x00) ; // to terminate read mode
00149     m_cs = 1 ;
00150 }
00151 
00152 void SPI_STMPE610::writeRegs(uint8_t * data, int len) {
00153    m_cs = 0 ;
00154    for (int i = 0 ; i < len ; i++ ) {
00155       m_spi.write(data[i]) ;
00156    }
00157    m_cs = 1 ;
00158 }
00159 
00160 void SPI_STMPE610::write8(int addr, uint8_t data8)
00161 {
00162     uint8_t data[2] ;
00163     data[0] = addr ;
00164     data[1] = data8 ;
00165     writeRegs(data, 2) ;
00166 }
00167 
00168 uint8_t SPI_STMPE610::read8(int addr)
00169 {
00170     uint8_t data[1] ;    
00171     readRegs(addr, data, 1) ;
00172     return( data[0] ) ;
00173 }
00174 
00175 void SPI_STMPE610::write16(int addr, uint16_t data16)
00176 {
00177     uint8_t data[3] ;
00178     data[0] = addr ;
00179     data[1] = (data16 >> 8) & 0xFF ;
00180     data[2] = data16 & 0xFF ;
00181     writeRegs(data, 3) ;
00182 }
00183 
00184 uint16_t SPI_STMPE610::read16(int addr)
00185 {
00186     uint8_t data[2] ;
00187     uint16_t value = 0 ;
00188     readRegs(addr, data, 2) ;
00189     value = (data[0] << 8) | data[1] ;
00190     return( value ) ;
00191 }
00192 
00193 int SPI_STMPE610::getRAWPoint(uint16_t *x, uint16_t *y, uint16_t *z)
00194 {
00195     uint8_t data[8], touched = 0 ;
00196     data[0] = REG_TSC_CTRL ;
00197     data[1] = REG_TSC_CTRL_EN  ; 
00198     writeRegs(data, 2) ;
00199     wait(0.01) ;
00200      
00201     readRegs(REG_TSC_CTRL, data, 1) ;
00202     touched = data[0] & 0x80 ;
00203     if (touched) { //Touch Detected
00204        readRegs(REG_TSC_DATA_X, data,5) ;
00205         *x = (data[0] << 8) | data[1] ;
00206         *y = (data[2] << 8) | data[3] ;
00207         *z = data[4] ;
00208     } else {
00209         *x = 0 ;
00210         *y = 0 ;
00211         *z = 0 ;
00212     }
00213     
00214     data[0] = 0x4B ;
00215     data[1] = 0x01 ;
00216     writeRegs(data, 2)  ; // clear FIFO
00217  
00218     data[0] = REG_TSC_CTRL ;
00219     data[1] = 0x00 ; // disable TSC 
00220     writeRegs(data, 2) ;
00221     
00222     return( touched & (*x || *y || *z)) ;
00223 }