Damian Gabino / picoGW_mcu

MCU driver/HAL for the Picocell Gateway concentrator board. The firmware implements either a USB CDC protocol or a UART protocol to bridge commands coming from host to the SX1308 SPI interface.

src/mbed-dev/api/PortInOut.h@0:c76361bd82e8, 2018-04-11 (annotated)

Committer:
dgabino
Date:
Wed Apr 11 14:42:47 2018 +0000
Revision:
0:c76361bd82e8
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dgabino 0:c76361bd82e8 1 /* mbed Microcontroller Library
dgabino 0:c76361bd82e8 2 * Copyright (c) 2006-2013 ARM Limited
dgabino 0:c76361bd82e8 3 *
dgabino 0:c76361bd82e8 4 * Licensed under the Apache License, Version 2.0 (the "License");
dgabino 0:c76361bd82e8 5 * you may not use this file except in compliance with the License.
dgabino 0:c76361bd82e8 6 * You may obtain a copy of the License at
dgabino 0:c76361bd82e8 7 *
dgabino 0:c76361bd82e8 8 * http://www.apache.org/licenses/LICENSE-2.0
dgabino 0:c76361bd82e8 9 *
dgabino 0:c76361bd82e8 10 * Unless required by applicable law or agreed to in writing, software
dgabino 0:c76361bd82e8 11 * distributed under the License is distributed on an "AS IS" BASIS,
dgabino 0:c76361bd82e8 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
dgabino 0:c76361bd82e8 13 * See the License for the specific language governing permissions and
dgabino 0:c76361bd82e8 14 * limitations under the License.
dgabino 0:c76361bd82e8 15 */
dgabino 0:c76361bd82e8 16 #ifndef MBED_PORTINOUT_H
dgabino 0:c76361bd82e8 17 #define MBED_PORTINOUT_H
dgabino 0:c76361bd82e8 18
dgabino 0:c76361bd82e8 19 #include "platform.h"
dgabino 0:c76361bd82e8 20
dgabino 0:c76361bd82e8 21 #if DEVICE_PORTINOUT
dgabino 0:c76361bd82e8 22
dgabino 0:c76361bd82e8 23 #include "port_api.h"
dgabino 0:c76361bd82e8 24 #include "critical.h"
dgabino 0:c76361bd82e8 25
dgabino 0:c76361bd82e8 26 namespace mbed {
dgabino 0:c76361bd82e8 27
dgabino 0:c76361bd82e8 28 /** A multiple pin digital in/out used to set/read multiple bi-directional pins
dgabino 0:c76361bd82e8 29 *
dgabino 0:c76361bd82e8 30 * @Note Synchronization level: Interrupt safe
dgabino 0:c76361bd82e8 31 */
dgabino 0:c76361bd82e8 32 class PortInOut {
dgabino 0:c76361bd82e8 33 public:
dgabino 0:c76361bd82e8 34
dgabino 0:c76361bd82e8 35 /** Create an PortInOut, connected to the specified port
dgabino 0:c76361bd82e8 36 *
dgabino 0:c76361bd82e8 37 * @param port Port to connect to (Port0-Port5)
dgabino 0:c76361bd82e8 38 * @param mask A bitmask to identify which bits in the port should be included (0 - ignore)
dgabino 0:c76361bd82e8 39 */
dgabino 0:c76361bd82e8 40 PortInOut(PortName port, int mask = 0xFFFFFFFF) {
dgabino 0:c76361bd82e8 41 core_util_critical_section_enter();
dgabino 0:c76361bd82e8 42 port_init(&_port, port, mask, PIN_INPUT);
dgabino 0:c76361bd82e8 43 core_util_critical_section_exit();
dgabino 0:c76361bd82e8 44 }
dgabino 0:c76361bd82e8 45
dgabino 0:c76361bd82e8 46 /** Write the value to the output port
dgabino 0:c76361bd82e8 47 *
dgabino 0:c76361bd82e8 48 * @param value An integer specifying a bit to write for every corresponding port pin
dgabino 0:c76361bd82e8 49 */
dgabino 0:c76361bd82e8 50 void write(int value) {
dgabino 0:c76361bd82e8 51 port_write(&_port, value);
dgabino 0:c76361bd82e8 52 }
dgabino 0:c76361bd82e8 53
dgabino 0:c76361bd82e8 54 /** Read the value currently output on the port
dgabino 0:c76361bd82e8 55 *
dgabino 0:c76361bd82e8 56 * @returns
dgabino 0:c76361bd82e8 57 * An integer with each bit corresponding to associated port pin setting
dgabino 0:c76361bd82e8 58 */
dgabino 0:c76361bd82e8 59 int read() {
dgabino 0:c76361bd82e8 60 return port_read(&_port);
dgabino 0:c76361bd82e8 61 }
dgabino 0:c76361bd82e8 62
dgabino 0:c76361bd82e8 63 /** Set as an output
dgabino 0:c76361bd82e8 64 */
dgabino 0:c76361bd82e8 65 void output() {
dgabino 0:c76361bd82e8 66 core_util_critical_section_enter();
dgabino 0:c76361bd82e8 67 port_dir(&_port, PIN_OUTPUT);
dgabino 0:c76361bd82e8 68 core_util_critical_section_exit();
dgabino 0:c76361bd82e8 69 }
dgabino 0:c76361bd82e8 70
dgabino 0:c76361bd82e8 71 /** Set as an input
dgabino 0:c76361bd82e8 72 */
dgabino 0:c76361bd82e8 73 void input() {
dgabino 0:c76361bd82e8 74 core_util_critical_section_enter();
dgabino 0:c76361bd82e8 75 port_dir(&_port, PIN_INPUT);
dgabino 0:c76361bd82e8 76 core_util_critical_section_exit();
dgabino 0:c76361bd82e8 77 }
dgabino 0:c76361bd82e8 78
dgabino 0:c76361bd82e8 79 /** Set the input pin mode
dgabino 0:c76361bd82e8 80 *
dgabino 0:c76361bd82e8 81 * @param mode PullUp, PullDown, PullNone, OpenDrain
dgabino 0:c76361bd82e8 82 */
dgabino 0:c76361bd82e8 83 void mode(PinMode mode) {
dgabino 0:c76361bd82e8 84 core_util_critical_section_enter();
dgabino 0:c76361bd82e8 85 port_mode(&_port, mode);
dgabino 0:c76361bd82e8 86 core_util_critical_section_exit();
dgabino 0:c76361bd82e8 87 }
dgabino 0:c76361bd82e8 88
dgabino 0:c76361bd82e8 89 /** A shorthand for write()
dgabino 0:c76361bd82e8 90 */
dgabino 0:c76361bd82e8 91 PortInOut& operator= (int value) {
dgabino 0:c76361bd82e8 92 write(value);
dgabino 0:c76361bd82e8 93 return *this;
dgabino 0:c76361bd82e8 94 }
dgabino 0:c76361bd82e8 95
dgabino 0:c76361bd82e8 96 PortInOut& operator= (PortInOut& rhs) {
dgabino 0:c76361bd82e8 97 write(rhs.read());
dgabino 0:c76361bd82e8 98 return *this;
dgabino 0:c76361bd82e8 99 }
dgabino 0:c76361bd82e8 100
dgabino 0:c76361bd82e8 101 /** A shorthand for read()
dgabino 0:c76361bd82e8 102 */
dgabino 0:c76361bd82e8 103 operator int() {
dgabino 0:c76361bd82e8 104 return read();
dgabino 0:c76361bd82e8 105 }
dgabino 0:c76361bd82e8 106
dgabino 0:c76361bd82e8 107 private:
dgabino 0:c76361bd82e8 108 port_t _port;
dgabino 0:c76361bd82e8 109 };
dgabino 0:c76361bd82e8 110
dgabino 0:c76361bd82e8 111 } // namespace mbed
dgabino 0:c76361bd82e8 112
dgabino 0:c76361bd82e8 113 #endif
dgabino 0:c76361bd82e8 114
dgabino 0:c76361bd82e8 115 #endif