Damian Gabino / picoGW_mcu

MCU driver/HAL for the Picocell Gateway concentrator board. The firmware implements either a USB CDC protocol or a UART protocol to bridge commands coming from host to the SX1308 SPI interface.

src/mbed-dev/targets.json@0:c76361bd82e8, 2018-04-11 (annotated)

Committer:
dgabino
Date:
Wed Apr 11 14:42:47 2018 +0000
Revision:
0:c76361bd82e8
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dgabino 0:c76361bd82e8 1 {
dgabino 0:c76361bd82e8 2 "Target": {
dgabino 0:c76361bd82e8 3 "core": null,
dgabino 0:c76361bd82e8 4 "default_toolchain": "ARM",
dgabino 0:c76361bd82e8 5 "supported_toolchains": null,
dgabino 0:c76361bd82e8 6 "extra_labels": [],
dgabino 0:c76361bd82e8 7 "is_disk_virtual": false,
dgabino 0:c76361bd82e8 8 "macros": [],
dgabino 0:c76361bd82e8 9 "device_has": [],
dgabino 0:c76361bd82e8 10 "features": [],
dgabino 0:c76361bd82e8 11 "detect_code": [],
dgabino 0:c76361bd82e8 12 "public": false,
dgabino 0:c76361bd82e8 13 "default_build": "standard"
dgabino 0:c76361bd82e8 14 },
dgabino 0:c76361bd82e8 15 "CM4_UARM": {
dgabino 0:c76361bd82e8 16 "inherits": ["Target"],
dgabino 0:c76361bd82e8 17 "core": "Cortex-M4",
dgabino 0:c76361bd82e8 18 "default_toolchain": "uARM",
dgabino 0:c76361bd82e8 19 "public": false,
dgabino 0:c76361bd82e8 20 "supported_toolchains": ["uARM"],
dgabino 0:c76361bd82e8 21 "default_build": "small"
dgabino 0:c76361bd82e8 22 },
dgabino 0:c76361bd82e8 23 "CM4_ARM": {
dgabino 0:c76361bd82e8 24 "inherits": ["Target"],
dgabino 0:c76361bd82e8 25 "core": "Cortex-M4",
dgabino 0:c76361bd82e8 26 "public": false,
dgabino 0:c76361bd82e8 27 "supported_toolchains": ["ARM"]
dgabino 0:c76361bd82e8 28 },
dgabino 0:c76361bd82e8 29 "CM4F_UARM": {
dgabino 0:c76361bd82e8 30 "inherits": ["Target"],
dgabino 0:c76361bd82e8 31 "core": "Cortex-M4F",
dgabino 0:c76361bd82e8 32 "default_toolchain": "uARM",
dgabino 0:c76361bd82e8 33 "public": false,
dgabino 0:c76361bd82e8 34 "supported_toolchains": ["uARM"],
dgabino 0:c76361bd82e8 35 "default_build": "small"
dgabino 0:c76361bd82e8 36 },
dgabino 0:c76361bd82e8 37 "CM4F_ARM": {
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dgabino 0:c76361bd82e8 39 "core": "Cortex-M4F",
dgabino 0:c76361bd82e8 40 "public": false,
dgabino 0:c76361bd82e8 41 "supported_toolchains": ["ARM"]
dgabino 0:c76361bd82e8 42 },
dgabino 0:c76361bd82e8 43 "LPCTarget": {
dgabino 0:c76361bd82e8 44 "inherits": ["Target"],
dgabino 0:c76361bd82e8 45 "post_binary_hook": {"function": "LPCTargetCode.lpc_patch"},
dgabino 0:c76361bd82e8 46 "public": false
dgabino 0:c76361bd82e8 47 },
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dgabino 0:c76361bd82e8 55 },
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dgabino 0:c76361bd82e8 64 },
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dgabino 0:c76361bd82e8 68 },
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dgabino 0:c76361bd82e8 82 },
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dgabino 0:c76361bd82e8 99 },
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dgabino 0:c76361bd82e8 107 "default_build": "small"
dgabino 0:c76361bd82e8 108 },
dgabino 0:c76361bd82e8 109 "MICRONFCBOARD": {
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dgabino 0:c76361bd82e8 114 },
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dgabino 0:c76361bd82e8 123 },
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dgabino 0:c76361bd82e8 127 },
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dgabino 0:c76361bd82e8 140 },
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dgabino 0:c76361bd82e8 149 },
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dgabino 0:c76361bd82e8 151 "default_build": "small"
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dgabino 0:c76361bd82e8 188 },
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dgabino 0:c76361bd82e8 195 },
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dgabino 0:c76361bd82e8 209 },
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dgabino 0:c76361bd82e8 248 },
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dgabino 0:c76361bd82e8 258 },
dgabino 0:c76361bd82e8 259 "ARCH_PRO": {
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dgabino 0:c76361bd82e8 269 },
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dgabino 0:c76361bd82e8 274 "extra_labels": ["NXP", "LPC176X"],
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dgabino 0:c76361bd82e8 1535 },
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dgabino 0:c76361bd82e8 1541 },
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dgabino 0:c76361bd82e8 1545 "macros_add": ["TARGET_NRF51_DONGLE"]
dgabino 0:c76361bd82e8 1546 },
dgabino 0:c76361bd82e8 1547 "NRF51_DONGLE_OTA": {
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dgabino 0:c76361bd82e8 1551 },
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dgabino 0:c76361bd82e8 1557 },
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dgabino 0:c76361bd82e8 1562 },
dgabino 0:c76361bd82e8 1563 "NRF51_MICROBIT_OTA": {
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dgabino 0:c76361bd82e8 1566 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
dgabino 0:c76361bd82e8 1567 },
dgabino 0:c76361bd82e8 1568 "NRF51_MICROBIT_B": {
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dgabino 0:c76361bd82e8 1579 },
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dgabino 0:c76361bd82e8 1584 },
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dgabino 0:c76361bd82e8 1590 },
dgabino 0:c76361bd82e8 1591 "MTM_MTCONNECT04S_BOOT": {
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dgabino 0:c76361bd82e8 1593 "extra_labels_add": ["MTM_CONNECT04S"],
dgabino 0:c76361bd82e8 1594 "macros_add": ["TARGET_MTM_CONNECT04S"]
dgabino 0:c76361bd82e8 1595 },
dgabino 0:c76361bd82e8 1596 "MTM_MTCONNECT04S_OTA": {
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dgabino 0:c76361bd82e8 1598 "extra_labels_add": ["MTM_CONNECT04S"],
dgabino 0:c76361bd82e8 1599 "macros_add": ["TARGET_MTM_CONNECT04S"]
dgabino 0:c76361bd82e8 1600 },
dgabino 0:c76361bd82e8 1601
dgabino 0:c76361bd82e8 1602 "TY51822R3": {
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dgabino 0:c76361bd82e8 1604 "macros_add": ["TARGET_NRF_32MHZ_XTAL"],
dgabino 0:c76361bd82e8 1605 "progen": {"target": "ty51822r3"},
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dgabino 0:c76361bd82e8 1608 "release_versions": ["2", "5"],
dgabino 0:c76361bd82e8 1609 "overrides": { "uart_hwfc": 0 }
dgabino 0:c76361bd82e8 1610 },
dgabino 0:c76361bd82e8 1611 "TY51822R3_BOOT": {
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dgabino 0:c76361bd82e8 1613 "extra_labels_add": ["TY51822R3"],
dgabino 0:c76361bd82e8 1614 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
dgabino 0:c76361bd82e8 1615 },
dgabino 0:c76361bd82e8 1616 "TY51822R3_OTA": {
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dgabino 0:c76361bd82e8 1619 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
dgabino 0:c76361bd82e8 1620 },
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dgabino 0:c76361bd82e8 1660 },
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dgabino 0:c76361bd82e8 1678 },
dgabino 0:c76361bd82e8 1679 "ARM_IOTSS_Target": {
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dgabino 0:c76361bd82e8 1683 },
dgabino 0:c76361bd82e8 1684 "ARM_IOTSS_BEID": {
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dgabino 0:c76361bd82e8 1691 "release_versions": ["2"]
dgabino 0:c76361bd82e8 1692 },
dgabino 0:c76361bd82e8 1693 "ARM_BEETLE_SOC": {
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dgabino 0:c76361bd82e8 1695 "core": "Cortex-M3",
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dgabino 0:c76361bd82e8 1697 "default_toolchain": "ARM",
dgabino 0:c76361bd82e8 1698 "extra_labels": ["ARM_SSG", "BEETLE"],
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dgabino 0:c76361bd82e8 1701 "target": "beetle",
dgabino 0:c76361bd82e8 1702 "uvision5": {
dgabino 0:c76361bd82e8 1703 "template": ["uvision5_arm_beetle_soc.uvproj.tmpl"]
dgabino 0:c76361bd82e8 1704 }
dgabino 0:c76361bd82e8 1705 },
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dgabino 0:c76361bd82e8 1708 "release_versions": ["2", "5"]
dgabino 0:c76361bd82e8 1709 },
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dgabino 0:c76361bd82e8 1711 "supported_form_factors": ["ARDUINO"],
dgabino 0:c76361bd82e8 1712 "core": "Cortex-A9",
dgabino 0:c76361bd82e8 1713 "program_cycle_s": 2,
dgabino 0:c76361bd82e8 1714 "extra_labels": ["RENESAS", "MBRZA1H"],
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dgabino 0:c76361bd82e8 1717 "progen": {
dgabino 0:c76361bd82e8 1718 "target": "gr-peach",
dgabino 0:c76361bd82e8 1719 "iar": {
dgabino 0:c76361bd82e8 1720 "template": ["iar_rz_a1h.ewp.tmpl"]
dgabino 0:c76361bd82e8 1721 }
dgabino 0:c76361bd82e8 1722 },
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dgabino 0:c76361bd82e8 1724 "features": ["IPV4"],
dgabino 0:c76361bd82e8 1725 "release_versions": ["2", "5"]
dgabino 0:c76361bd82e8 1726 },
dgabino 0:c76361bd82e8 1727 "VK_RZ_A1H": {
dgabino 0:c76361bd82e8 1728 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1729 "core": "Cortex-A9",
dgabino 0:c76361bd82e8 1730 "extra_labels": ["RENESAS", "VKRZA1H"],
dgabino 0:c76361bd82e8 1731 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
dgabino 0:c76361bd82e8 1732 "default_toolchain": "ARM",
dgabino 0:c76361bd82e8 1733 "progen": {
dgabino 0:c76361bd82e8 1734 "target": "vk-rza1h",
dgabino 0:c76361bd82e8 1735 "iar": {
dgabino 0:c76361bd82e8 1736 "template": ["iar_rz_a1h.ewp.tmpl"]
dgabino 0:c76361bd82e8 1737 }
dgabino 0:c76361bd82e8 1738 },
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dgabino 0:c76361bd82e8 1741 "features": ["IPV4"],
dgabino 0:c76361bd82e8 1742 "default_build": "standard",
dgabino 0:c76361bd82e8 1743 "release_versions": ["2", "5"]
dgabino 0:c76361bd82e8 1744 },
dgabino 0:c76361bd82e8 1745 "MAXWSNENV": {
dgabino 0:c76361bd82e8 1746 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1747 "core": "Cortex-M3",
dgabino 0:c76361bd82e8 1748 "macros": ["__SYSTEM_HFX=24000000"],
dgabino 0:c76361bd82e8 1749 "extra_labels": ["Maxim", "MAX32610"],
dgabino 0:c76361bd82e8 1750 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
dgabino 0:c76361bd82e8 1751 "progen": {"target": "maxwsnenv"},
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dgabino 0:c76361bd82e8 1753 "release_versions": ["2", "5"]
dgabino 0:c76361bd82e8 1754 },
dgabino 0:c76361bd82e8 1755 "MAX32600MBED": {
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dgabino 0:c76361bd82e8 1757 "core": "Cortex-M3",
dgabino 0:c76361bd82e8 1758 "macros": ["__SYSTEM_HFX=24000000"],
dgabino 0:c76361bd82e8 1759 "extra_labels": ["Maxim", "MAX32600"],
dgabino 0:c76361bd82e8 1760 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
dgabino 0:c76361bd82e8 1761 "progen": {"target": "max32600mbed"},
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dgabino 0:c76361bd82e8 1763 "release_versions": ["2", "5"]
dgabino 0:c76361bd82e8 1764 },
dgabino 0:c76361bd82e8 1765 "MAX32620HSP": {
dgabino 0:c76361bd82e8 1766 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1767 "core": "Cortex-M4F",
dgabino 0:c76361bd82e8 1768 "extra_labels": ["Maxim", "MAX32620"],
dgabino 0:c76361bd82e8 1769 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
dgabino 0:c76361bd82e8 1770 "progen": {"target": "max32620hsp"},
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dgabino 0:c76361bd82e8 1772 "release_versions": ["2", "5"]
dgabino 0:c76361bd82e8 1773 },
dgabino 0:c76361bd82e8 1774 "EFM32GG_STK3700": {
dgabino 0:c76361bd82e8 1775 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1776 "core": "Cortex-M3",
dgabino 0:c76361bd82e8 1777 "macros": ["EFM32GG990F1024"],
dgabino 0:c76361bd82e8 1778 "extra_labels": ["Silicon_Labs", "EFM32"],
dgabino 0:c76361bd82e8 1779 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
dgabino 0:c76361bd82e8 1780 "progen": {"target": "efm32gg-stk"},
dgabino 0:c76361bd82e8 1781 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
dgabino 0:c76361bd82e8 1782 "forced_reset_timeout": 2,
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dgabino 0:c76361bd82e8 1784 },
dgabino 0:c76361bd82e8 1785 "EFM32LG_STK3600": {
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dgabino 0:c76361bd82e8 1787 "core": "Cortex-M3",
dgabino 0:c76361bd82e8 1788 "macros": ["EFM32LG990F256"],
dgabino 0:c76361bd82e8 1789 "extra_labels": ["Silicon_Labs", "EFM32"],
dgabino 0:c76361bd82e8 1790 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
dgabino 0:c76361bd82e8 1791 "progen": {"target": "efm32lg-stk"},
dgabino 0:c76361bd82e8 1792 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
dgabino 0:c76361bd82e8 1793 "forced_reset_timeout": 2,
dgabino 0:c76361bd82e8 1794 "release_versions": ["2"]
dgabino 0:c76361bd82e8 1795 },
dgabino 0:c76361bd82e8 1796 "EFM32WG_STK3800": {
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dgabino 0:c76361bd82e8 1798 "core": "Cortex-M4F",
dgabino 0:c76361bd82e8 1799 "macros": ["EFM32WG990F256"],
dgabino 0:c76361bd82e8 1800 "extra_labels": ["Silicon_Labs", "EFM32"],
dgabino 0:c76361bd82e8 1801 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
dgabino 0:c76361bd82e8 1802 "progen": {"target": "efm32wg-stk"},
dgabino 0:c76361bd82e8 1803 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
dgabino 0:c76361bd82e8 1804 "forced_reset_timeout": 2,
dgabino 0:c76361bd82e8 1805 "release_versions": ["2"]
dgabino 0:c76361bd82e8 1806 },
dgabino 0:c76361bd82e8 1807 "EFM32ZG_STK3200": {
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dgabino 0:c76361bd82e8 1809 "core": "Cortex-M0+",
dgabino 0:c76361bd82e8 1810 "default_toolchain": "uARM",
dgabino 0:c76361bd82e8 1811 "supported_toolchains": ["GCC_ARM", "uARM"],
dgabino 0:c76361bd82e8 1812 "extra_labels": ["Silicon_Labs", "EFM32"],
dgabino 0:c76361bd82e8 1813 "macros": ["EFM32ZG222F32"],
dgabino 0:c76361bd82e8 1814 "progen": {
dgabino 0:c76361bd82e8 1815 "target": "efm32zg-stk"
dgabino 0:c76361bd82e8 1816 },
dgabino 0:c76361bd82e8 1817 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
dgabino 0:c76361bd82e8 1818 "default_build": "small",
dgabino 0:c76361bd82e8 1819 "forced_reset_timeout": 2,
dgabino 0:c76361bd82e8 1820 "release_versions": ["2"]
dgabino 0:c76361bd82e8 1821 },
dgabino 0:c76361bd82e8 1822 "EFM32HG_STK3400": {
dgabino 0:c76361bd82e8 1823 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1824 "core": "Cortex-M0+",
dgabino 0:c76361bd82e8 1825 "default_toolchain": "uARM",
dgabino 0:c76361bd82e8 1826 "supported_toolchains": ["GCC_ARM", "uARM"],
dgabino 0:c76361bd82e8 1827 "extra_labels": ["Silicon_Labs", "EFM32"],
dgabino 0:c76361bd82e8 1828 "macros": ["EFM32HG322F64"],
dgabino 0:c76361bd82e8 1829 "progen": {
dgabino 0:c76361bd82e8 1830 "target": "efm32hg-stk"
dgabino 0:c76361bd82e8 1831 },
dgabino 0:c76361bd82e8 1832 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
dgabino 0:c76361bd82e8 1833 "default_build": "small",
dgabino 0:c76361bd82e8 1834 "forced_reset_timeout": 2,
dgabino 0:c76361bd82e8 1835 "release_versions": ["2"]
dgabino 0:c76361bd82e8 1836 },
dgabino 0:c76361bd82e8 1837 "EFM32PG_STK3401": {
dgabino 0:c76361bd82e8 1838 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1839 "core": "Cortex-M4F",
dgabino 0:c76361bd82e8 1840 "macros": ["EFM32PG1B200F256GM48"],
dgabino 0:c76361bd82e8 1841 "extra_labels": ["Silicon_Labs", "EFM32"],
dgabino 0:c76361bd82e8 1842 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
dgabino 0:c76361bd82e8 1843 "progen": {"target": "efm32pg-stk"},
dgabino 0:c76361bd82e8 1844 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
dgabino 0:c76361bd82e8 1845 "forced_reset_timeout": 2,
dgabino 0:c76361bd82e8 1846 "release_versions": ["2", "5"]
dgabino 0:c76361bd82e8 1847 },
dgabino 0:c76361bd82e8 1848 "WIZWIKI_W7500": {
dgabino 0:c76361bd82e8 1849 "supported_form_factors": ["ARDUINO"],
dgabino 0:c76361bd82e8 1850 "core": "Cortex-M0",
dgabino 0:c76361bd82e8 1851 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
dgabino 0:c76361bd82e8 1852 "supported_toolchains": ["uARM", "ARM"],
dgabino 0:c76361bd82e8 1853 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1854 "progen": {"target": "wizwiki-w7500"},
dgabino 0:c76361bd82e8 1855 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
dgabino 0:c76361bd82e8 1856 "release_versions": ["2"]
dgabino 0:c76361bd82e8 1857 },
dgabino 0:c76361bd82e8 1858 "WIZWIKI_W7500P": {
dgabino 0:c76361bd82e8 1859 "supported_form_factors": ["ARDUINO"],
dgabino 0:c76361bd82e8 1860 "core": "Cortex-M0",
dgabino 0:c76361bd82e8 1861 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
dgabino 0:c76361bd82e8 1862 "supported_toolchains": ["uARM", "ARM"],
dgabino 0:c76361bd82e8 1863 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1864 "progen": {"target": "wizwiki-w7500p"},
dgabino 0:c76361bd82e8 1865 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
dgabino 0:c76361bd82e8 1866 "release_versions": ["2"]
dgabino 0:c76361bd82e8 1867 },
dgabino 0:c76361bd82e8 1868 "WIZWIKI_W7500ECO": {
dgabino 0:c76361bd82e8 1869 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1870 "core": "Cortex-M0",
dgabino 0:c76361bd82e8 1871 "progen": {"target": "wizwiki_w7500eco"},
dgabino 0:c76361bd82e8 1872 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
dgabino 0:c76361bd82e8 1873 "supported_toolchains": ["uARM", "ARM"],
dgabino 0:c76361bd82e8 1874 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
dgabino 0:c76361bd82e8 1875 "release_versions": ["2"]
dgabino 0:c76361bd82e8 1876 },
dgabino 0:c76361bd82e8 1877 "SAMR21G18A": {
dgabino 0:c76361bd82e8 1878 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1879 "core": "Cortex-M0+",
dgabino 0:c76361bd82e8 1880 "macros": ["__SAMR21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
dgabino 0:c76361bd82e8 1881 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"],
dgabino 0:c76361bd82e8 1882 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
dgabino 0:c76361bd82e8 1883 "progen": {"target": "samr21g18a"},
dgabino 0:c76361bd82e8 1884 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
dgabino 0:c76361bd82e8 1885 "release_versions": ["2"]
dgabino 0:c76361bd82e8 1886 },
dgabino 0:c76361bd82e8 1887 "SAMD21J18A": {
dgabino 0:c76361bd82e8 1888 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1889 "core": "Cortex-M0+",
dgabino 0:c76361bd82e8 1890 "macros": ["__SAMD21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
dgabino 0:c76361bd82e8 1891 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
dgabino 0:c76361bd82e8 1892 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
dgabino 0:c76361bd82e8 1893 "progen": {"target": "samd21j18a"},
dgabino 0:c76361bd82e8 1894 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
dgabino 0:c76361bd82e8 1895 "release_versions": ["2"]
dgabino 0:c76361bd82e8 1896 },
dgabino 0:c76361bd82e8 1897 "SAMD21G18A": {
dgabino 0:c76361bd82e8 1898 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1899 "core": "Cortex-M0+",
dgabino 0:c76361bd82e8 1900 "macros": ["__SAMD21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
dgabino 0:c76361bd82e8 1901 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
dgabino 0:c76361bd82e8 1902 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
dgabino 0:c76361bd82e8 1903 "progen": {"target": "samd21g18a"},
dgabino 0:c76361bd82e8 1904 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
dgabino 0:c76361bd82e8 1905 "release_versions": ["2"]
dgabino 0:c76361bd82e8 1906 },
dgabino 0:c76361bd82e8 1907 "SAML21J18A": {
dgabino 0:c76361bd82e8 1908 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1909 "core": "Cortex-M0+",
dgabino 0:c76361bd82e8 1910 "macros": ["__SAML21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
dgabino 0:c76361bd82e8 1911 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"],
dgabino 0:c76361bd82e8 1912 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
dgabino 0:c76361bd82e8 1913 "progen": {"target": "samr21j18a"},
dgabino 0:c76361bd82e8 1914 "progen_target": "samr21j18a",
dgabino 0:c76361bd82e8 1915 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"]
dgabino 0:c76361bd82e8 1916 },
dgabino 0:c76361bd82e8 1917 "SAMG55J19": {
dgabino 0:c76361bd82e8 1918 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1919 "core": "Cortex-M4",
dgabino 0:c76361bd82e8 1920 "extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"],
dgabino 0:c76361bd82e8 1921 "macros": ["__SAMG55J19__", "BOARD=75", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
dgabino 0:c76361bd82e8 1922 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
dgabino 0:c76361bd82e8 1923 "default_toolchain": "ARM",
dgabino 0:c76361bd82e8 1924 "progen": {"target": "samg55j19"},
dgabino 0:c76361bd82e8 1925 "progen_target": "samg55j19",
dgabino 0:c76361bd82e8 1926 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
dgabino 0:c76361bd82e8 1927 "default_build": "standard"
dgabino 0:c76361bd82e8 1928 },
dgabino 0:c76361bd82e8 1929 "MCU_NRF51_UNIFIED": {
dgabino 0:c76361bd82e8 1930 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1931 "core": "Cortex-M0",
dgabino 0:c76361bd82e8 1932 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
dgabino 0:c76361bd82e8 1933 "macros": [
dgabino 0:c76361bd82e8 1934 "NRF51",
dgabino 0:c76361bd82e8 1935 "TARGET_NRF51822",
dgabino 0:c76361bd82e8 1936 "BLE_STACK_SUPPORT_REQD",
dgabino 0:c76361bd82e8 1937 "SOFTDEVICE_PRESENT",
dgabino 0:c76361bd82e8 1938 "S130",
dgabino 0:c76361bd82e8 1939 "TARGET_MCU_NRF51822"
dgabino 0:c76361bd82e8 1940 ],
dgabino 0:c76361bd82e8 1941 "MERGE_BOOTLOADER": false,
dgabino 0:c76361bd82e8 1942 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822_UNIFIED", "NRF5"],
dgabino 0:c76361bd82e8 1943 "OUTPUT_EXT": "hex",
dgabino 0:c76361bd82e8 1944 "is_disk_virtual": true,
dgabino 0:c76361bd82e8 1945 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
dgabino 0:c76361bd82e8 1946 "public": false,
dgabino 0:c76361bd82e8 1947 "MERGE_SOFT_DEVICE": true,
dgabino 0:c76361bd82e8 1948 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
dgabino 0:c76361bd82e8 1949 {
dgabino 0:c76361bd82e8 1950 "boot": "",
dgabino 0:c76361bd82e8 1951 "name": "s130_nrf51_2.0.0_softdevice.hex",
dgabino 0:c76361bd82e8 1952 "offset": 110592
dgabino 0:c76361bd82e8 1953 }
dgabino 0:c76361bd82e8 1954 ],
dgabino 0:c76361bd82e8 1955 "detect_code": ["1070"],
dgabino 0:c76361bd82e8 1956 "post_binary_hook": {
dgabino 0:c76361bd82e8 1957 "function": "MCU_NRF51Code.binary_hook",
dgabino 0:c76361bd82e8 1958 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
dgabino 0:c76361bd82e8 1959 },
dgabino 0:c76361bd82e8 1960 "program_cycle_s": 6,
dgabino 0:c76361bd82e8 1961 "features": ["BLE"],
dgabino 0:c76361bd82e8 1962 "config":{
dgabino 0:c76361bd82e8 1963 "lf_clock_src": {
dgabino 0:c76361bd82e8 1964 "value": "NRF_LF_SRC_XTAL",
dgabino 0:c76361bd82e8 1965 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
dgabino 0:c76361bd82e8 1966 },
dgabino 0:c76361bd82e8 1967 "uart_hwfc": {
dgabino 0:c76361bd82e8 1968 "help": "Value: 1 for enable, 0 for disable",
dgabino 0:c76361bd82e8 1969 "value": 1,
dgabino 0:c76361bd82e8 1970 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
dgabino 0:c76361bd82e8 1971 }
dgabino 0:c76361bd82e8 1972 }
dgabino 0:c76361bd82e8 1973 },
dgabino 0:c76361bd82e8 1974 "MCU_NRF51_32K_UNIFIED": {
dgabino 0:c76361bd82e8 1975 "inherits": ["MCU_NRF51_UNIFIED"],
dgabino 0:c76361bd82e8 1976 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
dgabino 0:c76361bd82e8 1977 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
dgabino 0:c76361bd82e8 1978 "public": false
dgabino 0:c76361bd82e8 1979 },
dgabino 0:c76361bd82e8 1980 "NRF51_DK": {
dgabino 0:c76361bd82e8 1981 "supported_form_factors": ["ARDUINO"],
dgabino 0:c76361bd82e8 1982 "inherits": ["MCU_NRF51_32K_UNIFIED"],
dgabino 0:c76361bd82e8 1983 "progen": {"target": "nrf51-dk"},
dgabino 0:c76361bd82e8 1984 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
dgabino 0:c76361bd82e8 1985 "release_versions": ["2", "5"]
dgabino 0:c76361bd82e8 1986 },
dgabino 0:c76361bd82e8 1987 "MCU_NRF52": {
dgabino 0:c76361bd82e8 1988 "inherits": ["Target"],
dgabino 0:c76361bd82e8 1989 "core": "Cortex-M4F",
dgabino 0:c76361bd82e8 1990 "macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132"],
dgabino 0:c76361bd82e8 1991 "extra_labels": ["NORDIC", "MCU_NRF52", "MCU_NRF52832", "NRF5"],
dgabino 0:c76361bd82e8 1992 "OUTPUT_EXT": "hex",
dgabino 0:c76361bd82e8 1993 "is_disk_virtual": true,
dgabino 0:c76361bd82e8 1994 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
dgabino 0:c76361bd82e8 1995 "public": false,
dgabino 0:c76361bd82e8 1996 "detect_code": ["1101"],
dgabino 0:c76361bd82e8 1997 "program_cycle_s": 6,
dgabino 0:c76361bd82e8 1998 "MERGE_SOFT_DEVICE": true,
dgabino 0:c76361bd82e8 1999 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
dgabino 0:c76361bd82e8 2000 {
dgabino 0:c76361bd82e8 2001 "boot": "",
dgabino 0:c76361bd82e8 2002 "name": "s132_nrf52_2.0.0_softdevice.hex",
dgabino 0:c76361bd82e8 2003 "offset": 114688
dgabino 0:c76361bd82e8 2004 }
dgabino 0:c76361bd82e8 2005 ],
dgabino 0:c76361bd82e8 2006 "post_binary_hook": {
dgabino 0:c76361bd82e8 2007 "function": "MCU_NRF51Code.binary_hook",
dgabino 0:c76361bd82e8 2008 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
dgabino 0:c76361bd82e8 2009 },
dgabino 0:c76361bd82e8 2010 "MERGE_BOOTLOADER": false,
dgabino 0:c76361bd82e8 2011 "features": ["BLE"],
dgabino 0:c76361bd82e8 2012 "config":{
dgabino 0:c76361bd82e8 2013 "lf_clock_src": {
dgabino 0:c76361bd82e8 2014 "value": "NRF_LF_SRC_XTAL",
dgabino 0:c76361bd82e8 2015 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
dgabino 0:c76361bd82e8 2016 },
dgabino 0:c76361bd82e8 2017 "uart_hwfc": {
dgabino 0:c76361bd82e8 2018 "help": "Value: 1 for enable, 0 for disable",
dgabino 0:c76361bd82e8 2019 "value": 1,
dgabino 0:c76361bd82e8 2020 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
dgabino 0:c76361bd82e8 2021 }
dgabino 0:c76361bd82e8 2022 }
dgabino 0:c76361bd82e8 2023 },
dgabino 0:c76361bd82e8 2024 "NRF52_DK": {
dgabino 0:c76361bd82e8 2025 "supported_form_factors": ["ARDUINO"],
dgabino 0:c76361bd82e8 2026 "inherits": ["MCU_NRF52"],
dgabino 0:c76361bd82e8 2027 "progen": {"target": "nrf52-dk"},
dgabino 0:c76361bd82e8 2028 "macros_add": [
dgabino 0:c76361bd82e8 2029 "BOARD_PCA10040",
dgabino 0:c76361bd82e8 2030 "NRF52_PAN_12",
dgabino 0:c76361bd82e8 2031 "NRF52_PAN_15",
dgabino 0:c76361bd82e8 2032 "NRF52_PAN_58",
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dgabino 0:c76361bd82e8 2045 "NRF52_PAN_64",
dgabino 0:c76361bd82e8 2046 "NRF52_PAN_62",
dgabino 0:c76361bd82e8 2047 "NRF52_PAN_63"
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dgabino 0:c76361bd82e8 2065 "NRF52_PAN_51",
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dgabino 0:c76361bd82e8 2067 "NRF52_PAN_53",
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dgabino 0:c76361bd82e8 2073 "NRF52_PAN_64",
dgabino 0:c76361bd82e8 2074 "NRF52_PAN_62",
dgabino 0:c76361bd82e8 2075 "NRF52_PAN_63"
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dgabino 0:c76361bd82e8 2091 "default_toolchain": "ARM",
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dgabino 0:c76361bd82e8 2094 "is_disk_virtual": true,
dgabino 0:c76361bd82e8 2095 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
dgabino 0:c76361bd82e8 2096 "inherits": ["Target"],
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dgabino 0:c76361bd82e8 2099 "features": ["IPV4"],
dgabino 0:c76361bd82e8 2100 "release_versions": ["2", "5"]
dgabino 0:c76361bd82e8 2101 },
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dgabino 0:c76361bd82e8 2104 "core": "Cortex-M3",
dgabino 0:c76361bd82e8 2105 "extra_labels": ["ONSEMI"],
dgabino 0:c76361bd82e8 2106 "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
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dgabino 0:c76361bd82e8 2113 }
dgabino 0:c76361bd82e8 2114 }