Damian Gabino / picoGW_mcu

MCU driver/HAL for the Picocell Gateway concentrator board. The firmware implements either a USB CDC protocol or a UART protocol to bridge commands coming from host to the SX1308 SPI interface.

src/mbed-dev/common/InterruptIn.cpp@0:c76361bd82e8, 2018-04-11 (annotated)

Committer:
dgabino
Date:
Wed Apr 11 14:42:47 2018 +0000
Revision:
0:c76361bd82e8
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dgabino 0:c76361bd82e8 1 /* mbed Microcontroller Library
dgabino 0:c76361bd82e8 2 * Copyright (c) 2006-2013 ARM Limited
dgabino 0:c76361bd82e8 3 *
dgabino 0:c76361bd82e8 4 * Licensed under the Apache License, Version 2.0 (the "License");
dgabino 0:c76361bd82e8 5 * you may not use this file except in compliance with the License.
dgabino 0:c76361bd82e8 6 * You may obtain a copy of the License at
dgabino 0:c76361bd82e8 7 *
dgabino 0:c76361bd82e8 8 * http://www.apache.org/licenses/LICENSE-2.0
dgabino 0:c76361bd82e8 9 *
dgabino 0:c76361bd82e8 10 * Unless required by applicable law or agreed to in writing, software
dgabino 0:c76361bd82e8 11 * distributed under the License is distributed on an "AS IS" BASIS,
dgabino 0:c76361bd82e8 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
dgabino 0:c76361bd82e8 13 * See the License for the specific language governing permissions and
dgabino 0:c76361bd82e8 14 * limitations under the License.
dgabino 0:c76361bd82e8 15 */
dgabino 0:c76361bd82e8 16 #include "InterruptIn.h"
dgabino 0:c76361bd82e8 17
dgabino 0:c76361bd82e8 18 #if DEVICE_INTERRUPTIN
dgabino 0:c76361bd82e8 19
dgabino 0:c76361bd82e8 20 namespace mbed {
dgabino 0:c76361bd82e8 21
dgabino 0:c76361bd82e8 22 InterruptIn::InterruptIn(PinName pin) : gpio(),
dgabino 0:c76361bd82e8 23 gpio_irq(),
dgabino 0:c76361bd82e8 24 _rise(),
dgabino 0:c76361bd82e8 25 _fall() {
dgabino 0:c76361bd82e8 26 // No lock needed in the constructor
dgabino 0:c76361bd82e8 27 gpio_irq_init(&gpio_irq, pin, (&InterruptIn::_irq_handler), (uint32_t)this);
dgabino 0:c76361bd82e8 28 gpio_init_in(&gpio, pin);
dgabino 0:c76361bd82e8 29 }
dgabino 0:c76361bd82e8 30
dgabino 0:c76361bd82e8 31 InterruptIn::~InterruptIn() {
dgabino 0:c76361bd82e8 32 // No lock needed in the destructor
dgabino 0:c76361bd82e8 33 gpio_irq_free(&gpio_irq);
dgabino 0:c76361bd82e8 34 }
dgabino 0:c76361bd82e8 35
dgabino 0:c76361bd82e8 36 int InterruptIn::read() {
dgabino 0:c76361bd82e8 37 // Read only
dgabino 0:c76361bd82e8 38 return gpio_read(&gpio);
dgabino 0:c76361bd82e8 39 }
dgabino 0:c76361bd82e8 40
dgabino 0:c76361bd82e8 41 void InterruptIn::mode(PinMode pull) {
dgabino 0:c76361bd82e8 42 core_util_critical_section_enter();
dgabino 0:c76361bd82e8 43 gpio_mode(&gpio, pull);
dgabino 0:c76361bd82e8 44 core_util_critical_section_exit();
dgabino 0:c76361bd82e8 45 }
dgabino 0:c76361bd82e8 46
dgabino 0:c76361bd82e8 47 void InterruptIn::rise(Callback<void()> func) {
dgabino 0:c76361bd82e8 48 core_util_critical_section_enter();
dgabino 0:c76361bd82e8 49 if (func) {
dgabino 0:c76361bd82e8 50 _rise.attach(func);
dgabino 0:c76361bd82e8 51 gpio_irq_set(&gpio_irq, IRQ_RISE, 1);
dgabino 0:c76361bd82e8 52 } else {
dgabino 0:c76361bd82e8 53 _rise.attach(NULL);
dgabino 0:c76361bd82e8 54 gpio_irq_set(&gpio_irq, IRQ_RISE, 0);
dgabino 0:c76361bd82e8 55 }
dgabino 0:c76361bd82e8 56 core_util_critical_section_exit();
dgabino 0:c76361bd82e8 57 }
dgabino 0:c76361bd82e8 58
dgabino 0:c76361bd82e8 59 void InterruptIn::fall(Callback<void()> func) {
dgabino 0:c76361bd82e8 60 core_util_critical_section_enter();
dgabino 0:c76361bd82e8 61 if (func) {
dgabino 0:c76361bd82e8 62 _fall.attach(func);
dgabino 0:c76361bd82e8 63 gpio_irq_set(&gpio_irq, IRQ_FALL, 1);
dgabino 0:c76361bd82e8 64 } else {
dgabino 0:c76361bd82e8 65 _fall.attach(NULL);
dgabino 0:c76361bd82e8 66 gpio_irq_set(&gpio_irq, IRQ_FALL, 0);
dgabino 0:c76361bd82e8 67 }
dgabino 0:c76361bd82e8 68 core_util_critical_section_exit();
dgabino 0:c76361bd82e8 69 }
dgabino 0:c76361bd82e8 70
dgabino 0:c76361bd82e8 71 void InterruptIn::_irq_handler(uint32_t id, gpio_irq_event event) {
dgabino 0:c76361bd82e8 72 InterruptIn *handler = (InterruptIn*)id;
dgabino 0:c76361bd82e8 73 switch (event) {
dgabino 0:c76361bd82e8 74 case IRQ_RISE: handler->_rise.call(); break;
dgabino 0:c76361bd82e8 75 case IRQ_FALL: handler->_fall.call(); break;
dgabino 0:c76361bd82e8 76 case IRQ_NONE: break;
dgabino 0:c76361bd82e8 77 }
dgabino 0:c76361bd82e8 78 }
dgabino 0:c76361bd82e8 79
dgabino 0:c76361bd82e8 80 void InterruptIn::enable_irq() {
dgabino 0:c76361bd82e8 81 core_util_critical_section_enter();
dgabino 0:c76361bd82e8 82 gpio_irq_enable(&gpio_irq);
dgabino 0:c76361bd82e8 83 core_util_critical_section_exit();
dgabino 0:c76361bd82e8 84 }
dgabino 0:c76361bd82e8 85
dgabino 0:c76361bd82e8 86 void InterruptIn::disable_irq() {
dgabino 0:c76361bd82e8 87 core_util_critical_section_enter();
dgabino 0:c76361bd82e8 88 gpio_irq_disable(&gpio_irq);
dgabino 0:c76361bd82e8 89 core_util_critical_section_exit();
dgabino 0:c76361bd82e8 90 }
dgabino 0:c76361bd82e8 91
dgabino 0:c76361bd82e8 92 InterruptIn::operator int() {
dgabino 0:c76361bd82e8 93 // Underlying call is atomic
dgabino 0:c76361bd82e8 94 return read();
dgabino 0:c76361bd82e8 95 }
dgabino 0:c76361bd82e8 96
dgabino 0:c76361bd82e8 97 } // namespace mbed
dgabino 0:c76361bd82e8 98
dgabino 0:c76361bd82e8 99 #endif