Damian Gabino / picoGW_hal

Host driver/HAL to build a LoRa Picocell Gateway which communicates through USB with a concentrator board based on Semtech SX1308 multi-channel modem and SX1257/SX1255 RF transceivers.

util_com_stress/readme.md@0:102b50f941d0, 2018-04-11 (annotated)

Committer:
dgabino
Date:
Wed Apr 11 14:38:42 2018 +0000
Revision:
0:102b50f941d0
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dgabino 0:102b50f941d0 1 / _____) _ | |
dgabino 0:102b50f941d0 2 ( (____ _____ ____ _| |_ _____ ____| |__
dgabino 0:102b50f941d0 3 \____ \| ___ | (_ _) ___ |/ ___) _ \
dgabino 0:102b50f941d0 4 _____) ) ____| | | || |_| ____( (___| | | |
dgabino 0:102b50f941d0 5 (______/|_____)_|_|_| \__)_____)\____)_| |_|
dgabino 0:102b50f941d0 6 (C)2013 Semtech-Cycleo
dgabino 0:102b50f941d0 7
dgabino 0:102b50f941d0 8 LoRa concentrator SPI stress test
dgabino 0:102b50f941d0 9 ==================================
dgabino 0:102b50f941d0 10
dgabino 0:102b50f941d0 11 1. Introduction
dgabino 0:102b50f941d0 12 ----------------
dgabino 0:102b50f941d0 13
dgabino 0:102b50f941d0 14 This software is used to check the reliability of the link between the host
dgabino 0:102b50f941d0 15 platform (on which the program is run) and the LoRa concentrator register file
dgabino 0:102b50f941d0 16 that is the interface through which all interaction with the LoRa concentrator
dgabino 0:102b50f941d0 17 happens.
dgabino 0:102b50f941d0 18
dgabino 0:102b50f941d0 19 2. Dependencies
dgabino 0:102b50f941d0 20 ----------------
dgabino 0:102b50f941d0 21
dgabino 0:102b50f941d0 22 This program only access the LoRa concentrator HAL library through its
dgabino 0:102b50f941d0 23 loragw_reg "named registers" access sub-module.
dgabino 0:102b50f941d0 24
dgabino 0:102b50f941d0 25
dgabino 0:102b50f941d0 26
dgabino 0:102b50f941d0 27 The registers used are:
dgabino 0:102b50f941d0 28 * LGW_VERSION
dgabino 0:102b50f941d0 29 * LGW_IMPLICIT_PAYLOAD_LENGHT
dgabino 0:102b50f941d0 30 * LGW_FSK_REF_PATTERN_LSB
dgabino 0:102b50f941d0 31 * LGW_RX_DATA_BUF_ADDR
dgabino 0:102b50f941d0 32 * LGW_RX_DATA_BUF_DATA
dgabino 0:102b50f941d0 33
dgabino 0:102b50f941d0 34 A data buffer accessible through the 2 registers above must be implemented.
dgabino 0:102b50f941d0 35
dgabino 0:102b50f941d0 36 3. Usage
dgabino 0:102b50f941d0 37 ---------
dgabino 0:102b50f941d0 38
dgabino 0:102b50f941d0 39 The tests run forever or until an error is detected.
dgabino 0:102b50f941d0 40 Press Ctrl+C to stop the application.
dgabino 0:102b50f941d0 41
dgabino 0:102b50f941d0 42 When an error is detected, diagnosis information are displayed. Please refer to
dgabino 0:102b50f941d0 43 the source code for more details on what is displayed for diagnosis.
dgabino 0:102b50f941d0 44
dgabino 0:102b50f941d0 45 All tests use pseudo-random data generated by the rand() function. The random
dgabino 0:102b50f941d0 46 generator is not seeded, and the same sequence of data will be use each time the
dgabino 0:102b50f941d0 47 program is launched.
dgabino 0:102b50f941d0 48
dgabino 0:102b50f941d0 49 Basically, some random data is written, read back and then compared to the
dgabino 0:102b50f941d0 50 initial written data. Some "useless" read on others registers might be inserted
dgabino 0:102b50f941d0 51 to be sure that the data read back is coming from the hardware, and not from the
dgabino 0:102b50f941d0 52 internal buffer(s) of the software driver(s).
dgabino 0:102b50f941d0 53
dgabino 0:102b50f941d0 54 Test 1 > R/W on a simple 8-bit register
dgabino 0:102b50f941d0 55
dgabino 0:102b50f941d0 56 Test 2 > R/W on a simple 8-bit register with interstitial reads on VERSION
dgabino 0:102b50f941d0 57
dgabino 0:102b50f941d0 58 Test 3 > R/W on a 32-bit register
dgabino 0:102b50f941d0 59
dgabino 0:102b50f941d0 60 Test 4 > data buffer R/W
dgabino 0:102b50f941d0 61
dgabino 0:102b50f941d0 62 4. License
dgabino 0:102b50f941d0 63 -----------
dgabino 0:102b50f941d0 64
dgabino 0:102b50f941d0 65 Copyright (c) 2013, SEMTECH S.A.
dgabino 0:102b50f941d0 66 All rights reserved.
dgabino 0:102b50f941d0 67
dgabino 0:102b50f941d0 68 Redistribution and use in source and binary forms, with or without
dgabino 0:102b50f941d0 69 modification, are permitted provided that the following conditions are met:
dgabino 0:102b50f941d0 70
dgabino 0:102b50f941d0 71 * Redistributions of source code must retain the above copyright
dgabino 0:102b50f941d0 72 notice, this list of conditions and the following disclaimer.
dgabino 0:102b50f941d0 73 * Redistributions in binary form must reproduce the above copyright
dgabino 0:102b50f941d0 74 notice, this list of conditions and the following disclaimer in the
dgabino 0:102b50f941d0 75 documentation and/or other materials provided with the distribution.
dgabino 0:102b50f941d0 76 * Neither the name of the Semtech corporation nor the
dgabino 0:102b50f941d0 77 names of its contributors may be used to endorse or promote products
dgabino 0:102b50f941d0 78 derived from this software without specific prior written permission.
dgabino 0:102b50f941d0 79
dgabino 0:102b50f941d0 80 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
dgabino 0:102b50f941d0 81 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
dgabino 0:102b50f941d0 82 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
dgabino 0:102b50f941d0 83 DISCLAIMED. IN NO EVENT SHALL SEMTECH S.A. BE LIABLE FOR ANY
dgabino 0:102b50f941d0 84 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
dgabino 0:102b50f941d0 85 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
dgabino 0:102b50f941d0 86 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
dgabino 0:102b50f941d0 87 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
dgabino 0:102b50f941d0 88 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
dgabino 0:102b50f941d0 89 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
dgabino 0:102b50f941d0 90
dgabino 0:102b50f941d0 91 *EOF*