spi.cpp

00001 
00002 /*****************************************************************************
00003 *
00004 *  spi.c - CC3000 Host Driver Implementation.
00005 *  Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
00006 *
00007 *  Redistribution and use in source and binary forms, with or without
00008 *  modification, are permitted provided that the following conditions
00009 *  are met:
00010 *
00011 *    Redistributions of source code must retain the above copyright
00012 *    notice, this list of conditions and the following disclaimer.
00013 *
00014 *    Redistributions in binary form must reproduce the above copyright
00015 *    notice, this list of conditions and the following disclaimer in the
00016 *    documentation and/or other materials provided with the   
00017 *    distribution.
00018 *
00019 *    Neither the name of Texas Instruments Incorporated nor the names of
00020 *    its contributors may be used to endorse or promote products derived
00021 *    from this software without specific prior written permission.
00022 *
00023 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
00024 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
00025 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
00026 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
00027 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
00028 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
00029 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
00030 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
00031 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
00032 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
00033 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00034 *
00035 *****************************************************************************/
00036 
00037 //*****************************************************************************
00038 //
00039 //! \addtogroup link_buff_api
00040 //! @{
00041 //
00042 //*****************************************************************************
00043 #include "mbed.h"
00044 #include "hci.h"
00045 #include "spi.h"
00046 #include "evnt_handler.h"
00047 #include "Board.h"
00048 //#include <msp430.h>
00049 #include "DigitalClass.h"
00050 
00051 SPI spi(p5, p6, p7); // mosi, miso, sclk
00052 DigitalOut cs(p8); // chip select
00053 
00054 DigitalClass Dio(p9, p10);
00055 
00056 InterruptIn irq(p9);
00057 
00058 
00059 #define READ                    3
00060 #define WRITE                   1
00061 
00062 #define HI(value)               (((value) & 0xFF00) >> 8)
00063 #define LO(value)               ((value) & 0x00FF)
00064 
00065 #define ASSERT_CS()          (cs = 0)//(RF_CS_OUT &= ~RF_CS)
00066 
00067 #define DEASSERT_CS()        (cs = 1)//(RF_CS_OUT |= RF_CS)
00068 
00069 #define HEADERS_SIZE_EVNT       (SPI_HEADER_SIZE + 5)
00070 
00071 #define SPI_HEADER_SIZE         (5)
00072 
00073 #define     eSPI_STATE_POWERUP               (0)
00074 #define     eSPI_STATE_INITIALIZED           (1)
00075 #define     eSPI_STATE_IDLE                  (2)
00076 #define     eSPI_STATE_WRITE_IRQ             (3)
00077 #define     eSPI_STATE_WRITE_FIRST_PORTION   (4)
00078 #define     eSPI_STATE_WRITE_EOT             (5)
00079 #define     eSPI_STATE_READ_IRQ              (6)
00080 #define     eSPI_STATE_READ_FIRST_PORTION    (7)
00081 #define     eSPI_STATE_READ_EOT              (8)
00082 
00083 int a = 0;
00084 
00085 typedef struct
00086 {
00087     gcSpiHandleRx  SPIRxHandler;
00088     unsigned short usTxPacketLength;
00089     unsigned short usRxPacketLength;
00090     unsigned long  ulSpiState;
00091     unsigned char *pTxPacket;
00092     unsigned char *pRxPacket;
00093 
00094 }tSpiInformation;
00095 
00096 
00097 tSpiInformation sSpiInformation;
00098 
00099 
00100 // buffer for 5 bytes of SPI HEADER
00101 unsigned char tSpiReadHeader[] = {READ, 0, 0, 0, 0};
00102 
00103 
00104 void SpiWriteDataSynchronous(unsigned char *data, unsigned short size);
00105 void SpiWriteAsync(const unsigned char *data, unsigned short size);
00106 void SpiPauseSpi(void);
00107 void SpiResumeSpi(void);
00108 void SSIContReadOperation(void);
00109 
00110 // The magic number that resides at the end of the TX/RX buffer (1 byte after
00111 // the allocated size) for the purpose of detection of the overrun. The location
00112 // of the memory where the magic number resides shall never be written. In case 
00113 // it is written - the overrun occurred and either receive function or send
00114 // function will stuck forever.
00115 #define CC3000_BUFFER_MAGIC_NUMBER (0xDE)
00116 
00117 ///////////////////////////////////////////////////////////////////////////////////////////////////////////    
00118 //__no_init is used to prevent the buffer initialization in order to prevent hardware WDT expiration    ///
00119 // before entering to 'main()'.                                                                         ///
00120 //for every IDE, different syntax exists :          1.   __CCS__ for CCS v5                             ///
00121 //                                                  2.  __IAR_SYSTEMS_ICC__ for IAR Embedded Workbench  ///
00122 // *CCS does not initialize variables - therefore, __no_init is not needed.                             ///
00123 ///////////////////////////////////////////////////////////////////////////////////////////////////////////
00124 
00125 //#ifdef __CCS__
00126 char spi_buffer[CC3000_RX_BUFFER_SIZE];
00127 
00128 //#elif __IAR_SYSTEMS_ICC__
00129 //__no_init char spi_buffer[CC3000_RX_BUFFER_SIZE];
00130 //#endif
00131 
00132 //#ifdef __CCS__
00133 unsigned char wlan_tx_buffer[CC3000_TX_BUFFER_SIZE];
00134 
00135 //#elif __IAR_SYSTEMS_ICC__
00136 //__no_init unsigned char wlan_tx_buffer[CC3000_TX_BUFFER_SIZE];
00137 //#endif
00138 
00139 //*****************************************************************************
00140 // 
00141 //!  SpiCleanGPIOISR
00142 //! 
00143 //!  \param  none
00144 //! 
00145 //!  \return none
00146 //! 
00147 //!  \brief  This function get the reason for the GPIO interrupt and clear
00148 //!          corresponding interrupt flag
00149 // 
00150 //*****************************************************************************
00151 void
00152 SpiCleanGPIOISR(void)
00153 {
00154     WlanInterruptDisable();
00155     //SPI_IFG_PORT &= ~SPI_IRQ_PIN;
00156 }
00157  
00158 //*****************************************************************************
00159 //
00160 //!  SpiClose
00161 //!
00162 //!  @param  none
00163 //!
00164 //!  @return none
00165 //!
00166 //!  @brief  Close Spi interface
00167 //
00168 //*****************************************************************************
00169 void
00170 SpiClose(void)
00171 {
00172     if (sSpiInformation.pRxPacket)
00173     {
00174         sSpiInformation.pRxPacket = 0;
00175     }
00176     
00177     //  Disable Interrupt
00178     tSLInformation.WlanInterruptDisable();
00179 }
00180 
00181 
00182 //*****************************************************************************
00183 //
00184 //!  SpiOpen
00185 //!
00186 //!  @param  none
00187 //!
00188 //!  @return none
00189 //!
00190 //!  @brief  Open Spi interface 
00191 //
00192 //*****************************************************************************
00193 void 
00194 SpiOpen(gcSpiHandleRx pfRxHandler)
00195 {
00196     sSpiInformation.ulSpiState = eSPI_STATE_POWERUP;
00197     sSpiInformation.SPIRxHandler = pfRxHandler;
00198     sSpiInformation.usTxPacketLength = 0;
00199     sSpiInformation.pTxPacket = NULL;
00200     sSpiInformation.pRxPacket = (unsigned char *)spi_buffer;
00201     sSpiInformation.usRxPacketLength = 0;
00202     spi_buffer[CC3000_RX_BUFFER_SIZE - 1] = CC3000_BUFFER_MAGIC_NUMBER;
00203     wlan_tx_buffer[CC3000_TX_BUFFER_SIZE - 1] = CC3000_BUFFER_MAGIC_NUMBER;
00204     
00205     // Enable interrupt on WLAN IRQ pin 
00206     tSLInformation.WlanInterruptEnable();
00207 }
00208 
00209 //*****************************************************************************
00210 //
00211 //!  init_spi
00212 //!
00213 //!  @param  none
00214 //!
00215 //!  @return none
00216 //!
00217 //!  @brief  initializes an SPI interface
00218 //
00219 //*****************************************************************************
00220 
00221 int init_spi(void)
00222 {
00223     spi.frequency(12000000);
00224     spi.format(8, 1);
00225     cs = 1;
00226 
00227     //UCB0CTL1 |= UCSWRST; // Put state machine in reset
00228     //UCB0CTL0 = UCMSB + UCMST + UCMODE_0 + UCSYNC; // 3-pin, 8-bit SPI master
00229 
00230     //UCB0CTL1 = UCSWRST + UCSSEL_2; // Use SMCLK, keep RESET
00231     
00232     // Set SPI clock
00233     //UCB0CTL1 |= UCSWRST; // Put state machine in reset
00234     //UCB0BR0 = 2; // f_UCxCLK = 25MHz/2 = 12.5MHz
00235     //UCB0BR1 = 0;
00236     //UCB0CTL1 &= ~UCSWRST;
00237     
00238     return(ESUCCESS);
00239 }
00240 
00241 //*****************************************************************************
00242 //
00243 //! SpiFirstWrite
00244 //!
00245 //!  @param  ucBuf     buffer to write
00246 //!  @param  usLength  buffer's length
00247 //!
00248 //!  @return none
00249 //!
00250 //!  @brief  enter point for first write flow
00251 //
00252 //*****************************************************************************
00253 long
00254 SpiFirstWrite(unsigned char *ucBuf, unsigned short usLength)
00255 {
00256     // workaround for first transaction
00257     ASSERT_CS();
00258     
00259     // Assuming we are running on 24 MHz ~50 micro delay is 1200 cycles;
00260     //__delay_cycles(1200);
00261     wait_us(50);
00262     // SPI writes first 4 bytes of data
00263     SpiWriteDataSynchronous(ucBuf, 4);
00264     wait_us(50);
00265     //__delay_cycles(1200);
00266     
00267     SpiWriteDataSynchronous(ucBuf + 4, usLength - 4);
00268     
00269     // From this point on - operate in a regular way
00270     sSpiInformation.ulSpiState = eSPI_STATE_IDLE;
00271     
00272     DEASSERT_CS();
00273     
00274     return(0);
00275 }
00276 
00277 
00278 //*****************************************************************************
00279 //
00280 //!  SpiWrite
00281 //!
00282 //!  @param  pUserBuffer  buffer to write
00283 //!  @param  usLength     buffer's length
00284 //!
00285 //!  @return none
00286 //!
00287 //!  @brief  Spi write operation
00288 //
00289 //*****************************************************************************
00290 long
00291 SpiWrite(unsigned char *pUserBuffer, unsigned short usLength)
00292 {
00293     unsigned char ucPad = 0;
00294     
00295     // Figure out the total length of the packet in order to figure out if there 
00296     // is padding or not
00297     if(!(usLength & 0x0001))
00298     {
00299         ucPad++;
00300     }
00301     
00302     pUserBuffer[0] = WRITE;
00303     pUserBuffer[1] = HI(usLength + ucPad);
00304     pUserBuffer[2] = LO(usLength + ucPad);
00305     pUserBuffer[3] = 0;
00306     pUserBuffer[4] = 0;
00307     
00308     usLength += (SPI_HEADER_SIZE + ucPad);
00309     
00310     // The magic number that resides at the end of the TX/RX buffer (1 byte after 
00311     // the allocated size) for the purpose of detection of the overrun. If the 
00312     // magic number is overwritten - buffer overrun occurred - and we will stuck 
00313     // here forever!
00314     if (wlan_tx_buffer[CC3000_TX_BUFFER_SIZE - 1] != CC3000_BUFFER_MAGIC_NUMBER)
00315     {
00316         while (1)
00317             ;
00318     }
00319     
00320     if (sSpiInformation.ulSpiState == eSPI_STATE_POWERUP)
00321     {
00322         while (sSpiInformation.ulSpiState != eSPI_STATE_INITIALIZED)
00323             ;
00324     }
00325     
00326     if (sSpiInformation.ulSpiState == eSPI_STATE_INITIALIZED)
00327     {
00328         // This is time for first TX/RX transactions over SPI: the IRQ is down - 
00329         // so need to send read buffer size command
00330         SpiFirstWrite(pUserBuffer, usLength);
00331         //printf("first TX/RX transaction....\r\n");
00332     }
00333     else 
00334     {
00335         // We need to prevent here race that can occur in case 2 back to back 
00336         // packets are sent to the  device, so the state will move to IDLE and once 
00337         //again to not IDLE due to IRQ
00338         tSLInformation.WlanInterruptDisable();
00339         
00340         while (sSpiInformation.ulSpiState != eSPI_STATE_IDLE)
00341         {
00342             ;
00343         }
00344         
00345         
00346         sSpiInformation.ulSpiState = eSPI_STATE_WRITE_IRQ;
00347         sSpiInformation.pTxPacket = pUserBuffer;
00348         sSpiInformation.usTxPacketLength = usLength;
00349         
00350         // Assert the CS line and wait till SSI IRQ line is active and then
00351         // initialize write operation
00352         ASSERT_CS();
00353         
00354         // Re-enable IRQ - if it was not disabled - this is not a problem...
00355         tSLInformation.WlanInterruptEnable();
00356         //DEASSERT_CS();
00357         
00358         
00359         // check for a missing interrupt between the CS assertion and enabling back the interrupts
00360         if (tSLInformation.ReadWlanInterruptPin() == 0)
00361         {
00362             //printf("Deal with missing interrupt....\r\n");
00363             SpiWriteDataSynchronous(sSpiInformation.pTxPacket, sSpiInformation.usTxPacketLength);
00364             
00365             sSpiInformation.ulSpiState = eSPI_STATE_IDLE;
00366             
00367             DEASSERT_CS();
00368         }
00369         
00370     }
00371     
00372     // Due to the fact that we are currently implementing a blocking situation
00373     // here we will wait till end of transaction
00374     while (eSPI_STATE_IDLE != sSpiInformation.ulSpiState)
00375         ;
00376     
00377     return(0);
00378 }
00379 
00380  
00381 //*****************************************************************************
00382 //
00383 //!  SpiWriteDataSynchronous
00384 //!
00385 //!  @param  data  buffer to write
00386 //!  @param  size  buffer's size
00387 //!
00388 //!  @return none
00389 //!
00390 //!  @brief  Spi write operation
00391 //
00392 //*****************************************************************************
00393 void
00394 SpiWriteDataSynchronous(unsigned char *data, unsigned short size)
00395 {
00396     //printf("SPI Write\r\n");
00397     while (size)
00398     {       
00399         spi.write(*data);
00400         
00401         size --;
00402         //if(*data > 31 && *data < 127){
00403         //printf(" %c",*data);
00404         //}else{
00405         //printf(" %x",*data);
00406         //}
00407         
00408         data++;
00409     }
00410     //printf("\r\n");
00411 }
00412 
00413 //*****************************************************************************
00414 //
00415 //! SpiReadDataSynchronous
00416 //!
00417 //!  @param  data  buffer to read
00418 //!  @param  size  buffer's size
00419 //!
00420 //!  @return none
00421 //!
00422 //!  @brief  Spi read operation
00423 //
00424 //*****************************************************************************
00425 void
00426 SpiReadDataSynchronous(unsigned char *data, unsigned short size)
00427 {
00428     unsigned char *data_to_send = tSpiReadHeader;
00429     //printf("SPI Read\r\n");
00430     for (int i = 0; i < size; i ++)
00431     {
00432         data[i] = spi.write(data_to_send[0]);
00433         
00434         //if(data[i] > 31 && data[i] < 127){
00435         //printf(" %c",data[i]);
00436         //}else{
00437         //printf(" %x",data[i]);
00438         //}
00439         
00440     }
00441     //printf("\r\n");
00442 }
00443 
00444 
00445 //*****************************************************************************
00446 //
00447 //!  SpiReadHeader
00448 //!
00449 //!  \param  buffer
00450 //!
00451 //!  \return none
00452 //!
00453 //!  \brief   This function enter point for read flow: first we read minimal 5 
00454 //!           SPI header bytes and 5 Event Data bytes
00455 //
00456 //*****************************************************************************
00457 void
00458 SpiReadHeader(void)
00459 {
00460     SpiReadDataSynchronous(sSpiInformation.pRxPacket, 10);
00461 }
00462 
00463 
00464 //*****************************************************************************
00465 //
00466 //!  SpiReadDataCont
00467 //!
00468 //!  @param  None
00469 //!
00470 //!  @return None
00471 //!
00472 //!  @brief  This function processes received SPI Header and in accordance with 
00473 //!          it - continues reading the packet
00474 //
00475 //*****************************************************************************
00476 long
00477 SpiReadDataCont(void)
00478 {
00479     long data_to_recv;
00480     unsigned char *evnt_buff, type;
00481     
00482     //determine what type of packet we have
00483     evnt_buff =  sSpiInformation.pRxPacket;
00484     data_to_recv = 0;
00485     STREAM_TO_UINT8((char *)(evnt_buff + SPI_HEADER_SIZE), HCI_PACKET_TYPE_OFFSET, type);
00486     
00487     switch(type)
00488     {
00489     case HCI_TYPE_DATA:
00490         {
00491             // We need to read the rest of data..
00492             STREAM_TO_UINT16((char *)(evnt_buff + SPI_HEADER_SIZE), HCI_DATA_LENGTH_OFFSET, data_to_recv);
00493             
00494             if (!((HEADERS_SIZE_EVNT + data_to_recv) & 1))
00495             {   
00496                 data_to_recv++;
00497             }
00498             
00499             if (data_to_recv)
00500             {
00501                 SpiReadDataSynchronous(evnt_buff + 10, data_to_recv);
00502             }
00503             break;
00504         }
00505     case HCI_TYPE_EVNT:
00506         {
00507             // Calculate the rest length of the data
00508             STREAM_TO_UINT8((char *)(evnt_buff + SPI_HEADER_SIZE), HCI_EVENT_LENGTH_OFFSET, data_to_recv);
00509             
00510             data_to_recv -= 1;
00511             
00512             // Add padding byte if needed
00513             if ((HEADERS_SIZE_EVNT + data_to_recv) & 1)
00514             {
00515                 
00516                 data_to_recv++;
00517             }
00518             
00519             if (data_to_recv)
00520             {
00521                 SpiReadDataSynchronous(evnt_buff + 10, data_to_recv);
00522             }
00523             
00524             sSpiInformation.ulSpiState = eSPI_STATE_READ_EOT;
00525             break;
00526         }
00527     }
00528     
00529     return (0);
00530 }
00531 
00532 
00533 //*****************************************************************************
00534 //
00535 //! SpiPauseSpi
00536 //!
00537 //!  @param  none
00538 //!
00539 //!  @return none
00540 //!
00541 //!  @brief  Spi pause operation
00542 //
00543 //*****************************************************************************
00544 
00545 void 
00546 SpiPauseSpi(void)
00547 {
00548     WlanInterruptDisable();
00549     //SPI_IRQ_IE &= ~SPI_IRQ_PIN;
00550 }
00551 
00552 
00553 //*****************************************************************************
00554 //
00555 //! SpiResumeSpi
00556 //!
00557 //!  @param  none
00558 //!
00559 //!  @return none
00560 //!
00561 //!  @brief  Spi resume operation
00562 //
00563 //*****************************************************************************
00564 
00565 void 
00566 SpiResumeSpi(void)
00567 {
00568     WlanInterruptEnable();
00569     //SPI_IRQ_IE |= SPI_IRQ_PIN;
00570 }
00571 
00572 
00573 //*****************************************************************************
00574 //
00575 //! SpiTriggerRxProcessing
00576 //!
00577 //!  @param  none
00578 //!
00579 //!  @return none
00580 //!
00581 //!  @brief  Spi RX processing 
00582 //
00583 //*****************************************************************************
00584 void 
00585 SpiTriggerRxProcessing(void)
00586 {
00587     
00588     // Trigger Rx processing
00589     SpiPauseSpi();
00590     DEASSERT_CS();
00591     
00592     // The magic number that resides at the end of the TX/RX buffer (1 byte after 
00593     // the allocated size) for the purpose of detection of the overrun. If the 
00594     // magic number is overwritten - buffer overrun occurred - and we will stuck 
00595     // here forever!
00596     if (sSpiInformation.pRxPacket[CC3000_RX_BUFFER_SIZE - 1] != CC3000_BUFFER_MAGIC_NUMBER)
00597     {
00598         while (1)
00599             ;
00600     }
00601     
00602     sSpiInformation.ulSpiState = eSPI_STATE_IDLE;
00603     sSpiInformation.SPIRxHandler(sSpiInformation.pRxPacket + SPI_HEADER_SIZE);
00604 }
00605 
00606 //*****************************************************************************
00607 // 
00608 //!  IntSpiGPIOHandler
00609 //! 
00610 //!  @param  none
00611 //! 
00612 //!  @return none
00613 //! 
00614 //!  @brief  GPIO A interrupt handler. When the external SSI WLAN device is
00615 //!          ready to interact with Host CPU it generates an interrupt signal.
00616 //!          After that Host CPU has registered this interrupt request
00617 //!          it set the corresponding /CS in active state.
00618 // 
00619 //*****************************************************************************
00620 //#pragma vector=PORT2_VECTOR
00621 //__interrupt 
00622 void IntSpiGPIOHandler(void)
00623 {
00624     //switch(__even_in_range(P2IV, P2IV_P2IFG7))
00625     //{
00626     //case P2IV_P2IFG4:
00627         if (sSpiInformation.ulSpiState == eSPI_STATE_POWERUP)
00628         {
00629             //This means IRQ line was low call a callback of HCI Layer to inform 
00630             //on event 
00631             sSpiInformation.ulSpiState = eSPI_STATE_INITIALIZED;
00632         }
00633         else if (sSpiInformation.ulSpiState == eSPI_STATE_IDLE)
00634         {
00635             sSpiInformation.ulSpiState = eSPI_STATE_READ_IRQ;
00636             
00637             /* IRQ line goes down - we are start reception */
00638             ASSERT_CS();
00639             
00640             // Wait for TX/RX Compete which will come as DMA interrupt
00641             SpiReadHeader();
00642             
00643             sSpiInformation.ulSpiState = eSPI_STATE_READ_EOT;
00644             
00645             SSIContReadOperation();
00646         }
00647         else if (sSpiInformation.ulSpiState == eSPI_STATE_WRITE_IRQ)
00648         {
00649             SpiWriteDataSynchronous(sSpiInformation.pTxPacket, sSpiInformation.usTxPacketLength);
00650             
00651             sSpiInformation.ulSpiState = eSPI_STATE_IDLE;
00652             
00653             DEASSERT_CS();
00654         }
00655     //  break;
00656     //default:
00657     //  break;
00658     //}
00659     
00660 }
00661 
00662 //*****************************************************************************
00663 //
00664 //! SSIContReadOperation
00665 //!
00666 //!  @param  none
00667 //!
00668 //!  @return none
00669 //!
00670 //!  @brief  SPI read operation
00671 //
00672 //*****************************************************************************
00673 
00674 void
00675 SSIContReadOperation(void)
00676 {
00677     // The header was read - continue with  the payload read
00678     if (!SpiReadDataCont())
00679     {
00680         // All the data was read - finalize handling by switching to the task
00681         //  and calling from task Event Handler
00682         SpiTriggerRxProcessing();
00683     }
00684 }
00685 
00686 
00687 //*****************************************************************************
00688 //
00689 //! TXBufferIsEmpty
00690 //!
00691 //!  @param  
00692 //!
00693 //!  @return returns 1 if buffer is empty, 0 otherwise 
00694 //!
00695 //!  @brief  Indication if TX SPI buffer is empty 
00696 //
00697 //*****************************************************************************
00698 
00699 long TXBufferIsEmpty(void)
00700 {
00701     return 1;//(UCB0IFG&UCTXIFG);
00702 }
00703 
00704 //*****************************************************************************
00705 //
00706 //! RXBufferIsEmpty
00707 //!
00708 //!  @param  none  
00709 //!
00710 //!  @return returns 1 if buffer is empty, 0 otherwise
00711 //!
00712 //!  @brief  Indication if RX SPI buffer is empty
00713 //
00714 //*****************************************************************************
00715 
00716 long RXBufferIsEmpty(void)
00717 {
00718     return 1;//(UCB0IFG&UCRXIFG);
00719 }
00720 
00721 //*****************************************************************************
00722 //
00723 //! ReadWlanInterruptPin
00724 //!
00725 //! @param  none
00726 //!
00727 //! @return none
00728 //!
00729 //! @brief  return wlan interrup pin
00730 //
00731 //*****************************************************************************
00732 
00733 int ReadWlanInterruptPin(void)
00734 {
00735 
00736     int8_t val;
00737     //printf("WLAN_IRQ %i \r\n",Dio.WLAN_IRQ.read());
00738     val = Dio.WLAN_IRQ.read();
00739     return (int)val;
00740 
00741 }
00742 
00743 //*****************************************************************************
00744 //
00745 //! WlanInterruptEnable
00746 //!
00747 //! @param  none
00748 //!
00749 //! @return none
00750 //!
00751 //! @brief  Enable wlan IRQ pin
00752 //
00753 //*****************************************************************************
00754 
00755 void WlanInterruptEnable()
00756 {
00757     //int8_t val;
00758     //int a;
00759     //printf("IRQ Enabled....\r\n");
00760     //irq.fall(&IntSpiGPIOHandler);
00761     //wait_ms(1);
00762     //val = ReadWlanInterruptPin();
00763     
00764     // Taken from SpiWrite above, it appears to work better here????
00765     // First deal with missing interrupt if any. Bypass first run, 
00766     // refer to Wlan_start() (wlan.cpp) toggling IRQ.
00767 /*    
00768     if (a < 1){
00769     a++;
00770     }
00771       else
00772     {
00773     
00774       if (tSLInformation.ReadWlanInterruptPin() == 0)
00775         {
00776             
00777             ASSERT_CS();
00778             //printf("Deal with missing interrupt....\r\n");
00779             
00780             SpiWriteDataSynchronous(sSpiInformation.pTxPacket, sSpiInformation.usTxPacketLength);
00781             
00782             sSpiInformation.ulSpiState = eSPI_STATE_IDLE;
00783             
00784             DEASSERT_CS();
00785        }
00786      a=1;
00787    }
00788 */          
00789     irq.fall(&IntSpiGPIOHandler);       
00790     //SPI_IRQ_IES |= SPI_IRQ_PIN;
00791     //SPI_IRQ_IE |= SPI_IRQ_PIN;
00792 }
00793 
00794 //*****************************************************************************
00795 //
00796 //! WlanInterruptDisable
00797 //!
00798 //! @param  none
00799 //!
00800 //! @return none
00801 //!
00802 //! @brief  Disable waln IrQ pin
00803 //
00804 //*****************************************************************************
00805 
00806 void WlanInterruptDisable()
00807 {
00808        
00809     irq.fall(NULL);
00810     
00811 }
00812 
00813 //*****************************************************************************
00814 //
00815 //! WriteWlanPin
00816 //!
00817 //! @param  val value to write to wlan pin
00818 //!
00819 //! @return none
00820 //!
00821 //! @brief  write value to wlan pin
00822 //
00823 //*****************************************************************************
00824 
00825 void WriteWlanPin(unsigned char val)
00826 {   
00827 
00828     if (val) {
00829         Dio.WLAN_EN = 1;
00830         //printf("WLAN_EN %i \r\n",val);
00831         }
00832     else {
00833         Dio.WLAN_EN = 0;
00834         //printf("WLAN_EN %i \r\n",val);
00835         }
00836     
00837 }
00838 
00839 //*****************************************************************************
00840 //
00841 // Close the Doxygen group.
00842 //! @}
00843 //
00844 //*****************************************************************************
00845