David Rimer
Replacement for regular GPIO (DigitalIn, DigitalOut, DigitalInOut) classes which has superior speed.
Revision 23:929068181dea, committed 2017-10-24
- Comitter:
- davidr99
- Date:
- Tue Oct 24 03:00:41 2017 +0000
- Parent:
- 22:45b32f07e790
- Commit message:
- Changed Ticker to only send 1 line at a time but interupt every 15us
Changed in this revision
| Devices/FastIO_STM32F767ZI.h | Show annotated file Show diff for this revision Revisions of this file |
| FastIO.h | Show annotated file Show diff for this revision Revisions of this file |
diff -r 45b32f07e790 -r 929068181dea Devices/FastIO_STM32F767ZI.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/Devices/FastIO_STM32F767ZI.h Tue Oct 24 03:00:41 2017 +0000
@@ -0,0 +1,27 @@
+#if defined(TARGET_STM32F767ZI)
+
+#include "mbed.h"
+#include "pinmap.h"
+
+typedef struct {
+ DigitalInOut *_pin;
+ uint32_t mask;
+} fastio_vars;
+
+#define PINMASK (1 << STM_PIN(pin))
+#define PINMASK_CLR ((1<<16) << STM_PIN(pin))
+#define PORT ((GPIO_TypeDef *)(GPIOA_BASE + 0x0400 * STM_PORT(pin)))
+
+#define INIT_PIN this->container._pin = new DigitalInOut(pin); container.mask = PINMASK
+#define DESTROY_PIN
+
+#define SET_DIR_INPUT this->container._pin->input()
+#define SET_DIR_OUTPUT this->container._pin->output()
+#define SET_MODE(pull) this->container._pin->mode(pull)
+
+#define WRITE_PIN_SET (PORT->BSRR = PINMASK)
+#define WRITE_PIN_CLR (PORT->BSRR = PINMASK_CLR)
+
+#define READ_PIN ((PORT->IDR & container.mask) ? 1 : 0)
+
+#endif
diff -r 45b32f07e790 -r 929068181dea FastIO.h --- a/FastIO.h Tue Sep 20 20:41:42 2016 +0000 +++ b/FastIO.h Tue Oct 24 03:00:41 2017 +0000 @@ -14,6 +14,7 @@ #include "FastIO_EFM32.h" #include "FastIO_LPC43XX.h" #include "FastIO_NRF51822.h" +#include "FastIO_STM32F767ZI.h" #ifndef INIT_PIN #warning Target is not supported by FastIO