MCUFRIEND_kbv library for MBED depends on ADA_GFX_kbv library
Dependents: TFT_Touch_botao_v1 TFT_Touch_exemplo5_git_touch TESTE_1 TFT_Touch_exemplo6_git_touch_button_3_ ... more
utility/mcufriend_mbed.h@0:6f633078852b, 2021-04-26 (annotated)
- Committer:
- davidprentice
- Date:
- Mon Apr 26 14:44:21 2021 +0000
- Revision:
- 0:6f633078852b
- Child:
- 2:12c1ed9dba30
Initial commit from MCUFRIEND_kbv Release v2.9.9
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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davidprentice | 0:6f633078852b | 1 | #ifndef MCUFRIEND_MBED_H_ |
davidprentice | 0:6f633078852b | 2 | #define MCUFRIEND_MBED_H_ |
davidprentice | 0:6f633078852b | 3 | |
davidprentice | 0:6f633078852b | 4 | #include <mbed.h> |
davidprentice | 0:6f633078852b | 5 | |
davidprentice | 0:6f633078852b | 6 | #if defined(USE_SERIAL) |
davidprentice | 0:6f633078852b | 7 | #include "mcufriend_keil_spi.h" |
davidprentice | 0:6f633078852b | 8 | #else |
davidprentice | 0:6f633078852b | 9 | |
davidprentice | 0:6f633078852b | 10 | BusOut digitalL(D0, D1, D2, D3, D4, D5, D6, D7); |
davidprentice | 0:6f633078852b | 11 | BusOut digitalH(D8, D9, D10, D11, D12, D13, NC, NC); |
davidprentice | 0:6f633078852b | 12 | BusOut analog(A0, A1, A2, A3, A4, A5, NC, NC); |
davidprentice | 0:6f633078852b | 13 | |
davidprentice | 0:6f633078852b | 14 | #include "pin_shield_1.h" //shield pin macros e.g. A2_PORT, PIN_OUTPUT() |
davidprentice | 0:6f633078852b | 15 | #include "pin_shield_8.h" //macros for write_8(), read_8(), setWriteDir(), ... |
davidprentice | 0:6f633078852b | 16 | |
davidprentice | 0:6f633078852b | 17 | // control pins as used in MCUFRIEND shields |
davidprentice | 0:6f633078852b | 18 | #define RD_PORT A0_PORT |
davidprentice | 0:6f633078852b | 19 | #define RD_PIN A0_PIN |
davidprentice | 0:6f633078852b | 20 | #define WR_PORT A1_PORT |
davidprentice | 0:6f633078852b | 21 | #define WR_PIN A1_PIN |
davidprentice | 0:6f633078852b | 22 | #define CD_PORT A2_PORT |
davidprentice | 0:6f633078852b | 23 | #define CD_PIN A2_PIN |
davidprentice | 0:6f633078852b | 24 | #define CS_PORT A3_PORT |
davidprentice | 0:6f633078852b | 25 | #define CS_PIN A3_PIN |
davidprentice | 0:6f633078852b | 26 | #define RESET_PORT A4_PORT |
davidprentice | 0:6f633078852b | 27 | #define RESET_PIN A4_PIN |
davidprentice | 0:6f633078852b | 28 | |
davidprentice | 0:6f633078852b | 29 | // general purpose pin macros |
davidprentice | 0:6f633078852b | 30 | #define RD_ACTIVE PIN_LOW(RD_PORT, RD_PIN) |
davidprentice | 0:6f633078852b | 31 | #define RD_IDLE PIN_HIGH(RD_PORT, RD_PIN) |
davidprentice | 0:6f633078852b | 32 | #define RD_OUTPUT PIN_OUTPUT(RD_PORT, RD_PIN) |
davidprentice | 0:6f633078852b | 33 | #define WR_ACTIVE PIN_LOW(WR_PORT, WR_PIN) |
davidprentice | 0:6f633078852b | 34 | #define WR_IDLE PIN_HIGH(WR_PORT, WR_PIN) |
davidprentice | 0:6f633078852b | 35 | #define WR_OUTPUT PIN_OUTPUT(WR_PORT, WR_PIN) |
davidprentice | 0:6f633078852b | 36 | #define CD_COMMAND PIN_LOW(CD_PORT, CD_PIN) |
davidprentice | 0:6f633078852b | 37 | #define CD_DATA PIN_HIGH(CD_PORT, CD_PIN) |
davidprentice | 0:6f633078852b | 38 | #define CD_OUTPUT PIN_OUTPUT(CD_PORT, CD_PIN) |
davidprentice | 0:6f633078852b | 39 | #define CS_ACTIVE PIN_LOW(CS_PORT, CS_PIN) |
davidprentice | 0:6f633078852b | 40 | #define CS_IDLE PIN_HIGH(CS_PORT, CS_PIN) |
davidprentice | 0:6f633078852b | 41 | #define CS_OUTPUT PIN_OUTPUT(CS_PORT, CS_PIN) |
davidprentice | 0:6f633078852b | 42 | #define RESET_ACTIVE PIN_LOW(RESET_PORT, RESET_PIN) |
davidprentice | 0:6f633078852b | 43 | #define RESET_IDLE PIN_HIGH(RESET_PORT, RESET_PIN) |
davidprentice | 0:6f633078852b | 44 | #define RESET_OUTPUT PIN_OUTPUT(RESET_PORT, RESET_PIN) |
davidprentice | 0:6f633078852b | 45 | |
davidprentice | 0:6f633078852b | 46 | #define WR_ACTIVE2 {WR_ACTIVE; WR_ACTIVE;} |
davidprentice | 0:6f633078852b | 47 | #define WR_ACTIVE4 {WR_ACTIVE2; WR_ACTIVE2;} |
davidprentice | 0:6f633078852b | 48 | #define WR_ACTIVE8 {WR_ACTIVE4; WR_ACTIVE4;} |
davidprentice | 0:6f633078852b | 49 | #define RD_ACTIVE2 {RD_ACTIVE; RD_ACTIVE;} |
davidprentice | 0:6f633078852b | 50 | #define RD_ACTIVE4 {RD_ACTIVE2; RD_ACTIVE2;} |
davidprentice | 0:6f633078852b | 51 | #define RD_ACTIVE8 {RD_ACTIVE4; RD_ACTIVE4;} |
davidprentice | 0:6f633078852b | 52 | #define RD_ACTIVE16 {RD_ACTIVE8; RD_ACTIVE8;} |
davidprentice | 0:6f633078852b | 53 | #define WR_IDLE2 {WR_IDLE; WR_IDLE;} |
davidprentice | 0:6f633078852b | 54 | #define WR_IDLE4 {WR_IDLE2; WR_IDLE2;} |
davidprentice | 0:6f633078852b | 55 | #define RD_IDLE2 {RD_IDLE; RD_IDLE;} |
davidprentice | 0:6f633078852b | 56 | #define RD_IDLE4 {RD_IDLE2; RD_IDLE2;} |
davidprentice | 0:6f633078852b | 57 | |
davidprentice | 0:6f633078852b | 58 | #if defined(__MK20DX128__) || defined(___MK20DX256__) // Teensy3.0 || 3.2 96MHz |
davidprentice | 0:6f633078852b | 59 | #define WRITE_DELAY { WR_ACTIVE2; } |
davidprentice | 0:6f633078852b | 60 | #define READ_DELAY { RD_ACTIVE4; RD_ACTIVE; } |
davidprentice | 0:6f633078852b | 61 | #elif defined(__MK64FX512__) || defined(TARGET_M4) // Teensy3.5 120MHz thanks to PeteJohno |
davidprentice | 0:6f633078852b | 62 | #define WRITE_DELAY { WR_ACTIVE4; } |
davidprentice | 0:6f633078852b | 63 | #define READ_DELAY { RD_ACTIVE8; } |
davidprentice | 0:6f633078852b | 64 | #elif defined(__MK66FX1M0__) || defined(TARGET_M4) // Teensy3.6 180MHz untested. delays can possibly be reduced. |
davidprentice | 0:6f633078852b | 65 | #define WRITE_DELAY { WR_ACTIVE8; } |
davidprentice | 0:6f633078852b | 66 | #define READ_DELAY { RD_ACTIVE8; RD_ACTIVE8; } |
davidprentice | 0:6f633078852b | 67 | #elif defined(TARGET_M7) // Nucleo-F767 216MHz untested. delays can possibly be reduced. |
davidprentice | 0:6f633078852b | 68 | #define WRITE_DELAY { WR_ACTIVE8; WR_ACTIVE2; } |
davidprentice | 0:6f633078852b | 69 | #define IDLE_DELAY { WR_IDLE2;WR_IDLE; } |
davidprentice | 0:6f633078852b | 70 | #define READ_DELAY { RD_ACTIVE16; RD_ACTIVE16; RD_ACTIVE4; } |
davidprentice | 0:6f633078852b | 71 | #define READ_IDLE { RD_IDLE2;RD_IDLE; } |
davidprentice | 0:6f633078852b | 72 | #else |
davidprentice | 0:6f633078852b | 73 | //#error unspecified delays |
davidprentice | 0:6f633078852b | 74 | //#define WRITE_DELAY { WR_ACTIVE2; } |
davidprentice | 0:6f633078852b | 75 | //#define READ_DELAY { RD_ACTIVE4; RD_ACTIVE; } |
davidprentice | 0:6f633078852b | 76 | #define WRITE_DELAY |
davidprentice | 0:6f633078852b | 77 | #define READ_DELAY |
davidprentice | 0:6f633078852b | 78 | #endif |
davidprentice | 0:6f633078852b | 79 | |
davidprentice | 0:6f633078852b | 80 | #if !defined(IDLE_DELAY) |
davidprentice | 0:6f633078852b | 81 | #define IDLE_DELAY WR_IDLE |
davidprentice | 0:6f633078852b | 82 | #endif |
davidprentice | 0:6f633078852b | 83 | #if !defined(READ_IDLE) |
davidprentice | 0:6f633078852b | 84 | #define READ_IDLE RD_IDLE |
davidprentice | 0:6f633078852b | 85 | #endif |
davidprentice | 0:6f633078852b | 86 | |
davidprentice | 0:6f633078852b | 87 | // General macros. IOCLR registers are 1 cycle when optimised. |
davidprentice | 0:6f633078852b | 88 | #define WR_STROBE { WR_ACTIVE; WR_IDLE; } //PWLW=TWRL=50ns |
davidprentice | 0:6f633078852b | 89 | #define RD_STROBE RD_IDLE, RD_ACTIVE, RD_ACTIVE, RD_ACTIVE //PWLR=TRDL=150ns |
davidprentice | 0:6f633078852b | 90 | #define write8(d) { write_8(d); WRITE_DELAY; WR_STROBE; IDLE_DELAY; } // STROBEs are defined later |
davidprentice | 0:6f633078852b | 91 | #define write16(x) { uint8_t h = (x)>>8, l = x; write8(h); write8(l); } |
davidprentice | 0:6f633078852b | 92 | #define READ_8(dst) { RD_STROBE; READ_DELAY; dst = read_8(); READ_IDLE; } // read 250ns after RD_ACTIVE goes low |
davidprentice | 0:6f633078852b | 93 | #define READ_16(dst) { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); } |
davidprentice | 0:6f633078852b | 94 | |
davidprentice | 0:6f633078852b | 95 | #define CTL_INIT() { RD_OUTPUT; WR_OUTPUT; CD_OUTPUT; CS_OUTPUT; RESET_OUTPUT; } |
davidprentice | 0:6f633078852b | 96 | #define WriteCmd(x) { CD_COMMAND; write16(x); CD_DATA; } |
davidprentice | 0:6f633078852b | 97 | #define WriteData(x) { write16(x); } |
davidprentice | 0:6f633078852b | 98 | |
davidprentice | 0:6f633078852b | 99 | #endif //!USE_SERIAL |
davidprentice | 0:6f633078852b | 100 | #endif //MCUFRIEND_KEIL_H_ |
davidprentice | 0:6f633078852b | 101 |