MCUFRIEND_kbv_R299 - MCUFRIEND_kbv library for MBED depends on ADA_GFX…

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MCUFRIEND_kbv library for MBED depends on ADA_GFX_kbv library

Dependents: TFT_Touch_botao_v1 TFT_Touch_exemplo5_git_touch TESTE_1 TFT_Touch_exemplo6_git_touch_button_3_ ... more

MCUFRIEND_kbv.cpp@3:47aa91940108, 2021-05-14 (annotated)

Committer:: davidprentice
Date:: Fri May 14 14:45:22 2021 +0000
Revision:: 3:47aa91940108
Parent:: 0:6f633078852b

conditional MBED and STM32CUBEIDE

Who changed what in which revision?

User	Revision	Line number	New contents of line
davidprentice	0:6f633078852b	1	//#define SUPPORT_0139 //S6D0139 +280 bytes
davidprentice	0:6f633078852b	2	#define SUPPORT_0154 //S6D0154 +320 bytes
davidprentice	0:6f633078852b	3	//#define SUPPORT_1289 //SSD1289,SSD1297 (ID=0x9797) +626 bytes, 0.03s
davidprentice	0:6f633078852b	4	//#define SUPPORT_1580 //R61580 Untested
davidprentice	0:6f633078852b	5	#define SUPPORT_1963 //only works with 16BIT bus anyway
davidprentice	0:6f633078852b	6	//#define SUPPORT_4532 //LGDP4532 +120 bytes. thanks Leodino
davidprentice	0:6f633078852b	7	#define SUPPORT_4535 //LGDP4535 +180 bytes
davidprentice	0:6f633078852b	8	#define SUPPORT_68140 //RM68140 +52 bytes defaults to PIXFMT=0x55
davidprentice	0:6f633078852b	9	//#define SUPPORT_7735
davidprentice	0:6f633078852b	10	#define SUPPORT_7781 //ST7781 +172 bytes
davidprentice	0:6f633078852b	11	//#define SUPPORT_8230 //UC8230 +118 bytes
davidprentice	0:6f633078852b	12	//#define SUPPORT_8347D //HX8347-D, HX8347-G, HX8347-I, HX8367-A +520 bytes, 0.27s
davidprentice	0:6f633078852b	13	//#define SUPPORT_8347A //HX8347-A +500 bytes, 0.27s
davidprentice	0:6f633078852b	14	//#define SUPPORT_8352A //HX8352A +486 bytes, 0.27s
davidprentice	0:6f633078852b	15	//#define SUPPORT_8352B //HX8352B
davidprentice	0:6f633078852b	16	//#define SUPPORT_8357D_GAMMA //monster 34 byte
davidprentice	0:6f633078852b	17	//#define SUPPORT_9163 //
davidprentice	0:6f633078852b	18	//#define SUPPORT_9225 //ILI9225-B, ILI9225-G ID=0x9225, ID=0x9226, ID=0x6813 +380 bytes
davidprentice	0:6f633078852b	19	//#define SUPPORT_9326_5420 //ILI9326, SPFD5420 +246 bytes
davidprentice	0:6f633078852b	20	//#define SUPPORT_9342 //costs +114 bytes
davidprentice	0:6f633078852b	21	//#define SUPPORT_9806 //UNTESTED
davidprentice	0:6f633078852b	22	#define SUPPORT_9488_555 //costs +230 bytes, 0.03s / 0.19s
davidprentice	0:6f633078852b	23	#define SUPPORT_B509_7793 //R61509, ST7793 +244 bytes
davidprentice	0:6f633078852b	24	#define OFFSET_9327 32 //costs about 103 bytes, 0.08s
davidprentice	0:6f633078852b	25
davidprentice	0:6f633078852b	26	#include "MCUFRIEND_kbv.h"
davidprentice	0:6f633078852b	27	#if defined(USE_SERIAL)
davidprentice	0:6f633078852b	28	#include "utility/mcufriend_serial.h"
davidprentice	0:6f633078852b	29	//uint8_t running;
davidprentice	3:47aa91940108	30	#elif defined(__MBED__) && !defined(ARDUINO_ARCH_MBED)
davidprentice	0:6f633078852b	31	#include "utility/mcufriend_mbed.h"
davidprentice	3:47aa91940108	32	#elif defined(__CC_ARM) \|\| defined(__CROSSWORKS_ARM) \|\| defined(IS_STM32CUBEIDE)
davidprentice	0:6f633078852b	33	#include "utility/mcufriend_keil.h"
davidprentice	0:6f633078852b	34	#else
davidprentice	0:6f633078852b	35	#include "utility/mcufriend_shield.h"
davidprentice	0:6f633078852b	36	#endif
davidprentice	0:6f633078852b	37
davidprentice	0:6f633078852b	38	#define MIPI_DCS_REV1 (1<<0)
davidprentice	0:6f633078852b	39	#define AUTO_READINC (1<<1)
davidprentice	0:6f633078852b	40	#define READ_BGR (1<<2)
davidprentice	0:6f633078852b	41	#define READ_LOWHIGH (1<<3)
davidprentice	0:6f633078852b	42	#define READ_24BITS (1<<4)
davidprentice	0:6f633078852b	43	#define XSA_XEA_16BIT (1<<5)
davidprentice	0:6f633078852b	44	#define READ_NODUMMY (1<<6)
davidprentice	0:6f633078852b	45	#define INVERT_GS (1<<8)
davidprentice	0:6f633078852b	46	#define INVERT_SS (1<<9)
davidprentice	0:6f633078852b	47	#define MV_AXIS (1<<10)
davidprentice	0:6f633078852b	48	#define INVERT_RGB (1<<11)
davidprentice	0:6f633078852b	49	#define REV_SCREEN (1<<12)
davidprentice	0:6f633078852b	50	#define FLIP_VERT (1<<13)
davidprentice	0:6f633078852b	51	#define FLIP_HORIZ (1<<14)
davidprentice	0:6f633078852b	52
davidprentice	0:6f633078852b	53	#if (defined(USES_16BIT_BUS)) //only comes from SPECIALs
davidprentice	0:6f633078852b	54	#define USING_16BIT_BUS 1
davidprentice	0:6f633078852b	55	#else
davidprentice	0:6f633078852b	56	#define USING_16BIT_BUS 0
davidprentice	0:6f633078852b	57	#endif
davidprentice	0:6f633078852b	58
davidprentice	0:6f633078852b	59	MCUFRIEND_kbv::MCUFRIEND_kbv(int CS, int RS, int WR, int RD, int _RST):Adafruit_GFX(240, 320)
davidprentice	0:6f633078852b	60	{
davidprentice	0:6f633078852b	61	// we can not access GPIO pins until AHB has been enabled.
davidprentice	0:6f633078852b	62	}
davidprentice	0:6f633078852b	63
davidprentice	0:6f633078852b	64	static uint8_t done_reset, is8347, is555, is9797;
davidprentice	0:6f633078852b	65	static uint16_t color565_to_555(uint16_t color) {
davidprentice	0:6f633078852b	66	return (color & 0xFFC0) \| ((color & 0x1F) << 1) \| ((color & 0x01)); //lose Green LSB, extend Blue LSB
davidprentice	0:6f633078852b	67	}
davidprentice	0:6f633078852b	68	static uint16_t color555_to_565(uint16_t color) {
davidprentice	0:6f633078852b	69	return (color & 0xFFC0) \| ((color & 0x0400) >> 5) \| ((color & 0x3F) >> 1); //extend Green LSB
davidprentice	0:6f633078852b	70	}
davidprentice	0:6f633078852b	71	static uint8_t color565_to_r(uint16_t color) {
davidprentice	0:6f633078852b	72	return ((color & 0xF800) >> 8); // transform to rrrrrxxx
davidprentice	0:6f633078852b	73	}
davidprentice	0:6f633078852b	74	static uint8_t color565_to_g(uint16_t color) {
davidprentice	0:6f633078852b	75	return ((color & 0x07E0) >> 3); // transform to ggggggxx
davidprentice	0:6f633078852b	76	}
davidprentice	0:6f633078852b	77	static uint8_t color565_to_b(uint16_t color) {
davidprentice	0:6f633078852b	78	return ((color & 0x001F) << 3); // transform to bbbbbxxx
davidprentice	0:6f633078852b	79	}
davidprentice	0:6f633078852b	80	static void write24(uint16_t color) {
davidprentice	0:6f633078852b	81	uint8_t r = color565_to_r(color);
davidprentice	0:6f633078852b	82	uint8_t g = color565_to_g(color);
davidprentice	0:6f633078852b	83	uint8_t b = color565_to_b(color);
davidprentice	0:6f633078852b	84	write8(r);
davidprentice	0:6f633078852b	85	write8(g);
davidprentice	0:6f633078852b	86	write8(b);
davidprentice	0:6f633078852b	87	}
davidprentice	0:6f633078852b	88
davidprentice	0:6f633078852b	89	void MCUFRIEND_kbv::reset(void)
davidprentice	0:6f633078852b	90	{
davidprentice	0:6f633078852b	91	done_reset = 1;
davidprentice	0:6f633078852b	92	setWriteDir();
davidprentice	0:6f633078852b	93	CTL_INIT();
davidprentice	0:6f633078852b	94	CS_IDLE;
davidprentice	0:6f633078852b	95	RD_IDLE;
davidprentice	0:6f633078852b	96	WR_IDLE;
davidprentice	0:6f633078852b	97	RESET_IDLE;
davidprentice	0:6f633078852b	98	delay(50);
davidprentice	0:6f633078852b	99	RESET_ACTIVE;
davidprentice	0:6f633078852b	100	delay(100);
davidprentice	0:6f633078852b	101	RESET_IDLE;
davidprentice	0:6f633078852b	102	delay(100);
davidprentice	0:6f633078852b	103	WriteCmdData(0xB0, 0x0000); //R61520 needs this to read ID
davidprentice	0:6f633078852b	104	}
davidprentice	0:6f633078852b	105
davidprentice	0:6f633078852b	106	static void writecmddata(uint16_t cmd, uint16_t dat)
davidprentice	0:6f633078852b	107	{
davidprentice	0:6f633078852b	108	CS_ACTIVE;
davidprentice	0:6f633078852b	109	WriteCmd(cmd);
davidprentice	0:6f633078852b	110	WriteData(dat);
davidprentice	0:6f633078852b	111	CS_IDLE;
davidprentice	0:6f633078852b	112	}
davidprentice	0:6f633078852b	113
davidprentice	0:6f633078852b	114	void MCUFRIEND_kbv::WriteCmdData(uint16_t cmd, uint16_t dat) { writecmddata(cmd, dat); }
davidprentice	0:6f633078852b	115
davidprentice	0:6f633078852b	116	static void WriteCmdParamN(uint16_t cmd, int8_t N, uint8_t * block)
davidprentice	0:6f633078852b	117	{
davidprentice	0:6f633078852b	118	CS_ACTIVE;
davidprentice	0:6f633078852b	119	WriteCmd(cmd);
davidprentice	0:6f633078852b	120	while (N-- > 0) {
davidprentice	0:6f633078852b	121	uint8_t u8 = *block++;
davidprentice	0:6f633078852b	122	write8(u8);
davidprentice	0:6f633078852b	123	if (N && is8347) {
davidprentice	0:6f633078852b	124	cmd++;
davidprentice	0:6f633078852b	125	WriteCmd(cmd);
davidprentice	0:6f633078852b	126	}
davidprentice	0:6f633078852b	127	}
davidprentice	0:6f633078852b	128	CS_IDLE;
davidprentice	0:6f633078852b	129	}
davidprentice	0:6f633078852b	130
davidprentice	0:6f633078852b	131	static inline void WriteCmdParam4(uint8_t cmd, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4)
davidprentice	0:6f633078852b	132	{
davidprentice	0:6f633078852b	133	uint8_t d[4];
davidprentice	0:6f633078852b	134	d[0] = d1, d[1] = d2, d[2] = d3, d[3] = d4;
davidprentice	0:6f633078852b	135	WriteCmdParamN(cmd, 4, d);
davidprentice	0:6f633078852b	136	}
davidprentice	0:6f633078852b	137
davidprentice	0:6f633078852b	138	//#define WriteCmdParam4(cmd, d1, d2, d3, d4) {uint8_t d[4];d[0] = d1, d[1] = d2, d[2] = d3, d[3] = d4;WriteCmdParamN(cmd, 4, d);}
davidprentice	0:6f633078852b	139	void MCUFRIEND_kbv::pushCommand(uint16_t cmd, uint8_t * block, int8_t N) { WriteCmdParamN(cmd, N, block); }
davidprentice	0:6f633078852b	140
davidprentice	0:6f633078852b	141	static uint16_t read16bits(void)
davidprentice	0:6f633078852b	142	{
davidprentice	0:6f633078852b	143	uint16_t ret;
davidprentice	0:6f633078852b	144	uint8_t lo;
davidprentice	0:6f633078852b	145	#if USING_16BIT_BUS
davidprentice	0:6f633078852b	146	READ_16(ret); //single strobe to read whole bus
davidprentice	0:6f633078852b	147	if (ret > 255) //ID might say 0x00D3
davidprentice	0:6f633078852b	148	return ret;
davidprentice	0:6f633078852b	149	#else
davidprentice	0:6f633078852b	150	delay(1); //1us should be adequate
davidprentice	0:6f633078852b	151	READ_8(ret);
davidprentice	0:6f633078852b	152	#endif
davidprentice	0:6f633078852b	153	//all MIPI_DCS_REV1 style params are 8-bit
davidprentice	0:6f633078852b	154	delay(1); //1us should be adequate
davidprentice	0:6f633078852b	155	READ_8(lo);
davidprentice	0:6f633078852b	156	return (ret << 8) \| lo;
davidprentice	0:6f633078852b	157	}
davidprentice	0:6f633078852b	158
davidprentice	0:6f633078852b	159	uint16_t MCUFRIEND_kbv::readReg(uint16_t reg, int8_t index)
davidprentice	0:6f633078852b	160	{
davidprentice	0:6f633078852b	161	uint16_t ret;
davidprentice	0:6f633078852b	162	uint8_t lo;
davidprentice	0:6f633078852b	163	if (!done_reset)
davidprentice	0:6f633078852b	164	reset();
davidprentice	0:6f633078852b	165	CS_ACTIVE;
davidprentice	0:6f633078852b	166	WriteCmd(reg);
davidprentice	0:6f633078852b	167	setReadDir();
davidprentice	0:6f633078852b	168	delay(1); //1us should be adequate
davidprentice	0:6f633078852b	169	// READ_16(ret);
davidprentice	0:6f633078852b	170	do { ret = read16bits(); }while (--index >= 0); //need to test with SSD1963
davidprentice	0:6f633078852b	171	RD_IDLE;
davidprentice	0:6f633078852b	172	CS_IDLE;
davidprentice	0:6f633078852b	173	setWriteDir();
davidprentice	0:6f633078852b	174	return ret;
davidprentice	0:6f633078852b	175	}
davidprentice	0:6f633078852b	176
davidprentice	0:6f633078852b	177	uint32_t MCUFRIEND_kbv::readReg32(uint16_t reg)
davidprentice	0:6f633078852b	178	{
davidprentice	0:6f633078852b	179	uint16_t h = readReg(reg, 0);
davidprentice	0:6f633078852b	180	uint16_t l = readReg(reg, 1);
davidprentice	0:6f633078852b	181	return ((uint32_t) h << 16) \| (l);
davidprentice	0:6f633078852b	182	}
davidprentice	0:6f633078852b	183
davidprentice	0:6f633078852b	184	uint32_t MCUFRIEND_kbv::readReg40(uint16_t reg)
davidprentice	0:6f633078852b	185	{
davidprentice	0:6f633078852b	186	uint16_t h = readReg(reg, 0);
davidprentice	0:6f633078852b	187	uint16_t m = readReg(reg, 1);
davidprentice	0:6f633078852b	188	uint16_t l = readReg(reg, 2);
davidprentice	0:6f633078852b	189	return ((uint32_t) h << 24) \| (m << 8) \| (l >> 8);
davidprentice	0:6f633078852b	190	}
davidprentice	0:6f633078852b	191
davidprentice	0:6f633078852b	192	uint16_t MCUFRIEND_kbv::readID(void)
davidprentice	0:6f633078852b	193	{
davidprentice	0:6f633078852b	194	uint16_t ret, ret2;
davidprentice	0:6f633078852b	195	uint8_t msb;
davidprentice	0:6f633078852b	196	ret = readReg(0); //forces a reset() if called before begin()
davidprentice	0:6f633078852b	197	if (ret == 0x5408) //the SPFD5408 fails the 0xD3D3 test.
davidprentice	0:6f633078852b	198	return 0x5408;
davidprentice	0:6f633078852b	199	if (ret == 0x5420) //the SPFD5420 fails the 0xD3D3 test.
davidprentice	0:6f633078852b	200	return 0x5420;
davidprentice	0:6f633078852b	201	if (ret == 0x8989) //SSD1289 is always 8989
davidprentice	0:6f633078852b	202	return 0x1289;
davidprentice	0:6f633078852b	203	ret = readReg(0x67); //HX8347-A
davidprentice	0:6f633078852b	204	if (ret == 0x4747)
davidprentice	0:6f633078852b	205	return 0x8347;
davidprentice	0:6f633078852b	206	ret = readReg40(0xEF); //ILI9327: [xx 02 04 93 27 FF]
davidprentice	0:6f633078852b	207	if (ret == 0x9327)
davidprentice	0:6f633078852b	208	return 0x9327;
davidprentice	0:6f633078852b	209	//#if defined(SUPPORT_1963) && USING_16BIT_BUS
davidprentice	0:6f633078852b	210	ret = readReg32(0xA1); //SSD1963: [01 57 61 01]
davidprentice	0:6f633078852b	211	if (ret == 0x6101)
davidprentice	0:6f633078852b	212	return 0x1963;
davidprentice	0:6f633078852b	213	if (ret == 0xFFFF) //R61526: [xx FF FF FF]
davidprentice	0:6f633078852b	214	return 0x1526; //subsequent begin() enables Command Access
davidprentice	0:6f633078852b	215	if (ret == 0xFF00) //R61520: [xx FF FF 00]
davidprentice	0:6f633078852b	216	return 0x1520; //subsequent begin() enables Command Access
davidprentice	0:6f633078852b	217	//#endif
davidprentice	0:6f633078852b	218	ret = readReg40(0xBF);
davidprentice	0:6f633078852b	219	if (ret == 0x8357) //HX8357B: [xx 01 62 83 57 FF]
davidprentice	0:6f633078852b	220	return 0x8357;
davidprentice	0:6f633078852b	221	if (ret == 0x9481) //ILI9481: [xx 02 04 94 81 FF]
davidprentice	0:6f633078852b	222	return 0x9481;
davidprentice	0:6f633078852b	223	if (ret == 0x1511) //?R61511: [xx 02 04 15 11] not tested yet
davidprentice	0:6f633078852b	224	return 0x1511;
davidprentice	0:6f633078852b	225	if (ret == 0x1520) //?R61520: [xx 01 22 15 20]
davidprentice	0:6f633078852b	226	return 0x1520;
davidprentice	0:6f633078852b	227	if (ret == 0x1526) //?R61526: [xx 01 22 15 26]
davidprentice	0:6f633078852b	228	return 0x1526;
davidprentice	0:6f633078852b	229	if (ret == 0x1581) //R61581: [xx 01 22 15 81]
davidprentice	0:6f633078852b	230	return 0x1581;
davidprentice	0:6f633078852b	231	if (ret == 0x1400) //?RM68140:[xx FF 68 14 00] not tested yet
davidprentice	0:6f633078852b	232	return 0x6814;
davidprentice	0:6f633078852b	233	ret = readReg32(0xD4);
davidprentice	0:6f633078852b	234	if (ret == 0x5310) //NT35310: [xx 01 53 10]
davidprentice	0:6f633078852b	235	return 0x5310;
davidprentice	0:6f633078852b	236	ret = readReg32(0xD7);
davidprentice	0:6f633078852b	237	if (ret == 0x8031) //weird unknown from BangGood [xx 20 80 31] PrinceCharles
davidprentice	0:6f633078852b	238	return 0x8031;
davidprentice	0:6f633078852b	239	ret = readReg32(0xFE) >> 8; //weird unknown from BangGood [04 20 53]
davidprentice	0:6f633078852b	240	if (ret == 0x2053)
davidprentice	0:6f633078852b	241	return 0x2053;
davidprentice	0:6f633078852b	242	uint32_t ret32 = readReg32(0x04);
davidprentice	0:6f633078852b	243	msb = ret32 >> 16;
davidprentice	0:6f633078852b	244	ret = ret32;
davidprentice	0:6f633078852b	245	// if (msb = 0x38 && ret == 0x8000) //unknown [xx 38 80 00] with D3 = 0x1602
davidprentice	0:6f633078852b	246	if (msb == 0x00 && ret == 0x8000) { //HX8357-D [xx 00 80 00]
davidprentice	0:6f633078852b	247	#if 1
davidprentice	0:6f633078852b	248	uint8_t cmds[] = {0xFF, 0x83, 0x57};
davidprentice	0:6f633078852b	249	pushCommand(0xB9, cmds, 3);
davidprentice	0:6f633078852b	250	msb = readReg(0xD0);
davidprentice	0:6f633078852b	251	if (msb == 0x99) return 0x0099; //HX8357-D from datasheet
davidprentice	0:6f633078852b	252	if (msb == 0x90) //HX8357-C undocumented
davidprentice	0:6f633078852b	253	#endif
davidprentice	0:6f633078852b	254	return 0x9090; //BIG CHANGE: HX8357-D was 0x8357
davidprentice	0:6f633078852b	255	}
davidprentice	0:6f633078852b	256	// if (msb == 0xFF && ret == 0xFFFF) //R61526 [xx FF FF FF]
davidprentice	0:6f633078852b	257	// return 0x1526; //subsequent begin() enables Command Access
davidprentice	0:6f633078852b	258	if (ret == 0x1526) //R61526 [xx 06 15 26] if I have written NVM
davidprentice	0:6f633078852b	259	return 0x1526; //subsequent begin() enables Command Access
davidprentice	0:6f633078852b	260	if (ret == 0x89F0) //ST7735S: [xx 7C 89 F0]
davidprentice	0:6f633078852b	261	return 0x7735;
davidprentice	0:6f633078852b	262	if (ret == 0x8552) //ST7789V: [xx 85 85 52]
davidprentice	0:6f633078852b	263	return 0x7789;
davidprentice	0:6f633078852b	264	if (ret == 0xAC11) //?unknown [xx 61 AC 11]
davidprentice	0:6f633078852b	265	return 0xAC11;
davidprentice	0:6f633078852b	266	ret32 = readReg32(0xD3); //[xx 91 63 00]
davidprentice	0:6f633078852b	267	ret = ret32 >> 8;
davidprentice	0:6f633078852b	268	if (ret == 0x9163) return ret;
davidprentice	0:6f633078852b	269	ret = readReg32(0xD3); //for ILI9488, 9486, 9340, 9341
davidprentice	0:6f633078852b	270	if (ret == 0x3229) return ret;
davidprentice	0:6f633078852b	271	msb = ret >> 8;
davidprentice	0:6f633078852b	272	if (msb == 0x93 \|\| msb == 0x94 \|\| msb == 0x98 \|\| msb == 0x77 \|\| msb == 0x16)
davidprentice	0:6f633078852b	273	return ret; //0x9488, 9486, 9340, 9341, 7796
davidprentice	0:6f633078852b	274	if (ret == 0x00D3 \|\| ret == 0xD3D3)
davidprentice	0:6f633078852b	275	return ret; //16-bit write-only bus
davidprentice	0:6f633078852b	276	/*
davidprentice	0:6f633078852b	277	msb = 0x12; //read 3rd,4th byte. does not work in parallel
davidprentice	0:6f633078852b	278	pushCommand(0xD9, &msb, 1);
davidprentice	0:6f633078852b	279	ret2 = readReg(0xD3);
davidprentice	0:6f633078852b	280	msb = 0x13;
davidprentice	0:6f633078852b	281	pushCommand(0xD9, &msb, 1);
davidprentice	0:6f633078852b	282	ret = (ret2 << 8) \| readReg(0xD3);
davidprentice	0:6f633078852b	283	// if (ret2 == 0x93)
davidprentice	0:6f633078852b	284	return ret2;
davidprentice	0:6f633078852b	285	*/
davidprentice	0:6f633078852b	286	return readReg(0); //0154, 7783, 9320, 9325, 9335, B505, B509
davidprentice	0:6f633078852b	287	}
davidprentice	0:6f633078852b	288
davidprentice	0:6f633078852b	289	// independent cursor and window registers. S6D0154, ST7781 increments. ILI92320/5 do not.
davidprentice	0:6f633078852b	290	int16_t MCUFRIEND_kbv::readGRAM(int16_t x, int16_t y, uint16_t * block, int16_t w, int16_t h)
davidprentice	0:6f633078852b	291	{
davidprentice	0:6f633078852b	292	uint16_t ret, dummy, _MR = _MW;
davidprentice	0:6f633078852b	293	int16_t n = w * h, row = 0, col = 0;
davidprentice	0:6f633078852b	294	uint8_t r, g, b, tmp;
davidprentice	0:6f633078852b	295	if (!is8347 && _lcd_capable & MIPI_DCS_REV1) // HX8347 uses same register
davidprentice	0:6f633078852b	296	_MR = 0x2E;
davidprentice	0:6f633078852b	297	if (_lcd_ID == 0x1602) _MR = 0x2E;
davidprentice	0:6f633078852b	298	setAddrWindow(x, y, x + w - 1, y + h - 1);
davidprentice	0:6f633078852b	299	while (n > 0) {
davidprentice	0:6f633078852b	300	if (!(_lcd_capable & MIPI_DCS_REV1)) {
davidprentice	0:6f633078852b	301	WriteCmdData(_MC, x + col);
davidprentice	0:6f633078852b	302	WriteCmdData(_MP, y + row);
davidprentice	0:6f633078852b	303	}
davidprentice	0:6f633078852b	304	CS_ACTIVE;
davidprentice	0:6f633078852b	305	WriteCmd(_MR);
davidprentice	0:6f633078852b	306	setReadDir();
davidprentice	0:6f633078852b	307	if (_lcd_capable & READ_NODUMMY) {
davidprentice	0:6f633078852b	308	;
davidprentice	0:6f633078852b	309	} else if ((_lcd_capable & MIPI_DCS_REV1) \|\| _lcd_ID == 0x1289) {
davidprentice	0:6f633078852b	310	READ_8(r);
davidprentice	0:6f633078852b	311	} else {
davidprentice	0:6f633078852b	312	READ_16(dummy);
davidprentice	0:6f633078852b	313	}
davidprentice	0:6f633078852b	314	if (_lcd_ID == 0x1511) READ_8(r); //extra dummy for R61511
davidprentice	0:6f633078852b	315	while (n) {
davidprentice	0:6f633078852b	316	if (_lcd_capable & READ_24BITS) {
davidprentice	0:6f633078852b	317	READ_8(r);
davidprentice	0:6f633078852b	318	READ_8(g);
davidprentice	0:6f633078852b	319	READ_8(b);
davidprentice	0:6f633078852b	320	if (_lcd_capable & READ_BGR)
davidprentice	0:6f633078852b	321	ret = color565(b, g, r);
davidprentice	0:6f633078852b	322	else
davidprentice	0:6f633078852b	323	ret = color565(r, g, b);
davidprentice	0:6f633078852b	324	} else {
davidprentice	0:6f633078852b	325	READ_16(ret);
davidprentice	0:6f633078852b	326	if (_lcd_capable & READ_LOWHIGH)
davidprentice	0:6f633078852b	327	ret = (ret >> 8) \| (ret << 8);
davidprentice	0:6f633078852b	328	if (_lcd_capable & READ_BGR)
davidprentice	0:6f633078852b	329	ret = (ret & 0x07E0) \| (ret >> 11) \| (ret << 11);
davidprentice	0:6f633078852b	330	}
davidprentice	0:6f633078852b	331	#if defined(SUPPORT_9488_555)
davidprentice	0:6f633078852b	332	if (is555) ret = color555_to_565(ret);
davidprentice	0:6f633078852b	333	#endif
davidprentice	0:6f633078852b	334	*block++ = ret;
davidprentice	0:6f633078852b	335	n--;
davidprentice	0:6f633078852b	336	if (!(_lcd_capable & AUTO_READINC))
davidprentice	0:6f633078852b	337	break;
davidprentice	0:6f633078852b	338	}
davidprentice	0:6f633078852b	339	if (++col >= w) {
davidprentice	0:6f633078852b	340	col = 0;
davidprentice	0:6f633078852b	341	if (++row >= h)
davidprentice	0:6f633078852b	342	row = 0;
davidprentice	0:6f633078852b	343	}
davidprentice	0:6f633078852b	344	RD_IDLE;
davidprentice	0:6f633078852b	345	CS_IDLE;
davidprentice	0:6f633078852b	346	setWriteDir();
davidprentice	0:6f633078852b	347	}
davidprentice	0:6f633078852b	348	if (!(_lcd_capable & MIPI_DCS_REV1))
davidprentice	0:6f633078852b	349	setAddrWindow(0, 0, width() - 1, height() - 1);
davidprentice	0:6f633078852b	350	return 0;
davidprentice	0:6f633078852b	351	}
davidprentice	0:6f633078852b	352
davidprentice	0:6f633078852b	353	void MCUFRIEND_kbv::setRotation(uint8_t r)
davidprentice	0:6f633078852b	354	{
davidprentice	0:6f633078852b	355	uint16_t GS, SS_v, ORG, REV = _lcd_rev;
davidprentice	0:6f633078852b	356	uint8_t val, d[3];
davidprentice	0:6f633078852b	357	rotation = r & 3; // just perform the operation ourselves on the protected variables
davidprentice	0:6f633078852b	358	_width = (rotation & 1) ? HEIGHT : WIDTH;
davidprentice	0:6f633078852b	359	_height = (rotation & 1) ? WIDTH : HEIGHT;
davidprentice	0:6f633078852b	360	switch (rotation) {
davidprentice	0:6f633078852b	361	case 0: //PORTRAIT:
davidprentice	0:6f633078852b	362	val = 0x48; //MY=0, MX=1, MV=0, ML=0, BGR=1
davidprentice	0:6f633078852b	363	break;
davidprentice	0:6f633078852b	364	case 1: //LANDSCAPE: 90 degrees
davidprentice	0:6f633078852b	365	val = 0x28; //MY=0, MX=0, MV=1, ML=0, BGR=1
davidprentice	0:6f633078852b	366	break;
davidprentice	0:6f633078852b	367	case 2: //PORTRAIT_REV: 180 degrees
davidprentice	0:6f633078852b	368	val = 0x98; //MY=1, MX=0, MV=0, ML=1, BGR=1
davidprentice	0:6f633078852b	369	break;
davidprentice	0:6f633078852b	370	case 3: //LANDSCAPE_REV: 270 degrees
davidprentice	0:6f633078852b	371	val = 0xF8; //MY=1, MX=1, MV=1, ML=1, BGR=1
davidprentice	0:6f633078852b	372	break;
davidprentice	0:6f633078852b	373	}
davidprentice	0:6f633078852b	374	if (_lcd_capable & INVERT_GS)
davidprentice	0:6f633078852b	375	val ^= 0x80;
davidprentice	0:6f633078852b	376	if (_lcd_capable & INVERT_SS)
davidprentice	0:6f633078852b	377	val ^= 0x40;
davidprentice	0:6f633078852b	378	if (_lcd_capable & INVERT_RGB)
davidprentice	0:6f633078852b	379	val ^= 0x08;
davidprentice	0:6f633078852b	380	if (_lcd_capable & MIPI_DCS_REV1) {
davidprentice	0:6f633078852b	381	if (_lcd_ID == 0x6814) { //.kbv my weird 0x9486 might be 68140
davidprentice	0:6f633078852b	382	GS = (val & 0x80) ? (1 << 6) : 0; //MY
davidprentice	0:6f633078852b	383	SS_v = (val & 0x40) ? (1 << 5) : 0; //MX
davidprentice	0:6f633078852b	384	val &= 0x28; //keep MV, BGR, MY=0, MX=0, ML=0
davidprentice	0:6f633078852b	385	d[0] = 0;
davidprentice	0:6f633078852b	386	d[1] = GS \| SS_v \| 0x02; //MY, MX
davidprentice	0:6f633078852b	387	d[2] = 0x3B;
davidprentice	0:6f633078852b	388	WriteCmdParamN(0xB6, 3, d);
davidprentice	0:6f633078852b	389	goto common_MC;
davidprentice	0:6f633078852b	390	} else if (_lcd_ID == 0x1963 \|\| _lcd_ID == 0x9481 \|\| _lcd_ID == 0x1511) {
davidprentice	0:6f633078852b	391	if (val & 0x80)
davidprentice	0:6f633078852b	392	val \|= 0x01; //GS
davidprentice	0:6f633078852b	393	if ((val & 0x40))
davidprentice	0:6f633078852b	394	val \|= 0x02; //SS
davidprentice	0:6f633078852b	395	if (_lcd_ID == 0x1963) val &= ~0xC0;
davidprentice	0:6f633078852b	396	if (_lcd_ID == 0x9481) val &= ~0xD0;
davidprentice	0:6f633078852b	397	if (_lcd_ID == 0x1511) {
davidprentice	0:6f633078852b	398	val &= ~0x10; //remove ML
davidprentice	0:6f633078852b	399	val \|= 0xC0; //force penguin 180 rotation
davidprentice	0:6f633078852b	400	}
davidprentice	0:6f633078852b	401	// val &= (_lcd_ID == 0x1963) ? ~0xC0 : ~0xD0; //MY=0, MX=0 with ML=0 for ILI9481
davidprentice	0:6f633078852b	402	goto common_MC;
davidprentice	0:6f633078852b	403	} else if (is8347) {
davidprentice	0:6f633078852b	404	_MC = 0x02, _MP = 0x06, _MW = 0x22, _SC = 0x02, _EC = 0x04, _SP = 0x06, _EP = 0x08;
davidprentice	0:6f633078852b	405	if (_lcd_ID == 0x0065) { //HX8352-B
davidprentice	0:6f633078852b	406	val \|= 0x01; //GS=1
davidprentice	0:6f633078852b	407	if ((val & 0x10)) val ^= 0xD3; //(ML) flip MY, MX, ML, SS, GS
davidprentice	0:6f633078852b	408	if (r & 1) _MC = 0x82, _MP = 0x80;
davidprentice	0:6f633078852b	409	else _MC = 0x80, _MP = 0x82;
davidprentice	0:6f633078852b	410	}
davidprentice	0:6f633078852b	411	if (_lcd_ID == 0x5252) { //HX8352-A
davidprentice	0:6f633078852b	412	val \|= 0x02; //VERT_SCROLLON
davidprentice	0:6f633078852b	413	if ((val & 0x10)) val ^= 0xD4; //(ML) flip MY, MX, SS. GS=1
davidprentice	0:6f633078852b	414	}
davidprentice	0:6f633078852b	415	goto common_BGR;
davidprentice	0:6f633078852b	416	}
davidprentice	0:6f633078852b	417	common_MC:
davidprentice	0:6f633078852b	418	_MC = 0x2A, _MP = 0x2B, _MW = 0x2C, _SC = 0x2A, _EC = 0x2A, _SP = 0x2B, _EP = 0x2B;
davidprentice	0:6f633078852b	419	common_BGR:
davidprentice	0:6f633078852b	420	WriteCmdParamN(is8347 ? 0x16 : 0x36, 1, &val);
davidprentice	0:6f633078852b	421	_lcd_madctl = val;
davidprentice	0:6f633078852b	422	// if (_lcd_ID == 0x1963) WriteCmdParamN(0x13, 0, NULL); //NORMAL mode
davidprentice	0:6f633078852b	423	}
davidprentice	0:6f633078852b	424	// cope with 9320 variants
davidprentice	0:6f633078852b	425	else {
davidprentice	0:6f633078852b	426	switch (_lcd_ID) {
davidprentice	0:6f633078852b	427	#if defined(SUPPORT_9225)
davidprentice	0:6f633078852b	428	case 0x9225:
davidprentice	0:6f633078852b	429	_SC = 0x37, _EC = 0x36, _SP = 0x39, _EP = 0x38;
davidprentice	0:6f633078852b	430	_MC = 0x20, _MP = 0x21, _MW = 0x22;
davidprentice	0:6f633078852b	431	GS = (val & 0x80) ? (1 << 9) : 0;
davidprentice	0:6f633078852b	432	SS_v = (val & 0x40) ? (1 << 8) : 0;
davidprentice	0:6f633078852b	433	WriteCmdData(0x01, GS \| SS_v \| 0x001C); // set Driver Output Control
davidprentice	0:6f633078852b	434	goto common_ORG;
davidprentice	0:6f633078852b	435	#endif
davidprentice	0:6f633078852b	436	#if defined(SUPPORT_0139) \|\| defined(SUPPORT_0154)
davidprentice	0:6f633078852b	437	#ifdef SUPPORT_0139
davidprentice	0:6f633078852b	438	case 0x0139:
davidprentice	0:6f633078852b	439	_SC = 0x46, _EC = 0x46, _SP = 0x48, _EP = 0x47;
davidprentice	0:6f633078852b	440	goto common_S6D;
davidprentice	0:6f633078852b	441	#endif
davidprentice	0:6f633078852b	442	#ifdef SUPPORT_0154
davidprentice	0:6f633078852b	443	case 0x0154:
davidprentice	0:6f633078852b	444	_SC = 0x37, _EC = 0x36, _SP = 0x39, _EP = 0x38;
davidprentice	0:6f633078852b	445	goto common_S6D;
davidprentice	0:6f633078852b	446	#endif
davidprentice	0:6f633078852b	447	common_S6D:
davidprentice	0:6f633078852b	448	_MC = 0x20, _MP = 0x21, _MW = 0x22;
davidprentice	0:6f633078852b	449	GS = (val & 0x80) ? (1 << 9) : 0;
davidprentice	0:6f633078852b	450	SS_v = (val & 0x40) ? (1 << 8) : 0;
davidprentice	0:6f633078852b	451	// S6D0139 requires NL = 0x27, S6D0154 NL = 0x28
davidprentice	0:6f633078852b	452	WriteCmdData(0x01, GS \| SS_v \| ((_lcd_ID == 0x0139) ? 0x27 : 0x28));
davidprentice	0:6f633078852b	453	goto common_ORG;
davidprentice	0:6f633078852b	454	#endif
davidprentice	0:6f633078852b	455	case 0x5420:
davidprentice	0:6f633078852b	456	case 0x7793:
davidprentice	0:6f633078852b	457	case 0x9326:
davidprentice	0:6f633078852b	458	case 0xB509:
davidprentice	0:6f633078852b	459	_MC = 0x200, _MP = 0x201, _MW = 0x202, _SC = 0x210, _EC = 0x211, _SP = 0x212, _EP = 0x213;
davidprentice	0:6f633078852b	460	GS = (val & 0x80) ? (1 << 15) : 0;
davidprentice	0:6f633078852b	461	uint16_t NL;
davidprentice	0:6f633078852b	462	NL = ((432 / 8) - 1) << 9;
davidprentice	0:6f633078852b	463	if (_lcd_ID == 0x9326 \|\| _lcd_ID == 0x5420) NL >>= 1;
davidprentice	0:6f633078852b	464	WriteCmdData(0x400, GS \| NL);
davidprentice	0:6f633078852b	465	goto common_SS;
davidprentice	0:6f633078852b	466	default:
davidprentice	0:6f633078852b	467	_MC = 0x20, _MP = 0x21, _MW = 0x22, _SC = 0x50, _EC = 0x51, _SP = 0x52, _EP = 0x53;
davidprentice	0:6f633078852b	468	GS = (val & 0x80) ? (1 << 15) : 0;
davidprentice	0:6f633078852b	469	WriteCmdData(0x60, GS \| 0x2700); // Gate Scan Line (0xA700)
davidprentice	0:6f633078852b	470	common_SS:
davidprentice	0:6f633078852b	471	SS_v = (val & 0x40) ? (1 << 8) : 0;
davidprentice	0:6f633078852b	472	WriteCmdData(0x01, SS_v); // set Driver Output Control
davidprentice	0:6f633078852b	473	common_ORG:
davidprentice	0:6f633078852b	474	ORG = (val & 0x20) ? (1 << 3) : 0;
davidprentice	0:6f633078852b	475	#ifdef SUPPORT_8230
davidprentice	0:6f633078852b	476	if (_lcd_ID == 0x8230) { // UC8230 has strange BGR and READ_BGR behaviour
davidprentice	0:6f633078852b	477	if (rotation == 1 \|\| rotation == 2) {
davidprentice	0:6f633078852b	478	val ^= 0x08; // change BGR bit for LANDSCAPE and PORTRAIT_REV
davidprentice	0:6f633078852b	479	}
davidprentice	0:6f633078852b	480	}
davidprentice	0:6f633078852b	481	#endif
davidprentice	0:6f633078852b	482	if (val & 0x08)
davidprentice	0:6f633078852b	483	ORG \|= 0x1000; //BGR
davidprentice	0:6f633078852b	484	_lcd_madctl = ORG \| 0x0030;
davidprentice	0:6f633078852b	485	WriteCmdData(0x03, _lcd_madctl); // set GRAM write direction and BGR=1.
davidprentice	0:6f633078852b	486	break;
davidprentice	0:6f633078852b	487	#ifdef SUPPORT_1289
davidprentice	0:6f633078852b	488	case 0x1289:
davidprentice	0:6f633078852b	489	_MC = 0x4E, _MP = 0x4F, _MW = 0x22, _SC = 0x44, _EC = 0x44, _SP = 0x45, _EP = 0x46;
davidprentice	0:6f633078852b	490	if (rotation & 1)
davidprentice	0:6f633078852b	491	val ^= 0xD0; // exchange Landscape modes
davidprentice	0:6f633078852b	492	GS = (val & 0x80) ? (1 << 14) : 0; //called TB (top-bottom), CAD=0
davidprentice	0:6f633078852b	493	SS_v = (val & 0x40) ? (1 << 9) : 0; //called RL (right-left)
davidprentice	0:6f633078852b	494	ORG = (val & 0x20) ? (1 << 3) : 0; //called AM
davidprentice	0:6f633078852b	495	_lcd_drivOut = GS \| SS_v \| (REV << 13) \| 0x013F; //REV=0, BGR=0, MUX=319
davidprentice	0:6f633078852b	496	if (val & 0x08)
davidprentice	0:6f633078852b	497	_lcd_drivOut \|= 0x0800; //BGR
davidprentice	0:6f633078852b	498	WriteCmdData(0x01, _lcd_drivOut); // set Driver Output Control
davidprentice	0:6f633078852b	499	if (is9797) WriteCmdData(0x11, ORG \| 0x4C30); else // DFM=2, DEN=1, WM=1, TY=0
davidprentice	0:6f633078852b	500	WriteCmdData(0x11, ORG \| 0x6070); // DFM=3, EN=0, TY=1
davidprentice	0:6f633078852b	501	break;
davidprentice	0:6f633078852b	502	#endif
davidprentice	0:6f633078852b	503	}
davidprentice	0:6f633078852b	504	}
davidprentice	0:6f633078852b	505	if ((rotation & 1) && ((_lcd_capable & MV_AXIS) == 0)) {
davidprentice	0:6f633078852b	506	uint16_t x;
davidprentice	0:6f633078852b	507	x = _MC, _MC = _MP, _MP = x;
davidprentice	0:6f633078852b	508	x = _SC, _SC = _SP, _SP = x; //.kbv check 0139
davidprentice	0:6f633078852b	509	x = _EC, _EC = _EP, _EP = x; //.kbv check 0139
davidprentice	0:6f633078852b	510	}
davidprentice	0:6f633078852b	511	setAddrWindow(0, 0, width() - 1, height() - 1);
davidprentice	0:6f633078852b	512	vertScroll(0, HEIGHT, 0); //reset scrolling after a rotation
davidprentice	0:6f633078852b	513	}
davidprentice	0:6f633078852b	514
davidprentice	0:6f633078852b	515	void MCUFRIEND_kbv::drawPixel(int16_t x, int16_t y, uint16_t color)
davidprentice	0:6f633078852b	516	{
davidprentice	0:6f633078852b	517	// MCUFRIEND just plots at edge if you try to write outside of the box:
davidprentice	0:6f633078852b	518	if (x < 0 \|\| y < 0 \|\| x >= width() \|\| y >= height())
davidprentice	0:6f633078852b	519	return;
davidprentice	0:6f633078852b	520	#if defined(SUPPORT_9488_555)
davidprentice	0:6f633078852b	521	if (is555) color = color565_to_555(color);
davidprentice	0:6f633078852b	522	#endif
davidprentice	0:6f633078852b	523	setAddrWindow(x, y, x, y);
davidprentice	0:6f633078852b	524	// CS_ACTIVE; WriteCmd(_MW); write16(color); CS_IDLE; //-0.01s +98B
davidprentice	0:6f633078852b	525	if (is9797) { CS_ACTIVE; WriteCmd(_MW); write24(color); CS_IDLE;} else
davidprentice	0:6f633078852b	526	WriteCmdData(_MW, color);
davidprentice	0:6f633078852b	527	}
davidprentice	0:6f633078852b	528
davidprentice	0:6f633078852b	529	void MCUFRIEND_kbv::setAddrWindow(int16_t x, int16_t y, int16_t x1, int16_t y1)
davidprentice	0:6f633078852b	530	{
davidprentice	0:6f633078852b	531	#if defined(OFFSET_9327)
davidprentice	0:6f633078852b	532	if (_lcd_ID == 0x9327) {
davidprentice	0:6f633078852b	533	if (rotation == 2) y += OFFSET_9327, y1 += OFFSET_9327;
davidprentice	0:6f633078852b	534	if (rotation == 3) x += OFFSET_9327, x1 += OFFSET_9327;
davidprentice	0:6f633078852b	535	}
davidprentice	0:6f633078852b	536	#endif
davidprentice	0:6f633078852b	537	#if 1
davidprentice	0:6f633078852b	538	if (_lcd_ID == 0x1526 && (rotation & 1)) {
davidprentice	0:6f633078852b	539	int16_t dx = x1 - x, dy = y1 - y;
davidprentice	0:6f633078852b	540	if (dy == 0) { y1++; }
davidprentice	0:6f633078852b	541	else if (dx == 0) { x1 += dy; y1 -= dy; }
davidprentice	0:6f633078852b	542	}
davidprentice	0:6f633078852b	543	#endif
davidprentice	0:6f633078852b	544	if (_lcd_capable & MIPI_DCS_REV1) {
davidprentice	0:6f633078852b	545	WriteCmdParam4(_SC, x >> 8, x, x1 >> 8, x1); //Start column instead of _MC
davidprentice	0:6f633078852b	546	WriteCmdParam4(_SP, y >> 8, y, y1 >> 8, y1); //
davidprentice	0:6f633078852b	547	if (is8347 && _lcd_ID == 0x0065) { //HX8352-B has separate _MC, _SC
davidprentice	0:6f633078852b	548	uint8_t d[2];
davidprentice	0:6f633078852b	549	d[0] = x >> 8; d[1] = x;
davidprentice	0:6f633078852b	550	WriteCmdParamN(_MC, 2, d); //allows !MV_AXIS to work
davidprentice	0:6f633078852b	551	d[0] = y >> 8; d[1] = y;
davidprentice	0:6f633078852b	552	WriteCmdParamN(_MP, 2, d);
davidprentice	0:6f633078852b	553	}
davidprentice	0:6f633078852b	554	} else {
davidprentice	0:6f633078852b	555	WriteCmdData(_MC, x);
davidprentice	0:6f633078852b	556	WriteCmdData(_MP, y);
davidprentice	0:6f633078852b	557	if (!(x == x1 && y == y1)) { //only need MC,MP for drawPixel
davidprentice	0:6f633078852b	558	if (_lcd_capable & XSA_XEA_16BIT) {
davidprentice	0:6f633078852b	559	if (rotation & 1)
davidprentice	0:6f633078852b	560	y1 = y = (y1 << 8) \| y;
davidprentice	0:6f633078852b	561	else
davidprentice	0:6f633078852b	562	x1 = x = (x1 << 8) \| x;
davidprentice	0:6f633078852b	563	}
davidprentice	0:6f633078852b	564	WriteCmdData(_SC, x);
davidprentice	0:6f633078852b	565	WriteCmdData(_SP, y);
davidprentice	0:6f633078852b	566	WriteCmdData(_EC, x1);
davidprentice	0:6f633078852b	567	WriteCmdData(_EP, y1);
davidprentice	0:6f633078852b	568	}
davidprentice	0:6f633078852b	569	}
davidprentice	0:6f633078852b	570	}
davidprentice	0:6f633078852b	571
davidprentice	0:6f633078852b	572	void MCUFRIEND_kbv::fillRect(int16_t x, int16_t y, int16_t w, int16_t h, uint16_t color)
davidprentice	0:6f633078852b	573	{
davidprentice	0:6f633078852b	574	int16_t end;
davidprentice	0:6f633078852b	575	#if defined(SUPPORT_9488_555)
davidprentice	0:6f633078852b	576	if (is555) color = color565_to_555(color);
davidprentice	0:6f633078852b	577	#endif
davidprentice	0:6f633078852b	578	if (w < 0) {
davidprentice	0:6f633078852b	579	w = -w;
davidprentice	0:6f633078852b	580	x -= w;
davidprentice	0:6f633078852b	581	} //+ve w
davidprentice	0:6f633078852b	582	end = x + w;
davidprentice	0:6f633078852b	583	if (x < 0)
davidprentice	0:6f633078852b	584	x = 0;
davidprentice	0:6f633078852b	585	if (end > width())
davidprentice	0:6f633078852b	586	end = width();
davidprentice	0:6f633078852b	587	w = end - x;
davidprentice	0:6f633078852b	588	if (h < 0) {
davidprentice	0:6f633078852b	589	h = -h;
davidprentice	0:6f633078852b	590	y -= h;
davidprentice	0:6f633078852b	591	} //+ve h
davidprentice	0:6f633078852b	592	end = y + h;
davidprentice	0:6f633078852b	593	if (y < 0)
davidprentice	0:6f633078852b	594	y = 0;
davidprentice	0:6f633078852b	595	if (end > height())
davidprentice	0:6f633078852b	596	end = height();
davidprentice	0:6f633078852b	597	h = end - y;
davidprentice	0:6f633078852b	598	setAddrWindow(x, y, x + w - 1, y + h - 1);
davidprentice	0:6f633078852b	599	CS_ACTIVE;
davidprentice	0:6f633078852b	600	WriteCmd(_MW);
davidprentice	0:6f633078852b	601	if (h > w) {
davidprentice	0:6f633078852b	602	end = h;
davidprentice	0:6f633078852b	603	h = w;
davidprentice	0:6f633078852b	604	w = end;
davidprentice	0:6f633078852b	605	}
davidprentice	0:6f633078852b	606	uint8_t hi = color >> 8, lo = color & 0xFF;
davidprentice	0:6f633078852b	607	while (h-- > 0) {
davidprentice	0:6f633078852b	608	end = w;
davidprentice	0:6f633078852b	609	#if USING_16BIT_BUS
davidprentice	0:6f633078852b	610	#if defined(__MK66FX1M0__) //180MHz M4
davidprentice	0:6f633078852b	611	#define STROBE_16BIT {WR_ACTIVE4;WR_ACTIVE;WR_IDLE4;WR_IDLE;} //56ns
davidprentice	0:6f633078852b	612	#elif defined(__SAM3X8E__) //84MHz M3
davidprentice	0:6f633078852b	613	#define STROBE_16BIT {WR_ACTIVE4;WR_ACTIVE2;WR_IDLE4;WR_IDLE2;} //286ns ?ILI9486
davidprentice	0:6f633078852b	614	//#define STROBE_16BIT {WR_ACTIVE4;WR_ACTIVE;WR_IDLE4;WR_IDLE;} //238ns SSD1289
davidprentice	0:6f633078852b	615	//#define STROBE_16BIT {WR_ACTIVE2;WR_ACTIVE;WR_IDLE2;} //119ns RM68140
davidprentice	0:6f633078852b	616	#else //16MHz AVR
davidprentice	0:6f633078852b	617	#define STROBE_16BIT {WR_ACTIVE;WR_ACTIVE;WR_IDLE; } //375ns ?ILI9486
davidprentice	0:6f633078852b	618	#endif
davidprentice	0:6f633078852b	619	write_16(color); //we could just do the strobe
davidprentice	0:6f633078852b	620	lo = end & 7;
davidprentice	0:6f633078852b	621	hi = end >> 3;
davidprentice	0:6f633078852b	622	if (hi)
davidprentice	0:6f633078852b	623	do {
davidprentice	0:6f633078852b	624	STROBE_16BIT;
davidprentice	0:6f633078852b	625	STROBE_16BIT;
davidprentice	0:6f633078852b	626	STROBE_16BIT;
davidprentice	0:6f633078852b	627	STROBE_16BIT;
davidprentice	0:6f633078852b	628	STROBE_16BIT;
davidprentice	0:6f633078852b	629	STROBE_16BIT;
davidprentice	0:6f633078852b	630	STROBE_16BIT;
davidprentice	0:6f633078852b	631	STROBE_16BIT;
davidprentice	0:6f633078852b	632	} while (--hi > 0);
davidprentice	0:6f633078852b	633	while (lo-- > 0) {
davidprentice	0:6f633078852b	634	STROBE_16BIT;
davidprentice	0:6f633078852b	635	}
davidprentice	0:6f633078852b	636	#else
davidprentice	0:6f633078852b	637	#if defined(SUPPORT_1289)
davidprentice	0:6f633078852b	638	if (is9797) {
davidprentice	0:6f633078852b	639	uint8_t r = color565_to_r(color);
davidprentice	0:6f633078852b	640	uint8_t g = color565_to_g(color);
davidprentice	0:6f633078852b	641	uint8_t b = color565_to_b(color);
davidprentice	0:6f633078852b	642	do {
davidprentice	0:6f633078852b	643	write8(r);
davidprentice	0:6f633078852b	644	write8(g);
davidprentice	0:6f633078852b	645	write8(b);
davidprentice	0:6f633078852b	646	} while (--end != 0);
davidprentice	0:6f633078852b	647	} else
davidprentice	0:6f633078852b	648	#endif
davidprentice	0:6f633078852b	649	do {
davidprentice	0:6f633078852b	650	write8(hi);
davidprentice	0:6f633078852b	651	write8(lo);
davidprentice	0:6f633078852b	652	} while (--end != 0);
davidprentice	0:6f633078852b	653	#endif
davidprentice	0:6f633078852b	654	}
davidprentice	0:6f633078852b	655	CS_IDLE;
davidprentice	0:6f633078852b	656	if (!(_lcd_capable & MIPI_DCS_REV1) \|\| ((_lcd_ID == 0x1526) && (rotation & 1)))
davidprentice	0:6f633078852b	657	setAddrWindow(0, 0, width() - 1, height() - 1);
davidprentice	0:6f633078852b	658	}
davidprentice	0:6f633078852b	659
davidprentice	0:6f633078852b	660	static void pushColors_any(uint16_t cmd, uint8_t * block, int16_t n, bool first, uint8_t flags)
davidprentice	0:6f633078852b	661	{
davidprentice	0:6f633078852b	662	uint16_t color;
davidprentice	0:6f633078852b	663	uint8_t h, l;
davidprentice	0:6f633078852b	664	bool isconst = flags & 1;
davidprentice	0:6f633078852b	665	bool isbigend = (flags & 2) != 0;
davidprentice	0:6f633078852b	666	CS_ACTIVE;
davidprentice	0:6f633078852b	667	if (first) {
davidprentice	0:6f633078852b	668	WriteCmd(cmd);
davidprentice	0:6f633078852b	669	}
davidprentice	0:6f633078852b	670
davidprentice	0:6f633078852b	671	if (!isconst && !isbigend) {
davidprentice	0:6f633078852b	672	uint16_t block16 = (uint16_t)block;
davidprentice	0:6f633078852b	673	while (n-- > 0) {
davidprentice	0:6f633078852b	674	color = *block16++;
davidprentice	0:6f633078852b	675	write16(color);
davidprentice	0:6f633078852b	676	}
davidprentice	0:6f633078852b	677	} else
davidprentice	0:6f633078852b	678
davidprentice	0:6f633078852b	679	while (n-- > 0) {
davidprentice	0:6f633078852b	680	if (isconst) {
davidprentice	0:6f633078852b	681	h = pgm_read_byte(block++);
davidprentice	0:6f633078852b	682	l = pgm_read_byte(block++);
davidprentice	0:6f633078852b	683	} else {
davidprentice	0:6f633078852b	684	h = (*block++);
davidprentice	0:6f633078852b	685	l = (*block++);
davidprentice	0:6f633078852b	686	}
davidprentice	0:6f633078852b	687	color = (isbigend) ? (h << 8 \| l) : (l << 8 \| h);
davidprentice	0:6f633078852b	688	#if defined(SUPPORT_9488_555)
davidprentice	0:6f633078852b	689	if (is555) color = color565_to_555(color);
davidprentice	0:6f633078852b	690	#endif
davidprentice	0:6f633078852b	691	if (is9797) write24(color); else
davidprentice	0:6f633078852b	692	write16(color);
davidprentice	0:6f633078852b	693	}
davidprentice	0:6f633078852b	694	CS_IDLE;
davidprentice	0:6f633078852b	695	}
davidprentice	0:6f633078852b	696
davidprentice	0:6f633078852b	697	void MCUFRIEND_kbv::pushColors(uint16_t * block, int16_t n, bool first)
davidprentice	0:6f633078852b	698	{
davidprentice	0:6f633078852b	699	pushColors_any(_MW, (uint8_t *)block, n, first, 0);
davidprentice	0:6f633078852b	700	}
davidprentice	0:6f633078852b	701	void MCUFRIEND_kbv::pushColors(uint8_t * block, int16_t n, bool first)
davidprentice	0:6f633078852b	702	{
davidprentice	0:6f633078852b	703	pushColors_any(_MW, (uint8_t *)block, n, first, 2); //regular bigend
davidprentice	0:6f633078852b	704	}
davidprentice	0:6f633078852b	705	void MCUFRIEND_kbv::pushColors(const uint8_t * block, int16_t n, bool first, bool bigend)
davidprentice	0:6f633078852b	706	{
davidprentice	0:6f633078852b	707	pushColors_any(_MW, (uint8_t *)block, n, first, bigend ? 3 : 1);
davidprentice	0:6f633078852b	708	}
davidprentice	0:6f633078852b	709
davidprentice	0:6f633078852b	710	void MCUFRIEND_kbv::vertScroll(int16_t top, int16_t scrollines, int16_t offset)
davidprentice	0:6f633078852b	711	{
davidprentice	0:6f633078852b	712	#if defined(OFFSET_9327)
davidprentice	0:6f633078852b	713	if (_lcd_ID == 0x9327) {
davidprentice	0:6f633078852b	714	if (rotation == 2 \|\| rotation == 3) top += OFFSET_9327;
davidprentice	0:6f633078852b	715	}
davidprentice	0:6f633078852b	716	#endif
davidprentice	0:6f633078852b	717	int16_t bfa = HEIGHT - top - scrollines; // bottom fixed area
davidprentice	0:6f633078852b	718	int16_t vsp;
davidprentice	0:6f633078852b	719	int16_t sea = top;
davidprentice	0:6f633078852b	720	if (_lcd_ID == 0x9327) bfa += 32;
davidprentice	0:6f633078852b	721	if (offset <= -scrollines \|\| offset >= scrollines) offset = 0; //valid scroll
davidprentice	0:6f633078852b	722	vsp = top + offset; // vertical start position
davidprentice	0:6f633078852b	723	if (offset < 0)
davidprentice	0:6f633078852b	724	vsp += scrollines; //keep in unsigned range
davidprentice	0:6f633078852b	725	sea = top + scrollines - 1;
davidprentice	0:6f633078852b	726	if (_lcd_capable & MIPI_DCS_REV1) {
davidprentice	0:6f633078852b	727	uint8_t d[6]; // for multi-byte parameters
davidprentice	0:6f633078852b	728	/*
davidprentice	0:6f633078852b	729	if (_lcd_ID == 0x9327) { //panel is wired for 240x432
davidprentice	0:6f633078852b	730	if (rotation == 2 \|\| rotation == 3) { //180 or 270 degrees
davidprentice	0:6f633078852b	731	if (scrollines == HEIGHT) {
davidprentice	0:6f633078852b	732	scrollines = 432; // we get a glitch but hey-ho
davidprentice	0:6f633078852b	733	vsp -= 432 - HEIGHT;
davidprentice	0:6f633078852b	734	}
davidprentice	0:6f633078852b	735	if (vsp < 0)
davidprentice	0:6f633078852b	736	vsp += 432;
davidprentice	0:6f633078852b	737	}
davidprentice	0:6f633078852b	738	bfa = 432 - top - scrollines;
davidprentice	0:6f633078852b	739	}
davidprentice	0:6f633078852b	740	*/
davidprentice	0:6f633078852b	741	d[0] = top >> 8; //TFA
davidprentice	0:6f633078852b	742	d[1] = top;
davidprentice	0:6f633078852b	743	d[2] = scrollines >> 8; //VSA
davidprentice	0:6f633078852b	744	d[3] = scrollines;
davidprentice	0:6f633078852b	745	d[4] = bfa >> 8; //BFA
davidprentice	0:6f633078852b	746	d[5] = bfa;
davidprentice	0:6f633078852b	747	WriteCmdParamN(is8347 ? 0x0E : 0x33, 6, d);
davidprentice	0:6f633078852b	748	// if (offset == 0 && rotation > 1) vsp = top + scrollines; //make non-valid
davidprentice	0:6f633078852b	749	d[0] = vsp >> 8; //VSP
davidprentice	0:6f633078852b	750	d[1] = vsp;
davidprentice	0:6f633078852b	751	WriteCmdParamN(is8347 ? 0x14 : 0x37, 2, d);
davidprentice	0:6f633078852b	752	if (is8347) {
davidprentice	0:6f633078852b	753	d[0] = (offset != 0) ? (_lcd_ID == 0x8347 ? 0x02 : 0x08) : 0;
davidprentice	0:6f633078852b	754	WriteCmdParamN(_lcd_ID == 0x8347 ? 0x18 : 0x01, 1, d); //HX8347-D
davidprentice	0:6f633078852b	755	} else if (offset == 0 && (_lcd_capable & MIPI_DCS_REV1)) {
davidprentice	0:6f633078852b	756	WriteCmdParamN(0x13, 0, NULL); //NORMAL i.e. disable scroll
davidprentice	0:6f633078852b	757	}
davidprentice	0:6f633078852b	758	return;
davidprentice	0:6f633078852b	759	}
davidprentice	0:6f633078852b	760	// cope with 9320 style variants:
davidprentice	0:6f633078852b	761	switch (_lcd_ID) {
davidprentice	0:6f633078852b	762	case 0x7783:
davidprentice	0:6f633078852b	763	WriteCmdData(0x61, _lcd_rev); //!NDL, !VLE, REV
davidprentice	0:6f633078852b	764	WriteCmdData(0x6A, vsp); //VL#
davidprentice	0:6f633078852b	765	break;
davidprentice	0:6f633078852b	766	#ifdef SUPPORT_0139
davidprentice	0:6f633078852b	767	case 0x0139:
davidprentice	0:6f633078852b	768	WriteCmdData(0x07, 0x0213 \| (_lcd_rev << 2)); //VLE1=1, GON=1, REV=x, D=3
davidprentice	0:6f633078852b	769	WriteCmdData(0x41, vsp); //VL# check vsp
davidprentice	0:6f633078852b	770	break;
davidprentice	0:6f633078852b	771	#endif
davidprentice	0:6f633078852b	772	#if defined(SUPPORT_0154) \|\| defined(SUPPORT_9225) //thanks tongbajiel
davidprentice	0:6f633078852b	773	case 0x9225:
davidprentice	0:6f633078852b	774	case 0x0154:
davidprentice	0:6f633078852b	775	WriteCmdData(0x31, sea); //SEA
davidprentice	0:6f633078852b	776	WriteCmdData(0x32, top); //SSA
davidprentice	0:6f633078852b	777	WriteCmdData(0x33, vsp - top); //SST
davidprentice	0:6f633078852b	778	break;
davidprentice	0:6f633078852b	779	#endif
davidprentice	0:6f633078852b	780	#ifdef SUPPORT_1289
davidprentice	0:6f633078852b	781	case 0x1289:
davidprentice	0:6f633078852b	782	WriteCmdData(0x41, vsp); //VL#
davidprentice	0:6f633078852b	783	break;
davidprentice	0:6f633078852b	784	#endif
davidprentice	0:6f633078852b	785	case 0x5420:
davidprentice	0:6f633078852b	786	case 0x7793:
davidprentice	0:6f633078852b	787	case 0x9326:
davidprentice	0:6f633078852b	788	case 0xB509:
davidprentice	0:6f633078852b	789	WriteCmdData(0x401, (1 << 1) \| _lcd_rev); //VLE, REV
davidprentice	0:6f633078852b	790	WriteCmdData(0x404, vsp); //VL#
davidprentice	0:6f633078852b	791	break;
davidprentice	0:6f633078852b	792	default:
davidprentice	0:6f633078852b	793	// 0x6809, 0x9320, 0x9325, 0x9335, 0xB505 can only scroll whole screen
davidprentice	0:6f633078852b	794	WriteCmdData(0x61, (1 << 1) \| _lcd_rev); //!NDL, VLE, REV
davidprentice	0:6f633078852b	795	WriteCmdData(0x6A, vsp); //VL#
davidprentice	0:6f633078852b	796	break;
davidprentice	0:6f633078852b	797	}
davidprentice	0:6f633078852b	798	}
davidprentice	0:6f633078852b	799
davidprentice	0:6f633078852b	800	void MCUFRIEND_kbv::invertDisplay(bool i)
davidprentice	0:6f633078852b	801	{
davidprentice	0:6f633078852b	802	uint8_t val;
davidprentice	0:6f633078852b	803	_lcd_rev = ((_lcd_capable & REV_SCREEN) != 0) ^ i;
davidprentice	0:6f633078852b	804	if (_lcd_capable & MIPI_DCS_REV1) {
davidprentice	0:6f633078852b	805	if (is8347) {
davidprentice	0:6f633078852b	806	// HX8347D: 0x36 Panel Characteristic. REV_Panel
davidprentice	0:6f633078852b	807	// HX8347A: 0x36 is Display Control 10
davidprentice	0:6f633078852b	808	if (_lcd_ID == 0x8347 \|\| _lcd_ID == 0x5252) // HX8347-A, HX5352-A
davidprentice	0:6f633078852b	809	val = _lcd_rev ? 6 : 2; //INVON id bit#2, NORON=bit#1
davidprentice	0:6f633078852b	810	else val = _lcd_rev ? 8 : 10; //HX8347-D, G, I: SCROLLON=bit3, INVON=bit1
davidprentice	0:6f633078852b	811	// HX8347: 0x01 Display Mode has diff bit mapping for A, D
davidprentice	0:6f633078852b	812	WriteCmdParamN(0x01, 1, &val);
davidprentice	0:6f633078852b	813	} else
davidprentice	0:6f633078852b	814	WriteCmdParamN(_lcd_rev ? 0x21 : 0x20, 0, NULL);
davidprentice	0:6f633078852b	815	return;
davidprentice	0:6f633078852b	816	}
davidprentice	0:6f633078852b	817	// cope with 9320 style variants:
davidprentice	0:6f633078852b	818	switch (_lcd_ID) {
davidprentice	0:6f633078852b	819	#ifdef SUPPORT_0139
davidprentice	0:6f633078852b	820	case 0x0139:
davidprentice	0:6f633078852b	821	#endif
davidprentice	0:6f633078852b	822	case 0x9225: //REV is in reg(0x07) like Samsung
davidprentice	0:6f633078852b	823	case 0x0154:
davidprentice	0:6f633078852b	824	WriteCmdData(0x07, 0x13 \| (_lcd_rev << 2)); //.kbv kludge
davidprentice	0:6f633078852b	825	break;
davidprentice	0:6f633078852b	826	#ifdef SUPPORT_1289
davidprentice	0:6f633078852b	827	case 0x1289:
davidprentice	0:6f633078852b	828	_lcd_drivOut &= ~(1 << 13);
davidprentice	0:6f633078852b	829	if (_lcd_rev)
davidprentice	0:6f633078852b	830	_lcd_drivOut \|= (1 << 13);
davidprentice	0:6f633078852b	831	WriteCmdData(0x01, _lcd_drivOut);
davidprentice	0:6f633078852b	832	break;
davidprentice	0:6f633078852b	833	#endif
davidprentice	0:6f633078852b	834	case 0x5420:
davidprentice	0:6f633078852b	835	case 0x7793:
davidprentice	0:6f633078852b	836	case 0x9326:
davidprentice	0:6f633078852b	837	case 0xB509:
davidprentice	0:6f633078852b	838	WriteCmdData(0x401, (1 << 1) \| _lcd_rev); //.kbv kludge VLE
davidprentice	0:6f633078852b	839	break;
davidprentice	0:6f633078852b	840	default:
davidprentice	0:6f633078852b	841	WriteCmdData(0x61, _lcd_rev);
davidprentice	0:6f633078852b	842	break;
davidprentice	0:6f633078852b	843	}
davidprentice	0:6f633078852b	844	}
davidprentice	0:6f633078852b	845
davidprentice	0:6f633078852b	846	#define TFTLCD_DELAY 0xFFFF
davidprentice	0:6f633078852b	847	#define TFTLCD_DELAY8 0x7F
davidprentice	0:6f633078852b	848	static void init_table(const void *table, int16_t size)
davidprentice	0:6f633078852b	849	{
davidprentice	0:6f633078852b	850	//copes with any uint8_t table. Even HX8347 style
davidprentice	0:6f633078852b	851	uint8_t p = (uint8_t ) table;
davidprentice	0:6f633078852b	852	while (size > 0) {
davidprentice	0:6f633078852b	853	uint8_t cmd = pgm_read_byte(p++);
davidprentice	0:6f633078852b	854	uint8_t len = pgm_read_byte(p++);
davidprentice	0:6f633078852b	855	if (cmd == TFTLCD_DELAY8) {
davidprentice	0:6f633078852b	856	delay(len);
davidprentice	0:6f633078852b	857	len = 0;
davidprentice	0:6f633078852b	858	} else {
davidprentice	0:6f633078852b	859	CS_ACTIVE;
davidprentice	0:6f633078852b	860	CD_COMMAND;
davidprentice	0:6f633078852b	861	write8(cmd);
davidprentice	0:6f633078852b	862	for (uint8_t d = 0; d++ < len; ) {
davidprentice	0:6f633078852b	863	uint8_t x = pgm_read_byte(p++);
davidprentice	0:6f633078852b	864	CD_DATA;
davidprentice	0:6f633078852b	865	write8(x);
davidprentice	0:6f633078852b	866	if (is8347 && d < len) {
davidprentice	0:6f633078852b	867	CD_COMMAND;
davidprentice	0:6f633078852b	868	cmd++;
davidprentice	0:6f633078852b	869	write8(cmd);
davidprentice	0:6f633078852b	870	}
davidprentice	0:6f633078852b	871	}
davidprentice	0:6f633078852b	872	CS_IDLE;
davidprentice	0:6f633078852b	873	}
davidprentice	0:6f633078852b	874	size -= len + 2;
davidprentice	0:6f633078852b	875	}
davidprentice	0:6f633078852b	876	}
davidprentice	0:6f633078852b	877
davidprentice	0:6f633078852b	878	static void init_table16(const void *table, int16_t size)
davidprentice	0:6f633078852b	879	{
davidprentice	0:6f633078852b	880	uint16_t p = (uint16_t ) table;
davidprentice	0:6f633078852b	881	while (size > 0) {
davidprentice	0:6f633078852b	882	uint16_t cmd = pgm_read_word(p++);
davidprentice	0:6f633078852b	883	uint16_t d = pgm_read_word(p++);
davidprentice	0:6f633078852b	884	if (cmd == TFTLCD_DELAY)
davidprentice	0:6f633078852b	885	delay(d);
davidprentice	0:6f633078852b	886	else {
davidprentice	0:6f633078852b	887	writecmddata(cmd, d); //static function
davidprentice	0:6f633078852b	888	}
davidprentice	0:6f633078852b	889	size -= 2 * sizeof(int16_t);
davidprentice	0:6f633078852b	890	}
davidprentice	0:6f633078852b	891	}
davidprentice	0:6f633078852b	892
davidprentice	0:6f633078852b	893	void MCUFRIEND_kbv::begin(uint16_t ID)
davidprentice	0:6f633078852b	894	{
davidprentice	0:6f633078852b	895	int16_t *p16; //so we can "write" to a const protected variable.
davidprentice	0:6f633078852b	896	const uint8_t *table8_ads = NULL;
davidprentice	0:6f633078852b	897	int16_t table_size;
davidprentice	0:6f633078852b	898	reset();
davidprentice	0:6f633078852b	899	_lcd_xor = 0;
davidprentice	0:6f633078852b	900	switch (_lcd_ID = ID) {
davidprentice	0:6f633078852b	901	/*
davidprentice	0:6f633078852b	902	static const uint16_t _regValues[] PROGMEM = {
davidprentice	0:6f633078852b	903	0x0000, 0x0001, // start oscillation
davidprentice	0:6f633078852b	904	0x0007, 0x0000, // source output control 0 D0
davidprentice	0:6f633078852b	905	0x0013, 0x0000, // power control 3 off
davidprentice	0:6f633078852b	906	0x0011, 0x2604, //
davidprentice	0:6f633078852b	907	0x0014, 0x0015, //
davidprentice	0:6f633078852b	908	0x0010, 0x3C00, //
davidprentice	0:6f633078852b	909	// 0x0013, 0x0040, //
davidprentice	0:6f633078852b	910	// 0x0013, 0x0060, //
davidprentice	0:6f633078852b	911	// 0x0013, 0x0070, //
davidprentice	0:6f633078852b	912	0x0013, 0x0070, // power control 3 PON PON1 AON
davidprentice	0:6f633078852b	913
davidprentice	0:6f633078852b	914	0x0001, 0x0127, // driver output control
davidprentice	0:6f633078852b	915	// 0x0002, 0x0700, // field 0 b/c waveform xor waveform
davidprentice	0:6f633078852b	916	0x0003, 0x1030, //
davidprentice	0:6f633078852b	917	0x0007, 0x0000, //
davidprentice	0:6f633078852b	918	0x0008, 0x0404, //
davidprentice	0:6f633078852b	919	0x000B, 0x0200, //
davidprentice	0:6f633078852b	920	0x000C, 0x0000, //
davidprentice	0:6f633078852b	921	0x00015,0x0000, //
davidprentice	0:6f633078852b	922
davidprentice	0:6f633078852b	923	//gamma setting
davidprentice	0:6f633078852b	924	0x0030, 0x0000,
davidprentice	0:6f633078852b	925	0x0031, 0x0606,
davidprentice	0:6f633078852b	926	0x0032, 0x0006,
davidprentice	0:6f633078852b	927	0x0033, 0x0403,
davidprentice	0:6f633078852b	928	0x0034, 0x0107,
davidprentice	0:6f633078852b	929	0x0035, 0x0101,
davidprentice	0:6f633078852b	930	0x0036, 0x0707,
davidprentice	0:6f633078852b	931	0x0037, 0x0304,
davidprentice	0:6f633078852b	932	0x0038, 0x0A00,
davidprentice	0:6f633078852b	933	0x0039, 0x0706,
davidprentice	0:6f633078852b	934
davidprentice	0:6f633078852b	935	0x0040, 0x0000,
davidprentice	0:6f633078852b	936	0x0041, 0x0000,
davidprentice	0:6f633078852b	937	0x0042, 0x013F,
davidprentice	0:6f633078852b	938	0x0043, 0x0000,
davidprentice	0:6f633078852b	939	0x0044, 0x0000,
davidprentice	0:6f633078852b	940	0x0045, 0x0000,
davidprentice	0:6f633078852b	941	0x0046, 0xEF00,
davidprentice	0:6f633078852b	942	0x0047, 0x013F,
davidprentice	0:6f633078852b	943	0x0048, 0x0000,
davidprentice	0:6f633078852b	944	0x0007, 0x0011,
davidprentice	0:6f633078852b	945	0x0007, 0x0017,
davidprentice	0:6f633078852b	946	};
davidprentice	0:6f633078852b	947	*/
davidprentice	0:6f633078852b	948	#ifdef SUPPORT_0139
davidprentice	0:6f633078852b	949	case 0x0139:
davidprentice	0:6f633078852b	950	_lcd_capable = REV_SCREEN \| XSA_XEA_16BIT; //remove AUTO_READINC
davidprentice	0:6f633078852b	951	static const uint16_t S6D0139_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	952	0x0000, 0x0001, //Start oscillator
davidprentice	0:6f633078852b	953	0x0011, 0x1a00, //Power Control 2
davidprentice	0:6f633078852b	954	0x0014, 0x2020, //Power Control 4
davidprentice	0:6f633078852b	955	0x0010, 0x0900, //Power Control 1
davidprentice	0:6f633078852b	956	0x0013, 0x0040, //Power Control 3
davidprentice	0:6f633078852b	957	0x0013, 0x0060, //Power Control 3
davidprentice	0:6f633078852b	958	0x0013, 0x0070, //Power Control 3
davidprentice	0:6f633078852b	959	0x0011, 0x1a04, //Power Control 2
davidprentice	0:6f633078852b	960	0x0010, 0x2f00, //Power Control 1
davidprentice	0:6f633078852b	961	0x0001, 0x0127, //Driver Control: SM=0, GS=0, SS=1, 240x320
davidprentice	0:6f633078852b	962	0x0002, 0x0100, //LCD Control: (.kbv was 0700) FLD=0, BC= 0, EOR=1
davidprentice	0:6f633078852b	963	0x0003, 0x1030, //Entry Mode: TR1=0, DFM=0, BGR=1, I_D=3
davidprentice	0:6f633078852b	964	0x0007, 0x0000, //Display Control: everything off
davidprentice	0:6f633078852b	965	0x0008, 0x0303, //Blank Period: FP=3, BP=3
davidprentice	0:6f633078852b	966	0x0009, 0x0000, //f.k.
davidprentice	0:6f633078852b	967	0x000b, 0x0000, //Frame Control:
davidprentice	0:6f633078852b	968	0x000c, 0x0000, //Interface Control: system i/f
davidprentice	0:6f633078852b	969	0x0040, 0x0000, //Scan Line
davidprentice	0:6f633078852b	970	0x0041, 0x0000, //Vertical Scroll Control
davidprentice	0:6f633078852b	971	0x0007, 0x0014, //Display Control: VLE1=0, SPT=0, GON=1, REV=1, D=0 (halt)
davidprentice	0:6f633078852b	972	0x0007, 0x0016, //Display Control: VLE1=0, SPT=0, GON=1, REV=1, D=2 (blank)
davidprentice	0:6f633078852b	973	0x0007, 0x0017, //Display Control: VLE1=0, SPT=0, GON=1, REV=1, D=3 (normal)
davidprentice	0:6f633078852b	974	// 0x0007, 0x0217, //Display Control: VLE1=1, SPT=0, GON=1, REV=1, D=3
davidprentice	0:6f633078852b	975	};
davidprentice	0:6f633078852b	976	init_table16(S6D0139_regValues, sizeof(S6D0139_regValues));
davidprentice	0:6f633078852b	977	break;
davidprentice	0:6f633078852b	978	#endif
davidprentice	0:6f633078852b	979
davidprentice	0:6f633078852b	980	#ifdef SUPPORT_0154
davidprentice	0:6f633078852b	981	case 0x0154:
davidprentice	0:6f633078852b	982	_lcd_capable = AUTO_READINC \| REV_SCREEN;
davidprentice	0:6f633078852b	983	static const uint16_t S6D0154_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	984	0x0011, 0x001A,
davidprentice	0:6f633078852b	985	0x0012, 0x3121, //BT=3, DC1=1, DC2=2, DC3=1
davidprentice	0:6f633078852b	986	0x0013, 0x006C, //GVD=108
davidprentice	0:6f633078852b	987	0x0014, 0x4249, //VCM=66, VML=73
davidprentice	0:6f633078852b	988
davidprentice	0:6f633078852b	989	0x0010, 0x0800, //SAP=8
davidprentice	0:6f633078852b	990	TFTLCD_DELAY, 10,
davidprentice	0:6f633078852b	991	0x0011, 0x011A, //APON=0, PON=1, AON=0, VCI1_EN=1, VC=10
davidprentice	0:6f633078852b	992	TFTLCD_DELAY, 10,
davidprentice	0:6f633078852b	993	0x0011, 0x031A, //APON=0, PON=3, AON=0, VCI1_EN=1, VC=10
davidprentice	0:6f633078852b	994	TFTLCD_DELAY, 10,
davidprentice	0:6f633078852b	995	0x0011, 0x071A, //APON=0, PON=7, AON=0, VCI1_EN=1, VC=10
davidprentice	0:6f633078852b	996	TFTLCD_DELAY, 10,
davidprentice	0:6f633078852b	997	0x0011, 0x0F1A, //APON=0, PON=15, AON=0, VCI1_EN=1, VC=10
davidprentice	0:6f633078852b	998	TFTLCD_DELAY, 10,
davidprentice	0:6f633078852b	999	0x0011, 0x0F3A, //APON=0, PON=15, AON=1, VCI1_EN=1, VC=10
davidprentice	0:6f633078852b	1000	TFTLCD_DELAY, 30,
davidprentice	0:6f633078852b	1001
davidprentice	0:6f633078852b	1002	0x0001, 0x0128,
davidprentice	0:6f633078852b	1003	0x0002, 0x0100,
davidprentice	0:6f633078852b	1004	0x0003, 0x1030,
davidprentice	0:6f633078852b	1005	0x0007, 0x1012,
davidprentice	0:6f633078852b	1006	0x0008, 0x0303,
davidprentice	0:6f633078852b	1007	0x000B, 0x1100,
davidprentice	0:6f633078852b	1008	0x000C, 0x0000,
davidprentice	0:6f633078852b	1009	0x000F, 0x1801,
davidprentice	0:6f633078852b	1010	0x0015, 0x0020,
davidprentice	0:6f633078852b	1011
davidprentice	0:6f633078852b	1012	0x0050,0x0101,
davidprentice	0:6f633078852b	1013	0x0051,0x0603,
davidprentice	0:6f633078852b	1014	0x0052,0x0408,
davidprentice	0:6f633078852b	1015	0x0053,0x0000,
davidprentice	0:6f633078852b	1016	0x0054,0x0605,
davidprentice	0:6f633078852b	1017	0x0055,0x0406,
davidprentice	0:6f633078852b	1018	0x0056,0x0303,
davidprentice	0:6f633078852b	1019	0x0057,0x0303,
davidprentice	0:6f633078852b	1020	0x0058,0x0010,
davidprentice	0:6f633078852b	1021	0x0059,0x1000,
davidprentice	0:6f633078852b	1022
davidprentice	0:6f633078852b	1023	0x0007, 0x0012, //GON=1, REV=0, D=2
davidprentice	0:6f633078852b	1024	TFTLCD_DELAY, 40,
davidprentice	0:6f633078852b	1025	0x0007, 0x0013, //GON=1, REV=0, D=3
davidprentice	0:6f633078852b	1026	0x0007, 0x0017, //GON=1, REV=1, D=3 DISPLAY ON
davidprentice	0:6f633078852b	1027	};
davidprentice	0:6f633078852b	1028	init_table16(S6D0154_regValues, sizeof(S6D0154_regValues));
davidprentice	0:6f633078852b	1029
davidprentice	0:6f633078852b	1030	break;
davidprentice	0:6f633078852b	1031	#endif
davidprentice	0:6f633078852b	1032
davidprentice	0:6f633078852b	1033	#ifdef SUPPORT_1289
davidprentice	0:6f633078852b	1034	case 0x9797:
davidprentice	0:6f633078852b	1035	is9797 = 1;
davidprentice	0:6f633078852b	1036	// _lcd_capable = 0 \| XSA_XEA_16BIT \| REV_SCREEN \| AUTO_READINC \| READ_24BITS;
davidprentice	0:6f633078852b	1037	// deliberately set READ_BGR to disable Software Scroll in graphictest_kbv example
davidprentice	0:6f633078852b	1038	_lcd_capable = 0 \| XSA_XEA_16BIT \| REV_SCREEN \| AUTO_READINC \| READ_24BITS \| READ_BGR;
davidprentice	0:6f633078852b	1039	_lcd_ID = 0x1289;
davidprentice	0:6f633078852b	1040	goto common_1289;
davidprentice	0:6f633078852b	1041	case 0x1289:
davidprentice	0:6f633078852b	1042	_lcd_capable = 0 \| XSA_XEA_16BIT \| REV_SCREEN \| AUTO_READINC;
davidprentice	0:6f633078852b	1043	common_1289:
davidprentice	0:6f633078852b	1044	// came from MikroElektronika library http://www.hmsprojects.com/tft_lcd.html
davidprentice	0:6f633078852b	1045	static const uint16_t SSD1289_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1046	0x0000, 0x0001,
davidprentice	0:6f633078852b	1047	0x0003, 0xA8A4,
davidprentice	0:6f633078852b	1048	0x000C, 0x0000,
davidprentice	0:6f633078852b	1049	0x000D, 0x000A, // VRH=10
davidprentice	0:6f633078852b	1050	0x000E, 0x2B00,
davidprentice	0:6f633078852b	1051	0x001E, 0x00B7,
davidprentice	0:6f633078852b	1052	0x0001, 0x2B3F, // setRotation() alters
davidprentice	0:6f633078852b	1053	0x0002, 0x0600, // B_C=1, EOR=1
davidprentice	0:6f633078852b	1054	0x0010, 0x0000,
davidprentice	0:6f633078852b	1055	0x0011, 0x6070, // setRotation() alters
davidprentice	0:6f633078852b	1056	0x0005, 0x0000,
davidprentice	0:6f633078852b	1057	0x0006, 0x0000,
davidprentice	0:6f633078852b	1058	0x0016, 0xEF1C,
davidprentice	0:6f633078852b	1059	0x0017, 0x0003,
davidprentice	0:6f633078852b	1060	0x0007, 0x0233,
davidprentice	0:6f633078852b	1061	0x000B, 0x0000,
davidprentice	0:6f633078852b	1062	0x000F, 0x0000,
davidprentice	0:6f633078852b	1063	0x0030, 0x0707,
davidprentice	0:6f633078852b	1064	0x0031, 0x0204,
davidprentice	0:6f633078852b	1065	0x0032, 0x0204,
davidprentice	0:6f633078852b	1066	0x0033, 0x0502,
davidprentice	0:6f633078852b	1067	0x0034, 0x0507,
davidprentice	0:6f633078852b	1068	0x0035, 0x0204,
davidprentice	0:6f633078852b	1069	0x0036, 0x0204,
davidprentice	0:6f633078852b	1070	0x0037, 0x0502,
davidprentice	0:6f633078852b	1071	0x003A, 0x0302,
davidprentice	0:6f633078852b	1072	0x003B, 0x0302,
davidprentice	0:6f633078852b	1073	0x0023, 0x0000,
davidprentice	0:6f633078852b	1074	0x0024, 0x0000,
davidprentice	0:6f633078852b	1075	0x0025, 0x8000,
davidprentice	0:6f633078852b	1076	};
davidprentice	0:6f633078852b	1077	init_table16(SSD1289_regValues, sizeof(SSD1289_regValues));
davidprentice	0:6f633078852b	1078	break;
davidprentice	0:6f633078852b	1079	#endif
davidprentice	0:6f633078852b	1080
davidprentice	0:6f633078852b	1081	case 0x1511: // Unknown from Levy
davidprentice	0:6f633078852b	1082	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1; //extra read_8(dummy)
davidprentice	0:6f633078852b	1083	static const uint8_t R61511_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1084	0xB0, 1, 0x00, //Command Access Protect
davidprentice	0:6f633078852b	1085	};
davidprentice	0:6f633078852b	1086	table8_ads = R61511_regValues, table_size = sizeof(R61511_regValues);
davidprentice	0:6f633078852b	1087	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	1088	*p16 = 480;
davidprentice	0:6f633078852b	1089	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	1090	*p16 = 320;
davidprentice	0:6f633078852b	1091	break;
davidprentice	0:6f633078852b	1092
davidprentice	0:6f633078852b	1093	case 0x1520:
davidprentice	0:6f633078852b	1094	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS;
davidprentice	0:6f633078852b	1095	static const uint8_t R61520_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1096	0xB0, 1, 0x00, //Command Access Protect
davidprentice	0:6f633078852b	1097	0xC0, 1, 0x0A, //DM=1, BGR=1
davidprentice	0:6f633078852b	1098	};
davidprentice	0:6f633078852b	1099	table8_ads = R61520_regValues, table_size = sizeof(R61520_regValues);
davidprentice	0:6f633078852b	1100	break;
davidprentice	0:6f633078852b	1101
davidprentice	0:6f633078852b	1102	case 0x1526:
davidprentice	0:6f633078852b	1103	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS;
davidprentice	0:6f633078852b	1104	static const uint8_t R61526_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1105	0xB0, 1, 0x03, //Command Access
davidprentice	0:6f633078852b	1106	0xE2, 1, 0x3F, //Command Write Access
davidprentice	0:6f633078852b	1107	0xC0, 1, 0x22, //REV=0, BGR=1, SS=0
davidprentice	0:6f633078852b	1108	0xE2, 1, 0x00, //Command Write Protect
davidprentice	0:6f633078852b	1109	};
davidprentice	0:6f633078852b	1110	table8_ads = R61526_regValues, table_size = sizeof(R61526_regValues);
davidprentice	0:6f633078852b	1111	break;
davidprentice	0:6f633078852b	1112
davidprentice	0:6f633078852b	1113	#ifdef SUPPORT_1580
davidprentice	0:6f633078852b	1114	case 0x1580:
davidprentice	0:6f633078852b	1115	_lcd_capable = 0 \| REV_SCREEN \| READ_BGR \| INVERT_GS \| READ_NODUMMY; //thanks vanhan123
davidprentice	0:6f633078852b	1116	static const uint16_t R61580_regValues[] PROGMEM = { //from MCHIP Graphics Lib drvTFT001.c
davidprentice	0:6f633078852b	1117	// Synchronization after reset
davidprentice	0:6f633078852b	1118	TFTLCD_DELAY, 2,
davidprentice	0:6f633078852b	1119	0x0000, 0x0000,
davidprentice	0:6f633078852b	1120	0x0000, 0x0000,
davidprentice	0:6f633078852b	1121	0x0000, 0x0000,
davidprentice	0:6f633078852b	1122	0x0000, 0x0000,
davidprentice	0:6f633078852b	1123
davidprentice	0:6f633078852b	1124	// Setup display
davidprentice	0:6f633078852b	1125	0x00A4, 0x0001, // CALB=1
davidprentice	0:6f633078852b	1126	TFTLCD_DELAY, 2,
davidprentice	0:6f633078852b	1127	0x0060, 0xA700, // Driver Output Control
davidprentice	0:6f633078852b	1128	0x0008, 0x0808, // Display Control BP=8, FP=8
davidprentice	0:6f633078852b	1129	0x0030, 0x0111, // y control
davidprentice	0:6f633078852b	1130	0x0031, 0x2410, // y control
davidprentice	0:6f633078852b	1131	0x0032, 0x0501, // y control
davidprentice	0:6f633078852b	1132	0x0033, 0x050C, // y control
davidprentice	0:6f633078852b	1133	0x0034, 0x2211, // y control
davidprentice	0:6f633078852b	1134	0x0035, 0x0C05, // y control
davidprentice	0:6f633078852b	1135	0x0036, 0x2105, // y control
davidprentice	0:6f633078852b	1136	0x0037, 0x1004, // y control
davidprentice	0:6f633078852b	1137	0x0038, 0x1101, // y control
davidprentice	0:6f633078852b	1138	0x0039, 0x1122, // y control
davidprentice	0:6f633078852b	1139	0x0090, 0x0019, // 80Hz
davidprentice	0:6f633078852b	1140	0x0010, 0x0530, // Power Control
davidprentice	0:6f633078852b	1141	0x0011, 0x0237, //DC1=2, DC0=3, VC=7
davidprentice	0:6f633078852b	1142	// 0x0011, 0x17B0, //DC1=7, DC0=3, VC=0 ?b12 ?b7 vanhan123
davidprentice	0:6f633078852b	1143	0x0012, 0x01BF, //VCMR=1, PSON=1, PON=1, VRH=15
davidprentice	0:6f633078852b	1144	// 0x0012, 0x013A, //VCMR=1, PSON=1, PON=1, VRH=10 vanhan123
davidprentice	0:6f633078852b	1145	0x0013, 0x1300, //VDV=19
davidprentice	0:6f633078852b	1146	TFTLCD_DELAY, 100,
davidprentice	0:6f633078852b	1147
davidprentice	0:6f633078852b	1148	0x0001, 0x0100,
davidprentice	0:6f633078852b	1149	0x0002, 0x0200,
davidprentice	0:6f633078852b	1150	0x0003, 0x1030,
davidprentice	0:6f633078852b	1151	0x0009, 0x0001,
davidprentice	0:6f633078852b	1152	0x000A, 0x0008,
davidprentice	0:6f633078852b	1153	0x000C, 0x0001,
davidprentice	0:6f633078852b	1154	0x000D, 0xD000,
davidprentice	0:6f633078852b	1155	0x000E, 0x0030,
davidprentice	0:6f633078852b	1156	0x000F, 0x0000,
davidprentice	0:6f633078852b	1157	0x0020, 0x0000,
davidprentice	0:6f633078852b	1158	0x0021, 0x0000,
davidprentice	0:6f633078852b	1159	0x0029, 0x0077,
davidprentice	0:6f633078852b	1160	0x0050, 0x0000,
davidprentice	0:6f633078852b	1161	0x0051, 0xD0EF,
davidprentice	0:6f633078852b	1162	0x0052, 0x0000,
davidprentice	0:6f633078852b	1163	0x0053, 0x013F,
davidprentice	0:6f633078852b	1164	0x0061, 0x0001,
davidprentice	0:6f633078852b	1165	0x006A, 0x0000,
davidprentice	0:6f633078852b	1166	0x0080, 0x0000,
davidprentice	0:6f633078852b	1167	0x0081, 0x0000,
davidprentice	0:6f633078852b	1168	0x0082, 0x005F,
davidprentice	0:6f633078852b	1169	0x0093, 0x0701,
davidprentice	0:6f633078852b	1170	0x0007, 0x0100,
davidprentice	0:6f633078852b	1171	};
davidprentice	0:6f633078852b	1172	static const uint16_t R61580_DEM240320C[] PROGMEM = { //from DEM 240320C TMH-PW-N
davidprentice	0:6f633078852b	1173	0x00, 0x0000,
davidprentice	0:6f633078852b	1174	0x00, 0x0000,
davidprentice	0:6f633078852b	1175	TFTLCD_DELAY, 100,
davidprentice	0:6f633078852b	1176	0x00, 0x0000,
davidprentice	0:6f633078852b	1177	0x00, 0x0000,
davidprentice	0:6f633078852b	1178	0x00, 0x0000,
davidprentice	0:6f633078852b	1179	0x00, 0x0000,
davidprentice	0:6f633078852b	1180	0xA4, 0x0001,
davidprentice	0:6f633078852b	1181	TFTLCD_DELAY, 100,
davidprentice	0:6f633078852b	1182	0x60, 0xA700,
davidprentice	0:6f633078852b	1183	0x08, 0x0808,
davidprentice	0:6f633078852b	1184	/******************************************/
davidprentice	0:6f633078852b	1185	//Gamma Setting:
davidprentice	0:6f633078852b	1186	0x30, 0x0203,
davidprentice	0:6f633078852b	1187	0x31, 0x080F,
davidprentice	0:6f633078852b	1188	0x32, 0x0401,
davidprentice	0:6f633078852b	1189	0x33, 0x050B,
davidprentice	0:6f633078852b	1190	0x34, 0x3330,
davidprentice	0:6f633078852b	1191	0x35, 0x0B05,
davidprentice	0:6f633078852b	1192	0x36, 0x0005,
davidprentice	0:6f633078852b	1193	0x37, 0x0F08,
davidprentice	0:6f633078852b	1194	0x38, 0x0302,
davidprentice	0:6f633078852b	1195	0x39, 0x3033,
davidprentice	0:6f633078852b	1196	/******************************************/
davidprentice	0:6f633078852b	1197	//Power Setting:
davidprentice	0:6f633078852b	1198	0x90, 0x0018, //80Hz
davidprentice	0:6f633078852b	1199	0x10, 0x0530, //BT,AP
davidprentice	0:6f633078852b	1200	0x11, 0x0237, //DC1,DC0,VC
davidprentice	0:6f633078852b	1201	0x12, 0x01BF,
davidprentice	0:6f633078852b	1202	0x13, 0x1000, //VCOM
davidprentice	0:6f633078852b	1203	TFTLCD_DELAY, 200,
davidprentice	0:6f633078852b	1204	/******************************************/
davidprentice	0:6f633078852b	1205	0x01, 0x0100,
davidprentice	0:6f633078852b	1206	0x02, 0x0200,
davidprentice	0:6f633078852b	1207	0x03, 0x1030,
davidprentice	0:6f633078852b	1208	0x09, 0x0001,
davidprentice	0:6f633078852b	1209	0x0A, 0x0008,
davidprentice	0:6f633078852b	1210	0x0C, 0x0000,
davidprentice	0:6f633078852b	1211	0x0D, 0xD000,
davidprentice	0:6f633078852b	1212
davidprentice	0:6f633078852b	1213	0x0E, 0x0030,
davidprentice	0:6f633078852b	1214	0x0F, 0x0000,
davidprentice	0:6f633078852b	1215	0x20, 0x0000, //H Start
davidprentice	0:6f633078852b	1216	0x21, 0x0000, //V Start
davidprentice	0:6f633078852b	1217	0x29, 0x002E,
davidprentice	0:6f633078852b	1218	0x50, 0x0000,
davidprentice	0:6f633078852b	1219	0x51, 0x00EF,
davidprentice	0:6f633078852b	1220	0x52, 0x0000,
davidprentice	0:6f633078852b	1221	0x53, 0x013F,
davidprentice	0:6f633078852b	1222	0x61, 0x0001,
davidprentice	0:6f633078852b	1223	0x6A, 0x0000,
davidprentice	0:6f633078852b	1224	0x80, 0x0000,
davidprentice	0:6f633078852b	1225	0x81, 0x0000,
davidprentice	0:6f633078852b	1226	0x82, 0x005F,
davidprentice	0:6f633078852b	1227	0x93, 0x0701,
davidprentice	0:6f633078852b	1228	/******************************************/
davidprentice	0:6f633078852b	1229	0x07, 0x0100,
davidprentice	0:6f633078852b	1230	TFTLCD_DELAY, 100,
davidprentice	0:6f633078852b	1231	};
davidprentice	0:6f633078852b	1232	init_table16(R61580_DEM240320C, sizeof(R61580_DEM240320C));
davidprentice	0:6f633078852b	1233	// init_table16(R61580_regValues, sizeof(R61580_regValues));
davidprentice	0:6f633078852b	1234	break;
davidprentice	0:6f633078852b	1235	#endif
davidprentice	0:6f633078852b	1236
davidprentice	0:6f633078852b	1237	#if defined(SUPPORT_1963) && USING_16BIT_BUS
davidprentice	0:6f633078852b	1238	case 0x1963:
davidprentice	0:6f633078852b	1239	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| READ_NODUMMY \| INVERT_SS \| INVERT_RGB;
davidprentice	0:6f633078852b	1240	// from NHD 5.0" 8-bit
davidprentice	0:6f633078852b	1241	static const uint8_t SSD1963_NHD_50_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1242	(0xE0), 1, 0x01, // PLL enable
davidprentice	0:6f633078852b	1243	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1244	(0xE0), 1, 0x03, // Lock PLL
davidprentice	0:6f633078852b	1245	(0xB0), 7, 0x08, 0x80, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION
davidprentice	0:6f633078852b	1246	(0xF0), 1, 0x03, //was 00 pixel data interface
davidprentice	0:6f633078852b	1247	// (0x3A), 1, 0x60, // SET R G B format = 6 6 6
davidprentice	0:6f633078852b	1248	(0xE2), 3, 0x1D, 0x02, 0x54, //PLL multiplier, set PLL clock to 120M
davidprentice	0:6f633078852b	1249	(0xE6), 3, 0x02, 0xFF, 0xFF, //PLL setting for PCLK, depends on resolution
davidprentice	0:6f633078852b	1250	(0xB4), 8, 0x04, 0x20, 0x00, 0x58, 0x80, 0x00, 0x00, 0x00, //HSYNC
davidprentice	0:6f633078852b	1251	(0xB6), 7, 0x02, 0x0D, 0x00, 0x20, 0x01, 0x00, 0x00, //VSYNC
davidprentice	0:6f633078852b	1252	(0x13), 0, //Enter Normal mode
davidprentice	0:6f633078852b	1253	(0x38), 0, //Exit Idle mode
davidprentice	0:6f633078852b	1254	};
davidprentice	0:6f633078852b	1255	// from NHD 7.0" 8-bit
davidprentice	0:6f633078852b	1256	static const uint8_t SSD1963_NHD_70_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1257	(0xE2), 3, 0x1D, 0x02, 0x04, //PLL multiplier, set PLL clock to 120M
davidprentice	0:6f633078852b	1258	(0xE0), 1, 0x01, // PLL enable
davidprentice	0:6f633078852b	1259	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1260	(0xE0), 1, 0x03, // Lock PLL
davidprentice	0:6f633078852b	1261	0x01, 0, //Soft Reset
davidprentice	0:6f633078852b	1262	TFTLCD_DELAY8, 120,
davidprentice	0:6f633078852b	1263	(0xB0), 7, 0x08, 0x80, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION
davidprentice	0:6f633078852b	1264	(0xF0), 1, 0x03, //was 00 pixel data interface
davidprentice	0:6f633078852b	1265	// (0x3A), 1, 0x60, // SET R G B format = 6 6 6
davidprentice	0:6f633078852b	1266	(0xE6), 3, 0x0F, 0xFF, 0xFF, //PLL setting for PCLK, depends on resolution
davidprentice	0:6f633078852b	1267	(0xB4), 8, 0x04, 0x20, 0x00, 0x58, 0x80, 0x00, 0x00, 0x00, //HSYNC
davidprentice	0:6f633078852b	1268	(0xB6), 7, 0x02, 0x0D, 0x00, 0x20, 0x01, 0x00, 0x00, //VSYNC
davidprentice	0:6f633078852b	1269	(0x13), 0, //Enter Normal mode
davidprentice	0:6f633078852b	1270	(0x38), 0, //Exit Idle mode
davidprentice	0:6f633078852b	1271	};
davidprentice	0:6f633078852b	1272	// from UTFTv2.81 initlcd.h
davidprentice	0:6f633078852b	1273	static const uint8_t SSD1963_800_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1274	(0xE2), 3, 0x1E, 0x02, 0x54, //PLL multiplier, set PLL clock to 120M
davidprentice	0:6f633078852b	1275	(0xE0), 1, 0x01, // PLL enable
davidprentice	0:6f633078852b	1276	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1277	(0xE0), 1, 0x03, //
davidprentice	0:6f633078852b	1278	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1279	0x01, 0, //Soft Reset
davidprentice	0:6f633078852b	1280	TFTLCD_DELAY8, 100,
davidprentice	0:6f633078852b	1281	(0xE6), 3, 0x03, 0xFF, 0xFF, //PLL setting for PCLK, depends on resolution
davidprentice	0:6f633078852b	1282	(0xB0), 7, 0x24, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION
davidprentice	0:6f633078852b	1283	// (0xB0), 7, 0x24, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x2D, //LCD SPECIFICATION
davidprentice	0:6f633078852b	1284	(0xB4), 8, 0x03, 0xA0, 0x00, 0x2E, 0x30, 0x00, 0x0F, 0x00, //HSYNC
davidprentice	0:6f633078852b	1285	(0xB6), 7, 0x02, 0x0D, 0x00, 0x10, 0x10, 0x00, 0x08, //VSYNC
davidprentice	0:6f633078852b	1286	(0xBA), 1, 0x0F, //GPIO[3:0] out 1
davidprentice	0:6f633078852b	1287	(0xB8), 2, 0x07, 0x01, //GPIO3=input, GPIO[2:0]=output
davidprentice	0:6f633078852b	1288	(0xF0), 1, 0x03, //pixel data interface
davidprentice	0:6f633078852b	1289	TFTLCD_DELAY8, 1,
davidprentice	0:6f633078852b	1290	0x28, 0, //Display Off
davidprentice	0:6f633078852b	1291	0x11, 0, //Sleep Out
davidprentice	0:6f633078852b	1292	TFTLCD_DELAY8, 100,
davidprentice	0:6f633078852b	1293	0x29, 0, //Display On
davidprentice	0:6f633078852b	1294	(0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00, //set PWM for B/L
davidprentice	0:6f633078852b	1295	(0xD0), 1, 0x0D,
davidprentice	0:6f633078852b	1296	};
davidprentice	0:6f633078852b	1297	// from UTFTv2.82 initlcd.h
davidprentice	0:6f633078852b	1298	static const uint8_t SSD1963_800NEW_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1299	(0xE2), 3, 0x1E, 0x02, 0x54, //PLL multiplier, set PLL clock to 120M
davidprentice	0:6f633078852b	1300	(0xE0), 1, 0x01, // PLL enable
davidprentice	0:6f633078852b	1301	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1302	(0xE0), 1, 0x03, //
davidprentice	0:6f633078852b	1303	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1304	0x01, 0, //Soft Reset
davidprentice	0:6f633078852b	1305	TFTLCD_DELAY8, 100,
davidprentice	0:6f633078852b	1306	(0xE6), 3, 0x03, 0xFF, 0xFF, //PLL setting for PCLK, depends on resolution
davidprentice	0:6f633078852b	1307	(0xB0), 7, 0x24, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION
davidprentice	0:6f633078852b	1308	(0xB4), 8, 0x03, 0xA0, 0x00, 0x2E, 0x30, 0x00, 0x0F, 0x00, //HSYNC HT=928, HPS=46, HPW=48, LPS=15
davidprentice	0:6f633078852b	1309	(0xB6), 7, 0x02, 0x0D, 0x00, 0x10, 0x10, 0x00, 0x08, //VSYNC VT=525, VPS=16, VPW=16, FPS=8
davidprentice	0:6f633078852b	1310	(0xBA), 1, 0x0F, //GPIO[3:0] out 1
davidprentice	0:6f633078852b	1311	(0xB8), 2, 0x07, 0x01, //GPIO3=input, GPIO[2:0]=output
davidprentice	0:6f633078852b	1312	(0xF0), 1, 0x03, //pixel data interface
davidprentice	0:6f633078852b	1313	TFTLCD_DELAY8, 1,
davidprentice	0:6f633078852b	1314	0x28, 0, //Display Off
davidprentice	0:6f633078852b	1315	0x11, 0, //Sleep Out
davidprentice	0:6f633078852b	1316	TFTLCD_DELAY8, 100,
davidprentice	0:6f633078852b	1317	0x29, 0, //Display On
davidprentice	0:6f633078852b	1318	(0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00, //set PWM for B/L
davidprentice	0:6f633078852b	1319	(0xD0), 1, 0x0D,
davidprentice	0:6f633078852b	1320	};
davidprentice	0:6f633078852b	1321	// from UTFTv2.82 initlcd.h
davidprentice	0:6f633078852b	1322	static const uint8_t SSD1963_800ALT_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1323	(0xE2), 3, 0x23, 0x02, 0x04, //PLL multiplier, set PLL clock to 120M
davidprentice	0:6f633078852b	1324	(0xE0), 1, 0x01, // PLL enable
davidprentice	0:6f633078852b	1325	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1326	(0xE0), 1, 0x03, //
davidprentice	0:6f633078852b	1327	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1328	0x01, 0, //Soft Reset
davidprentice	0:6f633078852b	1329	TFTLCD_DELAY8, 100,
davidprentice	0:6f633078852b	1330	(0xE6), 3, 0x04, 0x93, 0xE0, //PLL setting for PCLK, depends on resolution
davidprentice	0:6f633078852b	1331	(0xB0), 7, 0x00, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION
davidprentice	0:6f633078852b	1332	(0xB4), 8, 0x03, 0xA0, 0x00, 0x2E, 0x30, 0x00, 0x0F, 0x00, //HSYNC HT=928, HPS=46, HPW=48, LPS=15
davidprentice	0:6f633078852b	1333	(0xB6), 7, 0x02, 0x0D, 0x00, 0x10, 0x10, 0x00, 0x08, //VSYNC VT=525, VPS=16, VPW=16, FPS=8
davidprentice	0:6f633078852b	1334	(0xBA), 1, 0x0F, //GPIO[3:0] out 1
davidprentice	0:6f633078852b	1335	(0xB8), 2, 0x07, 0x01, //GPIO3=input, GPIO[2:0]=output
davidprentice	0:6f633078852b	1336	(0xF0), 1, 0x03, //pixel data interface
davidprentice	0:6f633078852b	1337	TFTLCD_DELAY8, 1,
davidprentice	0:6f633078852b	1338	0x28, 0, //Display Off
davidprentice	0:6f633078852b	1339	0x11, 0, //Sleep Out
davidprentice	0:6f633078852b	1340	TFTLCD_DELAY8, 100,
davidprentice	0:6f633078852b	1341	0x29, 0, //Display On
davidprentice	0:6f633078852b	1342	(0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00, //set PWM for B/L
davidprentice	0:6f633078852b	1343	(0xD0), 1, 0x0D,
davidprentice	0:6f633078852b	1344	};
davidprentice	0:6f633078852b	1345	// from UTFTv2.82 initlcd.h
davidprentice	0:6f633078852b	1346	static const uint8_t SSD1963_480_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1347	(0xE2), 3, 0x23, 0x02, 0x54, //PLL multiplier, set PLL clock to 120M
davidprentice	0:6f633078852b	1348	(0xE0), 1, 0x01, // PLL enable
davidprentice	0:6f633078852b	1349	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1350	(0xE0), 1, 0x03, //
davidprentice	0:6f633078852b	1351	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1352	0x01, 0, //Soft Reset
davidprentice	0:6f633078852b	1353	TFTLCD_DELAY8, 100,
davidprentice	0:6f633078852b	1354	(0xE6), 3, 0x01, 0x1F, 0xFF, //PLL setting for PCLK, depends on resolution
davidprentice	0:6f633078852b	1355	(0xB0), 7, 0x20, 0x00, 0x01, 0xDF, 0x01, 0x0F, 0x00, //LCD SPECIFICATION
davidprentice	0:6f633078852b	1356	(0xB4), 8, 0x02, 0x13, 0x00, 0x08, 0x2B, 0x00, 0x02, 0x00, //HSYNC
davidprentice	0:6f633078852b	1357	(0xB6), 7, 0x01, 0x20, 0x00, 0x04, 0x0C, 0x00, 0x02, //VSYNC
davidprentice	0:6f633078852b	1358	(0xBA), 1, 0x0F, //GPIO[3:0] out 1
davidprentice	0:6f633078852b	1359	(0xB8), 2, 0x07, 0x01, //GPIO3=input, GPIO[2:0]=output
davidprentice	0:6f633078852b	1360	(0xF0), 1, 0x03, //pixel data interface
davidprentice	0:6f633078852b	1361	TFTLCD_DELAY8, 1,
davidprentice	0:6f633078852b	1362	0x28, 0, //Display Off
davidprentice	0:6f633078852b	1363	0x11, 0, //Sleep Out
davidprentice	0:6f633078852b	1364	TFTLCD_DELAY8, 100,
davidprentice	0:6f633078852b	1365	0x29, 0, //Display On
davidprentice	0:6f633078852b	1366	(0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00, //set PWM for B/L
davidprentice	0:6f633078852b	1367	(0xD0), 1, 0x0D,
davidprentice	0:6f633078852b	1368	};
davidprentice	0:6f633078852b	1369	// table8_ads = SSD1963_480_regValues, table_size = sizeof(SSD1963_480_regValues);
davidprentice	0:6f633078852b	1370	table8_ads = SSD1963_800_regValues, table_size = sizeof(SSD1963_800_regValues);
davidprentice	0:6f633078852b	1371	// table8_ads = SSD1963_NHD_50_regValues, table_size = sizeof(SSD1963_NHD_50_regValues);
davidprentice	0:6f633078852b	1372	// table8_ads = SSD1963_NHD_70_regValues, table_size = sizeof(SSD1963_NHD_70_regValues);
davidprentice	0:6f633078852b	1373	// table8_ads = SSD1963_800NEW_regValues, table_size = sizeof(SSD1963_800NEW_regValues);
davidprentice	0:6f633078852b	1374	// table8_ads = SSD1963_800ALT_regValues, table_size = sizeof(SSD1963_800ALT_regValues);
davidprentice	0:6f633078852b	1375	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	1376	*p16 = 480;
davidprentice	0:6f633078852b	1377	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	1378	*p16 = 800;
davidprentice	0:6f633078852b	1379	break;
davidprentice	0:6f633078852b	1380	#endif
davidprentice	0:6f633078852b	1381
davidprentice	0:6f633078852b	1382	case 0x3229:
davidprentice	0:6f633078852b	1383	_lcd_capable = 0 \| AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| INVERT_SS; // \| READ_24BITS;
davidprentice	0:6f633078852b	1384	static const uint8_t UNK3229_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1385	//----------------Star Initial Sequence-------//
davidprentice	0:6f633078852b	1386	// 0x11, 0, // exit sleep
davidprentice	0:6f633078852b	1387	0x06, 0, //enter extern command [cmd=0x0607]
davidprentice	0:6f633078852b	1388	0x07, 0,
davidprentice	0:6f633078852b	1389	0xb1, 2, 0x00, 0x12, //RTN [00 12]
davidprentice	0:6f633078852b	1390	0xb4, 1, 0x02, //line inversion [02]
davidprentice	0:6f633078852b	1391	0xb6, 4, 0x00, 0x20, 0x27, 0x00, //[0A 82 27 00]
davidprentice	0:6f633078852b	1392	0xca, 1, 0x01, // [23]
davidprentice	0:6f633078852b	1393	0xcb, 1, 0x03, // [20]
davidprentice	0:6f633078852b	1394	0xc0, 1, 0x13, //vrh [21]
davidprentice	0:6f633078852b	1395	TFTLCD_DELAY8, 20,
davidprentice	0:6f633078852b	1396	0xc5, 1, 0xcc, // [00]
davidprentice	0:6f633078852b	1397	0xc6, 1, 0x00, // [00]
davidprentice	0:6f633078852b	1398	0xc7, 1, 0x04, //osc [83]
davidprentice	0:6f633078852b	1399	0xc8, 1, 0x03, // [20]
davidprentice	0:6f633078852b	1400	0xcc, 1, 0x06, //vcm [31]
davidprentice	0:6f633078852b	1401	0xcd, 1, 0x1c, //vdv [18]
davidprentice	0:6f633078852b	1402	0xf9, 2, 0x15, 0x15, // ?? 13bit 454 [37]
davidprentice	0:6f633078852b	1403	0xf3, 3, 0x0a, 0x02, 0x0a, // [06 03 06]
davidprentice	0:6f633078852b	1404	0xf6, 3, 0x01, 0x10, 0x00, // [01 10 00]
davidprentice	0:6f633078852b	1405	/*
davidprentice	0:6f633078852b	1406	0xe0, 1, 0x05, //I don't believe these registers
davidprentice	0:6f633078852b	1407	0xe1, 1, 0x32, //safer to use power-on defaults
davidprentice	0:6f633078852b	1408	0xe2, 1, 0x77,
davidprentice	0:6f633078852b	1409	0xe3, 1, 0x77,
davidprentice	0:6f633078852b	1410	0xe4, 1, 0x7f,
davidprentice	0:6f633078852b	1411	0xe5, 1, 0xfa,
davidprentice	0:6f633078852b	1412	0xe6, 1, 0x00,
davidprentice	0:6f633078852b	1413	0xe7, 1, 0x74,
davidprentice	0:6f633078852b	1414	0xe8, 1, 0x27,
davidprentice	0:6f633078852b	1415	0xe9, 1, 0x10,
davidprentice	0:6f633078852b	1416	0xea, 1, 0xc0,
davidprentice	0:6f633078852b	1417	0xeb, 1, 0x25,
davidprentice	0:6f633078852b	1418	*/
davidprentice	0:6f633078852b	1419	0xfa, 0, //exit extern command [cmd=0xFAFB]
davidprentice	0:6f633078852b	1420	0xfb, 0,
davidprentice	0:6f633078852b	1421	};
davidprentice	0:6f633078852b	1422	table8_ads = UNK3229_regValues, table_size = sizeof(UNK3229_regValues); //
davidprentice	0:6f633078852b	1423	break;
davidprentice	0:6f633078852b	1424
davidprentice	0:6f633078852b	1425	#ifdef SUPPORT_4532
davidprentice	0:6f633078852b	1426	//Support for LG Electronics LGDP4532 (also 4531 i guess) by Leodino v1.0 2-Nov-2016
davidprentice	0:6f633078852b	1427	//based on data by waveshare and the datasheet of LG Electronics
davidprentice	0:6f633078852b	1428	//My approach to get it working: the parameters by waveshare did no make it function allright
davidprentice	0:6f633078852b	1429	//I started with remming lines to see if this helped. Basically the stuff in range 41-93
davidprentice	0:6f633078852b	1430	//gives problems.
davidprentice	0:6f633078852b	1431	//The other lines that are REMmed give no problems, but it seems default values are OK as well.
davidprentice	0:6f633078852b	1432	case 0x4532: // thanks Leodino
davidprentice	0:6f633078852b	1433	_lcd_capable = 0 \| REV_SCREEN; // \| INVERT_GS;
davidprentice	0:6f633078852b	1434	static const uint16_t LGDP4532_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1435	0x0000,0x0001, //Device code read
davidprentice	0:6f633078852b	1436	0x0010,0x0628, //Power control 1 SAP[2:0] BT[3:0] AP[2:0] DK DSTB SLP
davidprentice	0:6f633078852b	1437	0x0012,0x0006, //Power control 3 PON VRH[3:0]
davidprentice	0:6f633078852b	1438	//0x0013,0x0A32, //Power control 4 VCOMG VDV[4:0] VCM[6:0]
davidprentice	0:6f633078852b	1439	0x0011,0x0040, //Power control 2; DC1[2:0] DC0[2:0] VC[2:0]
davidprentice	0:6f633078852b	1440	//0x0015,0x0050, //Regulator control RSET RI[2:0] RV[2:0] RCONT[2:0]
davidprentice	0:6f633078852b	1441	0x0012,0x0016, //Power control 3 PON VRH[3:0]
davidprentice	0:6f633078852b	1442	TFTLCD_DELAY,50,
davidprentice	0:6f633078852b	1443	0x0010,0x5660, //Power control 1 SAP[2:0] BT[3:0] AP[2:0] DK DSTB SLP
davidprentice	0:6f633078852b	1444	TFTLCD_DELAY,50,
davidprentice	0:6f633078852b	1445	//0x0013,0x2A4E, //Power control 4 VCOMG VDV[4:0] VCM[6:0]
davidprentice	0:6f633078852b	1446	//0x0001,0x0100, //Driver output control SM SS
davidprentice	0:6f633078852b	1447	//0x0002,0x0300, //LCD Driving Wave Control
davidprentice	0:6f633078852b	1448	//0x0003,0x1030, //Entry mode TRI DFM BGR ORG I/D[1:0] AM
davidprentice	0:6f633078852b	1449	//0x0007,0x0202, //Display Control 1 PTDE[1:0] BASEE GON DTE COL D[1:0]
davidprentice	0:6f633078852b	1450	TFTLCD_DELAY,50,
davidprentice	0:6f633078852b	1451	//0x0008,0x0202, //Display Control 2 FP[3:0] BP[3:0] front and back porch (blank period at begin and end..)
davidprentice	0:6f633078852b	1452	//0x000A,0x0000, //Test Register 1 (RA0h)
davidprentice	0:6f633078852b	1453	//Gamma adjustment
davidprentice	0:6f633078852b	1454	0x0030,0x0000,
davidprentice	0:6f633078852b	1455	0x0031,0x0402,
davidprentice	0:6f633078852b	1456	0x0032,0x0106,
davidprentice	0:6f633078852b	1457	0x0033,0x0700,
davidprentice	0:6f633078852b	1458	0x0034,0x0104,
davidprentice	0:6f633078852b	1459	0x0035,0x0301,
davidprentice	0:6f633078852b	1460	0x0036,0x0707,
davidprentice	0:6f633078852b	1461	0x0037,0x0305,
davidprentice	0:6f633078852b	1462	0x0038,0x0208,
davidprentice	0:6f633078852b	1463	0x0039,0x0F0B,
davidprentice	0:6f633078852b	1464	TFTLCD_DELAY,50,
davidprentice	0:6f633078852b	1465	//some of this stuff in range 41-93 really throws things off....
davidprentice	0:6f633078852b	1466	//0x0041,0x0002,
davidprentice	0:6f633078852b	1467	//0x0060,0x2700, //Driver Output Control (R60h)
davidprentice	0:6f633078852b	1468	//0x0061,0x0001, //Base Image Display Control (R61h)
davidprentice	0:6f633078852b	1469	//0x0090,0x0119, //Panel Interface Control 1 (R90h) DIVI[1:0] RTNI[4:0]
davidprentice	0:6f633078852b	1470	//0x0092,0x010A, //Panel Interface Control 2 (R92h) NOWI[2:0] EQI2[1:0] EQI1[1:0]
davidprentice	0:6f633078852b	1471	//0x0093,0x0004, //Panel Interface Control 3 (R93h) MCPI[2:0]
davidprentice	0:6f633078852b	1472	//0x00A0,0x0100, //Test Register 1 (RA0h)
davidprentice	0:6f633078852b	1473	TFTLCD_DELAY,50,
davidprentice	0:6f633078852b	1474	0x0007,0x0133, //Display Control 1 PTDE[1:0] BASEE GON DTE COL D[1:0]
davidprentice	0:6f633078852b	1475	TFTLCD_DELAY,50,
davidprentice	0:6f633078852b	1476	//0x00A0,0x0000, //Test Register 1 (RA0h)
davidprentice	0:6f633078852b	1477	};
davidprentice	0:6f633078852b	1478	init_table16(LGDP4532_regValues, sizeof(LGDP4532_regValues));
davidprentice	0:6f633078852b	1479	break;
davidprentice	0:6f633078852b	1480	#endif
davidprentice	0:6f633078852b	1481
davidprentice	0:6f633078852b	1482	#ifdef SUPPORT_4535
davidprentice	0:6f633078852b	1483	case 0x4535:
davidprentice	0:6f633078852b	1484	_lcd_capable = 0 \| REV_SCREEN; // \| INVERT_GS;
davidprentice	0:6f633078852b	1485	static const uint16_t LGDP4535_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1486	0x0015, 0x0030, // Set the internal vcore voltage
davidprentice	0:6f633078852b	1487	0x009A, 0x0010, // Start internal OSC
davidprentice	0:6f633078852b	1488	0x0011, 0x0020, // set SS and SM bit
davidprentice	0:6f633078852b	1489	0x0010, 0x3428, // set 1 line inversion
davidprentice	0:6f633078852b	1490	0x0012, 0x0002, // set GRAM write direction and BGR=1
davidprentice	0:6f633078852b	1491	0x0013, 0x1038, // Resize register
davidprentice	0:6f633078852b	1492	TFTLCD_DELAY, 40,
davidprentice	0:6f633078852b	1493	0x0012, 0x0012, // set the back porch and front porch
davidprentice	0:6f633078852b	1494	TFTLCD_DELAY, 40,
davidprentice	0:6f633078852b	1495	0x0010, 0x3420, // set non-display area refresh cycle ISC[3:0]
davidprentice	0:6f633078852b	1496	0x0013, 0x3045, // FMARK function
davidprentice	0:6f633078852b	1497	TFTLCD_DELAY, 70,
davidprentice	0:6f633078852b	1498	0x0030, 0x0000, // RGB interface setting
davidprentice	0:6f633078852b	1499	0x0031, 0x0402, // Frame marker Position
davidprentice	0:6f633078852b	1500	0x0032, 0x0307, // RGB interface polarity
davidprentice	0:6f633078852b	1501	0x0033, 0x0304, // SAP, BT[3:0], AP, DSTB, SLP, STB
davidprentice	0:6f633078852b	1502	0x0034, 0x0004, // DC1[2:0], DC0[2:0], VC[2:0]
davidprentice	0:6f633078852b	1503	0x0035, 0x0401, // VREG1OUT voltage
davidprentice	0:6f633078852b	1504	0x0036, 0x0707, // VDV[4:0] for VCOM amplitude
davidprentice	0:6f633078852b	1505	0x0037, 0x0305, // SAP, BT[3:0], AP, DSTB, SLP, STB
davidprentice	0:6f633078852b	1506	0x0038, 0x0610, // DC1[2:0], DC0[2:0], VC[2:0]
davidprentice	0:6f633078852b	1507	0x0039, 0x0610, // VREG1OUT voltage
davidprentice	0:6f633078852b	1508	0x0001, 0x0100, // VDV[4:0] for VCOM amplitude
davidprentice	0:6f633078852b	1509	0x0002, 0x0300, // VCM[4:0] for VCOMH
davidprentice	0:6f633078852b	1510	0x0003, 0x1030, // GRAM horizontal Address
davidprentice	0:6f633078852b	1511	0x0008, 0x0808, // GRAM Vertical Address
davidprentice	0:6f633078852b	1512	0x000A, 0x0008,
davidprentice	0:6f633078852b	1513	0x0060, 0x2700, // Gate Scan Line
davidprentice	0:6f633078852b	1514	0x0061, 0x0001, // NDL,VLE, REV
davidprentice	0:6f633078852b	1515	0x0090, 0x013E,
davidprentice	0:6f633078852b	1516	0x0092, 0x0100,
davidprentice	0:6f633078852b	1517	0x0093, 0x0100,
davidprentice	0:6f633078852b	1518	0x00A0, 0x3000,
davidprentice	0:6f633078852b	1519	0x00A3, 0x0010,
davidprentice	0:6f633078852b	1520	0x0007, 0x0001,
davidprentice	0:6f633078852b	1521	0x0007, 0x0021,
davidprentice	0:6f633078852b	1522	0x0007, 0x0023,
davidprentice	0:6f633078852b	1523	0x0007, 0x0033,
davidprentice	0:6f633078852b	1524	0x0007, 0x0133,
davidprentice	0:6f633078852b	1525	};
davidprentice	0:6f633078852b	1526	init_table16(LGDP4535_regValues, sizeof(LGDP4535_regValues));
davidprentice	0:6f633078852b	1527	break;
davidprentice	0:6f633078852b	1528	#endif
davidprentice	0:6f633078852b	1529
davidprentice	0:6f633078852b	1530	case 0x5310:
davidprentice	0:6f633078852b	1531	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| INVERT_SS \| INVERT_RGB \| READ_24BITS;
davidprentice	0:6f633078852b	1532	static const uint8_t NT35310_regValues[] PROGMEM = { //
davidprentice	0:6f633078852b	1533	TFTLCD_DELAY8, 10, //just some dummy
davidprentice	0:6f633078852b	1534	};
davidprentice	0:6f633078852b	1535	table8_ads = NT35310_regValues, table_size = sizeof(NT35310_regValues);
davidprentice	0:6f633078852b	1536	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	1537	*p16 = 480;
davidprentice	0:6f633078852b	1538	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	1539	*p16 = 320;
davidprentice	0:6f633078852b	1540	break;
davidprentice	0:6f633078852b	1541
davidprentice	0:6f633078852b	1542	#ifdef SUPPORT_68140
davidprentice	0:6f633078852b	1543	case 0x6814:
davidprentice	0:6f633078852b	1544	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS;
davidprentice	0:6f633078852b	1545	static const uint8_t RM68140_regValues_max[] PROGMEM = { //
davidprentice	0:6f633078852b	1546	0x3A, 1, 0x55, //Pixel format .kbv my Mega Shield
davidprentice	0:6f633078852b	1547	};
davidprentice	0:6f633078852b	1548	table8_ads = RM68140_regValues_max, table_size = sizeof(RM68140_regValues_max);
davidprentice	0:6f633078852b	1549	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	1550	*p16 = 480;
davidprentice	0:6f633078852b	1551	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	1552	*p16 = 320;
davidprentice	0:6f633078852b	1553	break;
davidprentice	0:6f633078852b	1554	#endif
davidprentice	0:6f633078852b	1555
davidprentice	0:6f633078852b	1556	#ifdef SUPPORT_7735
davidprentice	0:6f633078852b	1557	case 0x7735: //
davidprentice	0:6f633078852b	1558	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| REV_SCREEN \| READ_24BITS;
davidprentice	0:6f633078852b	1559	static const uint8_t PROGMEM table7735S[] = {
davidprentice	0:6f633078852b	1560	// (COMMAND_BYTE), n, data_bytes....
davidprentice	0:6f633078852b	1561	0xB1, 3, 0x01, 0x2C, 0x2D, // [05 3C 3C] FRMCTR1 if GM==11
davidprentice	0:6f633078852b	1562	0xB2, 3, 0x01, 0x2C, 0x2D, // [05 3C 3C]
davidprentice	0:6f633078852b	1563	0xB3, 6, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D, // [05 3C 3C 05 3C 3C]
davidprentice	0:6f633078852b	1564	0xB4, 1, 0x07, // [07] INVCTR Column inversion
davidprentice	0:6f633078852b	1565	//ST7735XR Power Sequence
davidprentice	0:6f633078852b	1566	0xC0, 3, 0xA2, 0x02, 0x84, // [A8 08 84] PWCTR1
davidprentice	0:6f633078852b	1567	0xC1, 1, 0xC5, // [C0]
davidprentice	0:6f633078852b	1568	0xC2, 2, 0x0A, 0x00, // [0A 00]
davidprentice	0:6f633078852b	1569	0xC3, 2, 0x8A, 0x2A, // [8A 26]
davidprentice	0:6f633078852b	1570	0xC4, 2, 0x8A, 0xEE, // [8A EE]
davidprentice	0:6f633078852b	1571	0xC5, 1, 0x0E, // [05] VMCTR1 VCOM
davidprentice	0:6f633078852b	1572	};
davidprentice	0:6f633078852b	1573	table8_ads = table7735S, table_size = sizeof(table7735S); //
davidprentice	0:6f633078852b	1574	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	1575	*p16 = 160;
davidprentice	0:6f633078852b	1576	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	1577	*p16 = 128;
davidprentice	0:6f633078852b	1578	break;
davidprentice	0:6f633078852b	1579	#endif
davidprentice	0:6f633078852b	1580
davidprentice	0:6f633078852b	1581	#ifdef SUPPORT_7781
davidprentice	0:6f633078852b	1582	case 0x7783:
davidprentice	0:6f633078852b	1583	_lcd_capable = AUTO_READINC \| REV_SCREEN \| INVERT_GS;
davidprentice	0:6f633078852b	1584	static const uint16_t ST7781_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1585	0x00FF, 0x0001, //can we do 0xFF
davidprentice	0:6f633078852b	1586	0x00F3, 0x0008,
davidprentice	0:6f633078852b	1587	// LCD_Write_COM(0x00F3,
davidprentice	0:6f633078852b	1588
davidprentice	0:6f633078852b	1589	0x00, 0x0001,
davidprentice	0:6f633078852b	1590	0x0001, 0x0100, // Driver Output Control Register (R01h)
davidprentice	0:6f633078852b	1591	0x0002, 0x0700, // LCD Driving Waveform Control (R02h)
davidprentice	0:6f633078852b	1592	0x0003, 0x1030, // Entry Mode (R03h)
davidprentice	0:6f633078852b	1593	0x0008, 0x0302,
davidprentice	0:6f633078852b	1594	0x0009, 0x0000,
davidprentice	0:6f633078852b	1595	0x0010, 0x0000, // Power Control 1 (R10h)
davidprentice	0:6f633078852b	1596	0x0011, 0x0007, // Power Control 2 (R11h)
davidprentice	0:6f633078852b	1597	0x0012, 0x0000, // Power Control 3 (R12h)
davidprentice	0:6f633078852b	1598	0x0013, 0x0000, // Power Control 4 (R13h)
davidprentice	0:6f633078852b	1599	TFTLCD_DELAY, 50,
davidprentice	0:6f633078852b	1600	0x0010, 0x14B0, // Power Control 1 SAP=1, BT=4, APE=1, AP=3
davidprentice	0:6f633078852b	1601	TFTLCD_DELAY, 10,
davidprentice	0:6f633078852b	1602	0x0011, 0x0007, // Power Control 2 VC=7
davidprentice	0:6f633078852b	1603	TFTLCD_DELAY, 10,
davidprentice	0:6f633078852b	1604	0x0012, 0x008E, // Power Control 3 VCIRE=1, VRH=14
davidprentice	0:6f633078852b	1605	0x0013, 0x0C00, // Power Control 4 VDV=12
davidprentice	0:6f633078852b	1606	0x0029, 0x0015, // NVM read data 2 VCM=21
davidprentice	0:6f633078852b	1607	TFTLCD_DELAY, 10,
davidprentice	0:6f633078852b	1608	0x0030, 0x0000, // Gamma Control 1
davidprentice	0:6f633078852b	1609	0x0031, 0x0107, // Gamma Control 2
davidprentice	0:6f633078852b	1610	0x0032, 0x0000, // Gamma Control 3
davidprentice	0:6f633078852b	1611	0x0035, 0x0203, // Gamma Control 6
davidprentice	0:6f633078852b	1612	0x0036, 0x0402, // Gamma Control 7
davidprentice	0:6f633078852b	1613	0x0037, 0x0000, // Gamma Control 8
davidprentice	0:6f633078852b	1614	0x0038, 0x0207, // Gamma Control 9
davidprentice	0:6f633078852b	1615	0x0039, 0x0000, // Gamma Control 10
davidprentice	0:6f633078852b	1616	0x003C, 0x0203, // Gamma Control 13
davidprentice	0:6f633078852b	1617	0x003D, 0x0403, // Gamma Control 14
davidprentice	0:6f633078852b	1618	0x0060, 0xA700, // Driver Output Control (R60h) .kbv was 0xa700
davidprentice	0:6f633078852b	1619	0x0061, 0x0001, // Driver Output Control (R61h)
davidprentice	0:6f633078852b	1620	0x0090, 0X0029, // Panel Interface Control 1 (R90h)
davidprentice	0:6f633078852b	1621
davidprentice	0:6f633078852b	1622	// Display On
davidprentice	0:6f633078852b	1623	0x0007, 0x0133, // Display Control (R07h)
davidprentice	0:6f633078852b	1624	TFTLCD_DELAY, 50,
davidprentice	0:6f633078852b	1625	};
davidprentice	0:6f633078852b	1626	static const uint16_t ST7781_regValues_CPT24[] PROGMEM = {
davidprentice	0:6f633078852b	1627	0x0001, 0x0100, // Driver Output Control Register (R01h)
davidprentice	0:6f633078852b	1628	0x0002, 0x0700, // LCD Driving Waveform Control (R02h)
davidprentice	0:6f633078852b	1629	0x0003, 0x1030, // Entry Mode (R03h)
davidprentice	0:6f633078852b	1630	0x0008, 0x0302, // Porch
davidprentice	0:6f633078852b	1631	0x0009, 0x0000, // Scan
davidprentice	0:6f633078852b	1632	0x000A, 0x0008, // Fmark Off
davidprentice	0:6f633078852b	1633	0x0010, 0x0000, // Power Control 1 (R10h)
davidprentice	0:6f633078852b	1634	0x0011, 0x0005, // Power Control 2 (R11h)
davidprentice	0:6f633078852b	1635	0x0012, 0x0000, // Power Control 3 (R12h)
davidprentice	0:6f633078852b	1636	0x0013, 0x0000, // Power Control 4 (R13h)
davidprentice	0:6f633078852b	1637	TFTLCD_DELAY, 100,
davidprentice	0:6f633078852b	1638	0x0010, 0x12B0, // Power Control 1 SAP=1, BT=2, APE=1, AP=3
davidprentice	0:6f633078852b	1639	TFTLCD_DELAY, 50,
davidprentice	0:6f633078852b	1640	0x0011, 0x0007, // Power Control 2 VC=7
davidprentice	0:6f633078852b	1641	TFTLCD_DELAY, 50,
davidprentice	0:6f633078852b	1642	0x0012, 0x008C, // Power Control 3 VCIRE=1, VRH=12
davidprentice	0:6f633078852b	1643	0x0013, 0x1700, // Power Control 4 VDV=23
davidprentice	0:6f633078852b	1644	0x0029, 0x0020, // NVM read data 2 VCM=32
davidprentice	0:6f633078852b	1645	TFTLCD_DELAY, 50,
davidprentice	0:6f633078852b	1646	0x0030, 0x0000, // Gamma Control 1 App Note CPT 2.4
davidprentice	0:6f633078852b	1647	0x0031, 0x0106, // Gamma Control 2
davidprentice	0:6f633078852b	1648	0x0032, 0x0101, // Gamma Control 3
davidprentice	0:6f633078852b	1649	0x0035, 0x0106, // Gamma Control 4
davidprentice	0:6f633078852b	1650	0x0036, 0x0203, // Gamma Control 5
davidprentice	0:6f633078852b	1651	0x0037, 0x0000, // Gamma Control 6
davidprentice	0:6f633078852b	1652	0x0038, 0x0707, // Gamma Control 7
davidprentice	0:6f633078852b	1653	0x0039, 0x0204, // Gamma Control 8
davidprentice	0:6f633078852b	1654	0x003C, 0x0106, // Gamma Control 9
davidprentice	0:6f633078852b	1655	0x003D, 0x0103, // Gamma Control 10
davidprentice	0:6f633078852b	1656	0x0060, 0xA700, // Driver Output Control (R60h) .kbv was 0xa700
davidprentice	0:6f633078852b	1657	0x0061, 0x0001, // Driver Output Control (R61h)
davidprentice	0:6f633078852b	1658	0x0090, 0X0030, // Panel Interface Control 1 (R90h)
davidprentice	0:6f633078852b	1659
davidprentice	0:6f633078852b	1660	// Display On
davidprentice	0:6f633078852b	1661	0x0007, 0x0133, // Display Control (R07h)
davidprentice	0:6f633078852b	1662	TFTLCD_DELAY, 50,
davidprentice	0:6f633078852b	1663	};
davidprentice	0:6f633078852b	1664	init_table16(ST7781_regValues_CPT24, sizeof(ST7781_regValues_CPT24));
davidprentice	0:6f633078852b	1665	//init_table16(ST7781_regValues, sizeof(ST7781_regValues));
davidprentice	0:6f633078852b	1666	break;
davidprentice	0:6f633078852b	1667	#endif
davidprentice	0:6f633078852b	1668
davidprentice	0:6f633078852b	1669	case 0x7789:
davidprentice	0:6f633078852b	1670	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS;
davidprentice	0:6f633078852b	1671	static const uint8_t ST7789_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1672	(0xB2), 5, 0x0C, 0x0C, 0x00, 0x33, 0x33, //PORCTRK: Porch setting [08 08 00 22 22] PSEN=0 anyway
davidprentice	0:6f633078852b	1673	(0xB7), 1, 0x35, //GCTRL: Gate Control [35]
davidprentice	0:6f633078852b	1674	(0xBB), 1, 0x2B, //VCOMS: VCOM setting VCOM=1.175 [20] VCOM=0.9
davidprentice	0:6f633078852b	1675	(0xC0), 1, 0x04, //LCMCTRL: LCM Control [2C]
davidprentice	0:6f633078852b	1676	(0xC2), 2, 0x01, 0xFF, //VDVVRHEN: VDV and VRH Command Enable [01 FF]
davidprentice	0:6f633078852b	1677	(0xC3), 1, 0x11, //VRHS: VRH Set VAP=4.4, VAN=-4.4 [0B]
davidprentice	0:6f633078852b	1678	(0xC4), 1, 0x20, //VDVS: VDV Set [20]
davidprentice	0:6f633078852b	1679	(0xC6), 1, 0x0F, //FRCTRL2: Frame Rate control in normal mode [0F]
davidprentice	0:6f633078852b	1680	(0xD0), 2, 0xA4, 0xA1, //PWCTRL1: Power Control 1 [A4 A1]
davidprentice	0:6f633078852b	1681	(0xE0), 14, 0xD0, 0x00, 0x05, 0x0E, 0x15, 0x0D, 0x37, 0x43, 0x47, 0x09, 0x15, 0x12, 0x16, 0x19, //PVGAMCTRL: Positive Voltage Gamma control
davidprentice	0:6f633078852b	1682	(0xE1), 14, 0xD0, 0x00, 0x05, 0x0D, 0x0C, 0x06, 0x2D, 0x44, 0x40, 0x0E, 0x1C, 0x18, 0x16, 0x19, //NVGAMCTRL: Negative Voltage Gamma control
davidprentice	0:6f633078852b	1683	};
davidprentice	0:6f633078852b	1684	static const uint8_t ST7789_regValues_arcain6[] PROGMEM = {
davidprentice	0:6f633078852b	1685	(0xB2), 5, 0x0C, 0x0C, 0x00, 0x33, 0x33, //PORCTRK: Porch setting [08 08 00 22 22] PSEN=0 anyway
davidprentice	0:6f633078852b	1686	(0xB7), 1, 0x35, //GCTRL: Gate Control [35]
davidprentice	0:6f633078852b	1687	(0xBB), 1, 0x35, //VCOMS: VCOM setting VCOM=??? [20] VCOM=0.9
davidprentice	0:6f633078852b	1688	(0xC0), 1, 0x2C, //LCMCTRL: LCM Control [2C]
davidprentice	0:6f633078852b	1689	(0xC2), 2, 0x01, 0xFF, //VDVVRHEN: VDV and VRH Command Enable [01 FF]
davidprentice	0:6f633078852b	1690	(0xC3), 1, 0x13, //VRHS: VRH Set VAP=???, VAN=-??? [0B]
davidprentice	0:6f633078852b	1691	(0xC4), 1, 0x20, //VDVS: VDV Set [20]
davidprentice	0:6f633078852b	1692	(0xC6), 1, 0x0F, //FRCTRL2: Frame Rate control in normal mode [0F]
davidprentice	0:6f633078852b	1693	(0xCA), 1, 0x0F, //REGSEL2 [0F]
davidprentice	0:6f633078852b	1694	(0xC8), 1, 0x08, //REGSEL1 [08]
davidprentice	0:6f633078852b	1695	(0x55), 1, 0x90, //WRCACE [00]
davidprentice	0:6f633078852b	1696	(0xD0), 2, 0xA4, 0xA1, //PWCTRL1: Power Control 1 [A4 A1]
davidprentice	0:6f633078852b	1697	(0xE0), 14, 0xD0, 0x00, 0x06, 0x09, 0x0B, 0x2A, 0x3C, 0x55, 0x4B, 0x08, 0x16, 0x14, 0x19, 0x20, //PVGAMCTRL: Positive Voltage Gamma control
davidprentice	0:6f633078852b	1698	(0xE1), 14, 0xD0, 0x00, 0x06, 0x09, 0x0B, 0x29, 0x36, 0x54, 0x4B, 0x0D, 0x16, 0x14, 0x21, 0x20, //NVGAMCTRL: Negative Voltage Gamma control
davidprentice	0:6f633078852b	1699	};
davidprentice	0:6f633078852b	1700	table8_ads = ST7789_regValues, table_size = sizeof(ST7789_regValues); //
davidprentice	0:6f633078852b	1701	break;
davidprentice	0:6f633078852b	1702
davidprentice	0:6f633078852b	1703	case 0x8031: //Unknown BangGood thanks PrinceCharles
davidprentice	0:6f633078852b	1704	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS \| REV_SCREEN;
davidprentice	0:6f633078852b	1705	static const uint8_t FK8031_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1706	// 0xF2:8.2 = SM, 0xF2:8.0 = REV. invertDisplay(), vertScroll() do not work
davidprentice	0:6f633078852b	1707	0xF2,11, 0x16, 0x16, 0x03, 0x08, 0x08, 0x08, 0x08, 0x10, 0x04, 0x16, 0x16, // f.k. 0xF2:8.2 SM=1
davidprentice	0:6f633078852b	1708	0xFD, 3, 0x11, 0x02, 0x35, //f.k 0xFD:1.1 creates contiguous scan lins
davidprentice	0:6f633078852b	1709	};
davidprentice	0:6f633078852b	1710	table8_ads = FK8031_regValues, table_size = sizeof(FK8031_regValues);
davidprentice	0:6f633078852b	1711	break;
davidprentice	0:6f633078852b	1712
davidprentice	0:6f633078852b	1713	#ifdef SUPPORT_8347D
davidprentice	0:6f633078852b	1714	case 0x4747: //HX8347-D
davidprentice	0:6f633078852b	1715	_lcd_capable = REV_SCREEN \| MIPI_DCS_REV1 \| MV_AXIS \| INVERT_SS \| AUTO_READINC \| READ_24BITS;
davidprentice	0:6f633078852b	1716	goto common_8347DGI;
davidprentice	0:6f633078852b	1717	case 0x6767: //HX8367-A
davidprentice	0:6f633078852b	1718	case 0x7575: //HX8347-G
davidprentice	0:6f633078852b	1719	case 0x9595: //HX8347-I
davidprentice	0:6f633078852b	1720	_lcd_capable = REV_SCREEN \| MIPI_DCS_REV1 \| MV_AXIS;
davidprentice	0:6f633078852b	1721	common_8347DGI:
davidprentice	0:6f633078852b	1722	is8347 = 1;
davidprentice	0:6f633078852b	1723	static const uint8_t HX8347G_2_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1724	0xEA, 2, 0x00, 0x20, //PTBA[15:0]
davidprentice	0:6f633078852b	1725	0xEC, 2, 0x0C, 0xC4, //STBA[15:0]
davidprentice	0:6f633078852b	1726	0xE8, 1, 0x38, //OPON[7:0]
davidprentice	0:6f633078852b	1727	0xE9, 1, 0x10, //OPON1[7:0]
davidprentice	0:6f633078852b	1728	0xF1, 1, 0x01, //OTPS1B
davidprentice	0:6f633078852b	1729	0xF2, 1, 0x10, //GEN
davidprentice	0:6f633078852b	1730	//Gamma 2.2 Setting
davidprentice	0:6f633078852b	1731	0x40, 13, 0x01, 0x00, 0x00, 0x10, 0x0E, 0x24, 0x04, 0x50, 0x02, 0x13, 0x19, 0x19, 0x16,
davidprentice	0:6f633078852b	1732	0x50, 14, 0x1B, 0x31, 0x2F, 0x3F, 0x3F, 0x3E, 0x2F, 0x7B, 0x09, 0x06, 0x06, 0x0C, 0x1D, 0xCC,
davidprentice	0:6f633078852b	1733	//Power Voltage Setting
davidprentice	0:6f633078852b	1734	0x1B, 1, 0x1B, //VRH=4.65V
davidprentice	0:6f633078852b	1735	0x1A, 1, 0x01, //BT (VGH~15V,VGL~-10V,DDVDH~5V)
davidprentice	0:6f633078852b	1736	0x24, 1, 0x2F, //VMH(VCOM High voltage ~3.2V)
davidprentice	0:6f633078852b	1737	0x25, 1, 0x57, //VML(VCOM Low voltage -1.2V)
davidprentice	0:6f633078852b	1738	//**VCOM offset///
davidprentice	0:6f633078852b	1739	0x23, 1, 0x88, //for Flicker adjust //can reload from OTP
davidprentice	0:6f633078852b	1740	//Power on Setting
davidprentice	0:6f633078852b	1741	0x18, 1, 0x34, //I/P_RADJ,N/P_RADJ, Normal mode 60Hz
davidprentice	0:6f633078852b	1742	0x19, 1, 0x01, //OSC_EN='1', start Osc
davidprentice	0:6f633078852b	1743	0x01, 1, 0x00, //DP_STB='0', out deep sleep
davidprentice	0:6f633078852b	1744	0x1F, 1, 0x88, // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0
davidprentice	0:6f633078852b	1745	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	1746	0x1F, 1, 0x80, // GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0
davidprentice	0:6f633078852b	1747	TFTLCD_DELAY8, 3,
davidprentice	0:6f633078852b	1748	0x1F, 1, 0x90, // GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0
davidprentice	0:6f633078852b	1749	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	1750	0x1F, 1, 0xD0, // GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0
davidprentice	0:6f633078852b	1751	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	1752	//262k/65k color selection
davidprentice	0:6f633078852b	1753	0x17, 1, 0x05, //default 0x06 262k color // 0x05 65k color
davidprentice	0:6f633078852b	1754	//SET PANEL
davidprentice	0:6f633078852b	1755	0x36, 1, 0x00, //SS_P, GS_P,REV_P,BGR_P
davidprentice	0:6f633078852b	1756	//Display ON Setting
davidprentice	0:6f633078852b	1757	0x28, 1, 0x38, //GON=1, DTE=1, D=1000
davidprentice	0:6f633078852b	1758	TFTLCD_DELAY8, 40,
davidprentice	0:6f633078852b	1759	0x28, 1, 0x3F, //GON=1, DTE=1, D=1100
davidprentice	0:6f633078852b	1760
davidprentice	0:6f633078852b	1761	0x16, 1, 0x18,
davidprentice	0:6f633078852b	1762	};
davidprentice	0:6f633078852b	1763	init_table(HX8347G_2_regValues, sizeof(HX8347G_2_regValues));
davidprentice	0:6f633078852b	1764	break;
davidprentice	0:6f633078852b	1765	#endif
davidprentice	0:6f633078852b	1766
davidprentice	0:6f633078852b	1767	#ifdef SUPPORT_8352A
davidprentice	0:6f633078852b	1768	case 0x5252: //HX8352-A
davidprentice	0:6f633078852b	1769	_lcd_capable = MIPI_DCS_REV1 \| MV_AXIS;
davidprentice	0:6f633078852b	1770	is8347 = 1;
davidprentice	0:6f633078852b	1771	static const uint8_t HX8352A_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1772	0x83, 1, 0x02, //Test Mode: TESTM=1
davidprentice	0:6f633078852b	1773	0x85, 1, 0x03, //VDD ctl : VDC_SEL=3 [05]
davidprentice	0:6f633078852b	1774	0x8B, 1, 0x01, //VGS_RES 1: RES_VGS1=1
davidprentice	0:6f633078852b	1775	0x8C, 1, 0x93, //VGS_RES 2: RES_VGS2=1, anon=0x13 [93]
davidprentice	0:6f633078852b	1776	0x91, 1, 0x01, //PWM control: SYNC=1
davidprentice	0:6f633078852b	1777	0x83, 1, 0x00, //Test Mode: TESTM=0
davidprentice	0:6f633078852b	1778	//Gamma Setting
davidprentice	0:6f633078852b	1779	0x3E, 12, 0xB0, 0x03, 0x10, 0x56, 0x13, 0x46, 0x23, 0x76, 0x00, 0x5E, 0x4F, 0x40,
davidprentice	0:6f633078852b	1780	//Power Voltage Setting
davidprentice	0:6f633078852b	1781	0x17, 1, 0x91, //OSC 1: RADJ=9, OSC_EN=1 [F0]
davidprentice	0:6f633078852b	1782	0x2B, 1, 0xF9, //Cycle 1: N_DC=F9 [BE]
davidprentice	0:6f633078852b	1783	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1784	0x1B, 1, 0x14, //Power 3: BT=1, ??=1, AP=0 [42]
davidprentice	0:6f633078852b	1785	0x1A, 1, 0x11, //Power 2: VC3=1, VC1=1 [05]
davidprentice	0:6f633078852b	1786	0x1C, 1, 0x06, //Power 4: VRH=6 [0D]
davidprentice	0:6f633078852b	1787	0x1F, 1, 0x42, //VCOM : VCM=42 [55]
davidprentice	0:6f633078852b	1788	TFTLCD_DELAY8, 20,
davidprentice	0:6f633078852b	1789	0x19, 1, 0x0A, //Power 1: DK=1, VL_TR1=1 [09]
davidprentice	0:6f633078852b	1790	0x19, 1, 0x1A, //Power 1: PON=1, DK=1, VL_TR1=1 [09]
davidprentice	0:6f633078852b	1791	TFTLCD_DELAY8, 40,
davidprentice	0:6f633078852b	1792	0x19, 1, 0x12, //Power 1: PON=1, DK=1, STB=1 [09]
davidprentice	0:6f633078852b	1793	TFTLCD_DELAY8, 40,
davidprentice	0:6f633078852b	1794	0x1E, 1, 0x27, //Power 6: VCOMG=1, VDV=7 [10]
davidprentice	0:6f633078852b	1795	TFTLCD_DELAY8, 100,
davidprentice	0:6f633078852b	1796	//Display ON Setting
davidprentice	0:6f633078852b	1797	0x24, 1, 0x60, //Display 2: PT=1, GON=1 [A0]
davidprentice	0:6f633078852b	1798	0x3D, 1, 0x40, //Source 1: N_SAP=40 [C0]
davidprentice	0:6f633078852b	1799	0x34, 1, 0x38, //Cycle 10: EQS=0x38 [38]
davidprentice	0:6f633078852b	1800	0x35, 1, 0x38, //Cycle 11: EQP=0x38 [38]
davidprentice	0:6f633078852b	1801	0x24, 1, 0x38, //Display 2: GON=1 D=2 [A0]
davidprentice	0:6f633078852b	1802	TFTLCD_DELAY8, 40,
davidprentice	0:6f633078852b	1803	0x24, 1, 0x3C, //Display 2: GON=1 D=3 [A0]
davidprentice	0:6f633078852b	1804	0x16, 1, 0x1C, //Memaccess: GS=1, BGR=1, SS=1
davidprentice	0:6f633078852b	1805	0x01, 1, 0x06, //Disp Mode: INVON=1, NORON=1 [02]
davidprentice	0:6f633078852b	1806	0x55, 1, 0x06, //SM_PANEL=0, SS_PANEL=0, GS_PANEL=1, REV_PANEL=1, BGR_PANEL=0
davidprentice	0:6f633078852b	1807	};
davidprentice	0:6f633078852b	1808	init_table(HX8352A_regValues, sizeof(HX8352A_regValues));
davidprentice	0:6f633078852b	1809	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	1810	*p16 = 400;
davidprentice	0:6f633078852b	1811	break;
davidprentice	0:6f633078852b	1812	#endif
davidprentice	0:6f633078852b	1813
davidprentice	0:6f633078852b	1814	#ifdef SUPPORT_8352B
davidprentice	0:6f633078852b	1815	case 0x0065: //HX8352-B
davidprentice	0:6f633078852b	1816	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS \| REV_SCREEN;
davidprentice	0:6f633078852b	1817	is8347 = 1;
davidprentice	0:6f633078852b	1818	static const uint8_t HX8352B_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1819	// Register setting for EQ setting
davidprentice	0:6f633078852b	1820	0xe5, 1, 0x10, //
davidprentice	0:6f633078852b	1821	0xe7, 1, 0x10, //
davidprentice	0:6f633078852b	1822	0xe8, 1, 0x48, //
davidprentice	0:6f633078852b	1823	0xec, 1, 0x09, //
davidprentice	0:6f633078852b	1824	0xed, 1, 0x6c, //
davidprentice	0:6f633078852b	1825	// Power on Setting
davidprentice	0:6f633078852b	1826	0x23, 1, 0x6F, //VMF
davidprentice	0:6f633078852b	1827	0x24, 1, 0x57, //VMH
davidprentice	0:6f633078852b	1828	0x25, 1, 0x71, //VML
davidprentice	0:6f633078852b	1829	0xE2, 1, 0x18, //
davidprentice	0:6f633078852b	1830	0x1B, 1, 0x15, //VRH
davidprentice	0:6f633078852b	1831	0x01, 1, 0x00, //
davidprentice	0:6f633078852b	1832	0x1C, 1, 0x03, //AP=3
davidprentice	0:6f633078852b	1833	// Power on sequence
davidprentice	0:6f633078852b	1834	0x19, 1, 0x01, //OSCEN=1
davidprentice	0:6f633078852b	1835	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	1836	0x1F, 1, 0x8C, //GASEN=1, DK=1, XDK=1
davidprentice	0:6f633078852b	1837	0x1F, 1, 0x84, //GASEN=1, XDK=1
davidprentice	0:6f633078852b	1838	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1839	0x1F, 1, 0x94, //GASEN=1, PON=1, XDK=1
davidprentice	0:6f633078852b	1840	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1841	0x1F, 1, 0xD4, //GASEN=1, VCOMG=1, PON=1, XDK=1
davidprentice	0:6f633078852b	1842	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	1843	// Gamma Setting
davidprentice	0:6f633078852b	1844	0x40, 13, 0x00, 0x2B, 0x29, 0x3E, 0x3D, 0x3F, 0x24, 0x74, 0x08, 0x06, 0x07, 0x0D, 0x17,
davidprentice	0:6f633078852b	1845	0x50, 13, 0x00, 0x02, 0x01, 0x16, 0x14, 0x3F, 0x0B, 0x5B, 0x08, 0x12, 0x18, 0x19, 0x17,
davidprentice	0:6f633078852b	1846	0x5D, 1, 0xFF, //
davidprentice	0:6f633078852b	1847
davidprentice	0:6f633078852b	1848	0x16, 1, 0x08, //MemoryAccess BGR=1
davidprentice	0:6f633078852b	1849	0x28, 1, 0x20, //GON=1
davidprentice	0:6f633078852b	1850	TFTLCD_DELAY8, 40,
davidprentice	0:6f633078852b	1851	0x28, 1, 0x38, //GON=1, DTE=1, D=2
davidprentice	0:6f633078852b	1852	TFTLCD_DELAY8, 40,
davidprentice	0:6f633078852b	1853	0x28, 1, 0x3C, //GON=1, DTE=1, D=3
davidprentice	0:6f633078852b	1854
davidprentice	0:6f633078852b	1855	0x02, 2, 0x00, 0x00, //SC
davidprentice	0:6f633078852b	1856	0x04, 2, 0x00, 0xEF, //EC
davidprentice	0:6f633078852b	1857	0x06, 2, 0x00, 0x00, //SP
davidprentice	0:6f633078852b	1858	0x08, 2, 0x01, 0x8F, //EP
davidprentice	0:6f633078852b	1859
davidprentice	0:6f633078852b	1860	0x80, 2, 0x00, 0x00, //CAC
davidprentice	0:6f633078852b	1861	0x82, 2, 0x00, 0x00, //RAC
davidprentice	0:6f633078852b	1862	0x17, 1, 0x05, //COLMOD = 565
davidprentice	0:6f633078852b	1863
davidprentice	0:6f633078852b	1864	};
davidprentice	0:6f633078852b	1865	init_table(HX8352B_regValues, sizeof(HX8352B_regValues));
davidprentice	0:6f633078852b	1866	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	1867	*p16 = 400;
davidprentice	0:6f633078852b	1868	break;
davidprentice	0:6f633078852b	1869	#endif
davidprentice	0:6f633078852b	1870
davidprentice	0:6f633078852b	1871	#ifdef SUPPORT_8347A
davidprentice	0:6f633078852b	1872	case 0x8347:
davidprentice	0:6f633078852b	1873	_lcd_capable = REV_SCREEN \| MIPI_DCS_REV1 \| MV_AXIS;
davidprentice	0:6f633078852b	1874	// AN.01 The reference setting of CMO 3.2” Panel
davidprentice	0:6f633078852b	1875	static const uint8_t HX8347A_CMO32_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1876	// VENDOR Gamma for 3.2"
davidprentice	0:6f633078852b	1877	(0x46), 12, 0xA4, 0x53, 0x00, 0x44, 0x04, 0x67, 0x33, 0x77, 0x12, 0x4C, 0x46, 0x44,
davidprentice	0:6f633078852b	1878	// Display Setting
davidprentice	0:6f633078852b	1879	(0x01), 1, 0x06, // IDMON=0, INVON=1, NORON=1, PTLON=0
davidprentice	0:6f633078852b	1880	(0x16), 1, 0x48, // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0
davidprentice	0:6f633078852b	1881	(0x23), 3, 0x95, 0x95, 0xFF, // N_DC=1001 0101, PI_DC=1001 0101, I_DC=1111 1111
davidprentice	0:6f633078852b	1882
davidprentice	0:6f633078852b	1883	(0x27), 4, 0x02, 0x02, 0x02, 0x02, // N_BP=2, N_FP=2, PI_BP=2, PI_FP=2
davidprentice	0:6f633078852b	1884	(0x2C), 2, 0x02, 0x02, // I_BP=2, I_FP=2
davidprentice	0:6f633078852b	1885
davidprentice	0:6f633078852b	1886	(0x3a), 4, 0x01, 0x01, 0xF0, 0x00, // N_RTN=0, N_NW=1, P_RTN=0, P_NW=1, I_RTN=15, I_NW=0, DIV=0
davidprentice	0:6f633078852b	1887	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	1888	(0x35), 2, 0x38, 0x78, // EQS=38h, EQP=78h
davidprentice	0:6f633078852b	1889	(0x3E), 1, 0x38, // SON=38h
davidprentice	0:6f633078852b	1890	(0x40), 2, 0x0F, 0xF0, // GDON=0Fh, GDOFF
davidprentice	0:6f633078852b	1891	// Power Supply Setting
davidprentice	0:6f633078852b	1892	(0x19), 1, 0x49, // CADJ=0100, CUADJ=100, OSD_EN=1 ,60Hz
davidprentice	0:6f633078852b	1893	(0x93), 1, 0x0F, // RADJ=1111, 100%
davidprentice	0:6f633078852b	1894	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	1895	(0x20), 1, 0x40, // BT=0100
davidprentice	0:6f633078852b	1896	(0x1D), 3, 0x07, 0x00, 0x04, // VC1=7, VC3=0, VRH=??
davidprentice	0:6f633078852b	1897	//VCOM SETTING for 3.2"
davidprentice	0:6f633078852b	1898	(0x44), 2, 0x4D, 0x11, // VCM=100 1101, VDV=1 0001
davidprentice	0:6f633078852b	1899	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1900	(0x1C), 1, 0x04, // AP=100
davidprentice	0:6f633078852b	1901	TFTLCD_DELAY8, 20,
davidprentice	0:6f633078852b	1902	(0x1B), 1, 0x18, // GASENB=0, PON=0, DK=1, XDK=0, VLCD_TRI=0, STB=0
davidprentice	0:6f633078852b	1903	TFTLCD_DELAY8, 40,
davidprentice	0:6f633078852b	1904	(0x1B), 1, 0x10, // GASENB=0, PON=1, DK=0, XDK=0, VLCD_TRI=0, STB=0
davidprentice	0:6f633078852b	1905	TFTLCD_DELAY8, 40,
davidprentice	0:6f633078852b	1906	(0x43), 1, 0x80, //set VCOMG=1
davidprentice	0:6f633078852b	1907	TFTLCD_DELAY8, 100,
davidprentice	0:6f633078852b	1908	// Display ON Setting
davidprentice	0:6f633078852b	1909	(0x90), 1, 0x7F, // SAP=0111 1111
davidprentice	0:6f633078852b	1910	(0x26), 1, 0x04, //GON=0, DTE=0, D=01
davidprentice	0:6f633078852b	1911	TFTLCD_DELAY8, 40,
davidprentice	0:6f633078852b	1912	(0x26), 1, 0x24, //GON=1, DTE=0, D=01
davidprentice	0:6f633078852b	1913	(0x26), 1, 0x2C, //GON=1, DTE=0, D=11
davidprentice	0:6f633078852b	1914	TFTLCD_DELAY8, 40,
davidprentice	0:6f633078852b	1915	(0x26), 1, 0x3C, //GON=1, DTE=1, D=11
davidprentice	0:6f633078852b	1916	// INTERNAL REGISTER SETTING
davidprentice	0:6f633078852b	1917	(0x57), 1, 0x02, // TEST_Mode=1: into TEST mode
davidprentice	0:6f633078852b	1918	(0x55), 1, 0x00, // VDC_SEL=000, VDDD=1.95V
davidprentice	0:6f633078852b	1919	(0xFE), 1, 0x5A, // For ESD protection
davidprentice	0:6f633078852b	1920	(0x57), 1, 0x00, // TEST_Mode=0: exit TEST mode
davidprentice	0:6f633078852b	1921	};
davidprentice	0:6f633078852b	1922	// AN.01 The reference setting of CMO 2.4” Panel
davidprentice	0:6f633078852b	1923	static const uint8_t HX8347A_CMO24_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1924	// VENDOR Gamma for 2.4"
davidprentice	0:6f633078852b	1925	(0x46), 12, 0x94, 0x41, 0x00, 0x33, 0x23, 0x45, 0x44, 0x77, 0x12, 0xCC, 0x46, 0x82,
davidprentice	0:6f633078852b	1926	// Display Setting
davidprentice	0:6f633078852b	1927	(0x01), 1, 0x06, // IDMON=0, INVON=1, NORON=1, PTLON=0
davidprentice	0:6f633078852b	1928	(0x16), 1, 0x48, // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0
davidprentice	0:6f633078852b	1929	(0x23), 3, 0x95, 0x95, 0xFF, // N_DC=1001 0101, PI_DC=1001 0101, I_DC=1111 1111
davidprentice	0:6f633078852b	1930
davidprentice	0:6f633078852b	1931	(0x27), 4, 0x02, 0x02, 0x02, 0x02, // N_BP=2, N_FP=2, PI_BP=2, PI_FP=2
davidprentice	0:6f633078852b	1932	(0x2C), 2, 0x02, 0x02, // I_BP=2, I_FP=2
davidprentice	0:6f633078852b	1933
davidprentice	0:6f633078852b	1934	(0x3a), 4, 0x01, 0x01, 0xF0, 0x00, // N_RTN=0, N_NW=1, P_RTN=0, P_NW=1, I_RTN=15, I_NW=0, DIV=0
davidprentice	0:6f633078852b	1935	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	1936	(0x35), 2, 0x38, 0x78, // EQS=38h, EQP=78h
davidprentice	0:6f633078852b	1937	(0x3E), 1, 0x38, // SON=38h
davidprentice	0:6f633078852b	1938	(0x40), 2, 0x0F, 0xF0, // GDON=0Fh, GDOFF
davidprentice	0:6f633078852b	1939	// Power Supply Setting
davidprentice	0:6f633078852b	1940	(0x19), 1, 0x49, // CADJ=0100, CUADJ=100, OSD_EN=1 ,60Hz
davidprentice	0:6f633078852b	1941	(0x93), 1, 0x0F, // RADJ=1111, 100%
davidprentice	0:6f633078852b	1942	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	1943	(0x20), 1, 0x40, // BT=0100
davidprentice	0:6f633078852b	1944	(0x1D), 3, 0x07, 0x00, 0x04, // VC1=7, VC3=0, VRH=??
davidprentice	0:6f633078852b	1945	//VCOM SETTING for 2.4"
davidprentice	0:6f633078852b	1946	(0x44), 2, 0x40, 0x12, // VCM=100 0000, VDV=1 0001
davidprentice	0:6f633078852b	1947	TFTLCD_DELAY8, 10,
davidprentice	0:6f633078852b	1948	(0x1C), 1, 0x04, // AP=100
davidprentice	0:6f633078852b	1949	TFTLCD_DELAY8, 20,
davidprentice	0:6f633078852b	1950	(0x1B), 1, 0x18, // GASENB=0, PON=0, DK=1, XDK=0, VLCD_TRI=0, STB=0
davidprentice	0:6f633078852b	1951	TFTLCD_DELAY8, 40,
davidprentice	0:6f633078852b	1952	(0x1B), 1, 0x10, // GASENB=0, PON=1, DK=0, XDK=0, VLCD_TRI=0, STB=0
davidprentice	0:6f633078852b	1953	TFTLCD_DELAY8, 40,
davidprentice	0:6f633078852b	1954	(0x43), 1, 0x80, //set VCOMG=1
davidprentice	0:6f633078852b	1955	TFTLCD_DELAY8, 100,
davidprentice	0:6f633078852b	1956	// Display ON Setting
davidprentice	0:6f633078852b	1957	(0x90), 1, 0x7F, // SAP=0111 1111
davidprentice	0:6f633078852b	1958	(0x26), 1, 0x04, //GON=0, DTE=0, D=01
davidprentice	0:6f633078852b	1959	TFTLCD_DELAY8, 40,
davidprentice	0:6f633078852b	1960	(0x26), 1, 0x24, //GON=1, DTE=0, D=01
davidprentice	0:6f633078852b	1961	(0x26), 1, 0x2C, //GON=1, DTE=0, D=11
davidprentice	0:6f633078852b	1962	TFTLCD_DELAY8, 40,
davidprentice	0:6f633078852b	1963	(0x26), 1, 0x3C, //GON=1, DTE=1, D=11
davidprentice	0:6f633078852b	1964	// INTERNAL REGISTER SETTING
davidprentice	0:6f633078852b	1965	(0x57), 1, 0x02, // TEST_Mode=1: into TEST mode
davidprentice	0:6f633078852b	1966	(0x55), 1, 0x00, // VDC_SEL=000, VDDD=1.95V
davidprentice	0:6f633078852b	1967	(0xFE), 1, 0x5A, // For ESD protection
davidprentice	0:6f633078852b	1968	(0x57), 1, 0x00, // TEST_Mode=0: exit TEST mode
davidprentice	0:6f633078852b	1969	};
davidprentice	0:6f633078852b	1970	static const uint8_t HX8347A_ITDB02_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	1971	// VENDOR Gamma ITDB02 same as CMO32. Delays are shorter than AN01
davidprentice	0:6f633078852b	1972	(0x46), 12, 0xA4, 0x53, 0x00, 0x44, 0x04, 0x67, 0x33, 0x77, 0x12, 0x4C, 0x46, 0x44,
davidprentice	0:6f633078852b	1973	// Display Setting
davidprentice	0:6f633078852b	1974	(0x01), 1, 0x06, // IDMON=0, INVON=1, NORON=1, PTLON=0
davidprentice	0:6f633078852b	1975	(0x16), 1, 0xC8, // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0 .itead
davidprentice	0:6f633078852b	1976	(0x23), 3, 0x95, 0x95, 0xFF, // N_DC=1001 0101, PI_DC=1001 0101, I_DC=1111 1111
davidprentice	0:6f633078852b	1977
davidprentice	0:6f633078852b	1978	(0x27), 4, 0x02, 0x02, 0x02, 0x02, // N_BP=2, N_FP=2, PI_BP=2, PI_FP=2
davidprentice	0:6f633078852b	1979	(0x2C), 2, 0x02, 0x02, // I_BP=2, I_FP=2
davidprentice	0:6f633078852b	1980
davidprentice	0:6f633078852b	1981	(0x3a), 4, 0x01, 0x00, 0xF0, 0x00, // N_RTN=0, N_NW=1, P_RTN=0, ?? P_NW=1, I_RTN=15, I_NW=0, DIV=0 .itead
davidprentice	0:6f633078852b	1982	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	1983	(0x35), 2, 0x38, 0x78, // EQS=38h, EQP=78h
davidprentice	0:6f633078852b	1984	(0x3E), 1, 0x38, // SON=38h
davidprentice	0:6f633078852b	1985	(0x40), 2, 0x0F, 0xF0, // GDON=0Fh, GDOFF
davidprentice	0:6f633078852b	1986	// Power Supply Setting
davidprentice	0:6f633078852b	1987	(0x19), 1, 0x49, // CADJ=0100, CUADJ=100, OSD_EN=1 ,60Hz
davidprentice	0:6f633078852b	1988	(0x93), 1, 0x0F, // RADJ=1111, 100%
davidprentice	0:6f633078852b	1989	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	1990	(0x20), 1, 0x40, // BT=0100
davidprentice	0:6f633078852b	1991	(0x1D), 3, 0x07, 0x00, 0x04, // VC1=7, VC3=0, VRH=??
davidprentice	0:6f633078852b	1992	//VCOM SETTING for ITDB02
davidprentice	0:6f633078852b	1993	(0x44), 2, 0x4D, 0x0E, // VCM=101 0000 4D, VDV=1 0001 .itead
davidprentice	0:6f633078852b	1994	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	1995	(0x1C), 1, 0x04, // AP=100
davidprentice	0:6f633078852b	1996	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	1997	(0x1B), 1, 0x18, // GASENB=0, PON=0, DK=1, XDK=0, VLCD_TRI=0, STB=0
davidprentice	0:6f633078852b	1998	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	1999	(0x1B), 1, 0x10, // GASENB=0, PON=1, DK=0, XDK=0, VLCD_TRI=0, STB=0
davidprentice	0:6f633078852b	2000	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	2001	(0x43), 1, 0x80, //set VCOMG=1
davidprentice	0:6f633078852b	2002	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	2003	// Display ON Setting
davidprentice	0:6f633078852b	2004	(0x90), 1, 0x7F, // SAP=0111 1111
davidprentice	0:6f633078852b	2005	(0x26), 1, 0x04, //GON=0, DTE=0, D=01
davidprentice	0:6f633078852b	2006	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	2007	(0x26), 1, 0x24, //GON=1, DTE=0, D=01
davidprentice	0:6f633078852b	2008	(0x26), 1, 0x2C, //GON=1, DTE=0, D=11
davidprentice	0:6f633078852b	2009	TFTLCD_DELAY8, 5,
davidprentice	0:6f633078852b	2010	(0x26), 1, 0x3C, //GON=1, DTE=1, D=11
davidprentice	0:6f633078852b	2011	// INTERNAL REGISTER SETTING for ITDB02
davidprentice	0:6f633078852b	2012	(0x57), 1, 0x02, // TEST_Mode=1: into TEST mode
davidprentice	0:6f633078852b	2013	(0x95), 1, 0x01, // SET DISPLAY CLOCK AND PUMPING CLOCK TO SYNCHRONIZE .itead
davidprentice	0:6f633078852b	2014	(0x57), 1, 0x00, // TEST_Mode=0: exit TEST mode
davidprentice	0:6f633078852b	2015	};
davidprentice	0:6f633078852b	2016	static const uint8_t HX8347A_NHD_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2017	//Gamma Setting NHD
davidprentice	0:6f633078852b	2018	(0x46), 12, 0x94, 0x41, 0x00, 0x33, 0x23, 0x45, 0x44, 0x77, 0x12, 0xCC, 0x46, 0x82,
davidprentice	0:6f633078852b	2019	(0x01), 1, 0x06, //Display Mode [06]
davidprentice	0:6f633078852b	2020	(0x16), 1, 0xC8, //MADCTL [00] MY=1, MX=1, BGR=1
davidprentice	0:6f633078852b	2021	// (0x70), 1, 0x05, //Panel [06] 16-bit
davidprentice	0:6f633078852b	2022	(0x23), 3, 0x95, 0x95, 0xFF, //Cycle Control 1-3 [95 95 FF]
davidprentice	0:6f633078852b	2023	(0x27), 4, 0x02, 0x02, 0x02, 0x02, //Display Control 2-5 [02 02 02 02]
davidprentice	0:6f633078852b	2024	(0x2C), 2, 0x02, 0x02, //Display Control 6-7 [02 02]
davidprentice	0:6f633078852b	2025	(0x3A), 4, 0x01, 0x01, 0xF0, 0x00, //Cycle Control 1-4 [01 01 F0 00]
davidprentice	0:6f633078852b	2026	TFTLCD_DELAY8, 80,
davidprentice	0:6f633078852b	2027	(0x35), 2, 0x38, 0x78, //Display Control 9-10 [09 09] EQS=56, EQP=120
davidprentice	0:6f633078852b	2028	(0x3E), 1, 0x38, //Cycle Control 5 [38]
davidprentice	0:6f633078852b	2029	(0x40), 1, 0x0F, //Cycle Control 6 [03] GDON=15
davidprentice	0:6f633078852b	2030	(0x41), 1, 0xF0, //Cycle Control 14 [F8] GDOF=248
davidprentice	0:6f633078852b	2031
davidprentice	0:6f633078852b	2032	(0x19), 1, 0x2D, //OSC Control 1 [86] CADJ=2, CUADJ=6, OSCEN=1
davidprentice	0:6f633078852b	2033	(0x93), 1, 0x06, //SAP Idle mode [00] ??? .nhd
davidprentice	0:6f633078852b	2034	TFTLCD_DELAY8, 80,
davidprentice	0:6f633078852b	2035	(0x20), 1, 0x40, //Power Control 6 [40]
davidprentice	0:6f633078852b	2036	(0x1D), 3, 0x07, 0x00, 0x04, //Power Control 3-5 [04 00 06] VC=7
davidprentice	0:6f633078852b	2037	(0x44), 2, 0x3C, 0x12, //VCOM Control 2-3 [5A 11] VCM=60, VDV=18
davidprentice	0:6f633078852b	2038	TFTLCD_DELAY8, 80,
davidprentice	0:6f633078852b	2039	(0x1C), 1, 0x04, //Power Control 2 [04]
davidprentice	0:6f633078852b	2040	TFTLCD_DELAY8, 80,
davidprentice	0:6f633078852b	2041	(0x43), 1, 0x80, //VCOM Control 1 [80]
davidprentice	0:6f633078852b	2042	TFTLCD_DELAY8, 80,
davidprentice	0:6f633078852b	2043	(0x1B), 1, 0x08, //Power Control 1 [00] DK=1
davidprentice	0:6f633078852b	2044	TFTLCD_DELAY8, 80,
davidprentice	0:6f633078852b	2045	(0x1B), 1, 0x10, //Power Control 1 [00] PON=1
davidprentice	0:6f633078852b	2046	TFTLCD_DELAY8, 80,
davidprentice	0:6f633078852b	2047	(0x90), 1, 0x7F, //Display Control 8 [0A]
davidprentice	0:6f633078852b	2048	(0x26), 1, 0x04, //Display Control 1 [A0] D=1
davidprentice	0:6f633078852b	2049	TFTLCD_DELAY8, 80,
davidprentice	0:6f633078852b	2050	(0x26), 1, 0x24, //Display Control 1 [A0] GON=1, D=1
davidprentice	0:6f633078852b	2051	(0x26), 1, 0x2C, //Display Control 1 [A0] GON=1, D=3
davidprentice	0:6f633078852b	2052	TFTLCD_DELAY8, 80,
davidprentice	0:6f633078852b	2053	(0x26), 1, 0x3C, //Display Control 1 [A0] GON=1, DTE=1, D=3
davidprentice	0:6f633078852b	2054	(0x57), 1, 0x02, //?
davidprentice	0:6f633078852b	2055	(0x55), 1, 0x00, //?
davidprentice	0:6f633078852b	2056	(0x57), 1, 0x00, //?
davidprentice	0:6f633078852b	2057	};
davidprentice	0:6f633078852b	2058	// Atmel ASF code uses VCOM2-3: 0x38, 0x12. 50ms delays and no TEST mode changes.
davidprentice	0:6f633078852b	2059	init_table(HX8347A_NHD_regValues, sizeof(HX8347A_NHD_regValues));
davidprentice	0:6f633078852b	2060	// init_table(HX8347A_CMO32_regValues, sizeof(HX8347A_CMO32_regValues));
davidprentice	0:6f633078852b	2061	// init_table(HX8347A_CMO24_regValues, sizeof(HX8347A_CMO24_regValues));
davidprentice	0:6f633078852b	2062	// init_table(HX8347A_ITDB02_regValues, sizeof(HX8347A_ITDB02_regValues));
davidprentice	0:6f633078852b	2063	// init_table(HX8347G_2_regValues, sizeof(HX8347G_2_regValues));
davidprentice	0:6f633078852b	2064	break;
davidprentice	0:6f633078852b	2065	#endif
davidprentice	0:6f633078852b	2066
davidprentice	0:6f633078852b	2067	case 0x8357: //BIG CHANGE: HX8357-B is now 0x8357
davidprentice	0:6f633078852b	2068	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| REV_SCREEN;
davidprentice	0:6f633078852b	2069	goto common_8357;
davidprentice	0:6f633078852b	2070	case 0x9090: //BIG CHANGE: HX8357-D was 0x8357
davidprentice	0:6f633078852b	2071	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| REV_SCREEN \| READ_24BITS;
davidprentice	0:6f633078852b	2072	common_8357:
davidprentice	0:6f633078852b	2073	static const uint8_t HX8357C_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2074	TFTLCD_DELAY8, 1, //dummy table
davidprentice	0:6f633078852b	2075	};
davidprentice	0:6f633078852b	2076	table8_ads = HX8357C_regValues, table_size = sizeof(HX8357C_regValues);
davidprentice	0:6f633078852b	2077	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	2078	*p16 = 480;
davidprentice	0:6f633078852b	2079	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	2080	*p16 = 320;
davidprentice	0:6f633078852b	2081	break;
davidprentice	0:6f633078852b	2082
davidprentice	0:6f633078852b	2083	case 0x0099: //HX8357-D matches datasheet
davidprentice	0:6f633078852b	2084	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| REV_SCREEN \| READ_24BITS;
davidprentice	0:6f633078852b	2085	static const uint8_t HX8357_99_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2086	(0xB9), 3, 0xFF, 0x83, 0x57, // SETEXTC
davidprentice	0:6f633078852b	2087	TFTLCD_DELAY8, 150,
davidprentice	0:6f633078852b	2088	TFTLCD_DELAY8, 150,
davidprentice	0:6f633078852b	2089	(0xB6), 1, 0x25, // SETCOM [4B 00] -2.5V+37*0.02V=-1.76V [-1.00V]
davidprentice	0:6f633078852b	2090	(0xC0), 6, 0x50, 0x50, 0x01, 0x3C, 0x1E, 0x08, // SETSTBA [73 50 00 3C C4 08]
davidprentice	0:6f633078852b	2091	(0xB4), 7, 0x02, 0x40, 0x00, 0x2A, 0x2A, 0x0D, 0x78, // SETCYC [02 40 00 2A 2A 0D 96]
davidprentice	0:6f633078852b	2092	#ifdef SUPPORT_8357D_GAMMA
davidprentice	0:6f633078852b	2093	// HX8357D_SETGAMMA [0B 0C 11 1D 25 37 43 4B 4E 47 41 39 35 31 2E 21 1C 1D 1D 26 31 44 4E 56 44 3F 39 33 31 2E 28 1D E0 01]
davidprentice	0:6f633078852b	2094	(0xE0),34, 0x02, 0x0A, 0x11, 0x1D, 0x23, 0x35, 0x41, 0x4B, 0x4B, 0x42, 0x3A, 0x27, 0x1B, 0x08, 0x09, 0x03, 0x02, 0x0A, 0x11, 0x1D, 0x23, 0x35, 0x41, 0x4B, 0x4B, 0x42, 0x3A, 0x27, 0x1B, 0x08, 0x09, 0x03, 0x00, 0x01,
davidprentice	0:6f633078852b	2095	#endif
davidprentice	0:6f633078852b	2096	};
davidprentice	0:6f633078852b	2097	table8_ads = HX8357_99_regValues, table_size = sizeof(HX8357_99_regValues);
davidprentice	0:6f633078852b	2098	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	2099	*p16 = 480;
davidprentice	0:6f633078852b	2100	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	2101	*p16 = 320;
davidprentice	0:6f633078852b	2102	break;
davidprentice	0:6f633078852b	2103
davidprentice	0:6f633078852b	2104	#ifdef SUPPORT_8230
davidprentice	0:6f633078852b	2105	case 0x8230: //thanks Auzman
davidprentice	0:6f633078852b	2106	_lcd_capable = 0 \| REV_SCREEN \| INVERT_GS \| INVERT_RGB \| READ_BGR;
davidprentice	0:6f633078852b	2107	static const uint16_t UC8230_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2108	//After pin Reset wait at least 100ms
davidprentice	0:6f633078852b	2109	TFTLCD_DELAY, 100, //at least 100ms
davidprentice	0:6f633078852b	2110	0x0046, 0x0002, //MTP Disable
davidprentice	0:6f633078852b	2111	0x0010, 0x1590, //SAP=1, BT=5, APE=1, AP=1
davidprentice	0:6f633078852b	2112	0x0011, 0x0227, //DC1=2, DC0=2, VC=7
davidprentice	0:6f633078852b	2113	0x0012, 0x80ff, //P5VMD=1, PON=7, VRH=15
davidprentice	0:6f633078852b	2114	0x0013, 0x9c31, //VDV=28, VCM=49
davidprentice	0:6f633078852b	2115	TFTLCD_DELAY, 10, //at least 10ms
davidprentice	0:6f633078852b	2116	0x0002, 0x0300, //set N-line = 1
davidprentice	0:6f633078852b	2117	0x0003, 0x1030, //set GRAM writing direction & BGR=1
davidprentice	0:6f633078852b	2118	0x0060, 0xa700, //GS; gate scan: start position & drive line Q'ty
davidprentice	0:6f633078852b	2119	0x0061, 0x0001, //REV, NDL, VLE
davidprentice	0:6f633078852b	2120	/--------------------Gamma control------------------------/
davidprentice	0:6f633078852b	2121	0x0030, 0x0303,
davidprentice	0:6f633078852b	2122	0x0031, 0x0303,
davidprentice	0:6f633078852b	2123	0x0032, 0x0303,
davidprentice	0:6f633078852b	2124	0x0033, 0x0300,
davidprentice	0:6f633078852b	2125	0x0034, 0x0003,
davidprentice	0:6f633078852b	2126	0x0035, 0x0303,
davidprentice	0:6f633078852b	2127	0x0036, 0x1400,
davidprentice	0:6f633078852b	2128	0x0037, 0x0303,
davidprentice	0:6f633078852b	2129	0x0038, 0x0303,
davidprentice	0:6f633078852b	2130	0x0039, 0x0303,
davidprentice	0:6f633078852b	2131	0x003a, 0x0300,
davidprentice	0:6f633078852b	2132	0x003b, 0x0003,
davidprentice	0:6f633078852b	2133	0x003c, 0x0303,
davidprentice	0:6f633078852b	2134	0x003d, 0x1400,
davidprentice	0:6f633078852b	2135	//-----------------------------------------------------------//
davidprentice	0:6f633078852b	2136	0x0020, 0x0000, //GRAM horizontal address
davidprentice	0:6f633078852b	2137	0x0021, 0x0000, //GRAM vertical address
davidprentice	0:6f633078852b	2138	//************ Partial Display control*******************//
davidprentice	0:6f633078852b	2139	0x0080, 0x0000,
davidprentice	0:6f633078852b	2140	0x0081, 0x0000,
davidprentice	0:6f633078852b	2141	0x0082, 0x0000,
davidprentice	0:6f633078852b	2142	0x0083, 0x0000,
davidprentice	0:6f633078852b	2143	0x0084, 0x0000,
davidprentice	0:6f633078852b	2144	0x0085, 0x0000,
davidprentice	0:6f633078852b	2145	//-----------------------------------------------------------//
davidprentice	0:6f633078852b	2146	0x0092, 0x0200,
davidprentice	0:6f633078852b	2147	0x0093, 0x0303,
davidprentice	0:6f633078852b	2148	0x0090, 0x0010, //set clocks/Line
davidprentice	0:6f633078852b	2149	0x0000, 0x0001,
davidprentice	0:6f633078852b	2150	TFTLCD_DELAY, 200, // Delay 200 ms
davidprentice	0:6f633078852b	2151	0x0007, 0x0173, //Display on setting
davidprentice	0:6f633078852b	2152	};
davidprentice	0:6f633078852b	2153	init_table16(UC8230_regValues, sizeof(UC8230_regValues));
davidprentice	0:6f633078852b	2154	break;
davidprentice	0:6f633078852b	2155	#endif
davidprentice	0:6f633078852b	2156
davidprentice	0:6f633078852b	2157	#ifdef SUPPORT_9163
davidprentice	0:6f633078852b	2158	case 0x9163: //
davidprentice	0:6f633078852b	2159	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS;
davidprentice	0:6f633078852b	2160	static const uint8_t PROGMEM table9163C[] = {
davidprentice	0:6f633078852b	2161	// (COMMAND_BYTE), n, data_bytes....
davidprentice	0:6f633078852b	2162	0x26, 1, 0x02, // [01] GAMMASET use CURVE=1, 2, 4, 8
davidprentice	0:6f633078852b	2163	0xB1, 2, 0x08, 0x02, // [0E 14] FRMCTR1 if GM==011 61.7Hz
davidprentice	0:6f633078852b	2164	0xB4, 1, 0x07, // [02] INVCTR
davidprentice	0:6f633078852b	2165	0xB8, 1, 0x01, // [00] GSCTRL
davidprentice	0:6f633078852b	2166	0xC0, 2, 0x0A, 0x02, // [0A 05] PWCTR1 if LCM==10
davidprentice	0:6f633078852b	2167	0xC1, 1, 0x02, // [07] PWCTR2
davidprentice	0:6f633078852b	2168	0xC5, 2, 0x50, 0x63, // [43 4D] VMCTR1
davidprentice	0:6f633078852b	2169	0xC7, 1, 0, // [40] VCOMOFFS
davidprentice	0:6f633078852b	2170	};
davidprentice	0:6f633078852b	2171	table8_ads = table9163C, table_size = sizeof(table9163C); //
davidprentice	0:6f633078852b	2172	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	2173	*p16 = 160;
davidprentice	0:6f633078852b	2174	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	2175	*p16 = 128;
davidprentice	0:6f633078852b	2176	break;
davidprentice	0:6f633078852b	2177	#endif
davidprentice	0:6f633078852b	2178
davidprentice	0:6f633078852b	2179	#ifdef SUPPORT_9225
davidprentice	0:6f633078852b	2180	#define ILI9225_DRIVER_OUTPUT_CTRL (0x01u) // Driver Output Control
davidprentice	0:6f633078852b	2181	#define ILI9225_LCD_AC_DRIVING_CTRL (0x02u) // LCD AC Driving Control
davidprentice	0:6f633078852b	2182	#define ILI9225_ENTRY_MODE (0x03u) // Entry Mode
davidprentice	0:6f633078852b	2183	#define ILI9225_DISP_CTRL1 (0x07u) // Display Control 1
davidprentice	0:6f633078852b	2184	#define ILI9225_BLANK_PERIOD_CTRL1 (0x08u) // Blank Period Control
davidprentice	0:6f633078852b	2185	#define ILI9225_FRAME_CYCLE_CTRL (0x0Bu) // Frame Cycle Control
davidprentice	0:6f633078852b	2186	#define ILI9225_INTERFACE_CTRL (0x0Cu) // Interface Control
davidprentice	0:6f633078852b	2187	#define ILI9225_OSC_CTRL (0x0Fu) // Osc Control
davidprentice	0:6f633078852b	2188	#define ILI9225_POWER_CTRL1 (0x10u) // Power Control 1
davidprentice	0:6f633078852b	2189	#define ILI9225_POWER_CTRL2 (0x11u) // Power Control 2
davidprentice	0:6f633078852b	2190	#define ILI9225_POWER_CTRL3 (0x12u) // Power Control 3
davidprentice	0:6f633078852b	2191	#define ILI9225_POWER_CTRL4 (0x13u) // Power Control 4
davidprentice	0:6f633078852b	2192	#define ILI9225_POWER_CTRL5 (0x14u) // Power Control 5
davidprentice	0:6f633078852b	2193	#define ILI9225_VCI_RECYCLING (0x15u) // VCI Recycling
davidprentice	0:6f633078852b	2194	#define ILI9225_RAM_ADDR_SET1 (0x20u) // Horizontal GRAM Address Set
davidprentice	0:6f633078852b	2195	#define ILI9225_RAM_ADDR_SET2 (0x21u) // Vertical GRAM Address Set
davidprentice	0:6f633078852b	2196	#define ILI9225_GRAM_DATA_REG (0x22u) // GRAM Data Register
davidprentice	0:6f633078852b	2197	#define ILI9225_GATE_SCAN_CTRL (0x30u) // Gate Scan Control Register
davidprentice	0:6f633078852b	2198	#define ILI9225_VERTICAL_SCROLL_CTRL1 (0x31u) // Vertical Scroll Control 1 Register
davidprentice	0:6f633078852b	2199	#define ILI9225_VERTICAL_SCROLL_CTRL2 (0x32u) // Vertical Scroll Control 2 Register
davidprentice	0:6f633078852b	2200	#define ILI9225_VERTICAL_SCROLL_CTRL3 (0x33u) // Vertical Scroll Control 3 Register
davidprentice	0:6f633078852b	2201	#define ILI9225_PARTIAL_DRIVING_POS1 (0x34u) // Partial Driving Position 1 Register
davidprentice	0:6f633078852b	2202	#define ILI9225_PARTIAL_DRIVING_POS2 (0x35u) // Partial Driving Position 2 Register
davidprentice	0:6f633078852b	2203	#define ILI9225_HORIZONTAL_WINDOW_ADDR1 (0x36u) // Horizontal Address END Position HEA
davidprentice	0:6f633078852b	2204	#define ILI9225_HORIZONTAL_WINDOW_ADDR2 (0x37u) // Horizontal Address START Position HSA
davidprentice	0:6f633078852b	2205	#define ILI9225_VERTICAL_WINDOW_ADDR1 (0x38u) // Vertical Address END Position VEA
davidprentice	0:6f633078852b	2206	#define ILI9225_VERTICAL_WINDOW_ADDR2 (0x39u) // Vertical Address START Position VSA
davidprentice	0:6f633078852b	2207	#define ILI9225_GAMMA_CTRL1 (0x50u) // Gamma Control 1
davidprentice	0:6f633078852b	2208	#define ILI9225_GAMMA_CTRL2 (0x51u) // Gamma Control 2
davidprentice	0:6f633078852b	2209	#define ILI9225_GAMMA_CTRL3 (0x52u) // Gamma Control 3
davidprentice	0:6f633078852b	2210	#define ILI9225_GAMMA_CTRL4 (0x53u) // Gamma Control 4
davidprentice	0:6f633078852b	2211	#define ILI9225_GAMMA_CTRL5 (0x54u) // Gamma Control 5
davidprentice	0:6f633078852b	2212	#define ILI9225_GAMMA_CTRL6 (0x55u) // Gamma Control 6
davidprentice	0:6f633078852b	2213	#define ILI9225_GAMMA_CTRL7 (0x56u) // Gamma Control 7
davidprentice	0:6f633078852b	2214	#define ILI9225_GAMMA_CTRL8 (0x57u) // Gamma Control 8
davidprentice	0:6f633078852b	2215	#define ILI9225_GAMMA_CTRL9 (0x58u) // Gamma Control 9
davidprentice	0:6f633078852b	2216	#define ILI9225_GAMMA_CTRL10 (0x59u) // Gamma Control 10
davidprentice	0:6f633078852b	2217
davidprentice	0:6f633078852b	2218	#define ILI9225C_INVOFF 0x20
davidprentice	0:6f633078852b	2219	#define ILI9225C_INVON 0x21
davidprentice	0:6f633078852b	2220
davidprentice	0:6f633078852b	2221	case 0x6813:
davidprentice	0:6f633078852b	2222	case 0x9226:
davidprentice	0:6f633078852b	2223	_lcd_ID = 0x9225; //fall through
davidprentice	0:6f633078852b	2224	case 0x9225:
davidprentice	0:6f633078852b	2225	_lcd_capable = REV_SCREEN \| READ_BGR; //thanks tongbajiel
davidprentice	0:6f633078852b	2226	static const uint16_t ILI9225_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2227	/* Start Initial Sequence */
davidprentice	0:6f633078852b	2228	/* Set SS bit and direction output from S528 to S1 */
davidprentice	0:6f633078852b	2229	ILI9225_POWER_CTRL1, 0x0000, // Set SAP,DSTB,STB
davidprentice	0:6f633078852b	2230	ILI9225_POWER_CTRL2, 0x0000, // Set APON,PON,AON,VCI1EN,VC
davidprentice	0:6f633078852b	2231	ILI9225_POWER_CTRL3, 0x0000, // Set BT,DC1,DC2,DC3
davidprentice	0:6f633078852b	2232	ILI9225_POWER_CTRL4, 0x0000, // Set GVDD
davidprentice	0:6f633078852b	2233	ILI9225_POWER_CTRL5, 0x0000, // Set VCOMH/VCOML voltage
davidprentice	0:6f633078852b	2234	TFTLCD_DELAY, 40,
davidprentice	0:6f633078852b	2235
davidprentice	0:6f633078852b	2236	// Power-on sequence
davidprentice	0:6f633078852b	2237	ILI9225_POWER_CTRL2, 0x0018, // Set APON,PON,AON,VCI1EN,VC
davidprentice	0:6f633078852b	2238	ILI9225_POWER_CTRL3, 0x6121, // Set BT,DC1,DC2,DC3
davidprentice	0:6f633078852b	2239	ILI9225_POWER_CTRL4, 0x006F, // Set GVDD /007F 0088 /
davidprentice	0:6f633078852b	2240	ILI9225_POWER_CTRL5, 0x495F, // Set VCOMH/VCOML voltage
davidprentice	0:6f633078852b	2241	ILI9225_POWER_CTRL1, 0x0800, // Set SAP,DSTB,STB
davidprentice	0:6f633078852b	2242	TFTLCD_DELAY, 10,
davidprentice	0:6f633078852b	2243	ILI9225_POWER_CTRL2, 0x103B, // Set APON,PON,AON,VCI1EN,VC
davidprentice	0:6f633078852b	2244	TFTLCD_DELAY, 50,
davidprentice	0:6f633078852b	2245
davidprentice	0:6f633078852b	2246	ILI9225_DRIVER_OUTPUT_CTRL, 0x011C, // set the display line number and display direction
davidprentice	0:6f633078852b	2247	ILI9225_LCD_AC_DRIVING_CTRL, 0x0100, // set 1 line inversion
davidprentice	0:6f633078852b	2248	ILI9225_ENTRY_MODE, 0x1030, // set GRAM write direction and BGR=1.
davidprentice	0:6f633078852b	2249	ILI9225_DISP_CTRL1, 0x0000, // Display off
davidprentice	0:6f633078852b	2250	ILI9225_BLANK_PERIOD_CTRL1, 0x0808, // set the back porch and front porch
davidprentice	0:6f633078852b	2251	ILI9225_FRAME_CYCLE_CTRL, 0x1100, // set the clocks number per line
davidprentice	0:6f633078852b	2252	ILI9225_INTERFACE_CTRL, 0x0000, // CPU interface
davidprentice	0:6f633078852b	2253	ILI9225_OSC_CTRL, 0x0D01, // Set Osc /0e01/
davidprentice	0:6f633078852b	2254	ILI9225_VCI_RECYCLING, 0x0020, // Set VCI recycling
davidprentice	0:6f633078852b	2255	ILI9225_RAM_ADDR_SET1, 0x0000, // RAM Address
davidprentice	0:6f633078852b	2256	ILI9225_RAM_ADDR_SET2, 0x0000, // RAM Address
davidprentice	0:6f633078852b	2257
davidprentice	0:6f633078852b	2258	/* Set GRAM area */
davidprentice	0:6f633078852b	2259	ILI9225_GATE_SCAN_CTRL, 0x0000,
davidprentice	0:6f633078852b	2260	ILI9225_VERTICAL_SCROLL_CTRL1, 0x00DB,
davidprentice	0:6f633078852b	2261	ILI9225_VERTICAL_SCROLL_CTRL2, 0x0000,
davidprentice	0:6f633078852b	2262	ILI9225_VERTICAL_SCROLL_CTRL3, 0x0000,
davidprentice	0:6f633078852b	2263	ILI9225_PARTIAL_DRIVING_POS1, 0x00DB,
davidprentice	0:6f633078852b	2264	ILI9225_PARTIAL_DRIVING_POS2, 0x0000,
davidprentice	0:6f633078852b	2265	ILI9225_HORIZONTAL_WINDOW_ADDR1, 0x00AF,
davidprentice	0:6f633078852b	2266	ILI9225_HORIZONTAL_WINDOW_ADDR2, 0x0000,
davidprentice	0:6f633078852b	2267	ILI9225_VERTICAL_WINDOW_ADDR1, 0x00DB,
davidprentice	0:6f633078852b	2268	ILI9225_VERTICAL_WINDOW_ADDR2, 0x0000,
davidprentice	0:6f633078852b	2269
davidprentice	0:6f633078852b	2270	/* Set GAMMA curve */
davidprentice	0:6f633078852b	2271	ILI9225_GAMMA_CTRL1, 0x0000,
davidprentice	0:6f633078852b	2272	ILI9225_GAMMA_CTRL2, 0x0808,
davidprentice	0:6f633078852b	2273	ILI9225_GAMMA_CTRL3, 0x080A,
davidprentice	0:6f633078852b	2274	ILI9225_GAMMA_CTRL4, 0x000A,
davidprentice	0:6f633078852b	2275	ILI9225_GAMMA_CTRL5, 0x0A08,
davidprentice	0:6f633078852b	2276	ILI9225_GAMMA_CTRL6, 0x0808,
davidprentice	0:6f633078852b	2277	ILI9225_GAMMA_CTRL7, 0x0000,
davidprentice	0:6f633078852b	2278	ILI9225_GAMMA_CTRL8, 0x0A00,
davidprentice	0:6f633078852b	2279	ILI9225_GAMMA_CTRL9, 0x0710,
davidprentice	0:6f633078852b	2280	ILI9225_GAMMA_CTRL10, 0x0710,
davidprentice	0:6f633078852b	2281
davidprentice	0:6f633078852b	2282	ILI9225_DISP_CTRL1, 0x0012,
davidprentice	0:6f633078852b	2283	TFTLCD_DELAY, 50,
davidprentice	0:6f633078852b	2284	ILI9225_DISP_CTRL1, 0x1017,
davidprentice	0:6f633078852b	2285	};
davidprentice	0:6f633078852b	2286	init_table16(ILI9225_regValues, sizeof(ILI9225_regValues));
davidprentice	0:6f633078852b	2287	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	2288	*p16 = 220;
davidprentice	0:6f633078852b	2289	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	2290	*p16 = 176;
davidprentice	0:6f633078852b	2291	break;
davidprentice	0:6f633078852b	2292	#endif
davidprentice	0:6f633078852b	2293
davidprentice	0:6f633078852b	2294	case 0x0001:
davidprentice	0:6f633078852b	2295	_lcd_capable = 0 \| REV_SCREEN \| INVERT_GS; //no RGB bug. thanks Ivo_Deshev
davidprentice	0:6f633078852b	2296	goto common_9320;
davidprentice	0:6f633078852b	2297	case 0x5408:
davidprentice	0:6f633078852b	2298	_lcd_capable = 0 \| REV_SCREEN \| READ_BGR; //Red 2.4" thanks jorgenv, Ardlab_Gent
davidprentice	0:6f633078852b	2299	// _lcd_capable = 0 \| REV_SCREEN \| READ_BGR \| INVERT_GS; //Blue 2.8" might be different
davidprentice	0:6f633078852b	2300	goto common_9320;
davidprentice	0:6f633078852b	2301	case 0x1505: //R61505 thanks Ravi_kanchan2004. R61505V, R61505W different
davidprentice	0:6f633078852b	2302	case 0x9320:
davidprentice	0:6f633078852b	2303	_lcd_capable = 0 \| REV_SCREEN \| READ_BGR;
davidprentice	0:6f633078852b	2304	common_9320:
davidprentice	0:6f633078852b	2305	static const uint16_t ILI9320_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2306	0x00e5, 0x8000,
davidprentice	0:6f633078852b	2307	0x0000, 0x0001,
davidprentice	0:6f633078852b	2308	0x0001, 0x100,
davidprentice	0:6f633078852b	2309	0x0002, 0x0700,
davidprentice	0:6f633078852b	2310	0x0003, 0x1030,
davidprentice	0:6f633078852b	2311	0x0004, 0x0000,
davidprentice	0:6f633078852b	2312	0x0008, 0x0202,
davidprentice	0:6f633078852b	2313	0x0009, 0x0000,
davidprentice	0:6f633078852b	2314	0x000A, 0x0000,
davidprentice	0:6f633078852b	2315	0x000C, 0x0000,
davidprentice	0:6f633078852b	2316	0x000D, 0x0000,
davidprentice	0:6f633078852b	2317	0x000F, 0x0000,
davidprentice	0:6f633078852b	2318	//-----Power On sequence-----------------------
davidprentice	0:6f633078852b	2319	0x0010, 0x0000,
davidprentice	0:6f633078852b	2320	0x0011, 0x0007,
davidprentice	0:6f633078852b	2321	0x0012, 0x0000,
davidprentice	0:6f633078852b	2322	0x0013, 0x0000,
davidprentice	0:6f633078852b	2323	TFTLCD_DELAY, 50,
davidprentice	0:6f633078852b	2324	0x0010, 0x17B0, //SAP=1, BT=7, APE=1, AP=3
davidprentice	0:6f633078852b	2325	0x0011, 0x0007, //DC1=0, DC0=0, VC=7
davidprentice	0:6f633078852b	2326	TFTLCD_DELAY, 10,
davidprentice	0:6f633078852b	2327	0x0012, 0x013A, //VCMR=1, PON=3, VRH=10
davidprentice	0:6f633078852b	2328	TFTLCD_DELAY, 10,
davidprentice	0:6f633078852b	2329	0x0013, 0x1A00, //VDV=26
davidprentice	0:6f633078852b	2330	0x0029, 0x000c, //VCM=12
davidprentice	0:6f633078852b	2331	TFTLCD_DELAY, 10,
davidprentice	0:6f633078852b	2332	//-----Gamma control-----------------------
davidprentice	0:6f633078852b	2333	0x0030, 0x0000,
davidprentice	0:6f633078852b	2334	0x0031, 0x0505,
davidprentice	0:6f633078852b	2335	0x0032, 0x0004,
davidprentice	0:6f633078852b	2336	0x0035, 0x0006,
davidprentice	0:6f633078852b	2337	0x0036, 0x0707,
davidprentice	0:6f633078852b	2338	0x0037, 0x0105,
davidprentice	0:6f633078852b	2339	0x0038, 0x0002,
davidprentice	0:6f633078852b	2340	0x0039, 0x0707,
davidprentice	0:6f633078852b	2341	0x003C, 0x0704,
davidprentice	0:6f633078852b	2342	0x003D, 0x0807,
davidprentice	0:6f633078852b	2343	//-----Set RAM area-----------------------
davidprentice	0:6f633078852b	2344	0x0060, 0xA700, //GS=1
davidprentice	0:6f633078852b	2345	0x0061, 0x0001,
davidprentice	0:6f633078852b	2346	0x006A, 0x0000,
davidprentice	0:6f633078852b	2347	0x0021, 0x0000,
davidprentice	0:6f633078852b	2348	0x0020, 0x0000,
davidprentice	0:6f633078852b	2349	//-----Partial Display Control------------
davidprentice	0:6f633078852b	2350	0x0080, 0x0000,
davidprentice	0:6f633078852b	2351	0x0081, 0x0000,
davidprentice	0:6f633078852b	2352	0x0082, 0x0000,
davidprentice	0:6f633078852b	2353	0x0083, 0x0000,
davidprentice	0:6f633078852b	2354	0x0084, 0x0000,
davidprentice	0:6f633078852b	2355	0x0085, 0x0000,
davidprentice	0:6f633078852b	2356	//-----Panel Control----------------------
davidprentice	0:6f633078852b	2357	0x0090, 0x0010,
davidprentice	0:6f633078852b	2358	0x0092, 0x0000,
davidprentice	0:6f633078852b	2359	0x0093, 0x0003,
davidprentice	0:6f633078852b	2360	0x0095, 0x0110,
davidprentice	0:6f633078852b	2361	0x0097, 0x0000,
davidprentice	0:6f633078852b	2362	0x0098, 0x0000,
davidprentice	0:6f633078852b	2363	//-----Display on-----------------------
davidprentice	0:6f633078852b	2364	0x0007, 0x0173,
davidprentice	0:6f633078852b	2365	TFTLCD_DELAY, 50,
davidprentice	0:6f633078852b	2366	};
davidprentice	0:6f633078852b	2367	init_table16(ILI9320_regValues, sizeof(ILI9320_regValues));
davidprentice	0:6f633078852b	2368	break;
davidprentice	0:6f633078852b	2369	case 0x6809:
davidprentice	0:6f633078852b	2370	_lcd_capable = 0 \| REV_SCREEN \| INVERT_GS \| AUTO_READINC;
davidprentice	0:6f633078852b	2371	goto common_93x5;
davidprentice	0:6f633078852b	2372	case 0x9328:
davidprentice	0:6f633078852b	2373	case 0x9325:
davidprentice	0:6f633078852b	2374	_lcd_capable = 0 \| REV_SCREEN \| INVERT_GS;
davidprentice	0:6f633078852b	2375	goto common_93x5;
davidprentice	0:6f633078852b	2376	case 0x9331:
davidprentice	0:6f633078852b	2377	case 0x9335:
davidprentice	0:6f633078852b	2378	_lcd_capable = 0 \| REV_SCREEN;
davidprentice	0:6f633078852b	2379	common_93x5:
davidprentice	0:6f633078852b	2380	static const uint16_t ILI9325_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2381	0x00E5, 0x78F0, // set SRAM internal timing
davidprentice	0:6f633078852b	2382	0x0001, 0x0100, // set Driver Output Control
davidprentice	0:6f633078852b	2383	0x0002, 0x0200, // set 1 line inversion
davidprentice	0:6f633078852b	2384	0x0003, 0x1030, // set GRAM write direction and BGR=1.
davidprentice	0:6f633078852b	2385	0x0004, 0x0000, // Resize register
davidprentice	0:6f633078852b	2386	0x0005, 0x0000, // .kbv 16bits Data Format Selection
davidprentice	0:6f633078852b	2387	0x0008, 0x0207, // set the back porch and front porch
davidprentice	0:6f633078852b	2388	0x0009, 0x0000, // set non-display area refresh cycle ISC[3:0]
davidprentice	0:6f633078852b	2389	0x000A, 0x0000, // FMARK function
davidprentice	0:6f633078852b	2390	0x000C, 0x0000, // RGB interface setting
davidprentice	0:6f633078852b	2391	0x000D, 0x0000, // Frame marker Position
davidprentice	0:6f633078852b	2392	0x000F, 0x0000, // RGB interface polarity
davidprentice	0:6f633078852b	2393	// ----------- Power On sequence ----------- //
davidprentice	0:6f633078852b	2394	0x0010, 0x0000, // SAP, BT[3:0], AP, DSTB, SLP, STB
davidprentice	0:6f633078852b	2395	0x0011, 0x0007, // DC1[2:0], DC0[2:0], VC[2:0]
davidprentice	0:6f633078852b	2396	0x0012, 0x0000, // VREG1OUT voltage
davidprentice	0:6f633078852b	2397	0x0013, 0x0000, // VDV[4:0] for VCOM amplitude
davidprentice	0:6f633078852b	2398	0x0007, 0x0001,
davidprentice	0:6f633078852b	2399	TFTLCD_DELAY, 200, // Dis-charge capacitor power voltage
davidprentice	0:6f633078852b	2400	0x0010, 0x1690, // SAP=1, BT=6, APE=1, AP=1, DSTB=0, SLP=0, STB=0
davidprentice	0:6f633078852b	2401	0x0011, 0x0227, // DC1=2, DC0=2, VC=7
davidprentice	0:6f633078852b	2402	TFTLCD_DELAY, 50, // wait_ms 50ms
davidprentice	0:6f633078852b	2403	0x0012, 0x000D, // VCIRE=1, PON=0, VRH=5
davidprentice	0:6f633078852b	2404	TFTLCD_DELAY, 50, // wait_ms 50ms
davidprentice	0:6f633078852b	2405	0x0013, 0x1200, // VDV=28 for VCOM amplitude
davidprentice	0:6f633078852b	2406	0x0029, 0x000A, // VCM=10 for VCOMH
davidprentice	0:6f633078852b	2407	0x002B, 0x000D, // Set Frame Rate
davidprentice	0:6f633078852b	2408	TFTLCD_DELAY, 50, // wait_ms 50ms
davidprentice	0:6f633078852b	2409	0x0020, 0x0000, // GRAM horizontal Address
davidprentice	0:6f633078852b	2410	0x0021, 0x0000, // GRAM Vertical Address
davidprentice	0:6f633078852b	2411	// ----------- Adjust the Gamma Curve ----------//
davidprentice	0:6f633078852b	2412
davidprentice	0:6f633078852b	2413	0x0030, 0x0000,
davidprentice	0:6f633078852b	2414	0x0031, 0x0404,
davidprentice	0:6f633078852b	2415	0x0032, 0x0003,
davidprentice	0:6f633078852b	2416	0x0035, 0x0405,
davidprentice	0:6f633078852b	2417	0x0036, 0x0808,
davidprentice	0:6f633078852b	2418	0x0037, 0x0407,
davidprentice	0:6f633078852b	2419	0x0038, 0x0303,
davidprentice	0:6f633078852b	2420	0x0039, 0x0707,
davidprentice	0:6f633078852b	2421	0x003C, 0x0504,
davidprentice	0:6f633078852b	2422	0x003D, 0x0808,
davidprentice	0:6f633078852b	2423
davidprentice	0:6f633078852b	2424	//------------------ Set GRAM area ---------------//
davidprentice	0:6f633078852b	2425	0x0060, 0x2700, // Gate Scan Line GS=0 [0xA700]
davidprentice	0:6f633078852b	2426	0x0061, 0x0001, // NDL,VLE, REV .kbv
davidprentice	0:6f633078852b	2427	0x006A, 0x0000, // set scrolling line
davidprentice	0:6f633078852b	2428	//-------------- Partial Display Control ---------//
davidprentice	0:6f633078852b	2429	0x0080, 0x0000,
davidprentice	0:6f633078852b	2430	0x0081, 0x0000,
davidprentice	0:6f633078852b	2431	0x0082, 0x0000,
davidprentice	0:6f633078852b	2432	0x0083, 0x0000,
davidprentice	0:6f633078852b	2433	0x0084, 0x0000,
davidprentice	0:6f633078852b	2434	0x0085, 0x0000,
davidprentice	0:6f633078852b	2435	//-------------- Panel Control -------------------//
davidprentice	0:6f633078852b	2436	0x0090, 0x0010,
davidprentice	0:6f633078852b	2437	0x0092, 0x0000,
davidprentice	0:6f633078852b	2438	0x0007, 0x0133, // 262K color and display ON
davidprentice	0:6f633078852b	2439	};
davidprentice	0:6f633078852b	2440	init_table16(ILI9325_regValues, sizeof(ILI9325_regValues));
davidprentice	0:6f633078852b	2441	break;
davidprentice	0:6f633078852b	2442
davidprentice	0:6f633078852b	2443	#if defined(SUPPORT_9326_5420)
davidprentice	0:6f633078852b	2444	case 0x5420:
davidprentice	0:6f633078852b	2445	case 0x9326:
davidprentice	0:6f633078852b	2446	_lcd_capable = REV_SCREEN \| READ_BGR;
davidprentice	0:6f633078852b	2447	static const uint16_t ILI9326_CPT28_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2448	//*********** Start Initial Sequence ********//
davidprentice	0:6f633078852b	2449	0x0702, 0x3008, // Set internal timing, don’t change this value
davidprentice	0:6f633078852b	2450	0x0705, 0x0036, // Set internal timing, don’t change this value
davidprentice	0:6f633078852b	2451	0x070B, 0x1213, // Set internal timing, don’t change this value
davidprentice	0:6f633078852b	2452	0x0001, 0x0100, // set SS and SM bit
davidprentice	0:6f633078852b	2453	0x0002, 0x0100, // set 1 line inversion
davidprentice	0:6f633078852b	2454	0x0003, 0x1030, // set GRAM write direction and BGR=1.
davidprentice	0:6f633078852b	2455	0x0008, 0x0202, // set the back porch and front porch
davidprentice	0:6f633078852b	2456	0x0009, 0x0000, // set non-display area refresh cycle ISC[3:0]
davidprentice	0:6f633078852b	2457	0x000C, 0x0000, // RGB interface setting
davidprentice	0:6f633078852b	2458	0x000F, 0x0000, // RGB interface polarity
davidprentice	0:6f633078852b	2459	//***********Power On sequence **************//
davidprentice	0:6f633078852b	2460	0x0100, 0x0000, // SAP, BT[3:0], AP, DSTB, SLP, STB
davidprentice	0:6f633078852b	2461	0x0102, 0x0000, // VREG1OUT voltage
davidprentice	0:6f633078852b	2462	0x0103, 0x0000, // VDV[4:0] for VCOM amplitude
davidprentice	0:6f633078852b	2463	TFTLCD_DELAY, 200, // Dis-charge capacitor power voltage
davidprentice	0:6f633078852b	2464	0x0100, 0x1190, // SAP, BT[3:0], AP, DSTB, SLP, STB
davidprentice	0:6f633078852b	2465	0x0101, 0x0227, // DC1[2:0], DC0[2:0], VC[2:0]
davidprentice	0:6f633078852b	2466	TFTLCD_DELAY, 50, // Delay 50ms
davidprentice	0:6f633078852b	2467	0x0102, 0x01BD, // VREG1OUT voltage
davidprentice	0:6f633078852b	2468	TFTLCD_DELAY, 50, // Delay 50ms
davidprentice	0:6f633078852b	2469	0x0103, 0x2D00, // VDV[4:0] for VCOM amplitude
davidprentice	0:6f633078852b	2470	0x0281, 0x000E, // VCM[5:0] for VCOMH
davidprentice	0:6f633078852b	2471	TFTLCD_DELAY, 50, //
davidprentice	0:6f633078852b	2472	0x0200, 0x0000, // GRAM horizontal Address
davidprentice	0:6f633078852b	2473	0x0201, 0x0000, // GRAM Vertical Address
davidprentice	0:6f633078852b	2474	// ----------- Adjust the Gamma Curve ----------//
davidprentice	0:6f633078852b	2475	0x0300, 0x0000, //
davidprentice	0:6f633078852b	2476	0x0301, 0x0707, //
davidprentice	0:6f633078852b	2477	0x0302, 0x0606, //
davidprentice	0:6f633078852b	2478	0x0305, 0x0000, //
davidprentice	0:6f633078852b	2479	0x0306, 0x0D00, //
davidprentice	0:6f633078852b	2480	0x0307, 0x0706, //
davidprentice	0:6f633078852b	2481	0x0308, 0x0005, //
davidprentice	0:6f633078852b	2482	0x0309, 0x0007, //
davidprentice	0:6f633078852b	2483	0x030C, 0x0000, //
davidprentice	0:6f633078852b	2484	0x030D, 0x000A, //
davidprentice	0:6f633078852b	2485	//------------------ Set GRAM area ---------------//
davidprentice	0:6f633078852b	2486	0x0400, 0x3100, // Gate Scan Line 400 lines
davidprentice	0:6f633078852b	2487	0x0401, 0x0001, // NDL,VLE, REV
davidprentice	0:6f633078852b	2488	0x0404, 0x0000, // set scrolling line
davidprentice	0:6f633078852b	2489	//-------------- Partial Display Control ---------//
davidprentice	0:6f633078852b	2490	0x0500, 0x0000, // Partial Image 1 Display Position
davidprentice	0:6f633078852b	2491	0x0501, 0x0000, // Partial Image 1 RAM Start/End Address
davidprentice	0:6f633078852b	2492	0x0502, 0x0000, // Partial Image 1 RAM Start/End Address
davidprentice	0:6f633078852b	2493	0x0503, 0x0000, // Partial Image 2 Display Position
davidprentice	0:6f633078852b	2494	0x0504, 0x0000, // Partial Image 2 RAM Start/End Address
davidprentice	0:6f633078852b	2495	0x0505, 0x0000, // Partial Image 2 RAM Start/End Address
davidprentice	0:6f633078852b	2496	//-------------- Panel Control -------------------//
davidprentice	0:6f633078852b	2497	0x0010, 0x0010, // DIVI[1:0];RTNI[4:0]
davidprentice	0:6f633078852b	2498	0x0011, 0x0600, // NOWI[2:0];SDTI[2:0]
davidprentice	0:6f633078852b	2499	0x0020, 0x0002, // DIVE[1:0];RTNE[5:0]
davidprentice	0:6f633078852b	2500	0x0007, 0x0173, // 262K color and display ON
davidprentice	0:6f633078852b	2501	};
davidprentice	0:6f633078852b	2502	init_table16(ILI9326_CPT28_regValues, sizeof(ILI9326_CPT28_regValues));
davidprentice	0:6f633078852b	2503	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	2504	*p16 = 400;
davidprentice	0:6f633078852b	2505	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	2506	*p16 = 240;
davidprentice	0:6f633078852b	2507	break;
davidprentice	0:6f633078852b	2508	#endif
davidprentice	0:6f633078852b	2509
davidprentice	0:6f633078852b	2510	case 0x9327:
davidprentice	0:6f633078852b	2511	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS;
davidprentice	0:6f633078852b	2512	static const uint8_t ILI9327_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2513	0xB0, 1, 0x00, //Disable Protect for cmds B1-DF, E0-EF, F0-FF
davidprentice	0:6f633078852b	2514	// 0xE0, 1, 0x20, //NV Memory Write [00]
davidprentice	0:6f633078852b	2515	// 0xD1, 3, 0x00, 0x71, 0x19, //VCOM control [00 40 0F]
davidprentice	0:6f633078852b	2516	// 0xD0, 3, 0x07, 0x01, 0x08, //Power Setting [07 04 8C]
davidprentice	0:6f633078852b	2517	0xC1, 4, 0x10, 0x10, 0x02, 0x02, //Display Timing [10 10 02 02]
davidprentice	0:6f633078852b	2518	0xC0, 6, 0x00, 0x35, 0x00, 0x00, 0x01, 0x02, //Panel Drive [00 35 00 00 01 02 REV=0,GS=0,SS=0
davidprentice	0:6f633078852b	2519	0xC5, 1, 0x04, //Frame Rate [04]
davidprentice	0:6f633078852b	2520	0xD2, 2, 0x01, 0x04, //Power Setting [01 44]
davidprentice	0:6f633078852b	2521	// 0xC8, 15, 0x04, 0x67, 0x35, 0x04, 0x08, 0x06, 0x24, 0x01, 0x37, 0x40, 0x03, 0x10, 0x08, 0x80, 0x00,
davidprentice	0:6f633078852b	2522	// 0xC8, 15, 0x00, 0x77, 0x77, 0x04, 0x04, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
davidprentice	0:6f633078852b	2523	0xCA, 1, 0x00, //DGC LUT ???
davidprentice	0:6f633078852b	2524	0xEA, 1, 0x80, //3-Gamma Function Enable
davidprentice	0:6f633078852b	2525	// 0xB0, 1, 0x03, //Enable Protect
davidprentice	0:6f633078852b	2526	};
davidprentice	0:6f633078852b	2527	table8_ads = ILI9327_regValues, table_size = sizeof(ILI9327_regValues);
davidprentice	0:6f633078852b	2528	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	2529	*p16 = 400;
davidprentice	0:6f633078852b	2530	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	2531	*p16 = 240;
davidprentice	0:6f633078852b	2532	break;
davidprentice	0:6f633078852b	2533	case 0x1602:
davidprentice	0:6f633078852b	2534	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS; //does not readGRAM
davidprentice	0:6f633078852b	2535	static const uint8_t XX1602_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2536	0xB8, 1, 0x01, //GS [00]
davidprentice	0:6f633078852b	2537	0xC0, 1, 0x0E, //??Power [0A]
davidprentice	0:6f633078852b	2538	};
davidprentice	0:6f633078852b	2539	table8_ads = XX1602_regValues, table_size = sizeof(XX1602_regValues);
davidprentice	0:6f633078852b	2540	break;
davidprentice	0:6f633078852b	2541
davidprentice	0:6f633078852b	2542	case 0x2053: //weird from BangGood
davidprentice	0:6f633078852b	2543	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS \| REV_SCREEN \| READ_BGR;
davidprentice	0:6f633078852b	2544	goto common_9329;
davidprentice	0:6f633078852b	2545	case 0xAC11:
davidprentice	0:6f633078852b	2546	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS \| REV_SCREEN; //thanks viliam
davidprentice	0:6f633078852b	2547	goto common_9329;
davidprentice	0:6f633078852b	2548	case 0x9302:
davidprentice	0:6f633078852b	2549	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS;
davidprentice	0:6f633078852b	2550	goto common_9329;
davidprentice	0:6f633078852b	2551	case 0x9338:
davidprentice	0:6f633078852b	2552	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS;
davidprentice	0:6f633078852b	2553	goto common_9329;
davidprentice	0:6f633078852b	2554	case 0x9329:
davidprentice	0:6f633078852b	2555	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| INVERT_SS \| REV_SCREEN;
davidprentice	0:6f633078852b	2556	common_9329:
davidprentice	0:6f633078852b	2557	static const uint8_t ILI9329_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2558	// 0xF6, 3, 0x01, 0x01, 0x00, //Interface Control needs EXTC=1 MX_EOR=1, TM=0, RIM=0
davidprentice	0:6f633078852b	2559	// 0xB6, 3, 0x0A, 0x82, 0x27, //Display Function [0A 82 27]
davidprentice	0:6f633078852b	2560	// 0xB7, 1, 0x06, //Entry Mode Set [06]
davidprentice	0:6f633078852b	2561	0x36, 1, 0x00, //Memory Access [00] pointless but stops an empty array
davidprentice	0:6f633078852b	2562	};
davidprentice	0:6f633078852b	2563	table8_ads = ILI9329_regValues, table_size = sizeof(ILI9329_regValues);
davidprentice	0:6f633078852b	2564	break;
davidprentice	0:6f633078852b	2565
davidprentice	0:6f633078852b	2566	case 0x9340: //ILI9340 thanks Ravi_kanchan2004 and valmor_jr
davidprentice	0:6f633078852b	2567	//_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS \| REV_SCREEN; //Ravi
davidprentice	0:6f633078852b	2568	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS; //my new shield
davidprentice	0:6f633078852b	2569	goto common_9341;
davidprentice	0:6f633078852b	2570	case 0x9341:
davidprentice	0:6f633078852b	2571	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS;
davidprentice	0:6f633078852b	2572	common_9341:
davidprentice	0:6f633078852b	2573	static const uint8_t ILI9341_regValues_2_4[] PROGMEM = { // BOE 2.4"
davidprentice	0:6f633078852b	2574	0xF6, 3, 0x01, 0x01, 0x00, //Interface Control needs EXTC=1 MV_EOR=0, TM=0, RIM=0
davidprentice	0:6f633078852b	2575	0xCF, 3, 0x00, 0x81, 0x30, //Power Control B [00 81 30]
davidprentice	0:6f633078852b	2576	0xED, 4, 0x64, 0x03, 0x12, 0x81, //Power On Seq [55 01 23 01]
davidprentice	0:6f633078852b	2577	0xE8, 3, 0x85, 0x10, 0x78, //Driver Timing A [04 11 7A]
davidprentice	0:6f633078852b	2578	0xCB, 5, 0x39, 0x2C, 0x00, 0x34, 0x02, //Power Control A [39 2C 00 34 02]
davidprentice	0:6f633078852b	2579	0xF7, 1, 0x20, //Pump Ratio [10]
davidprentice	0:6f633078852b	2580	0xEA, 2, 0x00, 0x00, //Driver Timing B [66 00]
davidprentice	0:6f633078852b	2581	0xB0, 1, 0x00, //RGB Signal [00]
davidprentice	0:6f633078852b	2582	0xB1, 2, 0x00, 0x1B, //Frame Control [00 1B]
davidprentice	0:6f633078852b	2583	// 0xB6, 2, 0x0A, 0xA2, 0x27, //Display Function [0A 82 27 XX] .kbv SS=1
davidprentice	0:6f633078852b	2584	0xB4, 1, 0x00, //Inversion Control [02] .kbv NLA=1, NLB=1, NLC=1
davidprentice	0:6f633078852b	2585	0xC0, 1, 0x21, //Power Control 1 [26]
davidprentice	0:6f633078852b	2586	0xC1, 1, 0x11, //Power Control 2 [00]
davidprentice	0:6f633078852b	2587	0xC5, 2, 0x3F, 0x3C, //VCOM 1 [31 3C]
davidprentice	0:6f633078852b	2588	0xC7, 1, 0xB5, //VCOM 2 [C0]
davidprentice	0:6f633078852b	2589	0x36, 1, 0x48, //Memory Access [00]
davidprentice	0:6f633078852b	2590	0xF2, 1, 0x00, //Enable 3G [02]
davidprentice	0:6f633078852b	2591	0x26, 1, 0x01, //Gamma Set [01]
davidprentice	0:6f633078852b	2592	0xE0, 15, 0x0f, 0x26, 0x24, 0x0b, 0x0e, 0x09, 0x54, 0xa8, 0x46, 0x0c, 0x17, 0x09, 0x0f, 0x07, 0x00,
davidprentice	0:6f633078852b	2593	0xE1, 15, 0x00, 0x19, 0x1b, 0x04, 0x10, 0x07, 0x2a, 0x47, 0x39, 0x03, 0x06, 0x06, 0x30, 0x38, 0x0f,
davidprentice	0:6f633078852b	2594	};
davidprentice	0:6f633078852b	2595	static const uint8_t ILI9341_regValues_ada[] PROGMEM = { // Adafruit_TFTLCD only works with EXTC=0
davidprentice	0:6f633078852b	2596	// 0xF6, 3, 0x00, 0x01, 0x00, //Interface Control needs EXTC=1 TM=0, RIM=0
davidprentice	0:6f633078852b	2597	// 0xF6, 3, 0x01, 0x01, 0x03, //Interface Control needs EXTC=1 RM=1, RIM=1
davidprentice	0:6f633078852b	2598	0xF6, 3, 0x09, 0x01, 0x03, //Interface Control needs EXTC=1 RM=0, RIM=1
davidprentice	0:6f633078852b	2599	0xB0, 1, 0x40, //RGB Signal [40] RCM=2
davidprentice	0:6f633078852b	2600	0xB4, 1, 0x00, //Inversion Control [02] .kbv NLA=1, NLB=1, NLC=1
davidprentice	0:6f633078852b	2601	0xC0, 1, 0x23, //Power Control 1 [26]
davidprentice	0:6f633078852b	2602	0xC1, 1, 0x10, //Power Control 2 [00]
davidprentice	0:6f633078852b	2603	0xC5, 2, 0x2B, 0x2B, //VCOM 1 [31 3C]
davidprentice	0:6f633078852b	2604	0xC7, 1, 0xC0, //VCOM 2 [C0]
davidprentice	0:6f633078852b	2605	0x36, 1, 0x88, //Memory Access [00]
davidprentice	0:6f633078852b	2606	0xB1, 2, 0x00, 0x1B, //Frame Control [00 1B]
davidprentice	0:6f633078852b	2607	0xB7, 1, 0x07, //Entry Mode [00]
davidprentice	0:6f633078852b	2608	};
davidprentice	0:6f633078852b	2609	table8_ads = ILI9341_regValues_2_4, table_size = sizeof(ILI9341_regValues_2_4); //
davidprentice	0:6f633078852b	2610	break;
davidprentice	0:6f633078852b	2611	#if defined(SUPPORT_9342)
davidprentice	0:6f633078852b	2612	case 0x9342:
davidprentice	0:6f633078852b	2613	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS \| INVERT_GS \| REV_SCREEN;
davidprentice	0:6f633078852b	2614	static const uint8_t ILI9342_regValues_CPT24[] PROGMEM = { //CPT 2.4"
davidprentice	0:6f633078852b	2615	(0xB9), 3, 0xFF, 0x93, 0x42, //[00 00 00]
davidprentice	0:6f633078852b	2616	(0xC0), 2, 0x1D, 0x0A, //[26 09]
davidprentice	0:6f633078852b	2617	(0xC1), 1, 0x02, //[10]
davidprentice	0:6f633078852b	2618	(0xC5), 2, 0x2F, 0x2F, //[31 3C]
davidprentice	0:6f633078852b	2619	(0xC7), 1, 0xC3, //[C0]
davidprentice	0:6f633078852b	2620	(0xB8), 1, 0x0B, //[07]
davidprentice	0:6f633078852b	2621	(0xE0), 15, 0x0F, 0x33, 0x30, 0x0C, 0x0F, 0x08, 0x5D, 0x66, 0x4A, 0x07, 0x13, 0x05, 0x1B, 0x0E, 0x08,
davidprentice	0:6f633078852b	2622	(0xE1), 15, 0x08, 0x0E, 0x11, 0x02, 0x0E, 0x02, 0x24, 0x33, 0x37, 0x03, 0x0A, 0x09, 0x26, 0x33, 0x0F,
davidprentice	0:6f633078852b	2623	};
davidprentice	0:6f633078852b	2624	static const uint8_t ILI9342_regValues_Tianma23[] PROGMEM = { //Tianma 2.3"
davidprentice	0:6f633078852b	2625	(0xB9), 3, 0xFF, 0x93, 0x42,
davidprentice	0:6f633078852b	2626	(0xC0), 2, 0x1D, 0x0A,
davidprentice	0:6f633078852b	2627	(0xC1), 1, 0x01,
davidprentice	0:6f633078852b	2628	(0xC5), 2, 0x2C, 0x2C,
davidprentice	0:6f633078852b	2629	(0xC7), 1, 0xC6,
davidprentice	0:6f633078852b	2630	(0xB8), 1, 0x09,
davidprentice	0:6f633078852b	2631	(0xE0), 15, 0x0F, 0x26, 0x21, 0x07, 0x0A, 0x03, 0x4E, 0x62, 0x3E, 0x0B, 0x11, 0x00, 0x08, 0x02, 0x00,
davidprentice	0:6f633078852b	2632	(0xE1), 15, 0x00, 0x19, 0x1E, 0x03, 0x0E, 0x03, 0x30, 0x23, 0x41, 0x03, 0x0B, 0x07, 0x2F, 0x36, 0x0F,
davidprentice	0:6f633078852b	2633	};
davidprentice	0:6f633078852b	2634	static const uint8_t ILI9342_regValues_HSD23[] PROGMEM = { //HSD 2.3"
davidprentice	0:6f633078852b	2635	(0xB9), 3, 0xFF, 0x93, 0x42,
davidprentice	0:6f633078852b	2636	(0xC0), 2, 0x1D, 0x0A,
davidprentice	0:6f633078852b	2637	(0xC1), 1, 0x02,
davidprentice	0:6f633078852b	2638	(0xC5), 2, 0x2F, 0x27,
davidprentice	0:6f633078852b	2639	(0xC7), 1, 0xA4,
davidprentice	0:6f633078852b	2640	(0xB8), 1, 0x0B,
davidprentice	0:6f633078852b	2641	(0xE0), 15, 0x0F, 0x24, 0x21, 0x0C, 0x0F, 0x06, 0x50, 0x75, 0x3F, 0x07, 0x12, 0x05, 0x11, 0x0B, 0x08,
davidprentice	0:6f633078852b	2642	(0xE1), 15, 0x08, 0x1D, 0x20, 0x02, 0x0E, 0x04, 0x31, 0x24, 0x42, 0x03, 0x0B, 0x09, 0x30, 0x36, 0x0F,
davidprentice	0:6f633078852b	2643	};
davidprentice	0:6f633078852b	2644	table8_ads = ILI9342_regValues_CPT24, table_size = sizeof(ILI9342_regValues_CPT24); //
davidprentice	0:6f633078852b	2645	// table8_ads = ILI9342_regValues_Tianma23, table_size = sizeof(ILI9342_regValues_Tianma23); //
davidprentice	0:6f633078852b	2646	// table8_ads = ILI9342_regValues_HSD23, table_size = sizeof(ILI9342_regValues_HSD23); //
davidprentice	0:6f633078852b	2647	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	2648	*p16 = 240;
davidprentice	0:6f633078852b	2649	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	2650	*p16 = 320;
davidprentice	0:6f633078852b	2651	break;
davidprentice	0:6f633078852b	2652	#endif
davidprentice	0:6f633078852b	2653	case 0x1581: //no BGR in MADCTL. set BGR in Panel Control
davidprentice	0:6f633078852b	2654	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS; //thanks zdravke
davidprentice	0:6f633078852b	2655	goto common_9481;
davidprentice	0:6f633078852b	2656	case 0x9481:
davidprentice	0:6f633078852b	2657	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_BGR;
davidprentice	0:6f633078852b	2658	common_9481:
davidprentice	0:6f633078852b	2659	static const uint8_t ILI9481_regValues[] PROGMEM = { // Atmel MaxTouch
davidprentice	0:6f633078852b	2660	0xB0, 1, 0x00, // unlocks E0, F0
davidprentice	0:6f633078852b	2661	0xB3, 4, 0x02, 0x00, 0x00, 0x00, //Frame Memory, interface [02 00 00 00]
davidprentice	0:6f633078852b	2662	0xB4, 1, 0x00, // Frame mode [00]
davidprentice	0:6f633078852b	2663	0xD0, 3, 0x07, 0x42, 0x18, // Set Power [00 43 18] x1.00, x6, x3
davidprentice	0:6f633078852b	2664	0xD1, 3, 0x00, 0x07, 0x10, // Set VCOM [00 00 00] x0.72, x1.02
davidprentice	0:6f633078852b	2665	0xD2, 2, 0x01, 0x02, // Set Power for Normal Mode [01 22]
davidprentice	0:6f633078852b	2666	0xD3, 2, 0x01, 0x02, // Set Power for Partial Mode [01 22]
davidprentice	0:6f633078852b	2667	0xD4, 2, 0x01, 0x02, // Set Power for Idle Mode [01 22]
davidprentice	0:6f633078852b	2668	0xC0, 5, 0x12, 0x3B, 0x00, 0x02, 0x11, //Panel Driving BGR for 1581 [10 3B 00 02 11]
davidprentice	0:6f633078852b	2669	0xC1, 3, 0x10, 0x10, 0x88, // Display Timing Normal [10 10 88]
davidprentice	0:6f633078852b	2670	0xC5, 1, 0x03, //Frame Rate [03]
davidprentice	0:6f633078852b	2671	0xC6, 1, 0x02, //Interface Control [02]
davidprentice	0:6f633078852b	2672	0xC8, 12, 0x00, 0x32, 0x36, 0x45, 0x06, 0x16, 0x37, 0x75, 0x77, 0x54, 0x0C, 0x00,
davidprentice	0:6f633078852b	2673	0xCC, 1, 0x00, //Panel Control [00]
davidprentice	0:6f633078852b	2674	};
davidprentice	0:6f633078852b	2675	static const uint8_t ILI9481_CPT29_regValues[] PROGMEM = { // 320x430
davidprentice	0:6f633078852b	2676	0xB0, 1, 0x00,
davidprentice	0:6f633078852b	2677	0xD0, 3, 0x07, 0x42, 0x1C, // Set Power [00 43 18]
davidprentice	0:6f633078852b	2678	0xD1, 3, 0x00, 0x02, 0x0F, // Set VCOM [00 00 00] x0.695, x1.00
davidprentice	0:6f633078852b	2679	0xD2, 2, 0x01, 0x11, // Set Power for Normal Mode [01 22]
davidprentice	0:6f633078852b	2680	0xC0, 5, 0x10, 0x35, 0x00, 0x02, 0x11, //Set Panel Driving [10 3B 00 02 11]
davidprentice	0:6f633078852b	2681	0xC5, 1, 0x03, //Frame Rate [03]
davidprentice	0:6f633078852b	2682	0xC8, 12, 0x00, 0x30, 0x36, 0x45, 0x04, 0x16, 0x37, 0x75, 0x77, 0x54, 0x0F, 0x00,
davidprentice	0:6f633078852b	2683	0xE4, 1, 0xA0,
davidprentice	0:6f633078852b	2684	0xF0, 1, 0x01,
davidprentice	0:6f633078852b	2685	0xF3, 2, 0x02, 0x1A,
davidprentice	0:6f633078852b	2686	};
davidprentice	0:6f633078852b	2687	static const uint8_t ILI9481_PVI35_regValues[] PROGMEM = { // 320x480
davidprentice	0:6f633078852b	2688	0xB0, 1, 0x00,
davidprentice	0:6f633078852b	2689	0xD0, 3, 0x07, 0x41, 0x1D, // Set Power [00 43 18]
davidprentice	0:6f633078852b	2690	0xD1, 3, 0x00, 0x2B, 0x1F, // Set VCOM [00 00 00] x0.900, x1.32
davidprentice	0:6f633078852b	2691	0xD2, 2, 0x01, 0x11, // Set Power for Normal Mode [01 22]
davidprentice	0:6f633078852b	2692	0xC0, 5, 0x10, 0x3B, 0x00, 0x02, 0x11, //Set Panel Driving [10 3B 00 02 11]
davidprentice	0:6f633078852b	2693	0xC5, 1, 0x03, //Frame Rate [03]
davidprentice	0:6f633078852b	2694	0xC8, 12, 0x00, 0x14, 0x33, 0x10, 0x00, 0x16, 0x44, 0x36, 0x77, 0x00, 0x0F, 0x00,
davidprentice	0:6f633078852b	2695	0xE4, 1, 0xA0,
davidprentice	0:6f633078852b	2696	0xF0, 1, 0x01,
davidprentice	0:6f633078852b	2697	0xF3, 2, 0x40, 0x0A,
davidprentice	0:6f633078852b	2698	};
davidprentice	0:6f633078852b	2699	static const uint8_t ILI9481_AUO317_regValues[] PROGMEM = { // 320x480
davidprentice	0:6f633078852b	2700	0xB0, 1, 0x00,
davidprentice	0:6f633078852b	2701	0xD0, 3, 0x07, 0x40, 0x1D, // Set Power [00 43 18]
davidprentice	0:6f633078852b	2702	0xD1, 3, 0x00, 0x18, 0x13, // Set VCOM [00 00 00] x0.805, x1.08
davidprentice	0:6f633078852b	2703	0xD2, 2, 0x01, 0x11, // Set Power for Normal Mode [01 22]
davidprentice	0:6f633078852b	2704	0xC0, 5, 0x10, 0x3B, 0x00, 0x02, 0x11, //Set Panel Driving [10 3B 00 02 11]
davidprentice	0:6f633078852b	2705	0xC5, 1, 0x03, //Frame Rate [03]
davidprentice	0:6f633078852b	2706	0xC8, 12, 0x00, 0x44, 0x06, 0x44, 0x0A, 0x08, 0x17, 0x33, 0x77, 0x44, 0x08, 0x0C,
davidprentice	0:6f633078852b	2707	0xE4, 1, 0xA0,
davidprentice	0:6f633078852b	2708	0xF0, 1, 0x01,
davidprentice	0:6f633078852b	2709	};
davidprentice	0:6f633078852b	2710	static const uint8_t ILI9481_CMO35_regValues[] PROGMEM = { // 320480
davidprentice	0:6f633078852b	2711	0xB0, 1, 0x00,
davidprentice	0:6f633078852b	2712	0xD0, 3, 0x07, 0x41, 0x1D, // Set Power [00 43 18] 07,41,1D
davidprentice	0:6f633078852b	2713	0xD1, 3, 0x00, 0x1C, 0x1F, // Set VCOM [00 00 00] x0.825, x1.32 1C,1F
davidprentice	0:6f633078852b	2714	0xD2, 2, 0x01, 0x11, // Set Power for Normal Mode [01 22]
davidprentice	0:6f633078852b	2715	0xC0, 5, 0x10, 0x3B, 0x00, 0x02, 0x11, //Set Panel Driving [10 3B 00 02 11]
davidprentice	0:6f633078852b	2716	0xC5, 1, 0x03, //Frame Rate [03]
davidprentice	0:6f633078852b	2717	0xC6, 1, 0x83,
davidprentice	0:6f633078852b	2718	0xC8, 12, 0x00, 0x26, 0x21, 0x00, 0x00, 0x1F, 0x65, 0x23, 0x77, 0x00, 0x0F, 0x00,
davidprentice	0:6f633078852b	2719	0xF0, 1, 0x01, //?
davidprentice	0:6f633078852b	2720	0xE4, 1, 0xA0, //?SETCABC on Himax
davidprentice	0:6f633078852b	2721	0x36, 1, 0x48, //Memory Access [00]
davidprentice	0:6f633078852b	2722	0xB4, 1, 0x11,
davidprentice	0:6f633078852b	2723	};
davidprentice	0:6f633078852b	2724	static const uint8_t ILI9481_RGB_regValues[] PROGMEM = { // 320x480
davidprentice	0:6f633078852b	2725	0xB0, 1, 0x00,
davidprentice	0:6f633078852b	2726	0xD0, 3, 0x07, 0x41, 0x1D, // SETPOWER [00 43 18]
davidprentice	0:6f633078852b	2727	0xD1, 3, 0x00, 0x2B, 0x1F, // SETVCOM [00 00 00] x0.900, x1.32
davidprentice	0:6f633078852b	2728	0xD2, 2, 0x01, 0x11, // SETNORPOW for Normal Mode [01 22]
davidprentice	0:6f633078852b	2729	0xC0, 6, 0x10, 0x3B, 0x00, 0x02, 0x11, 0x00, //SETPANEL [10 3B 00 02 11]
davidprentice	0:6f633078852b	2730	0xC5, 1, 0x03, //SETOSC Frame Rate [03]
davidprentice	0:6f633078852b	2731	0xC6, 1, 0x80, //SETRGB interface control
davidprentice	0:6f633078852b	2732	0xC8, 12, 0x00, 0x14, 0x33, 0x10, 0x00, 0x16, 0x44, 0x36, 0x77, 0x00, 0x0F, 0x00,
davidprentice	0:6f633078852b	2733	0xF3, 2, 0x40, 0x0A,
davidprentice	0:6f633078852b	2734	0xF0, 1, 0x08,
davidprentice	0:6f633078852b	2735	0xF6, 1, 0x84,
davidprentice	0:6f633078852b	2736	0xF7, 1, 0x80,
davidprentice	0:6f633078852b	2737	0x0C, 2, 0x00, 0x55, //RDCOLMOD
davidprentice	0:6f633078852b	2738	0xB4, 1, 0x00, //SETDISPLAY
davidprentice	0:6f633078852b	2739	// 0xB3, 4, 0x00, 0x01, 0x06, 0x01, //SETGRAM simple example
davidprentice	0:6f633078852b	2740	0xB3, 4, 0x00, 0x01, 0x06, 0x30, //jpegs example
davidprentice	0:6f633078852b	2741	};
davidprentice	0:6f633078852b	2742	table8_ads = ILI9481_regValues, table_size = sizeof(ILI9481_regValues);
davidprentice	0:6f633078852b	2743	// table8_ads = ILI9481_CPT29_regValues, table_size = sizeof(ILI9481_CPT29_regValues);
davidprentice	0:6f633078852b	2744	// table8_ads = ILI9481_PVI35_regValues, table_size = sizeof(ILI9481_PVI35_regValues);
davidprentice	0:6f633078852b	2745	// table8_ads = ILI9481_AUO317_regValues, table_size = sizeof(ILI9481_AUO317_regValues);
davidprentice	0:6f633078852b	2746	// table8_ads = ILI9481_CMO35_regValues, table_size = sizeof(ILI9481_CMO35_regValues);
davidprentice	0:6f633078852b	2747	// table8_ads = ILI9481_RGB_regValues, table_size = sizeof(ILI9481_RGB_regValues);
davidprentice	0:6f633078852b	2748	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	2749	*p16 = 480;
davidprentice	0:6f633078852b	2750	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	2751	*p16 = 320;
davidprentice	0:6f633078852b	2752	break;
davidprentice	0:6f633078852b	2753	case 0x9486:
davidprentice	0:6f633078852b	2754	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS; //Red 3.5", Blue 3.5"
davidprentice	0:6f633078852b	2755	// _lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| REV_SCREEN; //old Red 3.5"
davidprentice	0:6f633078852b	2756	static const uint8_t ILI9486_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2757	/*
davidprentice	0:6f633078852b	2758	0xF2, 9, 0x1C, 0xA3, 0x32, 0x02, 0xB2, 0x12, 0xFF, 0x12, 0x00, //f.k
davidprentice	0:6f633078852b	2759	0xF1, 2, 0x36, 0xA4, //
davidprentice	0:6f633078852b	2760	0xF8, 2, 0x21, 0x04, //
davidprentice	0:6f633078852b	2761	0xF9, 2, 0x00, 0x08, //
davidprentice	0:6f633078852b	2762	*/
davidprentice	0:6f633078852b	2763	0xC0, 2, 0x0d, 0x0d, //Power Control 1 [0E 0E]
davidprentice	0:6f633078852b	2764	0xC1, 2, 0x43, 0x00, //Power Control 2 [43 00]
davidprentice	0:6f633078852b	2765	0xC2, 1, 0x00, //Power Control 3 [33]
davidprentice	0:6f633078852b	2766	0xC5, 4, 0x00, 0x48, 0x00, 0x48, //VCOM Control 1 [00 40 00 40]
davidprentice	0:6f633078852b	2767	0xB4, 1, 0x00, //Inversion Control [00]
davidprentice	0:6f633078852b	2768	0xB6, 3, 0x02, 0x02, 0x3B, // Display Function Control [02 02 3B]
davidprentice	0:6f633078852b	2769	#define GAMMA9486 4
davidprentice	0:6f633078852b	2770	#if GAMMA9486 == 0
davidprentice	0:6f633078852b	2771	// default GAMMA terrible
davidprentice	0:6f633078852b	2772	#elif GAMMA9486 == 1
davidprentice	0:6f633078852b	2773	// GAMMA f.k. bad
davidprentice	0:6f633078852b	2774	0xE0, 15, 0x0f, 0x31, 0x2b, 0x0c, 0x0e, 0x08, 0x4e, 0xf1, 0x37, 0x07, 0x10, 0x03, 0x0e, 0x09, 0x00,
davidprentice	0:6f633078852b	2775	0xE1, 15, 0x00, 0x0e, 0x14, 0x03, 0x11, 0x07, 0x31, 0xC1, 0x48, 0x08, 0x0f, 0x0c, 0x31, 0x36, 0x0f,
davidprentice	0:6f633078852b	2776	#elif GAMMA9486 == 2
davidprentice	0:6f633078852b	2777	// 1.2 CPT 3.5 Inch Initial Code not bad
davidprentice	0:6f633078852b	2778	0xE0, 15, 0x0F, 0x1B, 0x18, 0x0B, 0x0E, 0x09, 0x47, 0x94, 0x35, 0x0A, 0x13, 0x05, 0x08, 0x03, 0x00,
davidprentice	0:6f633078852b	2779	0xE1, 15, 0x0F, 0x3A, 0x37, 0x0B, 0x0C, 0x05, 0x4A, 0x24, 0x39, 0x07, 0x10, 0x04, 0x27, 0x25, 0x00,
davidprentice	0:6f633078852b	2780	#elif GAMMA9486 == 3
davidprentice	0:6f633078852b	2781	// 2.2 HSD 3.5 Inch Initial Code not bad
davidprentice	0:6f633078852b	2782	0xE0, 15, 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98, 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x00,
davidprentice	0:6f633078852b	2783	0xE1, 15, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75, 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
davidprentice	0:6f633078852b	2784	#elif GAMMA9486 == 4
davidprentice	0:6f633078852b	2785	// 3.2 TM 3.2 Inch Initial Code not bad
davidprentice	0:6f633078852b	2786	0xE0, 15, 0x0F, 0x21, 0x1C, 0x0B, 0x0E, 0x08, 0x49, 0x98, 0x38, 0x09, 0x11, 0x03, 0x14, 0x10, 0x00,
davidprentice	0:6f633078852b	2787	0xE1, 15, 0x0F, 0x2F, 0x2B, 0x0C, 0x0E, 0x06, 0x47, 0x76, 0x37, 0x07, 0x11, 0x04, 0x23, 0x1E, 0x00,
davidprentice	0:6f633078852b	2788	#elif GAMMA9486 == 5
davidprentice	0:6f633078852b	2789	// 4.2 WTK 3.5 Inch Initial Code too white
davidprentice	0:6f633078852b	2790	0xE0, 15, 0x0F, 0x10, 0x08, 0x05, 0x09, 0x05, 0x37, 0x98, 0x26, 0x07, 0x0F, 0x02, 0x09, 0x07, 0x00,
davidprentice	0:6f633078852b	2791	0xE1, 15, 0x0F, 0x38, 0x36, 0x0D, 0x10, 0x08, 0x59, 0x76, 0x48, 0x0A, 0x16, 0x0A, 0x37, 0x2F, 0x00,
davidprentice	0:6f633078852b	2792	#endif
davidprentice	0:6f633078852b	2793	};
davidprentice	0:6f633078852b	2794	table8_ads = ILI9486_regValues, table_size = sizeof(ILI9486_regValues);
davidprentice	0:6f633078852b	2795	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	2796	*p16 = 480;
davidprentice	0:6f633078852b	2797	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	2798	*p16 = 320;
davidprentice	0:6f633078852b	2799	break;
davidprentice	0:6f633078852b	2800	case 0x7796:
davidprentice	0:6f633078852b	2801	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS; //thanks to safari1
davidprentice	0:6f633078852b	2802	static const uint8_t PROGMEM ST7796_regValues[] = {
davidprentice	0:6f633078852b	2803	0xB7, 1, 0xC6, //Entry Mode [06]
davidprentice	0:6f633078852b	2804	0xE8, 8, 0x40, 0x8A, 0x00, 0x00, 0x29, 0x19, 0xA5, 0x33, //Adj3 [40 8A 00 00 25 0A 38 33]
davidprentice	0:6f633078852b	2805	};
davidprentice	0:6f633078852b	2806	table8_ads = ST7796_regValues, table_size = sizeof(ST7796_regValues);
davidprentice	0:6f633078852b	2807	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	2808	*p16 = 480;
davidprentice	0:6f633078852b	2809	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	2810	*p16 = 320;
davidprentice	0:6f633078852b	2811	break;
davidprentice	0:6f633078852b	2812	//goto common_9488;
davidprentice	0:6f633078852b	2813	case 0x9487: //with thanks to Charlyf
davidprentice	0:6f633078852b	2814	case 0x9488:
davidprentice	0:6f633078852b	2815	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS;
davidprentice	0:6f633078852b	2816	common_9488:
davidprentice	0:6f633078852b	2817	static const uint8_t ILI9488_regValues_max[] PROGMEM = { // Atmel MaxTouch
davidprentice	0:6f633078852b	2818	0xC0, 2, 0x10, 0x10, //Power Control 1 [0E 0E]
davidprentice	0:6f633078852b	2819	0xC1, 1, 0x41, //Power Control 2 [43]
davidprentice	0:6f633078852b	2820	0xC5, 4, 0x00, 0x22, 0x80, 0x40, //VCOM Control 1 [00 40 00 40]
davidprentice	0:6f633078852b	2821	0x36, 1, 0x68, //Memory Access [00]
davidprentice	0:6f633078852b	2822	0xB0, 1, 0x00, //Interface [00]
davidprentice	0:6f633078852b	2823	0xB1, 2, 0xB0, 0x11, //Frame Rate Control [B0 11]
davidprentice	0:6f633078852b	2824	0xB4, 1, 0x02, //Inversion Control [02]
davidprentice	0:6f633078852b	2825	0xB6, 3, 0x02, 0x02, 0x3B, // Display Function Control [02 02 3B] .kbv NL=480
davidprentice	0:6f633078852b	2826	0xB7, 1, 0xC6, //Entry Mode [06]
davidprentice	0:6f633078852b	2827	0x3A, 1, 0x55, //Interlace Pixel Format [XX]
davidprentice	0:6f633078852b	2828	0xF7, 4, 0xA9, 0x51, 0x2C, 0x82, //Adjustment Control 3 [A9 51 2C 82]
davidprentice	0:6f633078852b	2829	};
davidprentice	0:6f633078852b	2830	table8_ads = ILI9488_regValues_max, table_size = sizeof(ILI9488_regValues_max);
davidprentice	0:6f633078852b	2831	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	2832	*p16 = 480;
davidprentice	0:6f633078852b	2833	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	2834	*p16 = 320;
davidprentice	0:6f633078852b	2835	break;
davidprentice	0:6f633078852b	2836	case 0xB505: //R61505V
davidprentice	0:6f633078852b	2837	case 0xC505: //R61505W
davidprentice	0:6f633078852b	2838	_lcd_capable = 0 \| REV_SCREEN \| READ_LOWHIGH;
davidprentice	0:6f633078852b	2839	static const uint16_t R61505V_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2840	0x0000, 0x0000,
davidprentice	0:6f633078852b	2841	0x0000, 0x0000,
davidprentice	0:6f633078852b	2842	0x0000, 0x0000,
davidprentice	0:6f633078852b	2843	0x0000, 0x0001,
davidprentice	0:6f633078852b	2844	0x00A4, 0x0001, //CALB=1
davidprentice	0:6f633078852b	2845	TFTLCD_DELAY, 10,
davidprentice	0:6f633078852b	2846	0x0060, 0x2700, //NL
davidprentice	0:6f633078852b	2847	0x0008, 0x0808, //FP & BP
davidprentice	0:6f633078852b	2848	0x0030, 0x0214, //Gamma settings
davidprentice	0:6f633078852b	2849	0x0031, 0x3715,
davidprentice	0:6f633078852b	2850	0x0032, 0x0604,
davidprentice	0:6f633078852b	2851	0x0033, 0x0E16,
davidprentice	0:6f633078852b	2852	0x0034, 0x2211,
davidprentice	0:6f633078852b	2853	0x0035, 0x1500,
davidprentice	0:6f633078852b	2854	0x0036, 0x8507,
davidprentice	0:6f633078852b	2855	0x0037, 0x1407,
davidprentice	0:6f633078852b	2856	0x0038, 0x1403,
davidprentice	0:6f633078852b	2857	0x0039, 0x0020,
davidprentice	0:6f633078852b	2858	0x0090, 0x0015, //DIVI & RTNI
davidprentice	0:6f633078852b	2859	0x0010, 0x0410, //BT=4,AP=1
davidprentice	0:6f633078852b	2860	0x0011, 0x0237, //DC1=2,DC0=3, VC=7
davidprentice	0:6f633078852b	2861	0x0029, 0x0046, //VCM1=70
davidprentice	0:6f633078852b	2862	0x002A, 0x0046, //VCMSEL=0,VCM2=70
davidprentice	0:6f633078852b	2863	// Sleep mode IN sequence
davidprentice	0:6f633078852b	2864	0x0007, 0x0000,
davidprentice	0:6f633078852b	2865	//0x0012, 0x0000, //PSON=0,PON=0
davidprentice	0:6f633078852b	2866	// Sleep mode EXIT sequence
davidprentice	0:6f633078852b	2867	0x0012, 0x0189, //VCMR=1,PSON=0,PON=0,VRH=9
davidprentice	0:6f633078852b	2868	0x0013, 0x1100, //VDV=17
davidprentice	0:6f633078852b	2869	TFTLCD_DELAY, 150,
davidprentice	0:6f633078852b	2870	0x0012, 0x01B9, //VCMR=1,PSON=1,PON=1,VRH=9 [018F]
davidprentice	0:6f633078852b	2871	0x0001, 0x0100, //SS=1 Other mode settings
davidprentice	0:6f633078852b	2872	0x0002, 0x0200, //BC0=1--Line inversion
davidprentice	0:6f633078852b	2873	0x0003, 0x1030,
davidprentice	0:6f633078852b	2874	0x0009, 0x0001, //ISC=1 [0000]
davidprentice	0:6f633078852b	2875	0x000A, 0x0000, // [0000]
davidprentice	0:6f633078852b	2876	// 0x000C, 0x0001, //RIM=1 [0000]
davidprentice	0:6f633078852b	2877	0x000D, 0x0000, // [0000]
davidprentice	0:6f633078852b	2878	0x000E, 0x0030, //VEM=3 VCOM equalize [0000]
davidprentice	0:6f633078852b	2879	0x0061, 0x0001,
davidprentice	0:6f633078852b	2880	0x006A, 0x0000,
davidprentice	0:6f633078852b	2881	0x0080, 0x0000,
davidprentice	0:6f633078852b	2882	0x0081, 0x0000,
davidprentice	0:6f633078852b	2883	0x0082, 0x005F,
davidprentice	0:6f633078852b	2884	0x0092, 0x0100,
davidprentice	0:6f633078852b	2885	0x0093, 0x0701,
davidprentice	0:6f633078852b	2886	TFTLCD_DELAY, 80,
davidprentice	0:6f633078852b	2887	0x0007, 0x0100, //BASEE=1--Display On
davidprentice	0:6f633078852b	2888	};
davidprentice	0:6f633078852b	2889	init_table16(R61505V_regValues, sizeof(R61505V_regValues));
davidprentice	0:6f633078852b	2890	break;
davidprentice	0:6f633078852b	2891
davidprentice	0:6f633078852b	2892	#if defined(SUPPORT_B509_7793)
davidprentice	0:6f633078852b	2893	case 0x7793:
davidprentice	0:6f633078852b	2894	case 0xB509:
davidprentice	0:6f633078852b	2895	_lcd_capable = REV_SCREEN;
davidprentice	0:6f633078852b	2896	static const uint16_t R61509V_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2897	0x0000, 0x0000,
davidprentice	0:6f633078852b	2898	0x0000, 0x0000,
davidprentice	0:6f633078852b	2899	0x0000, 0x0000,
davidprentice	0:6f633078852b	2900	0x0000, 0x0000,
davidprentice	0:6f633078852b	2901	TFTLCD_DELAY, 15,
davidprentice	0:6f633078852b	2902	0x0400, 0x6200, //NL=0x31 (49) i.e. 400 rows
davidprentice	0:6f633078852b	2903	0x0008, 0x0808,
davidprentice	0:6f633078852b	2904	//gamma
davidprentice	0:6f633078852b	2905	0x0300, 0x0C00,
davidprentice	0:6f633078852b	2906	0x0301, 0x5A0B,
davidprentice	0:6f633078852b	2907	0x0302, 0x0906,
davidprentice	0:6f633078852b	2908	0x0303, 0x1017,
davidprentice	0:6f633078852b	2909	0x0304, 0x2300,
davidprentice	0:6f633078852b	2910	0x0305, 0x1700,
davidprentice	0:6f633078852b	2911	0x0306, 0x6309,
davidprentice	0:6f633078852b	2912	0x0307, 0x0C09,
davidprentice	0:6f633078852b	2913	0x0308, 0x100C,
davidprentice	0:6f633078852b	2914	0x0309, 0x2232,
davidprentice	0:6f633078852b	2915
davidprentice	0:6f633078852b	2916	0x0010, 0x0016, //69.5Hz 0016
davidprentice	0:6f633078852b	2917	0x0011, 0x0101,
davidprentice	0:6f633078852b	2918	0x0012, 0x0000,
davidprentice	0:6f633078852b	2919	0x0013, 0x0001,
davidprentice	0:6f633078852b	2920
davidprentice	0:6f633078852b	2921	0x0100, 0x0330, //BT,AP
davidprentice	0:6f633078852b	2922	0x0101, 0x0237, //DC0,DC1,VC
davidprentice	0:6f633078852b	2923	0x0103, 0x0D00, //VDV
davidprentice	0:6f633078852b	2924	0x0280, 0x6100, //VCM
davidprentice	0:6f633078852b	2925	0x0102, 0xC1B0, //VRH,VCMR,PSON,PON
davidprentice	0:6f633078852b	2926	TFTLCD_DELAY, 50,
davidprentice	0:6f633078852b	2927
davidprentice	0:6f633078852b	2928	0x0001, 0x0100,
davidprentice	0:6f633078852b	2929	0x0002, 0x0100,
davidprentice	0:6f633078852b	2930	0x0003, 0x1030, //1030
davidprentice	0:6f633078852b	2931	0x0009, 0x0001,
davidprentice	0:6f633078852b	2932	0x000C, 0x0000,
davidprentice	0:6f633078852b	2933	0x0090, 0x8000,
davidprentice	0:6f633078852b	2934	0x000F, 0x0000,
davidprentice	0:6f633078852b	2935
davidprentice	0:6f633078852b	2936	0x0210, 0x0000,
davidprentice	0:6f633078852b	2937	0x0211, 0x00EF,
davidprentice	0:6f633078852b	2938	0x0212, 0x0000,
davidprentice	0:6f633078852b	2939	0x0213, 0x018F, //432=01AF,400=018F
davidprentice	0:6f633078852b	2940	0x0500, 0x0000,
davidprentice	0:6f633078852b	2941	0x0501, 0x0000,
davidprentice	0:6f633078852b	2942	0x0502, 0x005F, //???
davidprentice	0:6f633078852b	2943	0x0401, 0x0001, //REV=1
davidprentice	0:6f633078852b	2944	0x0404, 0x0000,
davidprentice	0:6f633078852b	2945	TFTLCD_DELAY, 50,
davidprentice	0:6f633078852b	2946
davidprentice	0:6f633078852b	2947	0x0007, 0x0100, //BASEE
davidprentice	0:6f633078852b	2948	TFTLCD_DELAY, 50,
davidprentice	0:6f633078852b	2949
davidprentice	0:6f633078852b	2950	0x0200, 0x0000,
davidprentice	0:6f633078852b	2951	0x0201, 0x0000,
davidprentice	0:6f633078852b	2952	};
davidprentice	0:6f633078852b	2953	init_table16(R61509V_regValues, sizeof(R61509V_regValues));
davidprentice	0:6f633078852b	2954	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	2955	*p16 = 400;
davidprentice	0:6f633078852b	2956	break;
davidprentice	0:6f633078852b	2957	#endif
davidprentice	0:6f633078852b	2958
davidprentice	0:6f633078852b	2959	#ifdef SUPPORT_9806
davidprentice	0:6f633078852b	2960	case 0x9806:
davidprentice	0:6f633078852b	2961	_lcd_capable = AUTO_READINC \| MIPI_DCS_REV1 \| MV_AXIS \| READ_24BITS;
davidprentice	0:6f633078852b	2962	// from ZinggJM
davidprentice	0:6f633078852b	2963	static const uint8_t ILI9806_regValues[] PROGMEM = {
davidprentice	0:6f633078852b	2964	(0xFF), 3, /* EXTC Command Set enable register*/ 0xFF, 0x98, 0x06,
davidprentice	0:6f633078852b	2965	(0xBA), 1, /* SPI Interface Setting*/0xE0,
davidprentice	0:6f633078852b	2966	(0xBC), 21, /* GIP 1*/0x03, 0x0F, 0x63, 0x69, 0x01, 0x01, 0x1B, 0x11, 0x70, 0x73, 0xFF, 0xFF, 0x08, 0x09, 0x05, 0x00, 0xEE, 0xE2, 0x01, 0x00, 0xC1,
davidprentice	0:6f633078852b	2967	(0xBD), 8, /* GIP 2*/0x01, 0x23, 0x45, 0x67, 0x01, 0x23, 0x45, 0x67,
davidprentice	0:6f633078852b	2968	(0xBE), 9, /* GIP 3*/0x00, 0x22, 0x27, 0x6A, 0xBC, 0xD8, 0x92, 0x22, 0x22,
davidprentice	0:6f633078852b	2969	(0xC7), 1, /* Vcom*/0x1E,
davidprentice	0:6f633078852b	2970	(0xED), 3, /* EN_volt_reg*/0x7F, 0x0F, 0x00,
davidprentice	0:6f633078852b	2971	(0xC0), 3, /* Power Control 1*/0xE3, 0x0B, 0x00,
davidprentice	0:6f633078852b	2972	(0xFC), 1, 0x08,
davidprentice	0:6f633078852b	2973	(0xDF), 6, /* Engineering Setting*/0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
davidprentice	0:6f633078852b	2974	(0xF3), 1, /* DVDD Voltage Setting*/0x74,
davidprentice	0:6f633078852b	2975	(0xB4), 3, /* Display Inversion Control*/0x00, 0x00, 0x00,
davidprentice	0:6f633078852b	2976	(0xF7), 1, /* 480x854*/0x81,
davidprentice	0:6f633078852b	2977	(0xB1), 3, /* Frame Rate*/0x00, 0x10, 0x14,
davidprentice	0:6f633078852b	2978	(0xF1), 3, /* Panel Timing Control*/0x29, 0x8A, 0x07,
davidprentice	0:6f633078852b	2979	(0xF2), 4, /Panel Timing Control/0x40, 0xD2, 0x50, 0x28,
davidprentice	0:6f633078852b	2980	(0xC1), 4, /* Power Control 2*/0x17, 0x85, 0x85, 0x20,
davidprentice	0:6f633078852b	2981	(0xE0), 16, 0x00, 0x0C, 0x15, 0x0D, 0x0F, 0x0C, 0x07, 0x05, 0x07, 0x0B, 0x10, 0x10, 0x0D, 0x17, 0x0F, 0x00,
davidprentice	0:6f633078852b	2982	(0xE1), 16, 0x00, 0x0D, 0x15, 0x0E, 0x10, 0x0D, 0x08, 0x06, 0x07, 0x0C, 0x11, 0x11, 0x0E, 0x17, 0x0F, 0x00,
davidprentice	0:6f633078852b	2983	(0x35), 1, /Tearing Effect ON/0x00,
davidprentice	0:6f633078852b	2984	};
davidprentice	0:6f633078852b	2985	table8_ads = ILI9806_regValues, table_size = sizeof(ILI9806_regValues);
davidprentice	0:6f633078852b	2986	p16 = (int16_t *) & HEIGHT;
davidprentice	0:6f633078852b	2987	*p16 = 480;
davidprentice	0:6f633078852b	2988	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	2989	*p16 = 854;
davidprentice	0:6f633078852b	2990	break;
davidprentice	0:6f633078852b	2991	#endif
davidprentice	0:6f633078852b	2992	default:
davidprentice	0:6f633078852b	2993	p16 = (int16_t *) & WIDTH;
davidprentice	0:6f633078852b	2994	*p16 = 0; //error value for WIDTH
davidprentice	0:6f633078852b	2995	break;
davidprentice	0:6f633078852b	2996	}
davidprentice	0:6f633078852b	2997	_lcd_rev = ((_lcd_capable & REV_SCREEN) != 0);
davidprentice	0:6f633078852b	2998	if (table8_ads != NULL) {
davidprentice	0:6f633078852b	2999	static const uint8_t reset_off[] PROGMEM = {
davidprentice	0:6f633078852b	3000	0x01, 0, //Soft Reset
davidprentice	0:6f633078852b	3001	TFTLCD_DELAY8, 150, // .kbv will power up with ONLY reset, sleep out, display on
davidprentice	0:6f633078852b	3002	0x28, 0, //Display Off
davidprentice	0:6f633078852b	3003	0x3A, 1, 0x55, //Pixel read=565, write=565.
davidprentice	0:6f633078852b	3004	};
davidprentice	0:6f633078852b	3005	static const uint8_t wake_on[] PROGMEM = {
davidprentice	0:6f633078852b	3006	0x11, 0, //Sleep Out
davidprentice	0:6f633078852b	3007	TFTLCD_DELAY8, 150,
davidprentice	0:6f633078852b	3008	0x29, 0, //Display On
davidprentice	0:6f633078852b	3009	};
davidprentice	0:6f633078852b	3010	init_table(&reset_off, sizeof(reset_off));
davidprentice	0:6f633078852b	3011	init_table(table8_ads, table_size); //can change PIXFMT
davidprentice	0:6f633078852b	3012	init_table(&wake_on, sizeof(wake_on));
davidprentice	0:6f633078852b	3013	}
davidprentice	0:6f633078852b	3014	setRotation(0); //PORTRAIT
davidprentice	0:6f633078852b	3015	invertDisplay(false);
davidprentice	0:6f633078852b	3016	#if defined(SUPPORT_9488_555)
davidprentice	0:6f633078852b	3017	if (_lcd_ID == 0x9488) {
davidprentice	0:6f633078852b	3018	is555 = 0;
davidprentice	0:6f633078852b	3019	drawPixel(0, 0, 0xFFE0);
davidprentice	0:6f633078852b	3020	if (readPixel(0, 0) == 0xFF1F) {
davidprentice	0:6f633078852b	3021	uint8_t pixfmt = 0x06;
davidprentice	0:6f633078852b	3022	pushCommand(0x3A, &pixfmt, 1);
davidprentice	0:6f633078852b	3023	_lcd_capable &= ~READ_24BITS;
davidprentice	0:6f633078852b	3024	is555 = 1;
davidprentice	0:6f633078852b	3025	}
davidprentice	0:6f633078852b	3026	}
davidprentice	0:6f633078852b	3027	#endif
davidprentice	0:6f633078852b	3028	}
davidprentice	0:6f633078852b	3029

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Type:	Library
Created:	26 Apr 2021
Imports:	16
Forks:	0
Commits:	4
Dependents:	13
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MCUFRIEND_kbv.cpp@3:47aa91940108, 2021-05-14 (annotated)

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