Darran Shepherd
First step: AutoIP compiled in and working
drv/usb/USBHostLite/usbhost_lpc17xx.c@0:55a05330f8cc, 2010-06-18 (annotated)
- Committer:
- darran
- Date:
- Fri Jun 18 09:11:35 2010 +0000
- Revision:
- 0:55a05330f8cc
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| darran | 0:55a05330f8cc | 1 | |
| darran | 0:55a05330f8cc | 2 | /* |
| darran | 0:55a05330f8cc | 3 | Copyright (c) 2010 Donatien Garnier (donatiengar [at] gmail [dot] com) |
| darran | 0:55a05330f8cc | 4 | |
| darran | 0:55a05330f8cc | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy |
| darran | 0:55a05330f8cc | 6 | of this software and associated documentation files (the "Software"), to deal |
| darran | 0:55a05330f8cc | 7 | in the Software without restriction, including without limitation the rights |
| darran | 0:55a05330f8cc | 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| darran | 0:55a05330f8cc | 9 | copies of the Software, and to permit persons to whom the Software is |
| darran | 0:55a05330f8cc | 10 | furnished to do so, subject to the following conditions: |
| darran | 0:55a05330f8cc | 11 | |
| darran | 0:55a05330f8cc | 12 | The above copyright notice and this permission notice shall be included in |
| darran | 0:55a05330f8cc | 13 | all copies or substantial portions of the Software. |
| darran | 0:55a05330f8cc | 14 | |
| darran | 0:55a05330f8cc | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| darran | 0:55a05330f8cc | 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| darran | 0:55a05330f8cc | 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| darran | 0:55a05330f8cc | 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| darran | 0:55a05330f8cc | 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| darran | 0:55a05330f8cc | 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| darran | 0:55a05330f8cc | 21 | THE SOFTWARE. |
| darran | 0:55a05330f8cc | 22 | */ |
| darran | 0:55a05330f8cc | 23 | |
| darran | 0:55a05330f8cc | 24 | /* |
| darran | 0:55a05330f8cc | 25 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 26 | * NXP USB Host Stack |
| darran | 0:55a05330f8cc | 27 | * |
| darran | 0:55a05330f8cc | 28 | * (c) Copyright 2008, NXP SemiConductors |
| darran | 0:55a05330f8cc | 29 | * (c) Copyright 2008, OnChip Technologies LLC |
| darran | 0:55a05330f8cc | 30 | * All Rights Reserved |
| darran | 0:55a05330f8cc | 31 | * |
| darran | 0:55a05330f8cc | 32 | * www.nxp.com |
| darran | 0:55a05330f8cc | 33 | * www.onchiptech.com |
| darran | 0:55a05330f8cc | 34 | * |
| darran | 0:55a05330f8cc | 35 | * File : usbhost_lpc17xx.c |
| darran | 0:55a05330f8cc | 36 | * Programmer(s) : Ravikanth.P |
| darran | 0:55a05330f8cc | 37 | * Version : |
| darran | 0:55a05330f8cc | 38 | * |
| darran | 0:55a05330f8cc | 39 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 40 | */ |
| darran | 0:55a05330f8cc | 41 | |
| darran | 0:55a05330f8cc | 42 | /* |
| darran | 0:55a05330f8cc | 43 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 44 | * INCLUDE HEADER FILES |
| darran | 0:55a05330f8cc | 45 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 46 | */ |
| darran | 0:55a05330f8cc | 47 | |
| darran | 0:55a05330f8cc | 48 | #include "netCfg.h" |
| darran | 0:55a05330f8cc | 49 | #if NET_USB |
| darran | 0:55a05330f8cc | 50 | |
| darran | 0:55a05330f8cc | 51 | #ifdef __cplusplus |
| darran | 0:55a05330f8cc | 52 | extern "C" { |
| darran | 0:55a05330f8cc | 53 | #endif |
| darran | 0:55a05330f8cc | 54 | |
| darran | 0:55a05330f8cc | 55 | #include "usbhost_lpc17xx.h" |
| darran | 0:55a05330f8cc | 56 | //#include "UsbEndpoint.h" |
| darran | 0:55a05330f8cc | 57 | |
| darran | 0:55a05330f8cc | 58 | /* |
| darran | 0:55a05330f8cc | 59 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 60 | * GLOBAL VARIABLES |
| darran | 0:55a05330f8cc | 61 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 62 | */ |
| darran | 0:55a05330f8cc | 63 | int gUSBConnected; |
| darran | 0:55a05330f8cc | 64 | |
| darran | 0:55a05330f8cc | 65 | volatile USB_INT32U HOST_RhscIntr = 0; /* Root Hub Status Change interrupt */ |
| darran | 0:55a05330f8cc | 66 | volatile USB_INT32U HOST_WdhIntr = 0; /* Semaphore to wait until the TD is submitted */ |
| darran | 0:55a05330f8cc | 67 | volatile USB_INT08U HOST_TDControlStatus = 0; |
| darran | 0:55a05330f8cc | 68 | volatile HCED *EDCtrl; /* Control endpoint descriptor structure */ |
| darran | 0:55a05330f8cc | 69 | //volatile HCED *EDBulkHead; |
| darran | 0:55a05330f8cc | 70 | //volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */ |
| darran | 0:55a05330f8cc | 71 | //volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */ |
| darran | 0:55a05330f8cc | 72 | volatile HCTD *TDHead; /* Head transfer descriptor structure */ |
| darran | 0:55a05330f8cc | 73 | volatile HCTD *TDTail; /* Tail transfer descriptor structure */ |
| darran | 0:55a05330f8cc | 74 | volatile HCCA *Hcca; /* Host Controller Communications Area structure */ |
| darran | 0:55a05330f8cc | 75 | USB_INT16U *TDBufNonVol; /* Identical to TDBuffer just to reduce compiler warnings */ |
| darran | 0:55a05330f8cc | 76 | volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */ |
| darran | 0:55a05330f8cc | 77 | |
| darran | 0:55a05330f8cc | 78 | // USB host structures |
| darran | 0:55a05330f8cc | 79 | // AHB SRAM block 1 |
| darran | 0:55a05330f8cc | 80 | #define HOSTBASEADDR 0x2007C000 |
| darran | 0:55a05330f8cc | 81 | // reserve memory for the linker |
| darran | 0:55a05330f8cc | 82 | static USB_INT08U HostBuf[0x300] __attribute((section("AHBSRAM1"),aligned))/* __attribute__((at(HOSTBASEADDR)))*/; |
| darran | 0:55a05330f8cc | 83 | /* |
| darran | 0:55a05330f8cc | 84 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 85 | * DELAY IN MILLI SECONDS |
| darran | 0:55a05330f8cc | 86 | * |
| darran | 0:55a05330f8cc | 87 | * Description: This function provides a delay in milli seconds |
| darran | 0:55a05330f8cc | 88 | * |
| darran | 0:55a05330f8cc | 89 | * Arguments : delay The delay required |
| darran | 0:55a05330f8cc | 90 | * |
| darran | 0:55a05330f8cc | 91 | * Returns : None |
| darran | 0:55a05330f8cc | 92 | * |
| darran | 0:55a05330f8cc | 93 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 94 | */ |
| darran | 0:55a05330f8cc | 95 | |
| darran | 0:55a05330f8cc | 96 | void Host_DelayMS (USB_INT32U delay) |
| darran | 0:55a05330f8cc | 97 | { |
| darran | 0:55a05330f8cc | 98 | volatile USB_INT32U i; |
| darran | 0:55a05330f8cc | 99 | |
| darran | 0:55a05330f8cc | 100 | |
| darran | 0:55a05330f8cc | 101 | for (i = 0; i < delay; i++) { |
| darran | 0:55a05330f8cc | 102 | Host_DelayUS(1000); |
| darran | 0:55a05330f8cc | 103 | } |
| darran | 0:55a05330f8cc | 104 | } |
| darran | 0:55a05330f8cc | 105 | |
| darran | 0:55a05330f8cc | 106 | /* |
| darran | 0:55a05330f8cc | 107 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 108 | * DELAY IN MICRO SECONDS |
| darran | 0:55a05330f8cc | 109 | * |
| darran | 0:55a05330f8cc | 110 | * Description: This function provides a delay in micro seconds |
| darran | 0:55a05330f8cc | 111 | * |
| darran | 0:55a05330f8cc | 112 | * Arguments : delay The delay required |
| darran | 0:55a05330f8cc | 113 | * |
| darran | 0:55a05330f8cc | 114 | * Returns : None |
| darran | 0:55a05330f8cc | 115 | * |
| darran | 0:55a05330f8cc | 116 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 117 | */ |
| darran | 0:55a05330f8cc | 118 | |
| darran | 0:55a05330f8cc | 119 | void Host_DelayUS (USB_INT32U delay) |
| darran | 0:55a05330f8cc | 120 | { |
| darran | 0:55a05330f8cc | 121 | volatile USB_INT32U i; |
| darran | 0:55a05330f8cc | 122 | |
| darran | 0:55a05330f8cc | 123 | for (i = 0; i < (4 * delay); i++) { /* This logic was tested. It gives app. 1 micro sec delay */ |
| darran | 0:55a05330f8cc | 124 | ; |
| darran | 0:55a05330f8cc | 125 | } |
| darran | 0:55a05330f8cc | 126 | |
| darran | 0:55a05330f8cc | 127 | } |
| darran | 0:55a05330f8cc | 128 | |
| darran | 0:55a05330f8cc | 129 | // bits of the USB/OTG clock control register |
| darran | 0:55a05330f8cc | 130 | #define HOST_CLK_EN (1<<0) |
| darran | 0:55a05330f8cc | 131 | #define DEV_CLK_EN (1<<1) |
| darran | 0:55a05330f8cc | 132 | #define PORTSEL_CLK_EN (1<<3) |
| darran | 0:55a05330f8cc | 133 | #define AHB_CLK_EN (1<<4) |
| darran | 0:55a05330f8cc | 134 | |
| darran | 0:55a05330f8cc | 135 | // bits of the USB/OTG clock status register |
| darran | 0:55a05330f8cc | 136 | #define HOST_CLK_ON (1<<0) |
| darran | 0:55a05330f8cc | 137 | #define DEV_CLK_ON (1<<1) |
| darran | 0:55a05330f8cc | 138 | #define PORTSEL_CLK_ON (1<<3) |
| darran | 0:55a05330f8cc | 139 | #define AHB_CLK_ON (1<<4) |
| darran | 0:55a05330f8cc | 140 | |
| darran | 0:55a05330f8cc | 141 | // we need host clock, OTG/portsel clock and AHB clock |
| darran | 0:55a05330f8cc | 142 | #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN) |
| darran | 0:55a05330f8cc | 143 | |
| darran | 0:55a05330f8cc | 144 | /* |
| darran | 0:55a05330f8cc | 145 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 146 | * INITIALIZE THE HOST CONTROLLER |
| darran | 0:55a05330f8cc | 147 | * |
| darran | 0:55a05330f8cc | 148 | * Description: This function initializes lpc17xx host controller |
| darran | 0:55a05330f8cc | 149 | * |
| darran | 0:55a05330f8cc | 150 | * Arguments : None |
| darran | 0:55a05330f8cc | 151 | * |
| darran | 0:55a05330f8cc | 152 | * Returns : |
| darran | 0:55a05330f8cc | 153 | * |
| darran | 0:55a05330f8cc | 154 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 155 | */ |
| darran | 0:55a05330f8cc | 156 | void Host_Init (void) |
| darran | 0:55a05330f8cc | 157 | { |
| darran | 0:55a05330f8cc | 158 | PRINT_Log("In Host_Init\n"); |
| darran | 0:55a05330f8cc | 159 | NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */ |
| darran | 0:55a05330f8cc | 160 | |
| darran | 0:55a05330f8cc | 161 | // turn on power for USB |
| darran | 0:55a05330f8cc | 162 | LPC_SC->PCONP |= (1UL<<31); |
| darran | 0:55a05330f8cc | 163 | // Enable USB host clock, port selection and AHB clock |
| darran | 0:55a05330f8cc | 164 | LPC_USB->USBClkCtrl |= CLOCK_MASK; |
| darran | 0:55a05330f8cc | 165 | // Wait for clocks to become available |
| darran | 0:55a05330f8cc | 166 | while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK) |
| darran | 0:55a05330f8cc | 167 | ; |
| darran | 0:55a05330f8cc | 168 | |
| darran | 0:55a05330f8cc | 169 | // it seems the bits[0:1] mean the following |
| darran | 0:55a05330f8cc | 170 | // 0: U1=device, U2=host |
| darran | 0:55a05330f8cc | 171 | // 1: U1=host, U2=host |
| darran | 0:55a05330f8cc | 172 | // 2: reserved |
| darran | 0:55a05330f8cc | 173 | // 3: U1=host, U2=device |
| darran | 0:55a05330f8cc | 174 | // NB: this register is only available if OTG clock (aka "port select") is enabled!! |
| darran | 0:55a05330f8cc | 175 | // since we don't care about port 2, set just bit 0 to 1 (U1=host) |
| darran | 0:55a05330f8cc | 176 | LPC_USB->OTGStCtrl |= 1; |
| darran | 0:55a05330f8cc | 177 | |
| darran | 0:55a05330f8cc | 178 | // now that we've configured the ports, we can turn off the portsel clock |
| darran | 0:55a05330f8cc | 179 | LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN; |
| darran | 0:55a05330f8cc | 180 | |
| darran | 0:55a05330f8cc | 181 | // power pins are not connected on mbed, so we can skip them |
| darran | 0:55a05330f8cc | 182 | /* P1[18] = USB_UP_LED, 01 */ |
| darran | 0:55a05330f8cc | 183 | /* P1[19] = /USB_PPWR, 10 */ |
| darran | 0:55a05330f8cc | 184 | /* P1[22] = USB_PWRD, 10 */ |
| darran | 0:55a05330f8cc | 185 | /* P1[27] = /USB_OVRCR, 10 */ |
| darran | 0:55a05330f8cc | 186 | /*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22)); |
| darran | 0:55a05330f8cc | 187 | LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080 |
| darran | 0:55a05330f8cc | 188 | */ |
| darran | 0:55a05330f8cc | 189 | |
| darran | 0:55a05330f8cc | 190 | // configure USB D+/D- pins |
| darran | 0:55a05330f8cc | 191 | /* P0[29] = USB_D+, 01 */ |
| darran | 0:55a05330f8cc | 192 | /* P0[30] = USB_D-, 01 */ |
| darran | 0:55a05330f8cc | 193 | LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28)); |
| darran | 0:55a05330f8cc | 194 | LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000 |
| darran | 0:55a05330f8cc | 195 | |
| darran | 0:55a05330f8cc | 196 | PRINT_Log("Initializing Host Stack\n"); |
| darran | 0:55a05330f8cc | 197 | |
| darran | 0:55a05330f8cc | 198 | Hcca = (volatile HCCA *)(HostBuf+0x000); |
| darran | 0:55a05330f8cc | 199 | TDHead = (volatile HCTD *)(HostBuf+0x100); |
| darran | 0:55a05330f8cc | 200 | TDTail = (volatile HCTD *)(HostBuf+0x110); |
| darran | 0:55a05330f8cc | 201 | EDCtrl = (volatile HCED *)(HostBuf+0x120); |
| darran | 0:55a05330f8cc | 202 | //Space for Bulk Eps |
| darran | 0:55a05330f8cc | 203 | // EDBulkHead = (volatile HCED *)(HostBuf+0x130); |
| darran | 0:55a05330f8cc | 204 | // EDBulkIn = (volatile HCED *)(HostBuf+0x130); |
| darran | 0:55a05330f8cc | 205 | // EDBulkOut = (volatile HCED *)(HostBuf+0x140); |
| darran | 0:55a05330f8cc | 206 | // TDBuffer = (volatile USB_INT08U *)(HostBuf+0x150); |
| darran | 0:55a05330f8cc | 207 | TDBuffer = (volatile USB_INT08U *)(HostBuf+0x130); |
| darran | 0:55a05330f8cc | 208 | |
| darran | 0:55a05330f8cc | 209 | // printf("\r\n--EDBulkHead = %p--\r\n", EDBulkHead); |
| darran | 0:55a05330f8cc | 210 | printf("\r\n--TDBuffer = %p--\r\n", TDBuffer); |
| darran | 0:55a05330f8cc | 211 | |
| darran | 0:55a05330f8cc | 212 | /* Initialize all the TDs, EDs and HCCA to 0 */ |
| darran | 0:55a05330f8cc | 213 | Host_EDInit(EDCtrl); |
| darran | 0:55a05330f8cc | 214 | // Host_EDInit(EDBulkIn); |
| darran | 0:55a05330f8cc | 215 | // Host_EDInit(EDBulkOut); |
| darran | 0:55a05330f8cc | 216 | /* Host_TDInit(TDHead); |
| darran | 0:55a05330f8cc | 217 | Host_TDInit(TDTail);*/ |
| darran | 0:55a05330f8cc | 218 | Host_HCCAInit(Hcca); |
| darran | 0:55a05330f8cc | 219 | |
| darran | 0:55a05330f8cc | 220 | Host_DelayMS(50); /* Wait 50 ms before apply reset */ |
| darran | 0:55a05330f8cc | 221 | LPC_USB->HcControl = 0; /* HARDWARE RESET */ |
| darran | 0:55a05330f8cc | 222 | LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */ |
| darran | 0:55a05330f8cc | 223 | LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */ |
| darran | 0:55a05330f8cc | 224 | |
| darran | 0:55a05330f8cc | 225 | /* SOFTWARE RESET */ |
| darran | 0:55a05330f8cc | 226 | LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR; |
| darran | 0:55a05330f8cc | 227 | LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */ |
| darran | 0:55a05330f8cc | 228 | |
| darran | 0:55a05330f8cc | 229 | /* Put HC in operational state */ |
| darran | 0:55a05330f8cc | 230 | LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER; |
| darran | 0:55a05330f8cc | 231 | LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */ |
| darran | 0:55a05330f8cc | 232 | |
| darran | 0:55a05330f8cc | 233 | LPC_USB->HcHCCA = (USB_INT32U)Hcca; |
| darran | 0:55a05330f8cc | 234 | LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */ |
| darran | 0:55a05330f8cc | 235 | |
| darran | 0:55a05330f8cc | 236 | |
| darran | 0:55a05330f8cc | 237 | LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE | |
| darran | 0:55a05330f8cc | 238 | OR_INTR_ENABLE_WDH | |
| darran | 0:55a05330f8cc | 239 | OR_INTR_ENABLE_RHSC; |
| darran | 0:55a05330f8cc | 240 | |
| darran | 0:55a05330f8cc | 241 | NVIC_SetPriority(USB_IRQn, 0); /* highest priority */ |
| darran | 0:55a05330f8cc | 242 | /* Enable the USB Interrupt */ |
| darran | 0:55a05330f8cc | 243 | NVIC_EnableIRQ(USB_IRQn); |
| darran | 0:55a05330f8cc | 244 | PRINT_Log("Host Initialized\n"); |
| darran | 0:55a05330f8cc | 245 | } |
| darran | 0:55a05330f8cc | 246 | |
| darran | 0:55a05330f8cc | 247 | /* |
| darran | 0:55a05330f8cc | 248 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 249 | * INTERRUPT SERVICE ROUTINE |
| darran | 0:55a05330f8cc | 250 | * |
| darran | 0:55a05330f8cc | 251 | * Description: This function services the interrupt caused by host controller |
| darran | 0:55a05330f8cc | 252 | * |
| darran | 0:55a05330f8cc | 253 | * Arguments : None |
| darran | 0:55a05330f8cc | 254 | * |
| darran | 0:55a05330f8cc | 255 | * Returns : None |
| darran | 0:55a05330f8cc | 256 | * |
| darran | 0:55a05330f8cc | 257 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 258 | */ |
| darran | 0:55a05330f8cc | 259 | |
| darran | 0:55a05330f8cc | 260 | void USB_IRQHandler (void) __irq |
| darran | 0:55a05330f8cc | 261 | { |
| darran | 0:55a05330f8cc | 262 | USB_INT32U int_status; |
| darran | 0:55a05330f8cc | 263 | USB_INT32U ie_status; |
| darran | 0:55a05330f8cc | 264 | |
| darran | 0:55a05330f8cc | 265 | int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */ |
| darran | 0:55a05330f8cc | 266 | ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */ |
| darran | 0:55a05330f8cc | 267 | |
| darran | 0:55a05330f8cc | 268 | if (!(int_status & ie_status)) { |
| darran | 0:55a05330f8cc | 269 | return; |
| darran | 0:55a05330f8cc | 270 | } else { |
| darran | 0:55a05330f8cc | 271 | |
| darran | 0:55a05330f8cc | 272 | int_status = int_status & ie_status; |
| darran | 0:55a05330f8cc | 273 | if (int_status & OR_INTR_STATUS_RHSC) { /* Root hub status change interrupt */ |
| darran | 0:55a05330f8cc | 274 | if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) { |
| darran | 0:55a05330f8cc | 275 | if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) { |
| darran | 0:55a05330f8cc | 276 | /* |
| darran | 0:55a05330f8cc | 277 | * When DRWE is on, Connect Status Change |
| darran | 0:55a05330f8cc | 278 | * means a remote wakeup event. |
| darran | 0:55a05330f8cc | 279 | */ |
| darran | 0:55a05330f8cc | 280 | HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT |
| darran | 0:55a05330f8cc | 281 | } |
| darran | 0:55a05330f8cc | 282 | else { |
| darran | 0:55a05330f8cc | 283 | /* |
| darran | 0:55a05330f8cc | 284 | * When DRWE is off, Connect Status Change |
| darran | 0:55a05330f8cc | 285 | * is NOT a remote wakeup event |
| darran | 0:55a05330f8cc | 286 | */ |
| darran | 0:55a05330f8cc | 287 | if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) { |
| darran | 0:55a05330f8cc | 288 | if (!gUSBConnected) { |
| darran | 0:55a05330f8cc | 289 | HOST_TDControlStatus = 0; |
| darran | 0:55a05330f8cc | 290 | HOST_WdhIntr = 0; |
| darran | 0:55a05330f8cc | 291 | HOST_RhscIntr = 1; |
| darran | 0:55a05330f8cc | 292 | gUSBConnected = 1; |
| darran | 0:55a05330f8cc | 293 | } |
| darran | 0:55a05330f8cc | 294 | else |
| darran | 0:55a05330f8cc | 295 | PRINT_Log("Spurious status change (connected)?\n"); |
| darran | 0:55a05330f8cc | 296 | } else { |
| darran | 0:55a05330f8cc | 297 | if (gUSBConnected) { |
| darran | 0:55a05330f8cc | 298 | LPC_USB->HcInterruptEnable = 0; // why do we get multiple disc. rupts??? |
| darran | 0:55a05330f8cc | 299 | HOST_RhscIntr = 0; |
| darran | 0:55a05330f8cc | 300 | gUSBConnected = 0; |
| darran | 0:55a05330f8cc | 301 | } |
| darran | 0:55a05330f8cc | 302 | else |
| darran | 0:55a05330f8cc | 303 | PRINT_Log("Spurious status change (disconnected)?\n"); |
| darran | 0:55a05330f8cc | 304 | } |
| darran | 0:55a05330f8cc | 305 | } |
| darran | 0:55a05330f8cc | 306 | LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC; |
| darran | 0:55a05330f8cc | 307 | } |
| darran | 0:55a05330f8cc | 308 | if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) { |
| darran | 0:55a05330f8cc | 309 | LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; |
| darran | 0:55a05330f8cc | 310 | } |
| darran | 0:55a05330f8cc | 311 | } |
| darran | 0:55a05330f8cc | 312 | if (int_status & OR_INTR_STATUS_WDH) { /* Writeback Done Head interrupt */ |
| darran | 0:55a05330f8cc | 313 | HOST_WdhIntr = 1; |
| darran | 0:55a05330f8cc | 314 | HOST_TDControlStatus = (TDHead->Control >> 28) & 0xf; |
| darran | 0:55a05330f8cc | 315 | //UsbEndpoint Cb : TODO |
| darran | 0:55a05330f8cc | 316 | //UsbEndpoint::completed(); |
| darran | 0:55a05330f8cc | 317 | } |
| darran | 0:55a05330f8cc | 318 | LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */ |
| darran | 0:55a05330f8cc | 319 | } |
| darran | 0:55a05330f8cc | 320 | return; |
| darran | 0:55a05330f8cc | 321 | } |
| darran | 0:55a05330f8cc | 322 | |
| darran | 0:55a05330f8cc | 323 | /* |
| darran | 0:55a05330f8cc | 324 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 325 | * PROCESS TRANSFER DESCRIPTOR |
| darran | 0:55a05330f8cc | 326 | * |
| darran | 0:55a05330f8cc | 327 | * Description: This function processes the transfer descriptor |
| darran | 0:55a05330f8cc | 328 | * |
| darran | 0:55a05330f8cc | 329 | * Arguments : ed Endpoint descriptor that contains this transfer descriptor |
| darran | 0:55a05330f8cc | 330 | * token SETUP, IN, OUT |
| darran | 0:55a05330f8cc | 331 | * buffer Current Buffer Pointer of the transfer descriptor |
| darran | 0:55a05330f8cc | 332 | * buffer_len Length of the buffer |
| darran | 0:55a05330f8cc | 333 | * |
| darran | 0:55a05330f8cc | 334 | * Returns : OK if TD submission is successful |
| darran | 0:55a05330f8cc | 335 | * ERROR if TD submission fails |
| darran | 0:55a05330f8cc | 336 | * |
| darran | 0:55a05330f8cc | 337 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 338 | */ |
| darran | 0:55a05330f8cc | 339 | |
| darran | 0:55a05330f8cc | 340 | volatile USB_INT32U h; |
| darran | 0:55a05330f8cc | 341 | |
| darran | 0:55a05330f8cc | 342 | USB_INT32S Host_TDresult(volatile HCED *ed, |
| darran | 0:55a05330f8cc | 343 | volatile USB_INT32U token) |
| darran | 0:55a05330f8cc | 344 | { |
| darran | 0:55a05330f8cc | 345 | if(HOST_WdhIntr) |
| darran | 0:55a05330f8cc | 346 | HOST_WdhIntr = 0; |
| darran | 0:55a05330f8cc | 347 | else |
| darran | 0:55a05330f8cc | 348 | __WFI(); |
| darran | 0:55a05330f8cc | 349 | |
| darran | 0:55a05330f8cc | 350 | if(ed->HeadTd == h) |
| darran | 0:55a05330f8cc | 351 | { |
| darran | 0:55a05330f8cc | 352 | return PROCESSING; |
| darran | 0:55a05330f8cc | 353 | } |
| darran | 0:55a05330f8cc | 354 | |
| darran | 0:55a05330f8cc | 355 | if (!HOST_TDControlStatus) { |
| darran | 0:55a05330f8cc | 356 | return (OK); |
| darran | 0:55a05330f8cc | 357 | } else { |
| darran | 0:55a05330f8cc | 358 | return (ERR_TD_FAIL); |
| darran | 0:55a05330f8cc | 359 | } |
| darran | 0:55a05330f8cc | 360 | } |
| darran | 0:55a05330f8cc | 361 | |
| darran | 0:55a05330f8cc | 362 | USB_INT32S Host_ProcessTD (volatile HCED *ed, |
| darran | 0:55a05330f8cc | 363 | volatile USB_INT32U token, |
| darran | 0:55a05330f8cc | 364 | volatile USB_INT08U *buffer, |
| darran | 0:55a05330f8cc | 365 | USB_INT32U buffer_len, |
| darran | 0:55a05330f8cc | 366 | bool block /* = true */ ) |
| darran | 0:55a05330f8cc | 367 | { |
| darran | 0:55a05330f8cc | 368 | volatile USB_INT32U td_toggle; |
| darran | 0:55a05330f8cc | 369 | |
| darran | 0:55a05330f8cc | 370 | |
| darran | 0:55a05330f8cc | 371 | if (ed == EDCtrl) { |
| darran | 0:55a05330f8cc | 372 | if (token == TD_SETUP) { |
| darran | 0:55a05330f8cc | 373 | td_toggle = TD_TOGGLE_0; |
| darran | 0:55a05330f8cc | 374 | } else { |
| darran | 0:55a05330f8cc | 375 | td_toggle = TD_TOGGLE_1; |
| darran | 0:55a05330f8cc | 376 | } |
| darran | 0:55a05330f8cc | 377 | } else { |
| darran | 0:55a05330f8cc | 378 | td_toggle = 0; |
| darran | 0:55a05330f8cc | 379 | } |
| darran | 0:55a05330f8cc | 380 | TDHead->Control = (TD_ROUNDING | |
| darran | 0:55a05330f8cc | 381 | token | |
| darran | 0:55a05330f8cc | 382 | TD_DELAY_INT(0) | |
| darran | 0:55a05330f8cc | 383 | td_toggle | |
| darran | 0:55a05330f8cc | 384 | TD_CC); |
| darran | 0:55a05330f8cc | 385 | TDTail->Control = 0; |
| darran | 0:55a05330f8cc | 386 | TDHead->CurrBufPtr = (USB_INT32U) buffer; |
| darran | 0:55a05330f8cc | 387 | TDTail->CurrBufPtr = 0; |
| darran | 0:55a05330f8cc | 388 | TDHead->Next = (USB_INT32U) TDTail; |
| darran | 0:55a05330f8cc | 389 | TDTail->Next = 0; |
| darran | 0:55a05330f8cc | 390 | TDHead->BufEnd = (USB_INT32U)(buffer + (buffer_len - 1)); |
| darran | 0:55a05330f8cc | 391 | TDTail->BufEnd = 0; |
| darran | 0:55a05330f8cc | 392 | |
| darran | 0:55a05330f8cc | 393 | h = ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002); |
| darran | 0:55a05330f8cc | 394 | ed->TailTd = (USB_INT32U)TDTail; |
| darran | 0:55a05330f8cc | 395 | ed->Next = 0; |
| darran | 0:55a05330f8cc | 396 | |
| darran | 0:55a05330f8cc | 397 | if (ed == EDCtrl) { |
| darran | 0:55a05330f8cc | 398 | LPC_USB->HcControlHeadED = (USB_INT32U)ed; |
| darran | 0:55a05330f8cc | 399 | LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_CLF; |
| darran | 0:55a05330f8cc | 400 | LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_CLE; |
| darran | 0:55a05330f8cc | 401 | } else { |
| darran | 0:55a05330f8cc | 402 | LPC_USB->HcBulkHeadED = (USB_INT32U)ed; |
| darran | 0:55a05330f8cc | 403 | LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_BLF; |
| darran | 0:55a05330f8cc | 404 | LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_BLE; |
| darran | 0:55a05330f8cc | 405 | } |
| darran | 0:55a05330f8cc | 406 | |
| darran | 0:55a05330f8cc | 407 | if(block) |
| darran | 0:55a05330f8cc | 408 | { |
| darran | 0:55a05330f8cc | 409 | while(ed->HeadTd == h) |
| darran | 0:55a05330f8cc | 410 | { |
| darran | 0:55a05330f8cc | 411 | Host_WDHWait(); |
| darran | 0:55a05330f8cc | 412 | } |
| darran | 0:55a05330f8cc | 413 | } |
| darran | 0:55a05330f8cc | 414 | else |
| darran | 0:55a05330f8cc | 415 | { |
| darran | 0:55a05330f8cc | 416 | return PROCESSING; |
| darran | 0:55a05330f8cc | 417 | } |
| darran | 0:55a05330f8cc | 418 | |
| darran | 0:55a05330f8cc | 419 | // if (!(TDHead->Control & 0xF0000000)) { |
| darran | 0:55a05330f8cc | 420 | if (!HOST_TDControlStatus) { |
| darran | 0:55a05330f8cc | 421 | return (OK); |
| darran | 0:55a05330f8cc | 422 | } else { |
| darran | 0:55a05330f8cc | 423 | return (ERR_TD_FAIL); |
| darran | 0:55a05330f8cc | 424 | } |
| darran | 0:55a05330f8cc | 425 | } |
| darran | 0:55a05330f8cc | 426 | |
| darran | 0:55a05330f8cc | 427 | /* |
| darran | 0:55a05330f8cc | 428 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 429 | * ENUMERATE THE DEVICE |
| darran | 0:55a05330f8cc | 430 | * |
| darran | 0:55a05330f8cc | 431 | * Description: This function is used to enumerate the device connected |
| darran | 0:55a05330f8cc | 432 | * |
| darran | 0:55a05330f8cc | 433 | * Arguments : None |
| darran | 0:55a05330f8cc | 434 | * |
| darran | 0:55a05330f8cc | 435 | * Returns : None |
| darran | 0:55a05330f8cc | 436 | * |
| darran | 0:55a05330f8cc | 437 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 438 | */ |
| darran | 0:55a05330f8cc | 439 | |
| darran | 0:55a05330f8cc | 440 | USB_INT32S Host_EnumDev (void) |
| darran | 0:55a05330f8cc | 441 | { |
| darran | 0:55a05330f8cc | 442 | USB_INT32S rc; |
| darran | 0:55a05330f8cc | 443 | |
| darran | 0:55a05330f8cc | 444 | PRINT_Log("\r\nConnect a device\r\n"); |
| darran | 0:55a05330f8cc | 445 | while (!HOST_RhscIntr) |
| darran | 0:55a05330f8cc | 446 | __WFI(); |
| darran | 0:55a05330f8cc | 447 | Host_DelayMS(100); /* USB 2.0 spec says atleast 50ms delay beore port reset */ |
| darran | 0:55a05330f8cc | 448 | LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset |
| darran | 0:55a05330f8cc | 449 | while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS) |
| darran | 0:55a05330f8cc | 450 | __WFI(); // Wait for port reset to complete... |
| darran | 0:55a05330f8cc | 451 | LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal |
| darran | 0:55a05330f8cc | 452 | Host_DelayMS(200); /* Wait for 100 MS after port reset */ |
| darran | 0:55a05330f8cc | 453 | |
| darran | 0:55a05330f8cc | 454 | EDCtrl->Control = 8 << 16; /* Put max pkt size = 8 */ |
| darran | 0:55a05330f8cc | 455 | /* Read first 8 bytes of device desc */ |
| darran | 0:55a05330f8cc | 456 | rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 8); |
| darran | 0:55a05330f8cc | 457 | if (rc != OK) { |
| darran | 0:55a05330f8cc | 458 | PRINT_Err(rc); |
| darran | 0:55a05330f8cc | 459 | return (rc); |
| darran | 0:55a05330f8cc | 460 | } |
| darran | 0:55a05330f8cc | 461 | EDCtrl->Control = TDBuffer[7] << 16; /* Get max pkt size of endpoint 0 */ |
| darran | 0:55a05330f8cc | 462 | rc = HOST_SET_ADDRESS(1); /* Set the device address to 1 */ |
| darran | 0:55a05330f8cc | 463 | if (rc != OK) { |
| darran | 0:55a05330f8cc | 464 | PRINT_Err(rc); |
| darran | 0:55a05330f8cc | 465 | return (rc); |
| darran | 0:55a05330f8cc | 466 | } |
| darran | 0:55a05330f8cc | 467 | Host_DelayMS(2); |
| darran | 0:55a05330f8cc | 468 | EDCtrl->Control = (EDCtrl->Control) | 1; /* Modify control pipe with address 1 */ |
| darran | 0:55a05330f8cc | 469 | |
| darran | 0:55a05330f8cc | 470 | /**/ |
| darran | 0:55a05330f8cc | 471 | |
| darran | 0:55a05330f8cc | 472 | rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 17); //Read full device descriptor |
| darran | 0:55a05330f8cc | 473 | if (rc != OK) { |
| darran | 0:55a05330f8cc | 474 | PRINT_Err(rc); |
| darran | 0:55a05330f8cc | 475 | return (rc); |
| darran | 0:55a05330f8cc | 476 | } |
| darran | 0:55a05330f8cc | 477 | |
| darran | 0:55a05330f8cc | 478 | rc = SerialCheckVidPid(); |
| darran | 0:55a05330f8cc | 479 | if (rc != OK) { |
| darran | 0:55a05330f8cc | 480 | PRINT_Err(rc); |
| darran | 0:55a05330f8cc | 481 | return (rc); |
| darran | 0:55a05330f8cc | 482 | } |
| darran | 0:55a05330f8cc | 483 | /**/ |
| darran | 0:55a05330f8cc | 484 | /* Get the configuration descriptor */ |
| darran | 0:55a05330f8cc | 485 | rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, 9); |
| darran | 0:55a05330f8cc | 486 | if (rc != OK) { |
| darran | 0:55a05330f8cc | 487 | PRINT_Err(rc); |
| darran | 0:55a05330f8cc | 488 | return (rc); |
| darran | 0:55a05330f8cc | 489 | } |
| darran | 0:55a05330f8cc | 490 | /* Get the first configuration data */ |
| darran | 0:55a05330f8cc | 491 | rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, ReadLE16U(&TDBuffer[2])); |
| darran | 0:55a05330f8cc | 492 | if (rc != OK) { |
| darran | 0:55a05330f8cc | 493 | PRINT_Err(rc); |
| darran | 0:55a05330f8cc | 494 | return (rc); |
| darran | 0:55a05330f8cc | 495 | } |
| darran | 0:55a05330f8cc | 496 | #ifdef MS |
| darran | 0:55a05330f8cc | 497 | rc = MS_ParseConfiguration(); /* Parse the configuration */ |
| darran | 0:55a05330f8cc | 498 | if (rc != OK) { |
| darran | 0:55a05330f8cc | 499 | PRINT_Err(rc); |
| darran | 0:55a05330f8cc | 500 | return (rc); |
| darran | 0:55a05330f8cc | 501 | } |
| darran | 0:55a05330f8cc | 502 | #endif |
| darran | 0:55a05330f8cc | 503 | PRINT_Log("\r\nParsing cfg\r\n"); |
| darran | 0:55a05330f8cc | 504 | rc = SerialParseConfig(); /* Parse the configuration */ |
| darran | 0:55a05330f8cc | 505 | if (rc != OK) { |
| darran | 0:55a05330f8cc | 506 | PRINT_Err(rc); |
| darran | 0:55a05330f8cc | 507 | return (rc); |
| darran | 0:55a05330f8cc | 508 | } |
| darran | 0:55a05330f8cc | 509 | |
| darran | 0:55a05330f8cc | 510 | rc = USBH_SET_CONFIGURATION(1); /* Select device configuration 1 */ |
| darran | 0:55a05330f8cc | 511 | if (rc != OK) { |
| darran | 0:55a05330f8cc | 512 | PRINT_Err(rc); |
| darran | 0:55a05330f8cc | 513 | } |
| darran | 0:55a05330f8cc | 514 | Host_DelayMS(100); /* Some devices may require this delay */ |
| darran | 0:55a05330f8cc | 515 | return (rc); |
| darran | 0:55a05330f8cc | 516 | } |
| darran | 0:55a05330f8cc | 517 | |
| darran | 0:55a05330f8cc | 518 | /* |
| darran | 0:55a05330f8cc | 519 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 520 | * RECEIVE THE CONTROL INFORMATION |
| darran | 0:55a05330f8cc | 521 | * |
| darran | 0:55a05330f8cc | 522 | * Description: This function is used to receive the control information |
| darran | 0:55a05330f8cc | 523 | * |
| darran | 0:55a05330f8cc | 524 | * Arguments : bm_request_type |
| darran | 0:55a05330f8cc | 525 | * b_request |
| darran | 0:55a05330f8cc | 526 | * w_value |
| darran | 0:55a05330f8cc | 527 | * w_index |
| darran | 0:55a05330f8cc | 528 | * w_length |
| darran | 0:55a05330f8cc | 529 | * buffer |
| darran | 0:55a05330f8cc | 530 | * |
| darran | 0:55a05330f8cc | 531 | * Returns : OK if Success |
| darran | 0:55a05330f8cc | 532 | * ERROR if Failed |
| darran | 0:55a05330f8cc | 533 | * |
| darran | 0:55a05330f8cc | 534 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 535 | */ |
| darran | 0:55a05330f8cc | 536 | |
| darran | 0:55a05330f8cc | 537 | USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type, |
| darran | 0:55a05330f8cc | 538 | USB_INT08U b_request, |
| darran | 0:55a05330f8cc | 539 | USB_INT16U w_value, |
| darran | 0:55a05330f8cc | 540 | USB_INT16U w_index, |
| darran | 0:55a05330f8cc | 541 | USB_INT16U w_length, |
| darran | 0:55a05330f8cc | 542 | volatile USB_INT08U *buffer) |
| darran | 0:55a05330f8cc | 543 | { |
| darran | 0:55a05330f8cc | 544 | USB_INT32S rc; |
| darran | 0:55a05330f8cc | 545 | |
| darran | 0:55a05330f8cc | 546 | |
| darran | 0:55a05330f8cc | 547 | Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length); |
| darran | 0:55a05330f8cc | 548 | rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8); |
| darran | 0:55a05330f8cc | 549 | if (rc == OK) { |
| darran | 0:55a05330f8cc | 550 | if (w_length) { |
| darran | 0:55a05330f8cc | 551 | rc = Host_ProcessTD(EDCtrl, TD_IN, TDBuffer, w_length); |
| darran | 0:55a05330f8cc | 552 | } |
| darran | 0:55a05330f8cc | 553 | if (rc == OK) { |
| darran | 0:55a05330f8cc | 554 | rc = Host_ProcessTD(EDCtrl, TD_OUT, NULL, 0); |
| darran | 0:55a05330f8cc | 555 | } |
| darran | 0:55a05330f8cc | 556 | } |
| darran | 0:55a05330f8cc | 557 | return (rc); |
| darran | 0:55a05330f8cc | 558 | } |
| darran | 0:55a05330f8cc | 559 | |
| darran | 0:55a05330f8cc | 560 | /* |
| darran | 0:55a05330f8cc | 561 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 562 | * SEND THE CONTROL INFORMATION |
| darran | 0:55a05330f8cc | 563 | * |
| darran | 0:55a05330f8cc | 564 | * Description: This function is used to send the control information |
| darran | 0:55a05330f8cc | 565 | * |
| darran | 0:55a05330f8cc | 566 | * Arguments : None |
| darran | 0:55a05330f8cc | 567 | * |
| darran | 0:55a05330f8cc | 568 | * Returns : OK if Success |
| darran | 0:55a05330f8cc | 569 | * ERR_INVALID_BOOTSIG if Failed |
| darran | 0:55a05330f8cc | 570 | * |
| darran | 0:55a05330f8cc | 571 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 572 | */ |
| darran | 0:55a05330f8cc | 573 | |
| darran | 0:55a05330f8cc | 574 | USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type, |
| darran | 0:55a05330f8cc | 575 | USB_INT08U b_request, |
| darran | 0:55a05330f8cc | 576 | USB_INT16U w_value, |
| darran | 0:55a05330f8cc | 577 | USB_INT16U w_index, |
| darran | 0:55a05330f8cc | 578 | USB_INT16U w_length, |
| darran | 0:55a05330f8cc | 579 | volatile USB_INT08U *buffer) |
| darran | 0:55a05330f8cc | 580 | { |
| darran | 0:55a05330f8cc | 581 | USB_INT32S rc; |
| darran | 0:55a05330f8cc | 582 | |
| darran | 0:55a05330f8cc | 583 | |
| darran | 0:55a05330f8cc | 584 | Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length); |
| darran | 0:55a05330f8cc | 585 | |
| darran | 0:55a05330f8cc | 586 | rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8); |
| darran | 0:55a05330f8cc | 587 | if (rc == OK) { |
| darran | 0:55a05330f8cc | 588 | if (w_length) { |
| darran | 0:55a05330f8cc | 589 | rc = Host_ProcessTD(EDCtrl, TD_OUT, TDBuffer, w_length); |
| darran | 0:55a05330f8cc | 590 | } |
| darran | 0:55a05330f8cc | 591 | if (rc == OK) { |
| darran | 0:55a05330f8cc | 592 | rc = Host_ProcessTD(EDCtrl, TD_IN, NULL, 0); |
| darran | 0:55a05330f8cc | 593 | } |
| darran | 0:55a05330f8cc | 594 | } |
| darran | 0:55a05330f8cc | 595 | return (rc); |
| darran | 0:55a05330f8cc | 596 | } |
| darran | 0:55a05330f8cc | 597 | |
| darran | 0:55a05330f8cc | 598 | /* |
| darran | 0:55a05330f8cc | 599 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 600 | * FILL SETUP PACKET |
| darran | 0:55a05330f8cc | 601 | * |
| darran | 0:55a05330f8cc | 602 | * Description: This function is used to fill the setup packet |
| darran | 0:55a05330f8cc | 603 | * |
| darran | 0:55a05330f8cc | 604 | * Arguments : None |
| darran | 0:55a05330f8cc | 605 | * |
| darran | 0:55a05330f8cc | 606 | * Returns : OK if Success |
| darran | 0:55a05330f8cc | 607 | * ERR_INVALID_BOOTSIG if Failed |
| darran | 0:55a05330f8cc | 608 | * |
| darran | 0:55a05330f8cc | 609 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 610 | */ |
| darran | 0:55a05330f8cc | 611 | |
| darran | 0:55a05330f8cc | 612 | void Host_FillSetup (USB_INT08U bm_request_type, |
| darran | 0:55a05330f8cc | 613 | USB_INT08U b_request, |
| darran | 0:55a05330f8cc | 614 | USB_INT16U w_value, |
| darran | 0:55a05330f8cc | 615 | USB_INT16U w_index, |
| darran | 0:55a05330f8cc | 616 | USB_INT16U w_length) |
| darran | 0:55a05330f8cc | 617 | { |
| darran | 0:55a05330f8cc | 618 | int i; |
| darran | 0:55a05330f8cc | 619 | for (i=0;i<w_length;i++) |
| darran | 0:55a05330f8cc | 620 | TDBuffer[i] = 0; |
| darran | 0:55a05330f8cc | 621 | |
| darran | 0:55a05330f8cc | 622 | TDBuffer[0] = bm_request_type; |
| darran | 0:55a05330f8cc | 623 | TDBuffer[1] = b_request; |
| darran | 0:55a05330f8cc | 624 | WriteLE16U(&TDBuffer[2], w_value); |
| darran | 0:55a05330f8cc | 625 | WriteLE16U(&TDBuffer[4], w_index); |
| darran | 0:55a05330f8cc | 626 | WriteLE16U(&TDBuffer[6], w_length); |
| darran | 0:55a05330f8cc | 627 | } |
| darran | 0:55a05330f8cc | 628 | |
| darran | 0:55a05330f8cc | 629 | |
| darran | 0:55a05330f8cc | 630 | |
| darran | 0:55a05330f8cc | 631 | /* |
| darran | 0:55a05330f8cc | 632 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 633 | * INITIALIZE THE TRANSFER DESCRIPTOR |
| darran | 0:55a05330f8cc | 634 | * |
| darran | 0:55a05330f8cc | 635 | * Description: This function initializes transfer descriptor |
| darran | 0:55a05330f8cc | 636 | * |
| darran | 0:55a05330f8cc | 637 | * Arguments : Pointer to TD structure |
| darran | 0:55a05330f8cc | 638 | * |
| darran | 0:55a05330f8cc | 639 | * Returns : None |
| darran | 0:55a05330f8cc | 640 | * |
| darran | 0:55a05330f8cc | 641 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 642 | */ |
| darran | 0:55a05330f8cc | 643 | |
| darran | 0:55a05330f8cc | 644 | void Host_TDInit (volatile HCTD *td) |
| darran | 0:55a05330f8cc | 645 | { |
| darran | 0:55a05330f8cc | 646 | |
| darran | 0:55a05330f8cc | 647 | td->Control = 0; |
| darran | 0:55a05330f8cc | 648 | td->CurrBufPtr = 0; |
| darran | 0:55a05330f8cc | 649 | td->Next = 0; |
| darran | 0:55a05330f8cc | 650 | td->BufEnd = 0; |
| darran | 0:55a05330f8cc | 651 | } |
| darran | 0:55a05330f8cc | 652 | |
| darran | 0:55a05330f8cc | 653 | /* |
| darran | 0:55a05330f8cc | 654 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 655 | * INITIALIZE THE ENDPOINT DESCRIPTOR |
| darran | 0:55a05330f8cc | 656 | * |
| darran | 0:55a05330f8cc | 657 | * Description: This function initializes endpoint descriptor |
| darran | 0:55a05330f8cc | 658 | * |
| darran | 0:55a05330f8cc | 659 | * Arguments : Pointer to ED strcuture |
| darran | 0:55a05330f8cc | 660 | * |
| darran | 0:55a05330f8cc | 661 | * Returns : None |
| darran | 0:55a05330f8cc | 662 | * |
| darran | 0:55a05330f8cc | 663 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 664 | */ |
| darran | 0:55a05330f8cc | 665 | |
| darran | 0:55a05330f8cc | 666 | void Host_EDInit (volatile HCED *ed) |
| darran | 0:55a05330f8cc | 667 | { |
| darran | 0:55a05330f8cc | 668 | |
| darran | 0:55a05330f8cc | 669 | ed->Control = 0; |
| darran | 0:55a05330f8cc | 670 | ed->TailTd = 0; |
| darran | 0:55a05330f8cc | 671 | ed->HeadTd = 0; |
| darran | 0:55a05330f8cc | 672 | ed->Next = 0; |
| darran | 0:55a05330f8cc | 673 | } |
| darran | 0:55a05330f8cc | 674 | |
| darran | 0:55a05330f8cc | 675 | /* |
| darran | 0:55a05330f8cc | 676 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 677 | * INITIALIZE HOST CONTROLLER COMMUNICATIONS AREA |
| darran | 0:55a05330f8cc | 678 | * |
| darran | 0:55a05330f8cc | 679 | * Description: This function initializes host controller communications area |
| darran | 0:55a05330f8cc | 680 | * |
| darran | 0:55a05330f8cc | 681 | * Arguments : Pointer to HCCA |
| darran | 0:55a05330f8cc | 682 | * |
| darran | 0:55a05330f8cc | 683 | * Returns : |
| darran | 0:55a05330f8cc | 684 | * |
| darran | 0:55a05330f8cc | 685 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 686 | */ |
| darran | 0:55a05330f8cc | 687 | |
| darran | 0:55a05330f8cc | 688 | void Host_HCCAInit (volatile HCCA *hcca) |
| darran | 0:55a05330f8cc | 689 | { |
| darran | 0:55a05330f8cc | 690 | USB_INT32U i; |
| darran | 0:55a05330f8cc | 691 | |
| darran | 0:55a05330f8cc | 692 | |
| darran | 0:55a05330f8cc | 693 | for (i = 0; i < 32; i++) { |
| darran | 0:55a05330f8cc | 694 | |
| darran | 0:55a05330f8cc | 695 | hcca->IntTable[i] = 0; |
| darran | 0:55a05330f8cc | 696 | hcca->FrameNumber = 0; |
| darran | 0:55a05330f8cc | 697 | hcca->DoneHead = 0; |
| darran | 0:55a05330f8cc | 698 | } |
| darran | 0:55a05330f8cc | 699 | |
| darran | 0:55a05330f8cc | 700 | } |
| darran | 0:55a05330f8cc | 701 | |
| darran | 0:55a05330f8cc | 702 | /* |
| darran | 0:55a05330f8cc | 703 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 704 | * WAIT FOR WDH INTERRUPT |
| darran | 0:55a05330f8cc | 705 | * |
| darran | 0:55a05330f8cc | 706 | * Description: This function is infinite loop which breaks when ever a WDH interrupt rises |
| darran | 0:55a05330f8cc | 707 | * |
| darran | 0:55a05330f8cc | 708 | * Arguments : None |
| darran | 0:55a05330f8cc | 709 | * |
| darran | 0:55a05330f8cc | 710 | * Returns : None |
| darran | 0:55a05330f8cc | 711 | * |
| darran | 0:55a05330f8cc | 712 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 713 | */ |
| darran | 0:55a05330f8cc | 714 | |
| darran | 0:55a05330f8cc | 715 | void Host_WDHWait (void) |
| darran | 0:55a05330f8cc | 716 | { |
| darran | 0:55a05330f8cc | 717 | while (!HOST_WdhIntr) |
| darran | 0:55a05330f8cc | 718 | __WFI(); |
| darran | 0:55a05330f8cc | 719 | |
| darran | 0:55a05330f8cc | 720 | HOST_WdhIntr = 0; |
| darran | 0:55a05330f8cc | 721 | } |
| darran | 0:55a05330f8cc | 722 | |
| darran | 0:55a05330f8cc | 723 | /* |
| darran | 0:55a05330f8cc | 724 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 725 | * READ LE 32U |
| darran | 0:55a05330f8cc | 726 | * |
| darran | 0:55a05330f8cc | 727 | * Description: This function is used to read an unsigned integer from a character buffer in the platform |
| darran | 0:55a05330f8cc | 728 | * containing little endian processor |
| darran | 0:55a05330f8cc | 729 | * |
| darran | 0:55a05330f8cc | 730 | * Arguments : pmem Pointer to the character buffer |
| darran | 0:55a05330f8cc | 731 | * |
| darran | 0:55a05330f8cc | 732 | * Returns : val Unsigned integer |
| darran | 0:55a05330f8cc | 733 | * |
| darran | 0:55a05330f8cc | 734 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 735 | */ |
| darran | 0:55a05330f8cc | 736 | |
| darran | 0:55a05330f8cc | 737 | USB_INT32U ReadLE32U (volatile USB_INT08U *pmem) |
| darran | 0:55a05330f8cc | 738 | { |
| darran | 0:55a05330f8cc | 739 | USB_INT32U val = *(USB_INT32U*)pmem; |
| darran | 0:55a05330f8cc | 740 | #ifdef __BIG_ENDIAN |
| darran | 0:55a05330f8cc | 741 | return __REV(val); |
| darran | 0:55a05330f8cc | 742 | #else |
| darran | 0:55a05330f8cc | 743 | return val; |
| darran | 0:55a05330f8cc | 744 | #endif |
| darran | 0:55a05330f8cc | 745 | } |
| darran | 0:55a05330f8cc | 746 | |
| darran | 0:55a05330f8cc | 747 | /* |
| darran | 0:55a05330f8cc | 748 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 749 | * WRITE LE 32U |
| darran | 0:55a05330f8cc | 750 | * |
| darran | 0:55a05330f8cc | 751 | * Description: This function is used to write an unsigned integer into a charecter buffer in the platform |
| darran | 0:55a05330f8cc | 752 | * containing little endian processor. |
| darran | 0:55a05330f8cc | 753 | * |
| darran | 0:55a05330f8cc | 754 | * Arguments : pmem Pointer to the charecter buffer |
| darran | 0:55a05330f8cc | 755 | * val Integer value to be placed in the charecter buffer |
| darran | 0:55a05330f8cc | 756 | * |
| darran | 0:55a05330f8cc | 757 | * Returns : None |
| darran | 0:55a05330f8cc | 758 | * |
| darran | 0:55a05330f8cc | 759 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 760 | */ |
| darran | 0:55a05330f8cc | 761 | |
| darran | 0:55a05330f8cc | 762 | void WriteLE32U (volatile USB_INT08U *pmem, |
| darran | 0:55a05330f8cc | 763 | USB_INT32U val) |
| darran | 0:55a05330f8cc | 764 | { |
| darran | 0:55a05330f8cc | 765 | #ifdef __BIG_ENDIAN |
| darran | 0:55a05330f8cc | 766 | *(USB_INT32U*)pmem = __REV(val); |
| darran | 0:55a05330f8cc | 767 | #else |
| darran | 0:55a05330f8cc | 768 | *(USB_INT32U*)pmem = val; |
| darran | 0:55a05330f8cc | 769 | #endif |
| darran | 0:55a05330f8cc | 770 | } |
| darran | 0:55a05330f8cc | 771 | |
| darran | 0:55a05330f8cc | 772 | /* |
| darran | 0:55a05330f8cc | 773 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 774 | * READ LE 16U |
| darran | 0:55a05330f8cc | 775 | * |
| darran | 0:55a05330f8cc | 776 | * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform |
| darran | 0:55a05330f8cc | 777 | * containing little endian processor |
| darran | 0:55a05330f8cc | 778 | * |
| darran | 0:55a05330f8cc | 779 | * Arguments : pmem Pointer to the charecter buffer |
| darran | 0:55a05330f8cc | 780 | * |
| darran | 0:55a05330f8cc | 781 | * Returns : val Unsigned short integer |
| darran | 0:55a05330f8cc | 782 | * |
| darran | 0:55a05330f8cc | 783 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 784 | */ |
| darran | 0:55a05330f8cc | 785 | |
| darran | 0:55a05330f8cc | 786 | USB_INT16U ReadLE16U (volatile USB_INT08U *pmem) |
| darran | 0:55a05330f8cc | 787 | { |
| darran | 0:55a05330f8cc | 788 | USB_INT16U val = *(USB_INT16U*)pmem; |
| darran | 0:55a05330f8cc | 789 | #ifdef __BIG_ENDIAN |
| darran | 0:55a05330f8cc | 790 | return __REV16(val); |
| darran | 0:55a05330f8cc | 791 | #else |
| darran | 0:55a05330f8cc | 792 | return val; |
| darran | 0:55a05330f8cc | 793 | #endif |
| darran | 0:55a05330f8cc | 794 | } |
| darran | 0:55a05330f8cc | 795 | |
| darran | 0:55a05330f8cc | 796 | /* |
| darran | 0:55a05330f8cc | 797 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 798 | * WRITE LE 16U |
| darran | 0:55a05330f8cc | 799 | * |
| darran | 0:55a05330f8cc | 800 | * Description: This function is used to write an unsigned short integer into a charecter buffer in the |
| darran | 0:55a05330f8cc | 801 | * platform containing little endian processor |
| darran | 0:55a05330f8cc | 802 | * |
| darran | 0:55a05330f8cc | 803 | * Arguments : pmem Pointer to the charecter buffer |
| darran | 0:55a05330f8cc | 804 | * val Value to be placed in the charecter buffer |
| darran | 0:55a05330f8cc | 805 | * |
| darran | 0:55a05330f8cc | 806 | * Returns : None |
| darran | 0:55a05330f8cc | 807 | * |
| darran | 0:55a05330f8cc | 808 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 809 | */ |
| darran | 0:55a05330f8cc | 810 | |
| darran | 0:55a05330f8cc | 811 | void WriteLE16U (volatile USB_INT08U *pmem, |
| darran | 0:55a05330f8cc | 812 | USB_INT16U val) |
| darran | 0:55a05330f8cc | 813 | { |
| darran | 0:55a05330f8cc | 814 | #ifdef __BIG_ENDIAN |
| darran | 0:55a05330f8cc | 815 | *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF); |
| darran | 0:55a05330f8cc | 816 | #else |
| darran | 0:55a05330f8cc | 817 | *(USB_INT16U*)pmem = val; |
| darran | 0:55a05330f8cc | 818 | #endif |
| darran | 0:55a05330f8cc | 819 | } |
| darran | 0:55a05330f8cc | 820 | |
| darran | 0:55a05330f8cc | 821 | /* |
| darran | 0:55a05330f8cc | 822 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 823 | * READ BE 32U |
| darran | 0:55a05330f8cc | 824 | * |
| darran | 0:55a05330f8cc | 825 | * Description: This function is used to read an unsigned integer from a charecter buffer in the platform |
| darran | 0:55a05330f8cc | 826 | * containing big endian processor |
| darran | 0:55a05330f8cc | 827 | * |
| darran | 0:55a05330f8cc | 828 | * Arguments : pmem Pointer to the charecter buffer |
| darran | 0:55a05330f8cc | 829 | * |
| darran | 0:55a05330f8cc | 830 | * Returns : val Unsigned integer |
| darran | 0:55a05330f8cc | 831 | * |
| darran | 0:55a05330f8cc | 832 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 833 | */ |
| darran | 0:55a05330f8cc | 834 | |
| darran | 0:55a05330f8cc | 835 | USB_INT32U ReadBE32U (volatile USB_INT08U *pmem) |
| darran | 0:55a05330f8cc | 836 | { |
| darran | 0:55a05330f8cc | 837 | USB_INT32U val = *(USB_INT32U*)pmem; |
| darran | 0:55a05330f8cc | 838 | #ifdef __BIG_ENDIAN |
| darran | 0:55a05330f8cc | 839 | return val; |
| darran | 0:55a05330f8cc | 840 | #else |
| darran | 0:55a05330f8cc | 841 | return __REV(val); |
| darran | 0:55a05330f8cc | 842 | #endif |
| darran | 0:55a05330f8cc | 843 | } |
| darran | 0:55a05330f8cc | 844 | |
| darran | 0:55a05330f8cc | 845 | /* |
| darran | 0:55a05330f8cc | 846 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 847 | * WRITE BE 32U |
| darran | 0:55a05330f8cc | 848 | * |
| darran | 0:55a05330f8cc | 849 | * Description: This function is used to write an unsigned integer into a charecter buffer in the platform |
| darran | 0:55a05330f8cc | 850 | * containing big endian processor |
| darran | 0:55a05330f8cc | 851 | * |
| darran | 0:55a05330f8cc | 852 | * Arguments : pmem Pointer to the charecter buffer |
| darran | 0:55a05330f8cc | 853 | * val Value to be placed in the charecter buffer |
| darran | 0:55a05330f8cc | 854 | * |
| darran | 0:55a05330f8cc | 855 | * Returns : None |
| darran | 0:55a05330f8cc | 856 | * |
| darran | 0:55a05330f8cc | 857 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 858 | */ |
| darran | 0:55a05330f8cc | 859 | |
| darran | 0:55a05330f8cc | 860 | void WriteBE32U (volatile USB_INT08U *pmem, |
| darran | 0:55a05330f8cc | 861 | USB_INT32U val) |
| darran | 0:55a05330f8cc | 862 | { |
| darran | 0:55a05330f8cc | 863 | #ifdef __BIG_ENDIAN |
| darran | 0:55a05330f8cc | 864 | *(USB_INT32U*)pmem = val; |
| darran | 0:55a05330f8cc | 865 | #else |
| darran | 0:55a05330f8cc | 866 | *(USB_INT32U*)pmem = __REV(val); |
| darran | 0:55a05330f8cc | 867 | #endif |
| darran | 0:55a05330f8cc | 868 | } |
| darran | 0:55a05330f8cc | 869 | |
| darran | 0:55a05330f8cc | 870 | /* |
| darran | 0:55a05330f8cc | 871 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 872 | * READ BE 16U |
| darran | 0:55a05330f8cc | 873 | * |
| darran | 0:55a05330f8cc | 874 | * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform |
| darran | 0:55a05330f8cc | 875 | * containing big endian processor |
| darran | 0:55a05330f8cc | 876 | * |
| darran | 0:55a05330f8cc | 877 | * Arguments : pmem Pointer to the charecter buffer |
| darran | 0:55a05330f8cc | 878 | * |
| darran | 0:55a05330f8cc | 879 | * Returns : val Unsigned short integer |
| darran | 0:55a05330f8cc | 880 | * |
| darran | 0:55a05330f8cc | 881 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 882 | */ |
| darran | 0:55a05330f8cc | 883 | |
| darran | 0:55a05330f8cc | 884 | USB_INT16U ReadBE16U (volatile USB_INT08U *pmem) |
| darran | 0:55a05330f8cc | 885 | { |
| darran | 0:55a05330f8cc | 886 | USB_INT16U val = *(USB_INT16U*)pmem; |
| darran | 0:55a05330f8cc | 887 | #ifdef __BIG_ENDIAN |
| darran | 0:55a05330f8cc | 888 | return val; |
| darran | 0:55a05330f8cc | 889 | #else |
| darran | 0:55a05330f8cc | 890 | return __REV16(val); |
| darran | 0:55a05330f8cc | 891 | #endif |
| darran | 0:55a05330f8cc | 892 | } |
| darran | 0:55a05330f8cc | 893 | |
| darran | 0:55a05330f8cc | 894 | /* |
| darran | 0:55a05330f8cc | 895 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 896 | * WRITE BE 16U |
| darran | 0:55a05330f8cc | 897 | * |
| darran | 0:55a05330f8cc | 898 | * Description: This function is used to write an unsigned short integer into the charecter buffer in the |
| darran | 0:55a05330f8cc | 899 | * platform containing big endian processor |
| darran | 0:55a05330f8cc | 900 | * |
| darran | 0:55a05330f8cc | 901 | * Arguments : pmem Pointer to the charecter buffer |
| darran | 0:55a05330f8cc | 902 | * val Value to be placed in the charecter buffer |
| darran | 0:55a05330f8cc | 903 | * |
| darran | 0:55a05330f8cc | 904 | * Returns : None |
| darran | 0:55a05330f8cc | 905 | * |
| darran | 0:55a05330f8cc | 906 | ************************************************************************************************************** |
| darran | 0:55a05330f8cc | 907 | */ |
| darran | 0:55a05330f8cc | 908 | |
| darran | 0:55a05330f8cc | 909 | void WriteBE16U (volatile USB_INT08U *pmem, |
| darran | 0:55a05330f8cc | 910 | USB_INT16U val) |
| darran | 0:55a05330f8cc | 911 | { |
| darran | 0:55a05330f8cc | 912 | #ifdef __BIG_ENDIAN |
| darran | 0:55a05330f8cc | 913 | *(USB_INT16U*)pmem = val; |
| darran | 0:55a05330f8cc | 914 | #else |
| darran | 0:55a05330f8cc | 915 | *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF); |
| darran | 0:55a05330f8cc | 916 | #endif |
| darran | 0:55a05330f8cc | 917 | } |
| darran | 0:55a05330f8cc | 918 | |
| darran | 0:55a05330f8cc | 919 | #ifdef __cplusplus |
| darran | 0:55a05330f8cc | 920 | } |
| darran | 0:55a05330f8cc | 921 | #endif |
| darran | 0:55a05330f8cc | 922 | |
| darran | 0:55a05330f8cc | 923 | #endif |