Daoyu_Sofiane Yao_Belouka / mbed-rtos

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Dependents:   Mecatro_Gyro_Programme_Codeur_HC06

rtx/TARGET_ARM7/rt_HAL_CM.h@0:a8ed743bc1e1, 2021-04-16 (annotated)

Committer:
daoyu_sofiane
Date:
Fri Apr 16 09:25:33 2021 +0000
Revision:
0:a8ed743bc1e1
Projet Gyropode

Who changed what in which revision?

UserRevisionLine numberNew contents of line
daoyu_sofiane 0:a8ed743bc1e1 1 /*----------------------------------------------------------------------------
daoyu_sofiane 0:a8ed743bc1e1 2 * RL-ARM - RTX
daoyu_sofiane 0:a8ed743bc1e1 3 *----------------------------------------------------------------------------
daoyu_sofiane 0:a8ed743bc1e1 4 * Name: RT_HAL_CM.H
daoyu_sofiane 0:a8ed743bc1e1 5 * Purpose: Hardware Abstraction Layer for Cortex-M definitions
daoyu_sofiane 0:a8ed743bc1e1 6 * Rev.: V4.60
daoyu_sofiane 0:a8ed743bc1e1 7 *----------------------------------------------------------------------------
daoyu_sofiane 0:a8ed743bc1e1 8 *
daoyu_sofiane 0:a8ed743bc1e1 9 * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH
daoyu_sofiane 0:a8ed743bc1e1 10 * All rights reserved.
daoyu_sofiane 0:a8ed743bc1e1 11 * Redistribution and use in source and binary forms, with or without
daoyu_sofiane 0:a8ed743bc1e1 12 * modification, are permitted provided that the following conditions are met:
daoyu_sofiane 0:a8ed743bc1e1 13 * - Redistributions of source code must retain the above copyright
daoyu_sofiane 0:a8ed743bc1e1 14 * notice, this list of conditions and the following disclaimer.
daoyu_sofiane 0:a8ed743bc1e1 15 * - Redistributions in binary form must reproduce the above copyright
daoyu_sofiane 0:a8ed743bc1e1 16 * notice, this list of conditions and the following disclaimer in the
daoyu_sofiane 0:a8ed743bc1e1 17 * documentation and/or other materials provided with the distribution.
daoyu_sofiane 0:a8ed743bc1e1 18 * - Neither the name of ARM nor the names of its contributors may be used
daoyu_sofiane 0:a8ed743bc1e1 19 * to endorse or promote products derived from this software without
daoyu_sofiane 0:a8ed743bc1e1 20 * specific prior written permission.
daoyu_sofiane 0:a8ed743bc1e1 21 *
daoyu_sofiane 0:a8ed743bc1e1 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
daoyu_sofiane 0:a8ed743bc1e1 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
daoyu_sofiane 0:a8ed743bc1e1 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
daoyu_sofiane 0:a8ed743bc1e1 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
daoyu_sofiane 0:a8ed743bc1e1 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
daoyu_sofiane 0:a8ed743bc1e1 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
daoyu_sofiane 0:a8ed743bc1e1 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
daoyu_sofiane 0:a8ed743bc1e1 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
daoyu_sofiane 0:a8ed743bc1e1 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
daoyu_sofiane 0:a8ed743bc1e1 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
daoyu_sofiane 0:a8ed743bc1e1 32 * POSSIBILITY OF SUCH DAMAGE.
daoyu_sofiane 0:a8ed743bc1e1 33 *---------------------------------------------------------------------------*/
daoyu_sofiane 0:a8ed743bc1e1 34
daoyu_sofiane 0:a8ed743bc1e1 35 #include "cmsis.h"
daoyu_sofiane 0:a8ed743bc1e1 36 /* Definitions */
daoyu_sofiane 0:a8ed743bc1e1 37 #define INITIAL_xPSR 0x10000000
daoyu_sofiane 0:a8ed743bc1e1 38 #define DEMCR_TRCENA 0x01000000
daoyu_sofiane 0:a8ed743bc1e1 39 #define ITM_ITMENA 0x00000001
daoyu_sofiane 0:a8ed743bc1e1 40 #define MAGIC_WORD 0xE25A2EA5
daoyu_sofiane 0:a8ed743bc1e1 41
daoyu_sofiane 0:a8ed743bc1e1 42 #define SYS_TICK_IRQn TIMER0_IRQn
daoyu_sofiane 0:a8ed743bc1e1 43
daoyu_sofiane 0:a8ed743bc1e1 44 extern void rt_set_PSP (U32 stack);
daoyu_sofiane 0:a8ed743bc1e1 45 extern U32 rt_get_PSP (void);
daoyu_sofiane 0:a8ed743bc1e1 46 extern void os_set_env (void);
daoyu_sofiane 0:a8ed743bc1e1 47 extern void SysTick_Handler (void);
daoyu_sofiane 0:a8ed743bc1e1 48 extern void *_alloc_box (void *box_mem);
daoyu_sofiane 0:a8ed743bc1e1 49 extern int _free_box (void *box_mem, void *box);
daoyu_sofiane 0:a8ed743bc1e1 50
daoyu_sofiane 0:a8ed743bc1e1 51 extern void rt_init_stack (P_TCB p_TCB, FUNCP task_body);
daoyu_sofiane 0:a8ed743bc1e1 52 extern void rt_ret_val (P_TCB p_TCB, U32 v0);
daoyu_sofiane 0:a8ed743bc1e1 53 extern void rt_ret_val2 (P_TCB p_TCB, U32 v0, U32 v1);
daoyu_sofiane 0:a8ed743bc1e1 54
daoyu_sofiane 0:a8ed743bc1e1 55 extern void dbg_init (void);
daoyu_sofiane 0:a8ed743bc1e1 56 extern void dbg_task_notify (P_TCB p_tcb, BOOL create);
daoyu_sofiane 0:a8ed743bc1e1 57 extern void dbg_task_switch (U32 task_id);
daoyu_sofiane 0:a8ed743bc1e1 58
daoyu_sofiane 0:a8ed743bc1e1 59
daoyu_sofiane 0:a8ed743bc1e1 60 #if defined (__CC_ARM) /* ARM Compiler */
daoyu_sofiane 0:a8ed743bc1e1 61
daoyu_sofiane 0:a8ed743bc1e1 62 #if ((__TARGET_ARCH_7_M || __TARGET_ARCH_7E_M) && !NO_EXCLUSIVE_ACCESS)
daoyu_sofiane 0:a8ed743bc1e1 63 #define __USE_EXCLUSIVE_ACCESS
daoyu_sofiane 0:a8ed743bc1e1 64 #else
daoyu_sofiane 0:a8ed743bc1e1 65 #undef __USE_EXCLUSIVE_ACCESS
daoyu_sofiane 0:a8ed743bc1e1 66 #endif
daoyu_sofiane 0:a8ed743bc1e1 67
daoyu_sofiane 0:a8ed743bc1e1 68 #elif defined (__GNUC__) /* GNU Compiler */
daoyu_sofiane 0:a8ed743bc1e1 69
daoyu_sofiane 0:a8ed743bc1e1 70 #undef __USE_EXCLUSIVE_ACCESS
daoyu_sofiane 0:a8ed743bc1e1 71
daoyu_sofiane 0:a8ed743bc1e1 72 #if defined (__CORTEX_M0) || defined (__CORTEX_M0PLUS)
daoyu_sofiane 0:a8ed743bc1e1 73 #define __TARGET_ARCH_6S_M 1
daoyu_sofiane 0:a8ed743bc1e1 74 #else
daoyu_sofiane 0:a8ed743bc1e1 75 #define __TARGET_ARCH_6S_M 0
daoyu_sofiane 0:a8ed743bc1e1 76 #endif
daoyu_sofiane 0:a8ed743bc1e1 77
daoyu_sofiane 0:a8ed743bc1e1 78 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
daoyu_sofiane 0:a8ed743bc1e1 79 #define __TARGET_FPU_VFP 1
daoyu_sofiane 0:a8ed743bc1e1 80 #else
daoyu_sofiane 0:a8ed743bc1e1 81 #define __TARGET_FPU_VFP 0
daoyu_sofiane 0:a8ed743bc1e1 82 #endif
daoyu_sofiane 0:a8ed743bc1e1 83
daoyu_sofiane 0:a8ed743bc1e1 84 #define __inline inline
daoyu_sofiane 0:a8ed743bc1e1 85 #define __weak __attribute__((weak))
daoyu_sofiane 0:a8ed743bc1e1 86
daoyu_sofiane 0:a8ed743bc1e1 87
daoyu_sofiane 0:a8ed743bc1e1 88 #elif defined (__ICCARM__) /* IAR Compiler */
daoyu_sofiane 0:a8ed743bc1e1 89
daoyu_sofiane 0:a8ed743bc1e1 90 #undef __USE_EXCLUSIVE_ACCESS
daoyu_sofiane 0:a8ed743bc1e1 91
daoyu_sofiane 0:a8ed743bc1e1 92 #if (__CORE__ == __ARM6M__)
daoyu_sofiane 0:a8ed743bc1e1 93 #define __TARGET_ARCH_6S_M 1
daoyu_sofiane 0:a8ed743bc1e1 94 #else
daoyu_sofiane 0:a8ed743bc1e1 95 #define __TARGET_ARCH_6S_M 0
daoyu_sofiane 0:a8ed743bc1e1 96 #endif
daoyu_sofiane 0:a8ed743bc1e1 97
daoyu_sofiane 0:a8ed743bc1e1 98 #if defined __ARMVFP__
daoyu_sofiane 0:a8ed743bc1e1 99 #define __TARGET_FPU_VFP 1
daoyu_sofiane 0:a8ed743bc1e1 100 #else
daoyu_sofiane 0:a8ed743bc1e1 101 #define __TARGET_FPU_VFP 0
daoyu_sofiane 0:a8ed743bc1e1 102 #endif
daoyu_sofiane 0:a8ed743bc1e1 103
daoyu_sofiane 0:a8ed743bc1e1 104 #define __inline inline
daoyu_sofiane 0:a8ed743bc1e1 105
daoyu_sofiane 0:a8ed743bc1e1 106 #endif
daoyu_sofiane 0:a8ed743bc1e1 107
daoyu_sofiane 0:a8ed743bc1e1 108
daoyu_sofiane 0:a8ed743bc1e1 109 /* NVIC registers */
daoyu_sofiane 0:a8ed743bc1e1 110
daoyu_sofiane 0:a8ed743bc1e1 111 #define OS_PEND_IRQ() NVIC_PendIRQ(SYS_TICK_IRQn)
daoyu_sofiane 0:a8ed743bc1e1 112 #define OS_PENDING NVIC_PendingIRQ(SYS_TICK_IRQn)
daoyu_sofiane 0:a8ed743bc1e1 113 #define OS_UNPEND(fl) NVIC_UnpendIRQ(SYS_TICK_IRQn)
daoyu_sofiane 0:a8ed743bc1e1 114 #define OS_PEND(fl,p) NVIC_PendIRQ(SYS_TICK_IRQn)
daoyu_sofiane 0:a8ed743bc1e1 115 #define OS_LOCK() NVIC_DisableIRQ(SYS_TICK_IRQn)
daoyu_sofiane 0:a8ed743bc1e1 116 #define OS_UNLOCK() NVIC_EnableIRQ(SYS_TICK_IRQn)
daoyu_sofiane 0:a8ed743bc1e1 117
daoyu_sofiane 0:a8ed743bc1e1 118 #define OS_X_PENDING NVIC_PendingIRQ(SYS_TICK_IRQn)
daoyu_sofiane 0:a8ed743bc1e1 119 #define OS_X_UNPEND(fl) NVIC_UnpendIRQ(SYS_TICK_IRQn)
daoyu_sofiane 0:a8ed743bc1e1 120 #define OS_X_PEND(fl,p) NVIC_PendIRQ(SYS_TICK_IRQn)
daoyu_sofiane 0:a8ed743bc1e1 121
daoyu_sofiane 0:a8ed743bc1e1 122 #define OS_X_INIT(n) NVIC_EnableIRQ(n)
daoyu_sofiane 0:a8ed743bc1e1 123 #define OS_X_LOCK(n) NVIC_DisableIRQ(n)
daoyu_sofiane 0:a8ed743bc1e1 124 #define OS_X_UNLOCK(n) NVIC_EnableIRQ(n)
daoyu_sofiane 0:a8ed743bc1e1 125
daoyu_sofiane 0:a8ed743bc1e1 126 /* Variables */
daoyu_sofiane 0:a8ed743bc1e1 127 extern BIT dbg_msg;
daoyu_sofiane 0:a8ed743bc1e1 128
daoyu_sofiane 0:a8ed743bc1e1 129 /* Functions */
daoyu_sofiane 0:a8ed743bc1e1 130 #ifdef __USE_EXCLUSIVE_ACCESS
daoyu_sofiane 0:a8ed743bc1e1 131 #define rt_inc(p) while(__strex((__ldrex(p)+1),p))
daoyu_sofiane 0:a8ed743bc1e1 132 #define rt_dec(p) while(__strex((__ldrex(p)-1),p))
daoyu_sofiane 0:a8ed743bc1e1 133 #else
daoyu_sofiane 0:a8ed743bc1e1 134 #define rt_inc(p) __disable_irq();(*p)++;__enable_irq();
daoyu_sofiane 0:a8ed743bc1e1 135 #define rt_dec(p) __disable_irq();(*p)--;__enable_irq();
daoyu_sofiane 0:a8ed743bc1e1 136 #endif
daoyu_sofiane 0:a8ed743bc1e1 137
daoyu_sofiane 0:a8ed743bc1e1 138 __inline static U32 rt_inc_qi (U32 size, U8 *count, U8 *first) {
daoyu_sofiane 0:a8ed743bc1e1 139 U32 cnt,c2;
daoyu_sofiane 0:a8ed743bc1e1 140 #ifdef __USE_EXCLUSIVE_ACCESS
daoyu_sofiane 0:a8ed743bc1e1 141 do {
daoyu_sofiane 0:a8ed743bc1e1 142 if ((cnt = __ldrex(count)) == size) {
daoyu_sofiane 0:a8ed743bc1e1 143 __clrex();
daoyu_sofiane 0:a8ed743bc1e1 144 return (cnt); }
daoyu_sofiane 0:a8ed743bc1e1 145 } while (__strex(cnt+1, count));
daoyu_sofiane 0:a8ed743bc1e1 146 do {
daoyu_sofiane 0:a8ed743bc1e1 147 c2 = (cnt = __ldrex(first)) + 1;
daoyu_sofiane 0:a8ed743bc1e1 148 if (c2 == size) c2 = 0;
daoyu_sofiane 0:a8ed743bc1e1 149 } while (__strex(c2, first));
daoyu_sofiane 0:a8ed743bc1e1 150 #else
daoyu_sofiane 0:a8ed743bc1e1 151 __disable_irq();
daoyu_sofiane 0:a8ed743bc1e1 152 if ((cnt = *count) < size) {
daoyu_sofiane 0:a8ed743bc1e1 153 *count = cnt+1;
daoyu_sofiane 0:a8ed743bc1e1 154 c2 = (cnt = *first) + 1;
daoyu_sofiane 0:a8ed743bc1e1 155 if (c2 == size) c2 = 0;
daoyu_sofiane 0:a8ed743bc1e1 156 *first = c2;
daoyu_sofiane 0:a8ed743bc1e1 157 }
daoyu_sofiane 0:a8ed743bc1e1 158 __enable_irq ();
daoyu_sofiane 0:a8ed743bc1e1 159 #endif
daoyu_sofiane 0:a8ed743bc1e1 160 return (cnt);
daoyu_sofiane 0:a8ed743bc1e1 161 }
daoyu_sofiane 0:a8ed743bc1e1 162
daoyu_sofiane 0:a8ed743bc1e1 163 __inline static void rt_systick_init (void) {
daoyu_sofiane 0:a8ed743bc1e1 164 #if SYS_TICK_IRQn == TIMER0_IRQn
daoyu_sofiane 0:a8ed743bc1e1 165 #define SYS_TICK_TIMER LPC_TIM0
daoyu_sofiane 0:a8ed743bc1e1 166 LPC_SC->PCONP |= (1 << PCTIM0);
daoyu_sofiane 0:a8ed743bc1e1 167 LPC_SC->PCLKSEL0 = (LPC_SC->PCLKSEL0 & (~(1<<3))) | (1<<2); //PCLK == CPUCLK
daoyu_sofiane 0:a8ed743bc1e1 168 #elif SYS_TICK_IRQn == TIMER1_IRQn
daoyu_sofiane 0:a8ed743bc1e1 169 #define SYS_TICK_TIMER LPC_TIM1
daoyu_sofiane 0:a8ed743bc1e1 170 LPC_SC->PCONP |= (1 << PCTIM1);
daoyu_sofiane 0:a8ed743bc1e1 171 LPC_SC->PCLKSEL0 = (LPC_SC->PCLKSEL0 & (~(1<<5))) | (1<<4); //PCLK == CPUCLK
daoyu_sofiane 0:a8ed743bc1e1 172 #elif SYS_TICK_IRQn == TIMER2_IRQn
daoyu_sofiane 0:a8ed743bc1e1 173 #define SYS_TICK_TIMER LPC_TIM2
daoyu_sofiane 0:a8ed743bc1e1 174 LPC_SC->PCONP |= (1 << PCTIM2);
daoyu_sofiane 0:a8ed743bc1e1 175 LPC_SC->PCLKSEL1 = (LPC_SC->PCLKSEL1 & (~(1<<13))) | (1<<12); //PCLK == CPUCLK
daoyu_sofiane 0:a8ed743bc1e1 176 #else
daoyu_sofiane 0:a8ed743bc1e1 177 #define SYS_TICK_TIMER LPC_TIM3
daoyu_sofiane 0:a8ed743bc1e1 178 LPC_SC->PCONP |= (1 << PCTIM3);
daoyu_sofiane 0:a8ed743bc1e1 179 LPC_SC->PCLKSEL1 = (LPC_SC->PCLKSEL1 & (~(1<<15))) | (1<<14); //PCLK == CPUCLK
daoyu_sofiane 0:a8ed743bc1e1 180 #endif
daoyu_sofiane 0:a8ed743bc1e1 181
daoyu_sofiane 0:a8ed743bc1e1 182 // setup Timer to count forever
daoyu_sofiane 0:a8ed743bc1e1 183 //interrupt_reg
daoyu_sofiane 0:a8ed743bc1e1 184 SYS_TICK_TIMER->TCR = 2; // reset & disable timer 0
daoyu_sofiane 0:a8ed743bc1e1 185 SYS_TICK_TIMER->TC = os_trv;
daoyu_sofiane 0:a8ed743bc1e1 186 SYS_TICK_TIMER->PR = 0; // set the prescale divider
daoyu_sofiane 0:a8ed743bc1e1 187 //Reset of TC and Interrupt when MR3 MR2 matches TC
daoyu_sofiane 0:a8ed743bc1e1 188 SYS_TICK_TIMER->MCR = (1 << 9) |(1 << 10); //TMCR_MR3_R_Msk | TMCR_MR3_I_Msk
daoyu_sofiane 0:a8ed743bc1e1 189 SYS_TICK_TIMER->MR3 = os_trv; // match registers
daoyu_sofiane 0:a8ed743bc1e1 190 SYS_TICK_TIMER->CCR = 0; // disable compare registers
daoyu_sofiane 0:a8ed743bc1e1 191 SYS_TICK_TIMER->EMR = 0; // disable external match register
daoyu_sofiane 0:a8ed743bc1e1 192 // initialize the interrupt vector
daoyu_sofiane 0:a8ed743bc1e1 193 NVIC_SetVector(SYS_TICK_IRQn, (uint32_t)&SysTick_Handler);
daoyu_sofiane 0:a8ed743bc1e1 194 SYS_TICK_TIMER->TCR = 1; // enable timer 0
daoyu_sofiane 0:a8ed743bc1e1 195 }
daoyu_sofiane 0:a8ed743bc1e1 196
daoyu_sofiane 0:a8ed743bc1e1 197 __inline static void rt_svc_init (void) {
daoyu_sofiane 0:a8ed743bc1e1 198 // TODO: add svcInit
daoyu_sofiane 0:a8ed743bc1e1 199
daoyu_sofiane 0:a8ed743bc1e1 200 }
daoyu_sofiane 0:a8ed743bc1e1 201
daoyu_sofiane 0:a8ed743bc1e1 202 #ifdef DBG_MSG
daoyu_sofiane 0:a8ed743bc1e1 203 #define DBG_INIT() dbg_init()
daoyu_sofiane 0:a8ed743bc1e1 204 #define DBG_TASK_NOTIFY(p_tcb,create) if (dbg_msg) dbg_task_notify(p_tcb,create)
daoyu_sofiane 0:a8ed743bc1e1 205 #define DBG_TASK_SWITCH(task_id) if (dbg_msg && (os_tsk.new_tsk != os_tsk.run)) \
daoyu_sofiane 0:a8ed743bc1e1 206 dbg_task_switch(task_id)
daoyu_sofiane 0:a8ed743bc1e1 207 #else
daoyu_sofiane 0:a8ed743bc1e1 208 #define DBG_INIT()
daoyu_sofiane 0:a8ed743bc1e1 209 #define DBG_TASK_NOTIFY(p_tcb,create)
daoyu_sofiane 0:a8ed743bc1e1 210 #define DBG_TASK_SWITCH(task_id)
daoyu_sofiane 0:a8ed743bc1e1 211 #endif
daoyu_sofiane 0:a8ed743bc1e1 212
daoyu_sofiane 0:a8ed743bc1e1 213 /*----------------------------------------------------------------------------
daoyu_sofiane 0:a8ed743bc1e1 214 * end of file
daoyu_sofiane 0:a8ed743bc1e1 215 *---------------------------------------------------------------------------*/
daoyu_sofiane 0:a8ed743bc1e1 216