Daniel Sygut / Application

lol

Dependencies:   MMA8451Q

Fork of Application by Mateusz Kowalik

mbed-dev/hal/spi_api.h@10:41552d038a69, 2017-01-10 (annotated)

Committer:
Zaitsev
Date:
Tue Jan 10 20:42:26 2017 +0000
Revision:
10:41552d038a69
USB Serial bi-directional bridge

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Zaitsev 10:41552d038a69 1
Zaitsev 10:41552d038a69 2 /** \addtogroup hal */
Zaitsev 10:41552d038a69 3 /** @{*/
Zaitsev 10:41552d038a69 4 /* mbed Microcontroller Library
Zaitsev 10:41552d038a69 5 * Copyright (c) 2006-2013 ARM Limited
Zaitsev 10:41552d038a69 6 *
Zaitsev 10:41552d038a69 7 * Licensed under the Apache License, Version 2.0 (the "License");
Zaitsev 10:41552d038a69 8 * you may not use this file except in compliance with the License.
Zaitsev 10:41552d038a69 9 * You may obtain a copy of the License at
Zaitsev 10:41552d038a69 10 *
Zaitsev 10:41552d038a69 11 * http://www.apache.org/licenses/LICENSE-2.0
Zaitsev 10:41552d038a69 12 *
Zaitsev 10:41552d038a69 13 * Unless required by applicable law or agreed to in writing, software
Zaitsev 10:41552d038a69 14 * distributed under the License is distributed on an "AS IS" BASIS,
Zaitsev 10:41552d038a69 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Zaitsev 10:41552d038a69 16 * See the License for the specific language governing permissions and
Zaitsev 10:41552d038a69 17 * limitations under the License.
Zaitsev 10:41552d038a69 18 */
Zaitsev 10:41552d038a69 19 #ifndef MBED_SPI_API_H
Zaitsev 10:41552d038a69 20 #define MBED_SPI_API_H
Zaitsev 10:41552d038a69 21
Zaitsev 10:41552d038a69 22 #include "device.h"
Zaitsev 10:41552d038a69 23 #include "hal/dma_api.h"
Zaitsev 10:41552d038a69 24 #include "hal/buffer.h"
Zaitsev 10:41552d038a69 25
Zaitsev 10:41552d038a69 26 #if DEVICE_SPI
Zaitsev 10:41552d038a69 27
Zaitsev 10:41552d038a69 28 #define SPI_EVENT_ERROR (1 << 1)
Zaitsev 10:41552d038a69 29 #define SPI_EVENT_COMPLETE (1 << 2)
Zaitsev 10:41552d038a69 30 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
Zaitsev 10:41552d038a69 31 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
Zaitsev 10:41552d038a69 32
Zaitsev 10:41552d038a69 33 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
Zaitsev 10:41552d038a69 34
Zaitsev 10:41552d038a69 35 #define SPI_FILL_WORD (0xFFFF)
Zaitsev 10:41552d038a69 36
Zaitsev 10:41552d038a69 37 #if DEVICE_SPI_ASYNCH
Zaitsev 10:41552d038a69 38 /** Asynch SPI HAL structure
Zaitsev 10:41552d038a69 39 */
Zaitsev 10:41552d038a69 40 typedef struct {
Zaitsev 10:41552d038a69 41 struct spi_s spi; /**< Target specific SPI structure */
Zaitsev 10:41552d038a69 42 struct buffer_s tx_buff; /**< Tx buffer */
Zaitsev 10:41552d038a69 43 struct buffer_s rx_buff; /**< Rx buffer */
Zaitsev 10:41552d038a69 44 } spi_t;
Zaitsev 10:41552d038a69 45
Zaitsev 10:41552d038a69 46 #else
Zaitsev 10:41552d038a69 47 /** Non-asynch SPI HAL structure
Zaitsev 10:41552d038a69 48 */
Zaitsev 10:41552d038a69 49 typedef struct spi_s spi_t;
Zaitsev 10:41552d038a69 50
Zaitsev 10:41552d038a69 51 #endif
Zaitsev 10:41552d038a69 52
Zaitsev 10:41552d038a69 53 #ifdef __cplusplus
Zaitsev 10:41552d038a69 54 extern "C" {
Zaitsev 10:41552d038a69 55 #endif
Zaitsev 10:41552d038a69 56
Zaitsev 10:41552d038a69 57 /**
Zaitsev 10:41552d038a69 58 * \defgroup hal_GeneralSPI SPI Configuration Functions
Zaitsev 10:41552d038a69 59 * @{
Zaitsev 10:41552d038a69 60 */
Zaitsev 10:41552d038a69 61
Zaitsev 10:41552d038a69 62 /** Initialize the SPI peripheral
Zaitsev 10:41552d038a69 63 *
Zaitsev 10:41552d038a69 64 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
Zaitsev 10:41552d038a69 65 * @param[out] obj The SPI object to initialize
Zaitsev 10:41552d038a69 66 * @param[in] mosi The pin to use for MOSI
Zaitsev 10:41552d038a69 67 * @param[in] miso The pin to use for MISO
Zaitsev 10:41552d038a69 68 * @param[in] sclk The pin to use for SCLK
Zaitsev 10:41552d038a69 69 * @param[in] ssel The pin to use for SSEL
Zaitsev 10:41552d038a69 70 */
Zaitsev 10:41552d038a69 71 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
Zaitsev 10:41552d038a69 72
Zaitsev 10:41552d038a69 73 /** Release a SPI object
Zaitsev 10:41552d038a69 74 *
Zaitsev 10:41552d038a69 75 * TODO: spi_free is currently unimplemented
Zaitsev 10:41552d038a69 76 * This will require reference counting at the C++ level to be safe
Zaitsev 10:41552d038a69 77 *
Zaitsev 10:41552d038a69 78 * Return the pins owned by the SPI object to their reset state
Zaitsev 10:41552d038a69 79 * Disable the SPI peripheral
Zaitsev 10:41552d038a69 80 * Disable the SPI clock
Zaitsev 10:41552d038a69 81 * @param[in] obj The SPI object to deinitialize
Zaitsev 10:41552d038a69 82 */
Zaitsev 10:41552d038a69 83 void spi_free(spi_t *obj);
Zaitsev 10:41552d038a69 84
Zaitsev 10:41552d038a69 85 /** Configure the SPI format
Zaitsev 10:41552d038a69 86 *
Zaitsev 10:41552d038a69 87 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
Zaitsev 10:41552d038a69 88 * The default bit order is MSB.
Zaitsev 10:41552d038a69 89 * @param[in,out] obj The SPI object to configure
Zaitsev 10:41552d038a69 90 * @param[in] bits The number of bits per frame
Zaitsev 10:41552d038a69 91 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
Zaitsev 10:41552d038a69 92 * @param[in] slave Zero for master mode or non-zero for slave mode
Zaitsev 10:41552d038a69 93 */
Zaitsev 10:41552d038a69 94 void spi_format(spi_t *obj, int bits, int mode, int slave);
Zaitsev 10:41552d038a69 95
Zaitsev 10:41552d038a69 96 /** Set the SPI baud rate
Zaitsev 10:41552d038a69 97 *
Zaitsev 10:41552d038a69 98 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
Zaitsev 10:41552d038a69 99 * Configures the SPI peripheral's baud rate
Zaitsev 10:41552d038a69 100 * @param[in,out] obj The SPI object to configure
Zaitsev 10:41552d038a69 101 * @param[in] hz The baud rate in Hz
Zaitsev 10:41552d038a69 102 */
Zaitsev 10:41552d038a69 103 void spi_frequency(spi_t *obj, int hz);
Zaitsev 10:41552d038a69 104
Zaitsev 10:41552d038a69 105 /**@}*/
Zaitsev 10:41552d038a69 106 /**
Zaitsev 10:41552d038a69 107 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
Zaitsev 10:41552d038a69 108 * @{
Zaitsev 10:41552d038a69 109 */
Zaitsev 10:41552d038a69 110
Zaitsev 10:41552d038a69 111 /** Write a byte out in master mode and receive a value
Zaitsev 10:41552d038a69 112 *
Zaitsev 10:41552d038a69 113 * @param[in] obj The SPI peripheral to use for sending
Zaitsev 10:41552d038a69 114 * @param[in] value The value to send
Zaitsev 10:41552d038a69 115 * @return Returns the value received during send
Zaitsev 10:41552d038a69 116 */
Zaitsev 10:41552d038a69 117 int spi_master_write(spi_t *obj, int value);
Zaitsev 10:41552d038a69 118
Zaitsev 10:41552d038a69 119 /** Check if a value is available to read
Zaitsev 10:41552d038a69 120 *
Zaitsev 10:41552d038a69 121 * @param[in] obj The SPI peripheral to check
Zaitsev 10:41552d038a69 122 * @return non-zero if a value is available
Zaitsev 10:41552d038a69 123 */
Zaitsev 10:41552d038a69 124 int spi_slave_receive(spi_t *obj);
Zaitsev 10:41552d038a69 125
Zaitsev 10:41552d038a69 126 /** Get a received value out of the SPI receive buffer in slave mode
Zaitsev 10:41552d038a69 127 *
Zaitsev 10:41552d038a69 128 * Blocks until a value is available
Zaitsev 10:41552d038a69 129 * @param[in] obj The SPI peripheral to read
Zaitsev 10:41552d038a69 130 * @return The value received
Zaitsev 10:41552d038a69 131 */
Zaitsev 10:41552d038a69 132 int spi_slave_read(spi_t *obj);
Zaitsev 10:41552d038a69 133
Zaitsev 10:41552d038a69 134 /** Write a value to the SPI peripheral in slave mode
Zaitsev 10:41552d038a69 135 *
Zaitsev 10:41552d038a69 136 * Blocks until the SPI peripheral can be written to
Zaitsev 10:41552d038a69 137 * @param[in] obj The SPI peripheral to write
Zaitsev 10:41552d038a69 138 * @param[in] value The value to write
Zaitsev 10:41552d038a69 139 */
Zaitsev 10:41552d038a69 140 void spi_slave_write(spi_t *obj, int value);
Zaitsev 10:41552d038a69 141
Zaitsev 10:41552d038a69 142 /** Checks if the specified SPI peripheral is in use
Zaitsev 10:41552d038a69 143 *
Zaitsev 10:41552d038a69 144 * @param[in] obj The SPI peripheral to check
Zaitsev 10:41552d038a69 145 * @return non-zero if the peripheral is currently transmitting
Zaitsev 10:41552d038a69 146 */
Zaitsev 10:41552d038a69 147 int spi_busy(spi_t *obj);
Zaitsev 10:41552d038a69 148
Zaitsev 10:41552d038a69 149 /** Get the module number
Zaitsev 10:41552d038a69 150 *
Zaitsev 10:41552d038a69 151 * @param[in] obj The SPI peripheral to check
Zaitsev 10:41552d038a69 152 * @return The module number
Zaitsev 10:41552d038a69 153 */
Zaitsev 10:41552d038a69 154 uint8_t spi_get_module(spi_t *obj);
Zaitsev 10:41552d038a69 155
Zaitsev 10:41552d038a69 156 /**@}*/
Zaitsev 10:41552d038a69 157
Zaitsev 10:41552d038a69 158 #if DEVICE_SPI_ASYNCH
Zaitsev 10:41552d038a69 159 /**
Zaitsev 10:41552d038a69 160 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
Zaitsev 10:41552d038a69 161 * @{
Zaitsev 10:41552d038a69 162 */
Zaitsev 10:41552d038a69 163
Zaitsev 10:41552d038a69 164 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
Zaitsev 10:41552d038a69 165 *
Zaitsev 10:41552d038a69 166 * @param[in] obj The SPI object that holds the transfer information
Zaitsev 10:41552d038a69 167 * @param[in] tx The transmit buffer
Zaitsev 10:41552d038a69 168 * @param[in] tx_length The number of bytes to transmit
Zaitsev 10:41552d038a69 169 * @param[in] rx The receive buffer
Zaitsev 10:41552d038a69 170 * @param[in] rx_length The number of bytes to receive
Zaitsev 10:41552d038a69 171 * @param[in] bit_width The bit width of buffer words
Zaitsev 10:41552d038a69 172 * @param[in] event The logical OR of events to be registered
Zaitsev 10:41552d038a69 173 * @param[in] handler SPI interrupt handler
Zaitsev 10:41552d038a69 174 * @param[in] hint A suggestion for how to use DMA with this transfer
Zaitsev 10:41552d038a69 175 */
Zaitsev 10:41552d038a69 176 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
Zaitsev 10:41552d038a69 177
Zaitsev 10:41552d038a69 178 /** The asynchronous IRQ handler
Zaitsev 10:41552d038a69 179 *
Zaitsev 10:41552d038a69 180 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
Zaitsev 10:41552d038a69 181 * conditions, such as buffer overflows or transfer complete.
Zaitsev 10:41552d038a69 182 * @param[in] obj The SPI object that holds the transfer information
Zaitsev 10:41552d038a69 183 * @return Event flags if a transfer termination condition was met; otherwise 0.
Zaitsev 10:41552d038a69 184 */
Zaitsev 10:41552d038a69 185 uint32_t spi_irq_handler_asynch(spi_t *obj);
Zaitsev 10:41552d038a69 186
Zaitsev 10:41552d038a69 187 /** Attempts to determine if the SPI peripheral is already in use
Zaitsev 10:41552d038a69 188 *
Zaitsev 10:41552d038a69 189 * If a temporary DMA channel has been allocated, peripheral is in use.
Zaitsev 10:41552d038a69 190 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
Zaitsev 10:41552d038a69 191 * channel were allocated.
Zaitsev 10:41552d038a69 192 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
Zaitsev 10:41552d038a69 193 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
Zaitsev 10:41552d038a69 194 * there are any bytes in the FIFOs.
Zaitsev 10:41552d038a69 195 * @param[in] obj The SPI object to check for activity
Zaitsev 10:41552d038a69 196 * @return Non-zero if the SPI port is active or zero if it is not.
Zaitsev 10:41552d038a69 197 */
Zaitsev 10:41552d038a69 198 uint8_t spi_active(spi_t *obj);
Zaitsev 10:41552d038a69 199
Zaitsev 10:41552d038a69 200 /** Abort an SPI transfer
Zaitsev 10:41552d038a69 201 *
Zaitsev 10:41552d038a69 202 * @param obj The SPI peripheral to stop
Zaitsev 10:41552d038a69 203 */
Zaitsev 10:41552d038a69 204 void spi_abort_asynch(spi_t *obj);
Zaitsev 10:41552d038a69 205
Zaitsev 10:41552d038a69 206
Zaitsev 10:41552d038a69 207 #endif
Zaitsev 10:41552d038a69 208
Zaitsev 10:41552d038a69 209 /**@}*/
Zaitsev 10:41552d038a69 210
Zaitsev 10:41552d038a69 211 #ifdef __cplusplus
Zaitsev 10:41552d038a69 212 }
Zaitsev 10:41552d038a69 213 #endif // __cplusplus
Zaitsev 10:41552d038a69 214
Zaitsev 10:41552d038a69 215 #endif // SPI_DEVICE
Zaitsev 10:41552d038a69 216
Zaitsev 10:41552d038a69 217 #endif // MBED_SPI_API_H
Zaitsev 10:41552d038a69 218
Zaitsev 10:41552d038a69 219 /** @}*/