lol

Dependencies:   MMA8451Q

Fork of Application by Mateusz Kowalik

Committer:
danix
Date:
Sun Jan 21 22:28:30 2018 +0000
Revision:
12:3a30cdffa27c
Parent:
10:41552d038a69
Working acelerometer and mouse

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Zaitsev 10:41552d038a69 1 /*******************************************************************************
Zaitsev 10:41552d038a69 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
Zaitsev 10:41552d038a69 3 *
Zaitsev 10:41552d038a69 4 * Permission is hereby granted, free of charge, to any person obtaining a
Zaitsev 10:41552d038a69 5 * copy of this software and associated documentation files (the "Software"),
Zaitsev 10:41552d038a69 6 * to deal in the Software without restriction, including without limitation
Zaitsev 10:41552d038a69 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
Zaitsev 10:41552d038a69 8 * and/or sell copies of the Software, and to permit persons to whom the
Zaitsev 10:41552d038a69 9 * Software is furnished to do so, subject to the following conditions:
Zaitsev 10:41552d038a69 10 *
Zaitsev 10:41552d038a69 11 * The above copyright notice and this permission notice shall be included
Zaitsev 10:41552d038a69 12 * in all copies or substantial portions of the Software.
Zaitsev 10:41552d038a69 13 *
Zaitsev 10:41552d038a69 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
Zaitsev 10:41552d038a69 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
Zaitsev 10:41552d038a69 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
Zaitsev 10:41552d038a69 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
Zaitsev 10:41552d038a69 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
Zaitsev 10:41552d038a69 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
Zaitsev 10:41552d038a69 20 * OTHER DEALINGS IN THE SOFTWARE.
Zaitsev 10:41552d038a69 21 *
Zaitsev 10:41552d038a69 22 * Except as contained in this notice, the name of Maxim Integrated
Zaitsev 10:41552d038a69 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
Zaitsev 10:41552d038a69 24 * Products, Inc. Branding Policy.
Zaitsev 10:41552d038a69 25 *
Zaitsev 10:41552d038a69 26 * The mere transfer of this software does not imply any licenses
Zaitsev 10:41552d038a69 27 * of trade secrets, proprietary technology, copyrights, patents,
Zaitsev 10:41552d038a69 28 * trademarks, maskwork rights, or any other form of intellectual
Zaitsev 10:41552d038a69 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
Zaitsev 10:41552d038a69 30 * ownership rights.
Zaitsev 10:41552d038a69 31 *******************************************************************************
Zaitsev 10:41552d038a69 32 */
Zaitsev 10:41552d038a69 33
Zaitsev 10:41552d038a69 34 #ifndef MBED_OBJECTS_H
Zaitsev 10:41552d038a69 35 #define MBED_OBJECTS_H
Zaitsev 10:41552d038a69 36
Zaitsev 10:41552d038a69 37 #include "cmsis.h"
Zaitsev 10:41552d038a69 38 #include "PortNames.h"
Zaitsev 10:41552d038a69 39 #include "PeripheralNames.h"
Zaitsev 10:41552d038a69 40 #include "PinNames.h"
Zaitsev 10:41552d038a69 41 #include "gpio_object.h"
Zaitsev 10:41552d038a69 42 #include "gpio_regs.h"
Zaitsev 10:41552d038a69 43 #include "uart_regs.h"
Zaitsev 10:41552d038a69 44 #include "i2cm_regs.h"
Zaitsev 10:41552d038a69 45 #include "spi_regs.h"
Zaitsev 10:41552d038a69 46 #include "pt_regs.h"
Zaitsev 10:41552d038a69 47 #include "adc_regs.h"
Zaitsev 10:41552d038a69 48
Zaitsev 10:41552d038a69 49 #ifdef __cplusplus
Zaitsev 10:41552d038a69 50 extern "C" {
Zaitsev 10:41552d038a69 51 #endif
Zaitsev 10:41552d038a69 52
Zaitsev 10:41552d038a69 53 struct port_s {
Zaitsev 10:41552d038a69 54 PortName port;
Zaitsev 10:41552d038a69 55 uint32_t mask;
Zaitsev 10:41552d038a69 56 __IO uint32_t *reg_out;
Zaitsev 10:41552d038a69 57 __I uint32_t *reg_in;
Zaitsev 10:41552d038a69 58 };
Zaitsev 10:41552d038a69 59
Zaitsev 10:41552d038a69 60 struct gpio_irq_s {
Zaitsev 10:41552d038a69 61 uint8_t port;
Zaitsev 10:41552d038a69 62 uint8_t pin;
Zaitsev 10:41552d038a69 63 uint8_t rise_en;
Zaitsev 10:41552d038a69 64 uint8_t fall_en;
Zaitsev 10:41552d038a69 65 uint32_t id;
Zaitsev 10:41552d038a69 66 };
Zaitsev 10:41552d038a69 67
Zaitsev 10:41552d038a69 68 struct serial_s {
Zaitsev 10:41552d038a69 69 int index;
Zaitsev 10:41552d038a69 70 mxc_uart_regs_t *uart;
Zaitsev 10:41552d038a69 71 mxc_uart_fifo_regs_t *fifo;
Zaitsev 10:41552d038a69 72 };
Zaitsev 10:41552d038a69 73
Zaitsev 10:41552d038a69 74 struct i2c_s {
Zaitsev 10:41552d038a69 75 int index;
Zaitsev 10:41552d038a69 76 mxc_i2cm_regs_t *i2c;
Zaitsev 10:41552d038a69 77 mxc_i2cm_fifo_regs_t *fifos;
Zaitsev 10:41552d038a69 78 int start_pending;
Zaitsev 10:41552d038a69 79 int stop_pending;
Zaitsev 10:41552d038a69 80 };
Zaitsev 10:41552d038a69 81
Zaitsev 10:41552d038a69 82 struct spi_s {
Zaitsev 10:41552d038a69 83 int index;
Zaitsev 10:41552d038a69 84 mxc_spi_regs_t *spi;
Zaitsev 10:41552d038a69 85 mxc_spi_fifo_regs_t *fifo;
Zaitsev 10:41552d038a69 86 int bits;
Zaitsev 10:41552d038a69 87 int ssel;
Zaitsev 10:41552d038a69 88 uint32_t width; // SPI data width (number of data lines to use)
Zaitsev 10:41552d038a69 89 PinName sclk; // PinName saved to use in Quad SPI pin mapping table
Zaitsev 10:41552d038a69 90 #if DEVICE_SPI_ASYNCH
Zaitsev 10:41552d038a69 91 // Async transaction state
Zaitsev 10:41552d038a69 92 const uint8_t *tx_data; // TX buffer
Zaitsev 10:41552d038a69 93 uint8_t *rx_data; // RX buffer
Zaitsev 10:41552d038a69 94 unsigned len; // Number of bytes to send
Zaitsev 10:41552d038a69 95 unsigned read_num; // Number of bytes read
Zaitsev 10:41552d038a69 96 unsigned write_num; // Number of bytes written
Zaitsev 10:41552d038a69 97 void (*callback)(); // Callback for asynchronous request
Zaitsev 10:41552d038a69 98 unsigned head_rem; // Remaining count for current header
Zaitsev 10:41552d038a69 99 uint32_t event; // Callback response events
Zaitsev 10:41552d038a69 100 #endif
Zaitsev 10:41552d038a69 101 };
Zaitsev 10:41552d038a69 102
Zaitsev 10:41552d038a69 103 struct pwmout_s {
Zaitsev 10:41552d038a69 104 mxc_pt_regs_t *pwm;
Zaitsev 10:41552d038a69 105 int period;
Zaitsev 10:41552d038a69 106 int pulse_width;
Zaitsev 10:41552d038a69 107 };
Zaitsev 10:41552d038a69 108
Zaitsev 10:41552d038a69 109 struct analogin_s {
Zaitsev 10:41552d038a69 110 mxc_adc_regs_t *adc;
Zaitsev 10:41552d038a69 111 PinName adc_pin;
Zaitsev 10:41552d038a69 112 };
Zaitsev 10:41552d038a69 113
Zaitsev 10:41552d038a69 114 typedef struct {
Zaitsev 10:41552d038a69 115 volatile uint32_t *reg_req;
Zaitsev 10:41552d038a69 116 volatile uint32_t *reg_ack;
Zaitsev 10:41552d038a69 117 uint32_t req_val;
Zaitsev 10:41552d038a69 118 uint32_t ack_mask;
Zaitsev 10:41552d038a69 119 } pin_function_t;
Zaitsev 10:41552d038a69 120
Zaitsev 10:41552d038a69 121 #ifdef __cplusplus
Zaitsev 10:41552d038a69 122 }
Zaitsev 10:41552d038a69 123 #endif
Zaitsev 10:41552d038a69 124
Zaitsev 10:41552d038a69 125 #endif