Daniel Geonsi Jeong / max77801

MAX77801 Library. The MAX77801 is a high-current, high-efficiency buck-boost Regulator. The datasheet is available at https://datasheets.maximintegrated.com/en/ds/MAX77801.pdf. This library provides apis to control MAX77801.

Dependents:   MAX77801_Demo MAX77801_Demo

max77801.cpp@0:b9790d4a35fd, 2017-11-20 (annotated)

Committer:
daniel_gs_jeong
Date:
Mon Nov 20 14:57:49 2017 +0000
Revision:
0:b9790d4a35fd
Initial Commit of MAX77801 Library. The MAX77801 is a high-current, high-efficiency buck-boost. ; Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX77801.pdf;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
daniel_gs_jeong 0:b9790d4a35fd 1 /*******************************************************************************
daniel_gs_jeong 0:b9790d4a35fd 2 * Copyright (C) 2017 Maxim Integrated Products, Inc., All Rights Reserved.
daniel_gs_jeong 0:b9790d4a35fd 3 *
daniel_gs_jeong 0:b9790d4a35fd 4 * Permission is hereby granted, free of charge, to any person obtaining a
daniel_gs_jeong 0:b9790d4a35fd 5 * copy of this software and associated documentation files (the "Software"),
daniel_gs_jeong 0:b9790d4a35fd 6 * to deal in the Software without restriction, including without limitation
daniel_gs_jeong 0:b9790d4a35fd 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
daniel_gs_jeong 0:b9790d4a35fd 8 * and/or sell copies of the Software, and to permit persons to whom the
daniel_gs_jeong 0:b9790d4a35fd 9 * Software is furnished to do so, subject to the following conditions:
daniel_gs_jeong 0:b9790d4a35fd 10 *
daniel_gs_jeong 0:b9790d4a35fd 11 * The above copyright notice and this permission notice shall be included
daniel_gs_jeong 0:b9790d4a35fd 12 * in all copies or substantial portions of the Software.
daniel_gs_jeong 0:b9790d4a35fd 13 *
daniel_gs_jeong 0:b9790d4a35fd 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
daniel_gs_jeong 0:b9790d4a35fd 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
daniel_gs_jeong 0:b9790d4a35fd 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
daniel_gs_jeong 0:b9790d4a35fd 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
daniel_gs_jeong 0:b9790d4a35fd 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
daniel_gs_jeong 0:b9790d4a35fd 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
daniel_gs_jeong 0:b9790d4a35fd 20 * OTHER DEALINGS IN THE SOFTWARE.
daniel_gs_jeong 0:b9790d4a35fd 21 *
daniel_gs_jeong 0:b9790d4a35fd 22 * Except as contained in this notice, the name of Maxim Integrated
daniel_gs_jeong 0:b9790d4a35fd 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
daniel_gs_jeong 0:b9790d4a35fd 24 * Products, Inc. Branding Policy.
daniel_gs_jeong 0:b9790d4a35fd 25 *
daniel_gs_jeong 0:b9790d4a35fd 26 * The mere transfer of this software does not imply any licenses
daniel_gs_jeong 0:b9790d4a35fd 27 * of trade secrets, proprietary technology, copyrights, patents,
daniel_gs_jeong 0:b9790d4a35fd 28 * trademarks, maskwork rights, or any other form of intellectual
daniel_gs_jeong 0:b9790d4a35fd 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
daniel_gs_jeong 0:b9790d4a35fd 30 * ownership rights.
daniel_gs_jeong 0:b9790d4a35fd 31 *******************************************************************************
daniel_gs_jeong 0:b9790d4a35fd 32 */
daniel_gs_jeong 0:b9790d4a35fd 33 #include "max77801.h"
daniel_gs_jeong 0:b9790d4a35fd 34
daniel_gs_jeong 0:b9790d4a35fd 35 /***** Definitions *****/
daniel_gs_jeong 0:b9790d4a35fd 36 #define I2C_ADDR (0x18<<1)
daniel_gs_jeong 0:b9790d4a35fd 37
daniel_gs_jeong 0:b9790d4a35fd 38 /**
daniel_gs_jeong 0:b9790d4a35fd 39 * MAX77801 constructor.
daniel_gs_jeong 0:b9790d4a35fd 40 *
daniel_gs_jeong 0:b9790d4a35fd 41 * @param i2c I2C object to use.
daniel_gs_jeong 0:b9790d4a35fd 42 */
daniel_gs_jeong 0:b9790d4a35fd 43 MAX77801::MAX77801(I2C *i2c) :
daniel_gs_jeong 0:b9790d4a35fd 44 i2c_(i2c)
daniel_gs_jeong 0:b9790d4a35fd 45 {
daniel_gs_jeong 0:b9790d4a35fd 46 i2c_owner = false;
daniel_gs_jeong 0:b9790d4a35fd 47 }
daniel_gs_jeong 0:b9790d4a35fd 48
daniel_gs_jeong 0:b9790d4a35fd 49 /**
daniel_gs_jeong 0:b9790d4a35fd 50 * MAX77801 destructor.
daniel_gs_jeong 0:b9790d4a35fd 51 */
daniel_gs_jeong 0:b9790d4a35fd 52 MAX77801::~MAX77801()
daniel_gs_jeong 0:b9790d4a35fd 53 {
daniel_gs_jeong 0:b9790d4a35fd 54 if(i2c_owner) {
daniel_gs_jeong 0:b9790d4a35fd 55 delete i2c_;
daniel_gs_jeong 0:b9790d4a35fd 56 }
daniel_gs_jeong 0:b9790d4a35fd 57 }
daniel_gs_jeong 0:b9790d4a35fd 58
daniel_gs_jeong 0:b9790d4a35fd 59 /**
daniel_gs_jeong 0:b9790d4a35fd 60 * @brief Initialize MAX77801
daniel_gs_jeong 0:b9790d4a35fd 61 */
daniel_gs_jeong 0:b9790d4a35fd 62 int32_t MAX77801::init()
daniel_gs_jeong 0:b9790d4a35fd 63 {
daniel_gs_jeong 0:b9790d4a35fd 64 int32_t data;
daniel_gs_jeong 0:b9790d4a35fd 65
daniel_gs_jeong 0:b9790d4a35fd 66 data = write_register(REG_CONFIG1, 0x0E);
daniel_gs_jeong 0:b9790d4a35fd 67 if(data < 0)
daniel_gs_jeong 0:b9790d4a35fd 68 return -1;
daniel_gs_jeong 0:b9790d4a35fd 69
daniel_gs_jeong 0:b9790d4a35fd 70 data = write_register(REG_CONFIG2, 0x70);
daniel_gs_jeong 0:b9790d4a35fd 71 if(data < 0)
daniel_gs_jeong 0:b9790d4a35fd 72 return -1;
daniel_gs_jeong 0:b9790d4a35fd 73
daniel_gs_jeong 0:b9790d4a35fd 74 return 0;
daniel_gs_jeong 0:b9790d4a35fd 75 }
daniel_gs_jeong 0:b9790d4a35fd 76
daniel_gs_jeong 0:b9790d4a35fd 77 /**
daniel_gs_jeong 0:b9790d4a35fd 78 * @brief Read Register
daniel_gs_jeong 0:b9790d4a35fd 79 * @details Reads data from MAX77801 register
daniel_gs_jeong 0:b9790d4a35fd 80 *
daniel_gs_jeong 0:b9790d4a35fd 81 * @param reg_addr Register to read
daniel_gs_jeong 0:b9790d4a35fd 82 * @returns data if no errors, -1 if error.
daniel_gs_jeong 0:b9790d4a35fd 83 */
daniel_gs_jeong 0:b9790d4a35fd 84 int32_t MAX77801::read_register(MAX77801::registers_t reg_no)
daniel_gs_jeong 0:b9790d4a35fd 85 {
daniel_gs_jeong 0:b9790d4a35fd 86 char data;
daniel_gs_jeong 0:b9790d4a35fd 87
daniel_gs_jeong 0:b9790d4a35fd 88 data = reg_no;
daniel_gs_jeong 0:b9790d4a35fd 89 if (i2c_->write(I2C_ADDR, &data, 1, true) != 0) {
daniel_gs_jeong 0:b9790d4a35fd 90 return -1;
daniel_gs_jeong 0:b9790d4a35fd 91 }
daniel_gs_jeong 0:b9790d4a35fd 92
daniel_gs_jeong 0:b9790d4a35fd 93 if (i2c_->read(I2C_ADDR | 0x01, &data, 1) != 0) {
daniel_gs_jeong 0:b9790d4a35fd 94 return -1;
daniel_gs_jeong 0:b9790d4a35fd 95 }
daniel_gs_jeong 0:b9790d4a35fd 96
daniel_gs_jeong 0:b9790d4a35fd 97 return (0x0 + data);
daniel_gs_jeong 0:b9790d4a35fd 98 }
daniel_gs_jeong 0:b9790d4a35fd 99
daniel_gs_jeong 0:b9790d4a35fd 100 /**
daniel_gs_jeong 0:b9790d4a35fd 101 * @brief Write Register
daniel_gs_jeong 0:b9790d4a35fd 102 * @details Writes data to MAX77756 register
daniel_gs_jeong 0:b9790d4a35fd 103 *
daniel_gs_jeong 0:b9790d4a35fd 104 * @param reg_addr Register to write
daniel_gs_jeong 0:b9790d4a35fd 105 * @param reg_data Data to write
daniel_gs_jeong 0:b9790d4a35fd 106 * @returns 0 if no errors, -1 if error.
daniel_gs_jeong 0:b9790d4a35fd 107 */
daniel_gs_jeong 0:b9790d4a35fd 108 int32_t MAX77801::write_register(MAX77801::registers_t reg_no, char reg_data)
daniel_gs_jeong 0:b9790d4a35fd 109 {
daniel_gs_jeong 0:b9790d4a35fd 110 char data[2];
daniel_gs_jeong 0:b9790d4a35fd 111
daniel_gs_jeong 0:b9790d4a35fd 112 data[0] = reg_no;
daniel_gs_jeong 0:b9790d4a35fd 113 data[1] = reg_data;
daniel_gs_jeong 0:b9790d4a35fd 114 if (i2c_->write(I2C_ADDR, data, 2) != 0) {
daniel_gs_jeong 0:b9790d4a35fd 115 return -1;
daniel_gs_jeong 0:b9790d4a35fd 116 }
daniel_gs_jeong 0:b9790d4a35fd 117
daniel_gs_jeong 0:b9790d4a35fd 118 return 0;
daniel_gs_jeong 0:b9790d4a35fd 119 }
daniel_gs_jeong 0:b9790d4a35fd 120
daniel_gs_jeong 0:b9790d4a35fd 121 /**
daniel_gs_jeong 0:b9790d4a35fd 122 * @brief Update Register data
daniel_gs_jeong 0:b9790d4a35fd 123 * @details Update bits data of a register
daniel_gs_jeong 0:b9790d4a35fd 124 *
daniel_gs_jeong 0:b9790d4a35fd 125 * @param reg_no Register Number to be updated
daniel_gs_jeong 0:b9790d4a35fd 126 * @param mask Mask Data
daniel_gs_jeong 0:b9790d4a35fd 127 * @param reg_data bit data
daniel_gs_jeong 0:b9790d4a35fd 128 * @returns 0 if no errors, -1 if error.
daniel_gs_jeong 0:b9790d4a35fd 129 */
daniel_gs_jeong 0:b9790d4a35fd 130 int32_t MAX77801::update_register
daniel_gs_jeong 0:b9790d4a35fd 131 (MAX77801::registers_t reg_no, char reg_mask, char reg_data)
daniel_gs_jeong 0:b9790d4a35fd 132 {
daniel_gs_jeong 0:b9790d4a35fd 133 int32_t data;
daniel_gs_jeong 0:b9790d4a35fd 134
daniel_gs_jeong 0:b9790d4a35fd 135 data = read_register(reg_no);
daniel_gs_jeong 0:b9790d4a35fd 136 if(data < 0)
daniel_gs_jeong 0:b9790d4a35fd 137 return -1;
daniel_gs_jeong 0:b9790d4a35fd 138
daniel_gs_jeong 0:b9790d4a35fd 139 data &= ~reg_mask;
daniel_gs_jeong 0:b9790d4a35fd 140 data |= reg_data;
daniel_gs_jeong 0:b9790d4a35fd 141
daniel_gs_jeong 0:b9790d4a35fd 142 data = write_register(reg_no, (char)(data & 0xff));
daniel_gs_jeong 0:b9790d4a35fd 143 if(data < 0)
daniel_gs_jeong 0:b9790d4a35fd 144 return -1;
daniel_gs_jeong 0:b9790d4a35fd 145 return 0;
daniel_gs_jeong 0:b9790d4a35fd 146 }
daniel_gs_jeong 0:b9790d4a35fd 147
daniel_gs_jeong 0:b9790d4a35fd 148 /**
daniel_gs_jeong 0:b9790d4a35fd 149 * @brief Get version info
daniel_gs_jeong 0:b9790d4a35fd 150 * @details 0 : Plain
daniel_gs_jeong 0:b9790d4a35fd 151 *
daniel_gs_jeong 0:b9790d4a35fd 152 * @param None
daniel_gs_jeong 0:b9790d4a35fd 153 * @returns version info.
daniel_gs_jeong 0:b9790d4a35fd 154 */
daniel_gs_jeong 0:b9790d4a35fd 155 char* MAX77801::get_version()
daniel_gs_jeong 0:b9790d4a35fd 156 {
daniel_gs_jeong 0:b9790d4a35fd 157 int32_t data;
daniel_gs_jeong 0:b9790d4a35fd 158
daniel_gs_jeong 0:b9790d4a35fd 159 data = read_register(REG_DEVICE_ID);
daniel_gs_jeong 0:b9790d4a35fd 160 switch ((data >> 3) & 0xf)
daniel_gs_jeong 0:b9790d4a35fd 161 {
daniel_gs_jeong 0:b9790d4a35fd 162 case 0x0:
daniel_gs_jeong 0:b9790d4a35fd 163 return "PLAIN";
daniel_gs_jeong 0:b9790d4a35fd 164 case 0x1:
daniel_gs_jeong 0:b9790d4a35fd 165 return "-1Z";
daniel_gs_jeong 0:b9790d4a35fd 166 case 0x2:
daniel_gs_jeong 0:b9790d4a35fd 167 return "-2Z";
daniel_gs_jeong 0:b9790d4a35fd 168 }
daniel_gs_jeong 0:b9790d4a35fd 169 return "UNKNOWN";
daniel_gs_jeong 0:b9790d4a35fd 170 }
daniel_gs_jeong 0:b9790d4a35fd 171
daniel_gs_jeong 0:b9790d4a35fd 172 /**
daniel_gs_jeong 0:b9790d4a35fd 173 * @brief Get revision info
daniel_gs_jeong 0:b9790d4a35fd 174 * @details 0x1 : PASS1
daniel_gs_jeong 0:b9790d4a35fd 175 * 0x2 : PASS2
daniel_gs_jeong 0:b9790d4a35fd 176 * 0x3 : PASS3
daniel_gs_jeong 0:b9790d4a35fd 177 * @param None
daniel_gs_jeong 0:b9790d4a35fd 178 * @returns revision info.
daniel_gs_jeong 0:b9790d4a35fd 179 */
daniel_gs_jeong 0:b9790d4a35fd 180 char* MAX77801::get_revision()
daniel_gs_jeong 0:b9790d4a35fd 181 {
daniel_gs_jeong 0:b9790d4a35fd 182 int32_t data;
daniel_gs_jeong 0:b9790d4a35fd 183
daniel_gs_jeong 0:b9790d4a35fd 184 data = read_register(REG_DEVICE_ID);
daniel_gs_jeong 0:b9790d4a35fd 185 switch(data & 0x7)
daniel_gs_jeong 0:b9790d4a35fd 186 {
daniel_gs_jeong 0:b9790d4a35fd 187 case 0x0:
daniel_gs_jeong 0:b9790d4a35fd 188 return "PASS1";
daniel_gs_jeong 0:b9790d4a35fd 189 case 0x1:
daniel_gs_jeong 0:b9790d4a35fd 190 return "PASS2";
daniel_gs_jeong 0:b9790d4a35fd 191 case 0x2:
daniel_gs_jeong 0:b9790d4a35fd 192 return "PASS3";
daniel_gs_jeong 0:b9790d4a35fd 193 }
daniel_gs_jeong 0:b9790d4a35fd 194 return "UNKNOWN";
daniel_gs_jeong 0:b9790d4a35fd 195 }
daniel_gs_jeong 0:b9790d4a35fd 196
daniel_gs_jeong 0:b9790d4a35fd 197 /**
daniel_gs_jeong 0:b9790d4a35fd 198 * @brief Get status
daniel_gs_jeong 0:b9790d4a35fd 199 * @details Get status register data
daniel_gs_jeong 0:b9790d4a35fd 200 * BIT3 : Junction Temperature info
daniel_gs_jeong 0:b9790d4a35fd 201 * BIT2 : Buck Boost POK Status
daniel_gs_jeong 0:b9790d4a35fd 202 * BIT1 : Buck Boost OVP Status
daniel_gs_jeong 0:b9790d4a35fd 203 * BIT0 : Buck Boost OCP Status
daniel_gs_jeong 0:b9790d4a35fd 204 * @param None
daniel_gs_jeong 0:b9790d4a35fd 205 * @returns status register data.
daniel_gs_jeong 0:b9790d4a35fd 206 */
daniel_gs_jeong 0:b9790d4a35fd 207 int32_t MAX77801::get_status()
daniel_gs_jeong 0:b9790d4a35fd 208 {
daniel_gs_jeong 0:b9790d4a35fd 209 int32_t data;
daniel_gs_jeong 0:b9790d4a35fd 210
daniel_gs_jeong 0:b9790d4a35fd 211 data = read_register(REG_DEVICE_ID);
daniel_gs_jeong 0:b9790d4a35fd 212 if(data < 0)
daniel_gs_jeong 0:b9790d4a35fd 213 return -1;
daniel_gs_jeong 0:b9790d4a35fd 214 return (data & 0x0f);
daniel_gs_jeong 0:b9790d4a35fd 215 }
daniel_gs_jeong 0:b9790d4a35fd 216
daniel_gs_jeong 0:b9790d4a35fd 217 /**
daniel_gs_jeong 0:b9790d4a35fd 218 * @brief config enable bit
daniel_gs_jeong 0:b9790d4a35fd 219 * @details Set a Config bit controlled using enabled/disabled
daniel_gs_jeong 0:b9790d4a35fd 220 * @param config : config bit
daniel_gs_jeong 0:b9790d4a35fd 221 * @param en : enable/disable
daniel_gs_jeong 0:b9790d4a35fd 222 * @returns 0 if no errors, -1 if error.
daniel_gs_jeong 0:b9790d4a35fd 223 */
daniel_gs_jeong 0:b9790d4a35fd 224 int32_t MAX77801::config_enable(MAX77801::config_enabled_t config,
daniel_gs_jeong 0:b9790d4a35fd 225 MAX77801::enable_t en)
daniel_gs_jeong 0:b9790d4a35fd 226 {
daniel_gs_jeong 0:b9790d4a35fd 227 int32_t data;
daniel_gs_jeong 0:b9790d4a35fd 228
daniel_gs_jeong 0:b9790d4a35fd 229 switch(config)
daniel_gs_jeong 0:b9790d4a35fd 230 {
daniel_gs_jeong 0:b9790d4a35fd 231 case ACTIVE_DISCHARGE:
daniel_gs_jeong 0:b9790d4a35fd 232 data = update_register(REG_CONFIG1, 0x02, ((char)en) <<1);
daniel_gs_jeong 0:b9790d4a35fd 233 break;
daniel_gs_jeong 0:b9790d4a35fd 234 case FORCED_PWM:
daniel_gs_jeong 0:b9790d4a35fd 235 data = update_register(REG_CONFIG1, 0x01, ((char)en) <<0);
daniel_gs_jeong 0:b9790d4a35fd 236 break;
daniel_gs_jeong 0:b9790d4a35fd 237 case BUCK_BOOST_OUTPUT:
daniel_gs_jeong 0:b9790d4a35fd 238 data = update_register(REG_CONFIG2, 0x40, ((char)en) <<6);
daniel_gs_jeong 0:b9790d4a35fd 239 break;
daniel_gs_jeong 0:b9790d4a35fd 240 case EN_PULL_DOWN:
daniel_gs_jeong 0:b9790d4a35fd 241 data = update_register(REG_CONFIG2, 0x20, ((char)en) <<5);
daniel_gs_jeong 0:b9790d4a35fd 242 break;
daniel_gs_jeong 0:b9790d4a35fd 243 default:
daniel_gs_jeong 0:b9790d4a35fd 244 return -1;
daniel_gs_jeong 0:b9790d4a35fd 245 }
daniel_gs_jeong 0:b9790d4a35fd 246
daniel_gs_jeong 0:b9790d4a35fd 247 if(data < 0)
daniel_gs_jeong 0:b9790d4a35fd 248 return -1;
daniel_gs_jeong 0:b9790d4a35fd 249 return 0;
daniel_gs_jeong 0:b9790d4a35fd 250 }
daniel_gs_jeong 0:b9790d4a35fd 251
daniel_gs_jeong 0:b9790d4a35fd 252 /**
daniel_gs_jeong 0:b9790d4a35fd 253 * @brief Config Ramp Up
daniel_gs_jeong 0:b9790d4a35fd 254 * @details Set BB_RU_SR
daniel_gs_jeong 0:b9790d4a35fd 255 *
daniel_gs_jeong 0:b9790d4a35fd 256 * @param config : config value
daniel_gs_jeong 0:b9790d4a35fd 257 * @returns 0 if no errors, -1 if error.
daniel_gs_jeong 0:b9790d4a35fd 258 */
daniel_gs_jeong 0:b9790d4a35fd 259 int32_t MAX77801::config_ramp_up(MAX77801::ramp_up_rate_t config)
daniel_gs_jeong 0:b9790d4a35fd 260 {
daniel_gs_jeong 0:b9790d4a35fd 261 int32_t data;
daniel_gs_jeong 0:b9790d4a35fd 262
daniel_gs_jeong 0:b9790d4a35fd 263 data = update_register(REG_CONFIG1, 0x20, ((char)config) <<5);
daniel_gs_jeong 0:b9790d4a35fd 264 if(data < 0)
daniel_gs_jeong 0:b9790d4a35fd 265 return -1;
daniel_gs_jeong 0:b9790d4a35fd 266 return 0;
daniel_gs_jeong 0:b9790d4a35fd 267 }
daniel_gs_jeong 0:b9790d4a35fd 268
daniel_gs_jeong 0:b9790d4a35fd 269 /**
daniel_gs_jeong 0:b9790d4a35fd 270 * @brief Config Ramp Down
daniel_gs_jeong 0:b9790d4a35fd 271 * @details Set BB_RD_SR
daniel_gs_jeong 0:b9790d4a35fd 272 *
daniel_gs_jeong 0:b9790d4a35fd 273 * @param config : config value
daniel_gs_jeong 0:b9790d4a35fd 274 * @returns 0 if no errors, -1 if error.
daniel_gs_jeong 0:b9790d4a35fd 275 */
daniel_gs_jeong 0:b9790d4a35fd 276 int32_t MAX77801::config_ramp_down(MAX77801::ramp_dn_rate_t config)
daniel_gs_jeong 0:b9790d4a35fd 277 {
daniel_gs_jeong 0:b9790d4a35fd 278 int32_t data;
daniel_gs_jeong 0:b9790d4a35fd 279
daniel_gs_jeong 0:b9790d4a35fd 280 data = update_register(REG_CONFIG1, 0x10, ((char)config) <<4);
daniel_gs_jeong 0:b9790d4a35fd 281 if(data < 0)
daniel_gs_jeong 0:b9790d4a35fd 282 return -1;
daniel_gs_jeong 0:b9790d4a35fd 283 return 0;
daniel_gs_jeong 0:b9790d4a35fd 284 }
daniel_gs_jeong 0:b9790d4a35fd 285
daniel_gs_jeong 0:b9790d4a35fd 286 /**
daniel_gs_jeong 0:b9790d4a35fd 287 * @brief Config OVP Threshold
daniel_gs_jeong 0:b9790d4a35fd 288 * @details Set BB_OVP_TH bits
daniel_gs_jeong 0:b9790d4a35fd 289 *
daniel_gs_jeong 0:b9790d4a35fd 290 * @param config : config value
daniel_gs_jeong 0:b9790d4a35fd 291 * @returns 0 if no errors, -1 if error.
daniel_gs_jeong 0:b9790d4a35fd 292 */
daniel_gs_jeong 0:b9790d4a35fd 293 int32_t MAX77801::config_ovp_threshold(MAX77801::output_ovp_threshold_t config)
daniel_gs_jeong 0:b9790d4a35fd 294 {
daniel_gs_jeong 0:b9790d4a35fd 295 int32_t data;
daniel_gs_jeong 0:b9790d4a35fd 296
daniel_gs_jeong 0:b9790d4a35fd 297 data = update_register(REG_CONFIG1, 0x0C, ((char)config) <<2);
daniel_gs_jeong 0:b9790d4a35fd 298 if(data < 0)
daniel_gs_jeong 0:b9790d4a35fd 299 return -1;
daniel_gs_jeong 0:b9790d4a35fd 300 return 0;
daniel_gs_jeong 0:b9790d4a35fd 301 }
daniel_gs_jeong 0:b9790d4a35fd 302
daniel_gs_jeong 0:b9790d4a35fd 303 /**
daniel_gs_jeong 0:b9790d4a35fd 304 * @brief config pokpol active bit
daniel_gs_jeong 0:b9790d4a35fd 305 * @details Set POK_POL Bit
daniel_gs_jeong 0:b9790d4a35fd 306 *
daniel_gs_jeong 0:b9790d4a35fd 307 * @param lowHigh : active value
daniel_gs_jeong 0:b9790d4a35fd 308 * @returns 0 if no errors, -1 if error.
daniel_gs_jeong 0:b9790d4a35fd 309 */
daniel_gs_jeong 0:b9790d4a35fd 310 int32_t MAX77801::config_pokpol_active(MAX77801::low_high_t lowHigh)
daniel_gs_jeong 0:b9790d4a35fd 311 {
daniel_gs_jeong 0:b9790d4a35fd 312 int32_t data;
daniel_gs_jeong 0:b9790d4a35fd 313
daniel_gs_jeong 0:b9790d4a35fd 314 data = update_register(REG_CONFIG2, 0x10, ((char)lowHigh) <<4);
daniel_gs_jeong 0:b9790d4a35fd 315 if(data < 0)
daniel_gs_jeong 0:b9790d4a35fd 316 return -1;
daniel_gs_jeong 0:b9790d4a35fd 317 return 0;
daniel_gs_jeong 0:b9790d4a35fd 318 }
daniel_gs_jeong 0:b9790d4a35fd 319
daniel_gs_jeong 0:b9790d4a35fd 320 /**
daniel_gs_jeong 0:b9790d4a35fd 321 * @brief Set VOUT Voltage when DVS = Low
daniel_gs_jeong 0:b9790d4a35fd 322 * @details Set Vout Voltage
daniel_gs_jeong 0:b9790d4a35fd 323 *
daniel_gs_jeong 0:b9790d4a35fd 324 * @param vout level from 2.6000V ~ 4.1875V with 0.0125V step
daniel_gs_jeong 0:b9790d4a35fd 325 * @returns 0 if no errors, -1 if error.
daniel_gs_jeong 0:b9790d4a35fd 326 */
daniel_gs_jeong 0:b9790d4a35fd 327
daniel_gs_jeong 0:b9790d4a35fd 328 int32_t MAX77801::set_vout(double level, MAX77801::low_high_t dvs)
daniel_gs_jeong 0:b9790d4a35fd 329 {
daniel_gs_jeong 0:b9790d4a35fd 330 int32_t ret_val = 0;
daniel_gs_jeong 0:b9790d4a35fd 331 char reg_data = 0;
daniel_gs_jeong 0:b9790d4a35fd 332
daniel_gs_jeong 0:b9790d4a35fd 333 if(level < 2.6000 || level > 4.1875)
daniel_gs_jeong 0:b9790d4a35fd 334 return -1;
daniel_gs_jeong 0:b9790d4a35fd 335
daniel_gs_jeong 0:b9790d4a35fd 336 reg_data = (char)((level-2.6000)*80);
daniel_gs_jeong 0:b9790d4a35fd 337
daniel_gs_jeong 0:b9790d4a35fd 338 if(dvs == VAL_LOW)
daniel_gs_jeong 0:b9790d4a35fd 339 ret_val = write_register(REG_VOUT_DVS_L,reg_data);
daniel_gs_jeong 0:b9790d4a35fd 340 else
daniel_gs_jeong 0:b9790d4a35fd 341 ret_val = write_register(REG_VOUT_DVS_H,reg_data);
daniel_gs_jeong 0:b9790d4a35fd 342
daniel_gs_jeong 0:b9790d4a35fd 343 if(ret_val < 0)
daniel_gs_jeong 0:b9790d4a35fd 344 return -1;
daniel_gs_jeong 0:b9790d4a35fd 345 return 0;
daniel_gs_jeong 0:b9790d4a35fd 346 }
daniel_gs_jeong 0:b9790d4a35fd 347