Daniel Worrall / Mbed 2 deprecated Recorder

Record audio data to a .wav file, complete with header, using the TLV320 CODEC and I2S port

Dependencies:   mbed

USBHostLite/usbhost_lpc17xx.h@0:e7efc8468066, 2011-08-05 (annotated)

Committer:
d_worrall
Date:
Fri Aug 05 15:00:51 2011 +0000
Revision:
0:e7efc8468066
version 2.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
d_worrall 0:e7efc8468066 1 /*
d_worrall 0:e7efc8468066 2 **************************************************************************************************************
d_worrall 0:e7efc8468066 3 * NXP USB Host Stack
d_worrall 0:e7efc8468066 4 *
d_worrall 0:e7efc8468066 5 * (c) Copyright 2008, NXP SemiConductors
d_worrall 0:e7efc8468066 6 * (c) Copyright 2008, OnChip Technologies LLC
d_worrall 0:e7efc8468066 7 * All Rights Reserved
d_worrall 0:e7efc8468066 8 *
d_worrall 0:e7efc8468066 9 * www.nxp.com
d_worrall 0:e7efc8468066 10 * www.onchiptech.com
d_worrall 0:e7efc8468066 11 *
d_worrall 0:e7efc8468066 12 * File : usbhost_lpc17xx.h
d_worrall 0:e7efc8468066 13 * Programmer(s) : Ravikanth.P
d_worrall 0:e7efc8468066 14 * Version :
d_worrall 0:e7efc8468066 15 *
d_worrall 0:e7efc8468066 16 **************************************************************************************************************
d_worrall 0:e7efc8468066 17 */
d_worrall 0:e7efc8468066 18
d_worrall 0:e7efc8468066 19 #ifndef USBHOST_LPC17xx_H
d_worrall 0:e7efc8468066 20 #define USBHOST_LPC17xx_H
d_worrall 0:e7efc8468066 21
d_worrall 0:e7efc8468066 22 /*
d_worrall 0:e7efc8468066 23 **************************************************************************************************************
d_worrall 0:e7efc8468066 24 * INCLUDE HEADER FILES
d_worrall 0:e7efc8468066 25 **************************************************************************************************************
d_worrall 0:e7efc8468066 26 */
d_worrall 0:e7efc8468066 27
d_worrall 0:e7efc8468066 28 #include "usbhost_inc.h"
d_worrall 0:e7efc8468066 29
d_worrall 0:e7efc8468066 30 /*
d_worrall 0:e7efc8468066 31 **************************************************************************************************************
d_worrall 0:e7efc8468066 32 * PRINT CONFIGURATION
d_worrall 0:e7efc8468066 33 **************************************************************************************************************
d_worrall 0:e7efc8468066 34 */
d_worrall 0:e7efc8468066 35
d_worrall 0:e7efc8468066 36 #define PRINT_ENABLE 1
d_worrall 0:e7efc8468066 37
d_worrall 0:e7efc8468066 38 #if PRINT_ENABLE
d_worrall 0:e7efc8468066 39 #define PRINT_Log(...) printf(__VA_ARGS__)
d_worrall 0:e7efc8468066 40 #define PRINT_Err(rc) printf("ERROR: In %s at Line %u - rc = %d\n", __FUNCTION__, __LINE__, rc)
d_worrall 0:e7efc8468066 41
d_worrall 0:e7efc8468066 42 #else
d_worrall 0:e7efc8468066 43 #define PRINT_Log(...) do {} while(0)
d_worrall 0:e7efc8468066 44 #define PRINT_Err(rc) do {} while(0)
d_worrall 0:e7efc8468066 45
d_worrall 0:e7efc8468066 46 #endif
d_worrall 0:e7efc8468066 47
d_worrall 0:e7efc8468066 48 /*
d_worrall 0:e7efc8468066 49 **************************************************************************************************************
d_worrall 0:e7efc8468066 50 * GENERAL DEFINITIONS
d_worrall 0:e7efc8468066 51 **************************************************************************************************************
d_worrall 0:e7efc8468066 52 */
d_worrall 0:e7efc8468066 53
d_worrall 0:e7efc8468066 54 #define DESC_LENGTH(x) x[0]
d_worrall 0:e7efc8468066 55 #define DESC_TYPE(x) x[1]
d_worrall 0:e7efc8468066 56
d_worrall 0:e7efc8468066 57
d_worrall 0:e7efc8468066 58 #define HOST_GET_DESCRIPTOR(descType, descIndex, data, length) \
d_worrall 0:e7efc8468066 59 Host_CtrlRecv(USB_DEVICE_TO_HOST | USB_RECIPIENT_DEVICE, GET_DESCRIPTOR, \
d_worrall 0:e7efc8468066 60 (descType << 8)|(descIndex), 0, length, data)
d_worrall 0:e7efc8468066 61
d_worrall 0:e7efc8468066 62 #define HOST_SET_ADDRESS(new_addr) \
d_worrall 0:e7efc8468066 63 Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_DEVICE, SET_ADDRESS, \
d_worrall 0:e7efc8468066 64 new_addr, 0, 0, NULL)
d_worrall 0:e7efc8468066 65
d_worrall 0:e7efc8468066 66 #define USBH_SET_CONFIGURATION(configNum) \
d_worrall 0:e7efc8468066 67 Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_DEVICE, SET_CONFIGURATION, \
d_worrall 0:e7efc8468066 68 configNum, 0, 0, NULL)
d_worrall 0:e7efc8468066 69
d_worrall 0:e7efc8468066 70 #define USBH_SET_INTERFACE(ifNum, altNum) \
d_worrall 0:e7efc8468066 71 Host_CtrlSend(USB_HOST_TO_DEVICE | USB_RECIPIENT_INTERFACE, SET_INTERFACE, \
d_worrall 0:e7efc8468066 72 altNum, ifNum, 0, NULL)
d_worrall 0:e7efc8468066 73
d_worrall 0:e7efc8468066 74 /*
d_worrall 0:e7efc8468066 75 **************************************************************************************************************
d_worrall 0:e7efc8468066 76 * OHCI OPERATIONAL REGISTER FIELD DEFINITIONS
d_worrall 0:e7efc8468066 77 **************************************************************************************************************
d_worrall 0:e7efc8468066 78 */
d_worrall 0:e7efc8468066 79
d_worrall 0:e7efc8468066 80 /* ------------------ HcControl Register --------------------- */
d_worrall 0:e7efc8468066 81 #define OR_CONTROL_CLE 0x00000010
d_worrall 0:e7efc8468066 82 #define OR_CONTROL_BLE 0x00000020
d_worrall 0:e7efc8468066 83 #define OR_CONTROL_HCFS 0x000000C0
d_worrall 0:e7efc8468066 84 #define OR_CONTROL_HC_OPER 0x00000080
d_worrall 0:e7efc8468066 85 /* ----------------- HcCommandStatus Register ----------------- */
d_worrall 0:e7efc8468066 86 #define OR_CMD_STATUS_HCR 0x00000001
d_worrall 0:e7efc8468066 87 #define OR_CMD_STATUS_CLF 0x00000002
d_worrall 0:e7efc8468066 88 #define OR_CMD_STATUS_BLF 0x00000004
d_worrall 0:e7efc8468066 89 /* --------------- HcInterruptStatus Register ----------------- */
d_worrall 0:e7efc8468066 90 #define OR_INTR_STATUS_WDH 0x00000002
d_worrall 0:e7efc8468066 91 #define OR_INTR_STATUS_RHSC 0x00000040
d_worrall 0:e7efc8468066 92 /* --------------- HcInterruptEnable Register ----------------- */
d_worrall 0:e7efc8468066 93 #define OR_INTR_ENABLE_WDH 0x00000002
d_worrall 0:e7efc8468066 94 #define OR_INTR_ENABLE_RHSC 0x00000040
d_worrall 0:e7efc8468066 95 #define OR_INTR_ENABLE_MIE 0x80000000
d_worrall 0:e7efc8468066 96 /* ---------------- HcRhDescriptorA Register ------------------ */
d_worrall 0:e7efc8468066 97 #define OR_RH_STATUS_LPSC 0x00010000
d_worrall 0:e7efc8468066 98 #define OR_RH_STATUS_DRWE 0x00008000
d_worrall 0:e7efc8468066 99 /* -------------- HcRhPortStatus[1:NDP] Register -------------- */
d_worrall 0:e7efc8468066 100 #define OR_RH_PORT_CCS 0x00000001
d_worrall 0:e7efc8468066 101 #define OR_RH_PORT_PRS 0x00000010
d_worrall 0:e7efc8468066 102 #define OR_RH_PORT_CSC 0x00010000
d_worrall 0:e7efc8468066 103 #define OR_RH_PORT_PRSC 0x00100000
d_worrall 0:e7efc8468066 104
d_worrall 0:e7efc8468066 105
d_worrall 0:e7efc8468066 106 /*
d_worrall 0:e7efc8468066 107 **************************************************************************************************************
d_worrall 0:e7efc8468066 108 * FRAME INTERVAL
d_worrall 0:e7efc8468066 109 **************************************************************************************************************
d_worrall 0:e7efc8468066 110 */
d_worrall 0:e7efc8468066 111
d_worrall 0:e7efc8468066 112 #define FI 0x2EDF /* 12000 bits per frame (-1) */
d_worrall 0:e7efc8468066 113 #define DEFAULT_FMINTERVAL ((((6 * (FI - 210)) / 7) << 16) | FI)
d_worrall 0:e7efc8468066 114
d_worrall 0:e7efc8468066 115 /*
d_worrall 0:e7efc8468066 116 **************************************************************************************************************
d_worrall 0:e7efc8468066 117 * TRANSFER DESCRIPTOR CONTROL FIELDS
d_worrall 0:e7efc8468066 118 **************************************************************************************************************
d_worrall 0:e7efc8468066 119 */
d_worrall 0:e7efc8468066 120
d_worrall 0:e7efc8468066 121 #define TD_ROUNDING (USB_INT32U) (0x00040000) /* Buffer Rounding */
d_worrall 0:e7efc8468066 122 #define TD_SETUP (USB_INT32U)(0) /* Direction of Setup Packet */
d_worrall 0:e7efc8468066 123 #define TD_IN (USB_INT32U)(0x00100000) /* Direction In */
d_worrall 0:e7efc8468066 124 #define TD_OUT (USB_INT32U)(0x00080000) /* Direction Out */
d_worrall 0:e7efc8468066 125 #define TD_DELAY_INT(x) (USB_INT32U)((x) << 21) /* Delay Interrupt */
d_worrall 0:e7efc8468066 126 #define TD_TOGGLE_0 (USB_INT32U)(0x02000000) /* Toggle 0 */
d_worrall 0:e7efc8468066 127 #define TD_TOGGLE_1 (USB_INT32U)(0x03000000) /* Toggle 1 */
d_worrall 0:e7efc8468066 128 #define TD_CC (USB_INT32U)(0xF0000000) /* Completion Code */
d_worrall 0:e7efc8468066 129
d_worrall 0:e7efc8468066 130 /*
d_worrall 0:e7efc8468066 131 **************************************************************************************************************
d_worrall 0:e7efc8468066 132 * USB STANDARD REQUEST DEFINITIONS
d_worrall 0:e7efc8468066 133 **************************************************************************************************************
d_worrall 0:e7efc8468066 134 */
d_worrall 0:e7efc8468066 135
d_worrall 0:e7efc8468066 136 #define USB_DESCRIPTOR_TYPE_DEVICE 1
d_worrall 0:e7efc8468066 137 #define USB_DESCRIPTOR_TYPE_CONFIGURATION 2
d_worrall 0:e7efc8468066 138 #define USB_DESCRIPTOR_TYPE_INTERFACE 4
d_worrall 0:e7efc8468066 139 #define USB_DESCRIPTOR_TYPE_ENDPOINT 5
d_worrall 0:e7efc8468066 140 /* ----------- Control RequestType Fields ----------- */
d_worrall 0:e7efc8468066 141 #define USB_DEVICE_TO_HOST 0x80
d_worrall 0:e7efc8468066 142 #define USB_HOST_TO_DEVICE 0x00
d_worrall 0:e7efc8468066 143 #define USB_REQUEST_TYPE_CLASS 0x20
d_worrall 0:e7efc8468066 144 #define USB_RECIPIENT_DEVICE 0x00
d_worrall 0:e7efc8468066 145 #define USB_RECIPIENT_INTERFACE 0x01
d_worrall 0:e7efc8468066 146 /* -------------- USB Standard Requests -------------- */
d_worrall 0:e7efc8468066 147 #define SET_ADDRESS 5
d_worrall 0:e7efc8468066 148 #define GET_DESCRIPTOR 6
d_worrall 0:e7efc8468066 149 #define SET_CONFIGURATION 9
d_worrall 0:e7efc8468066 150 #define SET_INTERFACE 11
d_worrall 0:e7efc8468066 151
d_worrall 0:e7efc8468066 152 /*
d_worrall 0:e7efc8468066 153 **************************************************************************************************************
d_worrall 0:e7efc8468066 154 * TYPE DEFINITIONS
d_worrall 0:e7efc8468066 155 **************************************************************************************************************
d_worrall 0:e7efc8468066 156 */
d_worrall 0:e7efc8468066 157
d_worrall 0:e7efc8468066 158 typedef struct hcEd { /* ----------- HostController EndPoint Descriptor ------------- */
d_worrall 0:e7efc8468066 159 volatile USB_INT32U Control; /* Endpoint descriptor control */
d_worrall 0:e7efc8468066 160 volatile USB_INT32U TailTd; /* Physical address of tail in Transfer descriptor list */
d_worrall 0:e7efc8468066 161 volatile USB_INT32U HeadTd; /* Physcial address of head in Transfer descriptor list */
d_worrall 0:e7efc8468066 162 volatile USB_INT32U Next; /* Physical address of next Endpoint descriptor */
d_worrall 0:e7efc8468066 163 } HCED;
d_worrall 0:e7efc8468066 164
d_worrall 0:e7efc8468066 165 typedef struct hcTd { /* ------------ HostController Transfer Descriptor ------------ */
d_worrall 0:e7efc8468066 166 volatile USB_INT32U Control; /* Transfer descriptor control */
d_worrall 0:e7efc8468066 167 volatile USB_INT32U CurrBufPtr; /* Physical address of current buffer pointer */
d_worrall 0:e7efc8468066 168 volatile USB_INT32U Next; /* Physical pointer to next Transfer Descriptor */
d_worrall 0:e7efc8468066 169 volatile USB_INT32U BufEnd; /* Physical address of end of buffer */
d_worrall 0:e7efc8468066 170 } HCTD;
d_worrall 0:e7efc8468066 171
d_worrall 0:e7efc8468066 172 typedef struct hcca { /* ----------- Host Controller Communication Area ------------ */
d_worrall 0:e7efc8468066 173 volatile USB_INT32U IntTable[32]; /* Interrupt Table */
d_worrall 0:e7efc8468066 174 volatile USB_INT32U FrameNumber; /* Frame Number */
d_worrall 0:e7efc8468066 175 volatile USB_INT32U DoneHead; /* Done Head */
d_worrall 0:e7efc8468066 176 volatile USB_INT08U Reserved[116]; /* Reserved for future use */
d_worrall 0:e7efc8468066 177 volatile USB_INT08U Unknown[4]; /* Unused */
d_worrall 0:e7efc8468066 178 } HCCA;
d_worrall 0:e7efc8468066 179
d_worrall 0:e7efc8468066 180 /*
d_worrall 0:e7efc8468066 181 **************************************************************************************************************
d_worrall 0:e7efc8468066 182 * EXTERN DECLARATIONS
d_worrall 0:e7efc8468066 183 **************************************************************************************************************
d_worrall 0:e7efc8468066 184 */
d_worrall 0:e7efc8468066 185
d_worrall 0:e7efc8468066 186 extern volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
d_worrall 0:e7efc8468066 187 extern volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
d_worrall 0:e7efc8468066 188 extern volatile HCTD *TDHead; /* Head transfer descriptor structure */
d_worrall 0:e7efc8468066 189 extern volatile HCTD *TDTail; /* Tail transfer descriptor structure */
d_worrall 0:e7efc8468066 190 extern volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
d_worrall 0:e7efc8468066 191
d_worrall 0:e7efc8468066 192 /*
d_worrall 0:e7efc8468066 193 **************************************************************************************************************
d_worrall 0:e7efc8468066 194 * FUNCTION PROTOTYPES
d_worrall 0:e7efc8468066 195 **************************************************************************************************************
d_worrall 0:e7efc8468066 196 */
d_worrall 0:e7efc8468066 197
d_worrall 0:e7efc8468066 198 void Host_Init (void);
d_worrall 0:e7efc8468066 199
d_worrall 0:e7efc8468066 200 extern "C" void USB_IRQHandler(void) __irq;
d_worrall 0:e7efc8468066 201
d_worrall 0:e7efc8468066 202 USB_INT32S Host_EnumDev (void);
d_worrall 0:e7efc8468066 203
d_worrall 0:e7efc8468066 204 USB_INT32S Host_ProcessTD(volatile HCED *ed,
d_worrall 0:e7efc8468066 205 volatile USB_INT32U token,
d_worrall 0:e7efc8468066 206 volatile USB_INT08U *buffer,
d_worrall 0:e7efc8468066 207 USB_INT32U buffer_len);
d_worrall 0:e7efc8468066 208
d_worrall 0:e7efc8468066 209 void Host_DelayUS ( USB_INT32U delay);
d_worrall 0:e7efc8468066 210 void Host_DelayMS ( USB_INT32U delay);
d_worrall 0:e7efc8468066 211
d_worrall 0:e7efc8468066 212
d_worrall 0:e7efc8468066 213 void Host_TDInit (volatile HCTD *td);
d_worrall 0:e7efc8468066 214 void Host_EDInit (volatile HCED *ed);
d_worrall 0:e7efc8468066 215 void Host_HCCAInit (volatile HCCA *hcca);
d_worrall 0:e7efc8468066 216
d_worrall 0:e7efc8468066 217 USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
d_worrall 0:e7efc8468066 218 USB_INT08U b_request,
d_worrall 0:e7efc8468066 219 USB_INT16U w_value,
d_worrall 0:e7efc8468066 220 USB_INT16U w_index,
d_worrall 0:e7efc8468066 221 USB_INT16U w_length,
d_worrall 0:e7efc8468066 222 volatile USB_INT08U *buffer);
d_worrall 0:e7efc8468066 223
d_worrall 0:e7efc8468066 224 USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
d_worrall 0:e7efc8468066 225 USB_INT08U b_request,
d_worrall 0:e7efc8468066 226 USB_INT16U w_value,
d_worrall 0:e7efc8468066 227 USB_INT16U w_index,
d_worrall 0:e7efc8468066 228 USB_INT16U w_length,
d_worrall 0:e7efc8468066 229 volatile USB_INT08U *buffer);
d_worrall 0:e7efc8468066 230
d_worrall 0:e7efc8468066 231 void Host_FillSetup( USB_INT08U bm_request_type,
d_worrall 0:e7efc8468066 232 USB_INT08U b_request,
d_worrall 0:e7efc8468066 233 USB_INT16U w_value,
d_worrall 0:e7efc8468066 234 USB_INT16U w_index,
d_worrall 0:e7efc8468066 235 USB_INT16U w_length);
d_worrall 0:e7efc8468066 236
d_worrall 0:e7efc8468066 237
d_worrall 0:e7efc8468066 238 void Host_WDHWait (void);
d_worrall 0:e7efc8468066 239
d_worrall 0:e7efc8468066 240
d_worrall 0:e7efc8468066 241 USB_INT32U ReadLE32U (volatile USB_INT08U *pmem);
d_worrall 0:e7efc8468066 242 void WriteLE32U (volatile USB_INT08U *pmem,
d_worrall 0:e7efc8468066 243 USB_INT32U val);
d_worrall 0:e7efc8468066 244 USB_INT16U ReadLE16U (volatile USB_INT08U *pmem);
d_worrall 0:e7efc8468066 245 void WriteLE16U (volatile USB_INT08U *pmem,
d_worrall 0:e7efc8468066 246 USB_INT16U val);
d_worrall 0:e7efc8468066 247 USB_INT32U ReadBE32U (volatile USB_INT08U *pmem);
d_worrall 0:e7efc8468066 248 void WriteBE32U (volatile USB_INT08U *pmem,
d_worrall 0:e7efc8468066 249 USB_INT32U val);
d_worrall 0:e7efc8468066 250 USB_INT16U ReadBE16U (volatile USB_INT08U *pmem);
d_worrall 0:e7efc8468066 251 void WriteBE16U (volatile USB_INT08U *pmem,
d_worrall 0:e7efc8468066 252 USB_INT16U val);
d_worrall 0:e7efc8468066 253
d_worrall 0:e7efc8468066 254 #endif