AFE
Dependencies: mbed-os-retarget-segger-rtt
source/main.h@2:04b708fb234b, 2020-09-04 (annotated)
- Committer:
- d4rth_j0k3r
- Date:
- Fri Sep 04 12:35:01 2020 +0000
- Revision:
- 2:04b708fb234b
- Parent:
- 0:8388b3dcbdf3
Finish
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
d4rth_j0k3r | 0:8388b3dcbdf3 | 1 | /* Pneumoscope Version 1.0 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 2 | Florian CHAYS |
d4rth_j0k3r | 0:8388b3dcbdf3 | 3 | */ |
d4rth_j0k3r | 0:8388b3dcbdf3 | 4 | |
d4rth_j0k3r | 0:8388b3dcbdf3 | 5 | // Defines for Registers |
d4rth_j0k3r | 0:8388b3dcbdf3 | 6 | #define CONTROL0 0x00 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 7 | |
d4rth_j0k3r | 0:8388b3dcbdf3 | 8 | // timing registers |
d4rth_j0k3r | 0:8388b3dcbdf3 | 9 | #define LED2STC 0x01 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 10 | #define LED2ENDC 0x02 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 11 | #define LED2LEDSTC 0x03 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 12 | #define LED2LEDENDC 0x04 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 13 | #define ALED2STC 0x05 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 14 | #define ALED2ENDC 0x06 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 15 | #define LED1STC 0x07 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 16 | #define LED1ENDC 0x08 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 17 | #define LED1LEDSTC 0x09 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 18 | #define LED1LEDENDC 0x0A |
d4rth_j0k3r | 0:8388b3dcbdf3 | 19 | #define ALED1STC 0x0B |
d4rth_j0k3r | 0:8388b3dcbdf3 | 20 | #define ALED1ENDC 0x0C |
d4rth_j0k3r | 0:8388b3dcbdf3 | 21 | #define LED2CONVST 0x0D |
d4rth_j0k3r | 0:8388b3dcbdf3 | 22 | #define LED2CONVEND 0x0E |
d4rth_j0k3r | 0:8388b3dcbdf3 | 23 | #define ALED2CONVST 0x0F |
d4rth_j0k3r | 0:8388b3dcbdf3 | 24 | #define ALED2CONVEND 0x10 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 25 | #define LED1CONVST 0x11 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 26 | #define LED1CONVEND 0x12 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 27 | #define ALED1CONVST 0x13 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 28 | #define ALED1CONVEND 0x14 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 29 | #define ADCRSTSTCT0 0x15 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 30 | #define ADCRSTENDCT0 0x16 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 31 | #define ADCRSTSTCT1 0x17 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 32 | #define ADCRSTENDCT1 0x18 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 33 | #define ADCRSTSTCT2 0x19 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 34 | #define ADCRSTENDCT2 0x1A |
d4rth_j0k3r | 0:8388b3dcbdf3 | 35 | #define ADCRSTSTCT3 0x1B |
d4rth_j0k3r | 0:8388b3dcbdf3 | 36 | #define ADCRSTENDCT3 0x1C |
d4rth_j0k3r | 0:8388b3dcbdf3 | 37 | #define PRPCOUNT 0x1D |
d4rth_j0k3r | 0:8388b3dcbdf3 | 38 | |
d4rth_j0k3r | 0:8388b3dcbdf3 | 39 | #define CONTROL1 0x1E |
d4rth_j0k3r | 0:8388b3dcbdf3 | 40 | #define SPARE1 0x1F |
d4rth_j0k3r | 0:8388b3dcbdf3 | 41 | #define TIAGAIN 0x20 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 42 | #define TIA_AMB_GAIN 0x21 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 43 | #define LEDCNTRL 0x22 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 44 | #define CONTROL2 0x23 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 45 | #define SPARE2 0x24 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 46 | #define SPARE3 0x25 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 47 | #define SPARE4 0x26 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 48 | #define RESERVED1 0x27 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 49 | #define RESERVED2 0x28 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 50 | #define ALARM 0x29 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 51 | #define LED2VAL 0x2A |
d4rth_j0k3r | 0:8388b3dcbdf3 | 52 | #define ALED2VAL 0x2B |
d4rth_j0k3r | 0:8388b3dcbdf3 | 53 | #define LED1VAL 0x2C |
d4rth_j0k3r | 0:8388b3dcbdf3 | 54 | #define ALED1VAL 0x2D |
d4rth_j0k3r | 0:8388b3dcbdf3 | 55 | #define LED2_ALED2VAL 0x2E |
d4rth_j0k3r | 0:8388b3dcbdf3 | 56 | #define LED1_ALED1VAL 0x2F |
d4rth_j0k3r | 0:8388b3dcbdf3 | 57 | #define DIAG 0x30 |
d4rth_j0k3r | 0:8388b3dcbdf3 | 58 | |
d4rth_j0k3r | 0:8388b3dcbdf3 | 59 | // ==== Globals ==== |
d4rth_j0k3r | 0:8388b3dcbdf3 | 60 | SPI spi(P1_3,P1_4,P1_6); // mosi, miso, sclk |
d4rth_j0k3r | 0:8388b3dcbdf3 | 61 | DigitalOut cs(P1_5); |
d4rth_j0k3r | 0:8388b3dcbdf3 | 62 | DigitalIn AFE_DIAG_END(P0_11); |
d4rth_j0k3r | 0:8388b3dcbdf3 | 63 | DigitalIn button(P0_12); |
d4rth_j0k3r | 0:8388b3dcbdf3 | 64 | DigitalOut myled(P0_13); |
d4rth_j0k3r | 0:8388b3dcbdf3 | 65 | DigitalOut SUP_EN(P0_25); |
d4rth_j0k3r | 0:8388b3dcbdf3 | 66 | DigitalIn ADC_READY(P1_1); |
d4rth_j0k3r | 0:8388b3dcbdf3 | 67 | DigitalOut AFE_PDN(P1_2); |
d4rth_j0k3r | 0:8388b3dcbdf3 | 68 | DigitalOut AFE_nRST(P1_7); |
d4rth_j0k3r | 0:8388b3dcbdf3 | 69 | DigitalIn AFE_LED_ALM(P1_8); |
d4rth_j0k3r | 0:8388b3dcbdf3 | 70 | DigitalIn AFE_PD_ALM(P1_9); |
d4rth_j0k3r | 2:04b708fb234b | 71 | |
d4rth_j0k3r | 2:04b708fb234b | 72 | unsigned long AFE_Default[49] = { |
d4rth_j0k3r | 2:04b708fb234b | 73 | //Reg0: CONTROL0: CONTROL REGISTER 0 |
d4rth_j0k3r | 2:04b708fb234b | 74 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 75 | //Reg1:REDSTARTCOUNT: SAMPLE RED START COUNT |
d4rth_j0k3r | 2:04b708fb234b | 76 | 6000, |
d4rth_j0k3r | 2:04b708fb234b | 77 | //Reg2:REDENDCOUNT: SAMPLE RED END COUNT |
d4rth_j0k3r | 2:04b708fb234b | 78 | 7999, |
d4rth_j0k3r | 2:04b708fb234b | 79 | //Reg3:REDLEDSTARTCOUNT: RED LED START COUNT |
d4rth_j0k3r | 2:04b708fb234b | 80 | 6000, |
d4rth_j0k3r | 2:04b708fb234b | 81 | //Reg4:REDLEDENDCOUNT: RED LED END COUNT |
d4rth_j0k3r | 2:04b708fb234b | 82 | 7998, |
d4rth_j0k3r | 2:04b708fb234b | 83 | //Reg5:AMBREDSTARTCOUNT: SAMPLE AMBIENT RED START COUNT |
d4rth_j0k3r | 2:04b708fb234b | 84 | 0000, |
d4rth_j0k3r | 2:04b708fb234b | 85 | //Reg6:AMBREDENDCOUNT: SAMPLE AMBIENT RED END COUNT |
d4rth_j0k3r | 2:04b708fb234b | 86 | 1998, |
d4rth_j0k3r | 2:04b708fb234b | 87 | //Reg7:IRSTARTCOUNT: SAMPLE IR START COUNT |
d4rth_j0k3r | 2:04b708fb234b | 88 | 2000, |
d4rth_j0k3r | 2:04b708fb234b | 89 | //Reg8:IRENDCOUNT: SAMPLE IR END COUNT |
d4rth_j0k3r | 2:04b708fb234b | 90 | 3999, |
d4rth_j0k3r | 2:04b708fb234b | 91 | //Reg9:IRLEDSTARTCOUNT: IR LED START COUNT |
d4rth_j0k3r | 2:04b708fb234b | 92 | 2000, |
d4rth_j0k3r | 2:04b708fb234b | 93 | //Reg10:IRLEDENDCOUNT: IR LED END COUNT |
d4rth_j0k3r | 2:04b708fb234b | 94 | 3999, |
d4rth_j0k3r | 2:04b708fb234b | 95 | //Reg11:AMBIRSTARTCOUNT: SAMPLE AMBIENT IR START COUNT |
d4rth_j0k3r | 2:04b708fb234b | 96 | 4000, |
d4rth_j0k3r | 2:04b708fb234b | 97 | //Reg12:AMBIRENDCOUNT: SAMPLE AMBIENT IR END COUNT |
d4rth_j0k3r | 2:04b708fb234b | 98 | 5998, |
d4rth_j0k3r | 2:04b708fb234b | 99 | //Reg13:REDCONVSTART: REDCONVST |
d4rth_j0k3r | 2:04b708fb234b | 100 | 2, |
d4rth_j0k3r | 2:04b708fb234b | 101 | //Reg14:REDCONVEND: RED CONVERT END COUNT |
d4rth_j0k3r | 2:04b708fb234b | 102 | 1999, |
d4rth_j0k3r | 2:04b708fb234b | 103 | //Reg15:AMBREDCONVSTART: RED AMBIENT CONVERT START COUNT |
d4rth_j0k3r | 2:04b708fb234b | 104 | 2002, |
d4rth_j0k3r | 2:04b708fb234b | 105 | //Reg16:AMBREDCONVEND: RED AMBIENT CONVERT END COUNT |
d4rth_j0k3r | 2:04b708fb234b | 106 | 3999, |
d4rth_j0k3r | 2:04b708fb234b | 107 | //Reg17:IRCONVSTART: IR CONVERT START COUNT |
d4rth_j0k3r | 2:04b708fb234b | 108 | 4002, |
d4rth_j0k3r | 2:04b708fb234b | 109 | //Reg18:IRCONVEND: IR CONVERT END COUNT |
d4rth_j0k3r | 2:04b708fb234b | 110 | 5999, |
d4rth_j0k3r | 2:04b708fb234b | 111 | //Reg19:AMBIRCONVSTART: IR AMBIENT CONVERT START COUNT |
d4rth_j0k3r | 2:04b708fb234b | 112 | 6002, |
d4rth_j0k3r | 2:04b708fb234b | 113 | //Reg20:AMBIRCONVEND: IR AMBIENT CONVERT END COUNT |
d4rth_j0k3r | 2:04b708fb234b | 114 | 7999, |
d4rth_j0k3r | 2:04b708fb234b | 115 | //Reg21:ADCRESETSTCOUNT0: ADC RESET 0 START COUNT |
d4rth_j0k3r | 2:04b708fb234b | 116 | 0, |
d4rth_j0k3r | 2:04b708fb234b | 117 | //Reg22:ADCRESETENDCOUNT0: ADC RESET 0 END COUNT |
d4rth_j0k3r | 2:04b708fb234b | 118 | 2, |
d4rth_j0k3r | 2:04b708fb234b | 119 | //Reg23:ADCRESETSTCOUNT1: ADC RESET 1 START COUNT |
d4rth_j0k3r | 2:04b708fb234b | 120 | 2000, |
d4rth_j0k3r | 2:04b708fb234b | 121 | //Reg24:ADCRESETENDCOUNT1: ADC RESET 1 END COUNT |
d4rth_j0k3r | 2:04b708fb234b | 122 | 2002, |
d4rth_j0k3r | 2:04b708fb234b | 123 | //Reg25:ADCRESETENDCOUNT2: ADC RESET 2 START COUNT |
d4rth_j0k3r | 2:04b708fb234b | 124 | 4000, |
d4rth_j0k3r | 2:04b708fb234b | 125 | //Reg26:ADCRESETENDCOUNT2: ADC RESET 2 END COUNT |
d4rth_j0k3r | 2:04b708fb234b | 126 | 4002, |
d4rth_j0k3r | 2:04b708fb234b | 127 | //Reg27:ADCRESETENDCOUNT3: ADC RESET 3 START COUNT |
d4rth_j0k3r | 2:04b708fb234b | 128 | 6000, |
d4rth_j0k3r | 2:04b708fb234b | 129 | //Reg28:ADCRESETENDCOUNT3: ADC RESET 3 END COUNT |
d4rth_j0k3r | 2:04b708fb234b | 130 | 6002, |
d4rth_j0k3r | 2:04b708fb234b | 131 | //Reg29:PRPCOUNT: PULSE REPETITION PERIOD COUNT |
d4rth_j0k3r | 2:04b708fb234b | 132 | 7999, |
d4rth_j0k3r | 2:04b708fb234b | 133 | //Reg30:CONTROL1: CONTROL REGISTER 1 |
d4rth_j0k3r | 2:04b708fb234b | 134 | 0x00107, //timer enabled, averages=3, RED and IR LED pulse ON PD_ALM AND LED_ALM pins |
d4rth_j0k3r | 2:04b708fb234b | 135 | //Reg31:?: ?? |
d4rth_j0k3r | 2:04b708fb234b | 136 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 137 | //Reg32:TIAGAIN: TRANS IMPEDANCE AMPLIFIER GAIN SETTING REGISTER |
d4rth_j0k3r | 2:04b708fb234b | 138 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 139 | //Reg33:TIA_AMB_GAIN: TRANS IMPEDANCE AAMPLIFIER AND AMBIENT CANELLATION STAGE GAIN |
d4rth_j0k3r | 2:04b708fb234b | 140 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 141 | //Reg34:LEDCNTRL: LED CONTROL REGISTER |
d4rth_j0k3r | 2:04b708fb234b | 142 | 0x11414, |
d4rth_j0k3r | 2:04b708fb234b | 143 | //Reg35:CONTROL2: CONTROL REGISTER 2 |
d4rth_j0k3r | 2:04b708fb234b | 144 | 0x00000, //bit 9 |
d4rth_j0k3r | 2:04b708fb234b | 145 | //Reg36:?: ?? |
d4rth_j0k3r | 2:04b708fb234b | 146 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 147 | //Reg37:?: ?? |
d4rth_j0k3r | 2:04b708fb234b | 148 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 149 | //Reg38:?: ?? |
d4rth_j0k3r | 2:04b708fb234b | 150 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 151 | //Reg39:?: ?? |
d4rth_j0k3r | 2:04b708fb234b | 152 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 153 | //Reg40:: ?? |
d4rth_j0k3r | 2:04b708fb234b | 154 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 155 | //Reg41:ALARM: ?? |
d4rth_j0k3r | 2:04b708fb234b | 156 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 157 | //Reg42:REDVALUE: RED DIGITAL SAMPLE VALUE |
d4rth_j0k3r | 2:04b708fb234b | 158 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 159 | //Reg43:AMBREDVALUE: Ambient RED Digital Sample Value |
d4rth_j0k3r | 2:04b708fb234b | 160 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 161 | //Reg44:IRVALUE: IR Digital Sample Value |
d4rth_j0k3r | 2:04b708fb234b | 162 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 163 | //Reg45:AMBIRVALUE: Ambient IR Digital Sample Value |
d4rth_j0k3r | 2:04b708fb234b | 164 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 165 | //Reg46:RED-AMBREDVALUE: RED-AMBIENT RED DIGITAL SAMPLE VALUE |
d4rth_j0k3r | 2:04b708fb234b | 166 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 167 | //Reg47:IR-AMBIRVALUE: IR-AMBIENT IR DIGITAL SAMPLE VALUE |
d4rth_j0k3r | 2:04b708fb234b | 168 | 0x00000, |
d4rth_j0k3r | 2:04b708fb234b | 169 | //Reg48:DIGNOSTICS: DIAGNOSTICS FLAGS REGISTER |
d4rth_j0k3r | 2:04b708fb234b | 170 | 0x00000 |
d4rth_j0k3r | 2:04b708fb234b | 171 | }; |
d4rth_j0k3r | 0:8388b3dcbdf3 | 172 | |
d4rth_j0k3r | 0:8388b3dcbdf3 | 173 | // ==== Prototypes ==== |
d4rth_j0k3r | 0:8388b3dcbdf3 | 174 | void SPI_Write(char address, uint32_t data); |
d4rth_j0k3r | 0:8388b3dcbdf3 | 175 | uint32_t SPI_Read(char raddress); |
d4rth_j0k3r | 2:04b708fb234b | 176 | void SPI_Write_Bit(char address, uint8_t bit, bool bit_high); |
d4rth_j0k3r | 2:04b708fb234b | 177 | |
d4rth_j0k3r | 2:04b708fb234b | 178 | void AFE_reset(); |
d4rth_j0k3r | 2:04b708fb234b | 179 | void AFE_begin(); |
d4rth_j0k3r | 2:04b708fb234b | 180 | void AFE_set_LED_current(uint8_t led1_current, uint8_t led2_current); |
d4rth_j0k3r | 2:04b708fb234b | 181 | void AFE_measurement(); |
d4rth_j0k3r | 2:04b708fb234b | 182 | void AFE_register_state(); |
d4rth_j0k3r | 2:04b708fb234b | 183 | void AFE_control_register(); |
d4rth_j0k3r | 2:04b708fb234b | 184 | void AFE_diag_flag(); |
d4rth_j0k3r | 2:04b708fb234b | 185 | void AFE_Results(); |
d4rth_j0k3r | 2:04b708fb234b | 186 | |
d4rth_j0k3r | 2:04b708fb234b | 187 | bool error_check(int index, uint32_t data_in, uint32_t data_out); |
d4rth_j0k3r | 0:8388b3dcbdf3 | 188 | void blinky(int delay); |