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Revision 3:cd7f899f155f, committed 2015-01-01
- Comitter:
- d34d
- Date:
- Thu Jan 01 05:18:12 2015 +0000
- Parent:
- 2:35a860dbaba5
- Child:
- 4:ca02a935e8eb
- Commit message:
- Make A7105 class mo-better
Changed in this revision
| a7105txrx.cpp | Show annotated file Show diff for this revision Revisions of this file |
| a7105txrx.h | Show annotated file Show diff for this revision Revisions of this file |
--- a/a7105txrx.cpp Tue Sep 02 03:12:10 2014 +0000
+++ b/a7105txrx.cpp Thu Jan 01 05:18:12 2015 +0000
@@ -18,6 +18,7 @@
// write value into register
uint8_t ret = mSpiMaster.write(value);
// de-assert CS
+ wait_us(1);
mChipSelect = 1;
return ret;
@@ -27,13 +28,112 @@
// assert CS
mChipSelect = 0;
// write register and read value
- uint8_t ret = mSpiMaster.write(regAddr);
+ uint8_t ret = mSpiMaster.write(_READ(regAddr));
// de-assert CS
+ wait_us(1);
+ mChipSelect = 1;
+
+ return ret;
+}
+
+uint8_t A7105::strobe(enum A7105_State state) {
+ // assert CS
+ mChipSelect = 0;
+ // write strobe command
+ uint8_t ret = mSpiMaster.write(state);
+ // de-assert CS
+ wait_us(1);
mChipSelect = 1;
return ret;
}
-uint8_t A7105::reset() {
- return writeRegister(MODE, 0x00);
+void A7105::writeData(uint8_t* data, size_t len) {
+ // assert CS
+ mChipSelect = 0;
+ mSpiMaster.write(A7105_RST_WRPTR);
+ mSpiMaster.write(A7105_05_FIFO_DATA);
+ for (size_t i = 0; i < len; i++) {
+ mSpiMaster.write(data[i]);
+ }
+
+ // de-assert CS
+ wait_us(1);
+ mChipSelect = 1;
+}
+
+void A7105::readData(uint8_t* buffer, size_t len) {
+ strobe(A7105_RST_RDPTR);
+ for (size_t i = 0; i < len; i++) {
+ buffer[i] = readRegister(A7105_05_FIFO_DATA);
+ }
+}
+
+void A7105::setId(uint32_t id) {
+ // assert CS
+ mChipSelect = 0;
+ mSpiMaster.write(A7105_06_ID_DATA);
+ mSpiMaster.write((uint8_t)(id >> 24) & 0xFF);
+ mSpiMaster.write((uint8_t)(id >> 16) & 0xFF);
+ mSpiMaster.write((uint8_t)(id >> 8) & 0xFF);
+ mSpiMaster.write((uint8_t)id & 0xFF);
+ // de-assert CS
+ wait_us(1);
+ mChipSelect = 1;
+}
+
+void A7105::setPower(int32_t power) {
+ /*
+ Power amp is ~+16dBm so:
+ TXPOWER_100uW = -23dBm == PAC=0 TBG=0
+ TXPOWER_300uW = -20dBm == PAC=0 TBG=1
+ TXPOWER_1mW = -16dBm == PAC=0 TBG=2
+ TXPOWER_3mW = -11dBm == PAC=0 TBG=4
+ TXPOWER_10mW = -6dBm == PAC=1 TBG=5
+ TXPOWER_30mW = 0dBm == PAC=2 TBG=7
+ TXPOWER_100mW = 1dBm == PAC=3 TBG=7
+ TXPOWER_150mW = 1dBm == PAC=3 TBG=7
+ */
+ uint8_t pac, tbg;
+ switch(power) {
+ case 0: pac = 0; tbg = 0; break;
+ case 1: pac = 0; tbg = 1; break;
+ case 2: pac = 0; tbg = 2; break;
+ case 3: pac = 0; tbg = 4; break;
+ case 4: pac = 1; tbg = 5; break;
+ case 5: pac = 2; tbg = 7; break;
+ case 6: pac = 3; tbg = 7; break;
+ case 7: pac = 3; tbg = 7; break;
+ default: pac = 0; tbg = 0; break;
+ };
+ writeRegister(A7105_28_TX_TEST, (pac << 3) | tbg);
+}
+
+void A7105::setTxRxMode(enum TXRX_State mode) {
+ if(mode == TX_EN) {
+ writeRegister(A7105_0B_GPIO1_PIN_I, 0x33);
+ writeRegister(A7105_0C_GPIO2_PIN_II, 0x31);
+ } else if (mode == RX_EN) {
+ writeRegister(A7105_0B_GPIO1_PIN_I, 0x31);
+ writeRegister(A7105_0C_GPIO2_PIN_II, 0x33);
+ } else {
+ //The A7105 seems to some with a cross-wired power-amp (A7700)
+ //On the XL7105-D03, TX_EN -> RXSW and RX_EN -> TXSW
+ //This means that sleep mode is wired as RX_EN = 1 and TX_EN = 1
+ //If there are other amps in use, we'll need to fix this
+ writeRegister(A7105_0B_GPIO1_PIN_I, 0x33);
+ writeRegister(A7105_0C_GPIO2_PIN_II, 0x33);
+ }
+}
+
+int8_t A7105::reset() {
+ writeRegister(A7105_00_MODE, 0x00);
+ wait_us(1000);
+
+ // Set both GPIO as output and low
+ setTxRxMode(TXRX_OFF);
+ int8_t result = readRegister(A7105_10_PLL_II) == 0x9E;
+ strobe(A7105_STANDBY);
+
+ return result;
}
\ No newline at end of file
--- a/a7105txrx.h Tue Sep 02 03:12:10 2014 +0000
+++ b/a7105txrx.h Thu Jan 01 05:18:12 2015 +0000
@@ -1,111 +1,85 @@
#ifndef _A7105_TX_RX_H
#define _A7105_TX_RX_H
-/******************************
- * Control register addresses *
- ******************************/
-//! Mode register
-#define MODE 0x00
-//! Mode control register
-#define MODE_CONTROL 0x01
-//! Calibration control register
-#define CALC 0x02
-//! FIFO register 1
-#define FIFO_1 0x03
-//! FIFO register 2
-#define FIFO_2 0x04
-//! FIFO data register
-#define FIFO_DATA 0x05
-//! ID data register
-#define ID_DATA 0x06
-//! RC OSC register 1
-#define RC_OSC_1 0x07
-//! RC OSC register 2
-#define RC_OSC_2 0x08
-//! RC OSC register 3
-#define RC_OSC_3 0x09
-//! CKO pin control register
-#define CKO 0x0A
-//! GPIO1 pin control register
-#define GPIO1 0x0B
-//! GPIO2 pin control register
-#define CPIO2 0x0C
-//! Clock register
-#define CLOCK 0x0D
-//! Data rate register
-#define DATA_RATE 0x0E
-//! PLL register 1
-#define PLL_1 0x0F
-//! PLL register 2
-#define PLL_2 0x10
-//! PLL register 3
-#define PLL_3 0x11
-//! PLL register 4
-#define PLL_4 0x12
-//! PLL register 5
-#define PLL_5 0x13
-//! TX register 1
-#define TX_1 0x14
-//! TX register 2
-#define TX_2 0x15
-//! Delay register 1
-#define DELAY_1 0x16
-//! Delay register 2
-#define DELAY_2 0x17
-//! RX register
-#define RX 0x18
-//! RX gain register 1
-#define RX_GAIN_1 0x19
-//! RX gain register 2
-#define RX_GAIN_2 0x1A
-//! RX gain register 3
-#define RX_GAIN_3 0x1B
-//! RX gain register 4
-#define RX_GAIN_4 0x1C
-//! RSSI threshold register
-#define RSSI_THRESHOLD 0x1D
-//! ADC control register
-#define ADC_CONTROL 0x1E
-//! Code register 1
-#define CODE_1 0x1F
-//! Code register 2
-#define CODE_2 0x20
-//! Code register 3
-#define CODE_3 0x21
-//! IF calibration register 1
-#define IF_CAL_1 0x22
-//! IF calibration register 2
-#define IF_CAL_2 0x23
-//! VCO current calibration register
-#define VCO_CUR_CAL 0x24
-//! VCO single band calibration register 1
-#define VCO_SBC_1 0x25
-//! VCO single band calibration register 2
-#define VCO_SBC_2 0x26
-//! Battery detect register
-#define BATTERY_DETECT 0x27
-//! TX test register
-#define TX_TEST 0x28
-//! RX dem test register 1
-#define RX_DEM_TEST_1 0x29
-//! RX dem test register 2
-#define RX_DEM_TEST_2 0x2A
-//! Charge pump current register
-#define CPC 0x2B
-//! Crystal test register
-#define XTAL_TEST 0x2C
-//! PLL test register
-#define PLL_TEST 0x2D
-//! VCO test register 1
-#define VCO_TEST_1 0x2E
-//! VCO test register 2
-#define VCO_TEST_2 0x2F
-//! IFAT register
-#define IFAT 0x30
-//! RScale register
-#define RSCALE 0x31
-//! Filter test register
-#define FILTER_TEST 0x32
+#define _WRITE(a) ((a) & ~0x40)
+#define _READ(a) ((a) | 0x40)
+
+enum TXRX_State {
+ TXRX_OFF,
+ TX_EN,
+ RX_EN,
+};
+
+enum A7105_State {
+ A7105_SLEEP = 0x80,
+ A7105_IDLE = 0x90,
+ A7105_STANDBY = 0xA0,
+ A7105_PLL = 0xB0,
+ A7105_RX = 0xC0,
+ A7105_TX = 0xD0,
+ A7105_RST_WRPTR = 0xE0,
+ A7105_RST_RDPTR = 0xF0,
+};
+
+enum {
+ A7105_00_MODE = 0x00,
+ A7105_01_MODE_CONTROL = 0x01,
+ A7105_02_CALC = 0x02,
+ A7105_03_FIFOI = 0x03,
+ A7105_04_FIFOII = 0x04,
+ A7105_05_FIFO_DATA = 0x05,
+ A7105_06_ID_DATA = 0x06,
+ A7105_07_RC_OSC_I = 0x07,
+ A7105_08_RC_OSC_II = 0x08,
+ A7105_09_RC_OSC_III = 0x09,
+ A7105_0A_CK0_PIN = 0x0A,
+ A7105_0B_GPIO1_PIN_I = 0x0B,
+ A7105_0C_GPIO2_PIN_II = 0x0C,
+ A7105_0D_CLOCK = 0x0D,
+ A7105_0E_DATA_RATE = 0x0E,
+ A7105_0F_PLL_I = 0x0F,
+ A7105_10_PLL_II = 0x10,
+ A7105_11_PLL_III = 0x11,
+ A7105_12_PLL_IV = 0x12,
+ A7105_13_PLL_V = 0x13,
+ A7105_14_TX_I = 0x14,
+ A7105_15_TX_II = 0x15,
+ A7105_16_DELAY_I = 0x16,
+ A7105_17_DELAY_II = 0x17,
+ A7105_18_RX = 0x18,
+ A7105_19_RX_GAIN_I = 0x19,
+ A7105_1A_RX_GAIN_II = 0x1A,
+ A7105_1B_RX_GAIN_III = 0x1B,
+ A7105_1C_RX_GAIN_IV = 0x1C,
+ A7105_1D_RSSI_THOLD = 0x1D,
+ A7105_1E_ADC = 0x1E,
+ A7105_1F_CODE_I = 0x1F,
+ A7105_20_CODE_II = 0x20,
+ A7105_21_CODE_III = 0x21,
+ A7105_22_IF_CALIB_I = 0x22,
+ A7105_23_IF_CALIB_II = 0x23,
+ A7105_24_VCO_CURCAL = 0x24,
+ A7105_25_VCO_SBCAL_I = 0x25,
+ A7105_26_VCO_SBCAL_II = 0x26,
+ A7105_27_BATTERY_DET = 0x27,
+ A7105_28_TX_TEST = 0x28,
+ A7105_29_RX_DEM_TEST_I = 0x29,
+ A7105_2A_RX_DEM_TEST_II = 0x2A,
+ A7105_2B_CPC = 0x2B,
+ A7105_2C_XTAL_TEST = 0x2C,
+ A7105_2D_PLL_TEST = 0x2D,
+ A7105_2E_VCO_TEST_I = 0x2E,
+ A7105_2F_VCO_TEST_II = 0x2F,
+ A7105_30_IFAT = 0x30,
+ A7105_31_RSCALE = 0x31,
+ A7105_32_FILTER_TEST = 0x32,
+};
+#define A7105_0F_CHANNEL A7105_0F_PLL_I
+
+enum A7105_MASK {
+ A7105_MASK_FBCF = 1 << 4,
+ A7105_MASK_VBCF = 1 << 3,
+};
/**
* Class for interfacing with the AMICCOM A7105 2.4G FSK/GFSK Transceiver
@@ -172,12 +146,28 @@
*/
uint8_t readRegister(uint8_t regAddr);
+ uint8_t strobe(enum A7105_State state);
+
+ /**
+ * Send a packate of data to the A7105
+ *
+ * @param data Byte array to send
+ * @param len Length of the byte array
+ */
+ void writeData(uint8_t* data, size_t len);
+
+ void readData(uint8_t* buffer, size_t len);
+
+ void setId(uint32_t id);
+
+ void setPower(int32_t power);
+
+ void setTxRxMode(enum TXRX_State mode);
+
/**
* Resets the A7105, putting it into standby mode.
- *
- * @return Value returned from the slave after writing 0x00 to the MODE register.
*/
- uint8_t reset();
+ int8_t reset();
private:
SPI mSpiMaster;